WO2018177072A1 - 失效像素检测电路、方法和显示装置 - Google Patents

失效像素检测电路、方法和显示装置 Download PDF

Info

Publication number
WO2018177072A1
WO2018177072A1 PCT/CN2018/077884 CN2018077884W WO2018177072A1 WO 2018177072 A1 WO2018177072 A1 WO 2018177072A1 CN 2018077884 W CN2018077884 W CN 2018077884W WO 2018177072 A1 WO2018177072 A1 WO 2018177072A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit
pixel
detecting
emitting element
failed
Prior art date
Application number
PCT/CN2018/077884
Other languages
English (en)
French (fr)
Inventor
李永谦
徐攀
李全虎
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/086,675 priority Critical patent/US10818207B2/en
Priority to EP18775675.4A priority patent/EP3605511A4/en
Priority to JP2019552977A priority patent/JP7272729B2/ja
Publication of WO2018177072A1 publication Critical patent/WO2018177072A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof

Definitions

  • the present disclosure relates to a failed pixel detection circuit, method, and display device.
  • the cathode and the anode of the light-emitting element in some of the pixels are short-circuited due to unavoidable factors such as particle particles (such as dust).
  • particle particles such as dust
  • the current is constantly applied to the short circuit due to the continuous application of current, and the thermal effect increases the aging of the peripheral pixel TFT (Thin Film Transistor) and the light-emitting element, and even causes a large area defect. .
  • Embodiments of the present disclosure provide a failed pixel detecting circuit applied to a pixel circuit, wherein the pixel circuit includes a light emitting element and a pixel driving circuit connected to a first electrode of the light emitting element, the failed pixel detecting circuit including a display control circuit and a failing pixel detecting circuit, wherein
  • the display control circuit is coupled to the pixel driving circuit, configured to control the pixel driving circuit not to illuminate the light emitting element during a detection voltage writing phase and a failed pixel detecting phase;
  • the failed pixel detecting circuit is connected to the first pole of the light emitting element through a failure detecting line, and configured to provide a reference voltage to the first pole of the light emitting element through the fail detecting line in the detecting voltage writing phase, and in the failed pixel
  • the detecting phase detects the potential of the first pole of the light emitting element, and determines whether the pixel circuit is invalid according to the potential.
  • the failed pixel detecting circuit of the embodiment of the present disclosure further includes a detecting switch circuit and a switch control circuit;
  • a control end of the detection switch circuit is connected to the switch control circuit, a first end of the detection switch circuit is connected to a first pole of the light emitting element, and a second end of the detection switch circuit and the failure detection Line connection
  • the switch control circuit is configured to control the detection switch circuit to control a first pole of the light emitting element to be connected to the fail detection line during a detection voltage writing phase and a failing pixel detection phase, and to control the detection switch circuit during a display phase
  • the first pole of the light emitting element is electrically disconnected from the fail detection line.
  • the detecting switch circuit comprises:
  • the switching transistor is detected, and the gate is connected to the switch control circuit, the first pole is connected to the first pole of the light emitting element, and the second pole is connected to the failure detecting line.
  • the pixel driving circuit is further connected to the data line;
  • the failed pixel detecting circuit is further connected to the display control circuit, and configured to output a dark state control signal to the display control circuit after determining that the pixel circuit fails;
  • the display control circuit is coupled to the data line and configured to provide a dark state data voltage to the data line during a display phase after receiving the dark state control signal such that the light emitting element is not illuminated.
  • the pixel driving circuit includes a driving transistor, a storage circuit, and a data writing circuit
  • a gate of the driving transistor is connected to the data line through the data writing circuit, a first pole of the driving transistor is connected to a high level input terminal, a second pole of the driving transistor and the light emitting component a first pole connection, the second pole of the light emitting element is connected to the low level input end;
  • the memory circuit is connected between a gate of the driving transistor and a second electrode of the driving transistor;
  • the display control circuit is further coupled to the data write circuit, configured to control the data write circuit to cause a gate of the drive transistor and the data line in a sense voltage write phase and a fail pixel detection phase Connecting, and writing a turn-off voltage to the data line during the detection voltage writing phase and the failed pixel detecting phase to control the driving transistor to be turned off.
  • the storage circuit comprises a storage capacitor.
  • the data writing circuit includes a data writing transistor, a gate of the data writing transistor is connected to the display control circuit, a source is connected to a source of the driving transistor, and a drain and the Data line connection.
  • the light emitting element is a self-luminous element.
  • a first anode of the light-emitting element, a second cathode of the light-emitting element, and a voltage value of the reference voltage is greater than a voltage value of a cathode of the light-emitting element.
  • the failed pixel detecting circuit is configured to determine that the pixel circuit is invalid in response to detecting that a potential of the first pole of the light emitting element is lower than a preset voltage value in the failed pixel detecting phase.
  • the present disclosure also provides a method for detecting a failed pixel, which is applied to the above-described failed pixel detecting circuit, and the method for detecting a failed pixel includes:
  • the display control circuit controls the pixel driving circuit not to illuminate the light emitting element, and the failed pixel detecting circuit supplies a reference voltage to the first pole of the light emitting element through the failure detecting line;
  • the display control circuit controls the pixel driving circuit not to illuminate the light emitting element, the failed pixel detecting circuit detects the potential of the first electrode of the light emitting element, and determines whether the pixel circuit is invalid according to the potential.
  • the failed pixel detecting circuit further includes a detecting switch circuit and a switch control circuit, where the failed pixel detecting method further includes:
  • the switch control circuit controls the detecting switch circuit to connect the first pole of the light emitting element to the fail detecting line;
  • the switch control circuit controls the detection switch circuit such that the first pole of the light emitting element is not connected to the fail detection line.
  • the method for detecting a failed pixel according to the present disclosure further includes:
  • the failed pixel detecting circuit After the failed pixel detecting circuit determines that the pixel circuit is invalid, the failed pixel detecting circuit outputs a dark state control signal to the display control circuit;
  • the display control circuit After the display control circuit receives the dark state control signal, the display control circuit supplies a dark state data voltage to the data line during a display phase such that the light emitting component is not illuminated.
  • a first anode of the light-emitting element, a second cathode of the light-emitting element, and a voltage value of the reference voltage is greater than a voltage value of a cathode of the light-emitting element.
  • the failed pixel detecting circuit detects a potential of the first pole of the light emitting element, and determines whether the pixel circuit is invalid according to the potential, wherein: the failed pixel detecting circuit is configured to respond to detecting the The potential of the first pole of the light emitting element is lower than a preset voltage value, and the pixel circuit is judged to be invalid.
  • the present disclosure also provides a display device including a pixel circuit, further comprising the above-described failed pixel detecting circuit;
  • the failed pixel detection circuit is coupled to the pixel circuit and configured to detect whether the pixel circuit is invalid.
  • FIG. 1 is a block diagram of a failed pixel detection circuit in accordance with some embodiments of the present disclosure
  • FIG. 2 is a block diagram of a failed pixel detection circuit in accordance with some embodiments of the present disclosure
  • FIG. 3 is a block diagram of a failed pixel detection circuit in accordance with some embodiments of the present disclosure.
  • FIG. 4 is a block diagram of a failed pixel detection circuit in accordance with some embodiments of the present disclosure.
  • FIG. 5 is a circuit diagram of a failed pixel detection circuit in accordance with some embodiments of the present disclosure.
  • FIG. 6 is a flow diagram of a failed pixel detection circuit in accordance with some embodiments of the present disclosure.
  • the transistors employed in all embodiments of the present disclosure may each be a thin film transistor or a field effect transistor or other device having the same characteristics.
  • the failed pixel detecting circuit of the embodiment of the present disclosure is connected to a pixel circuit.
  • the pixel circuit includes a light emitting element EL and a pixel driving circuit 10 connected to each other.
  • the pixel driving circuit 10 can The first pole of the light-emitting element EL is connected.
  • the failed pixel detecting circuit described in the embodiment of the present disclosure includes a display control circuit 11 and a failed pixel detecting circuit 12.
  • the display control circuit 11 is connected to the pixel driving circuit 10 and configured to control the pixel driving circuit 10 not to illuminate the light emitting element in a detection voltage writing phase and a failing pixel detecting phase.
  • the failed pixel detecting circuit 12 is connected to the first electrode of the light emitting element through the fail detecting line SEN, and is configured to provide a reference voltage to the first electrode of the light emitting element through the fail detecting line SEN in the detecting voltage writing phase, and And configured to detect a potential of the first pole of the light emitting element in a failed pixel detecting phase, and determine whether the pixel circuit is invalid according to the potential.
  • the failed pixel detecting circuit includes a display control circuit 11 and a failed pixel detecting circuit 12, and the display control circuit 11 controls the light emitting element EL not to be lit in the detection voltage writing phase and the failed pixel detecting phase, and is invalidated.
  • the pixel detecting circuit 12 supplies a reference voltage to the first electrode of the light emitting element through the fail detecting line SEN in the detecting voltage writing phase, and determines the first light emitting element by determining the potential of the first electrode of the light emitting element in the failed pixel detecting phase. Whether the pole and the second pole of the light-emitting element are turned on due to pixel failure, thereby causing the potential of the first pole of the light-emitting element to be unmaintained to determine whether the pixel circuit has failed.
  • the failed pixel detecting circuit may detect a pixel dead pixel caused by a short circuit of the light emitting element, because in actual operation, the second pole of the light emitting element is generally grounded or connected to a low level, so if the light emitting element When the first pole and the second pole of the light-emitting element are turned on, the potential of the first pole of the light-emitting element detected by the failed pixel detecting circuit 12 in the failed pixel detecting phase is correspondingly low. If the potential of the first pole of the light-emitting element abnormally exceeds a certain specification value, the pixel point can be marked as a dead point, and the point information of the pixel point can be stored by storing it.
  • the light-emitting element may be any type of self-luminous element that affects light emission due to current impact aging, such as an OLED (Organic Light-Emitting Diode), a QD-LED, a Micro-LED, or the like.
  • the first pole can be an anode and the second pole of the light emitting element can be a cathode.
  • the detection of pixel dead pixels can be performed during the process of turning off the black screen, without performing in the normal display state, so as not to affect the normal display.
  • the failed pixel detecting circuit of the embodiment of the present disclosure further includes a detecting switch circuit 13 and a switch control circuit 14.
  • the control terminal of the detection switch circuit 13 is connected to the switch control circuit 14, the first end of the detection switch circuit 13 is connected to the first pole of the light-emitting element EL, and the second end of the detection switch circuit 13 Connected to the failure detection line SEN.
  • the switch control circuit 14 is configured to control the detection switch circuit 13 to electrically connect the first pole of the light emitting element EL and the fail detection line SEN in a detection voltage writing phase and a failing pixel detection phase.
  • the display phase controls the detection switch circuit 13 such that the first pole of the light-emitting element EL is not connected (eg, electrically disconnected) to the fail detection line SEN.
  • the failed pixel detecting circuit further includes a detecting switch circuit 13 and a switch control circuit 14, and the switch control circuit 14 controls the detecting switch circuit in the detecting voltage writing phase and the failing pixel detecting phase. 13 electrically connecting the first pole of the light emitting element EL to the fail detecting line SEN, and in the display stage, in order not to affect the display control detecting switch circuit 13 such that the first pole of the light emitting element and the fail detecting line SEN Not electrically connected.
  • the detecting switch circuit can include:
  • the switching transistor is detected, and the gate is connected to the switch control circuit, the first pole is connected to the first pole of the light emitting element, and the second pole is connected to the failure detecting line.
  • the pixel driving circuit 10 is further connected to the data line DL for controlling whether to illuminate the light emitting element EL according to a data voltage on the data line DL;
  • the failed pixel detecting circuit 12 is further connected to the display control circuit 11 and configured to output a dark state control signal to the display control circuit 11 during the display phase after determining that the pixel circuit fails;
  • the display control circuit 11 is connected to the data line DL, and configured to, after receiving the dark state control signal, provide a dark state data voltage to the data line DL in a display phase, so that the light emitting element EL is not Light up.
  • the failed pixel detecting circuit 12 determines that the pixel circuit has failed
  • the failed pixel detecting circuit 12 controls the display control circuit 11 to prevent the light-emitting elements included in the failed pixel from being illuminated during the display phase, thereby avoiding In the pixel dead state, the current due to the continuous application of the current at the short circuit becomes large, thereby preventing the occurrence of a large-area defect caused by the deterioration of the peripheral pixel TFT (thin film transistor) and the light-emitting element due to the thermal effect.
  • the pixel driving circuit may include a driving transistor DTFT, a memory circuit 41, and a data writing circuit 42.
  • the gate of the driving transistor DTFT is connected to the data line DL through the data writing circuit 42.
  • the first pole of the driving transistor DTFT is connected to the high level input terminal Vdd, and the second pole of the driving transistor DTFT is The first pole of the light emitting element EL is connected, and the second pole of the light emitting element EL is connected to the low level input terminal VSS.
  • the memory circuit 41 is connected between a gate of the driving transistor DTFT and a second electrode of the driving transistor DTFT.
  • the storage circuit 41 includes a storage capacitor, the first end of the storage capacitor is connected to the gate of the driving transistor, and the second end is connected to the second pole of the driving transistor.
  • the display control circuit 11 is connected to the data line DL and the data writing circuit 42 and configured to control the data writing circuit 42 to cause the driving transistor in a detection voltage writing phase and a failing pixel detecting phase
  • a gate of the DTFT is electrically connected to the data line DL, and an off voltage is written to the data line DL in a detection voltage writing phase and a failed pixel detecting phase to control the driving transistor DTFT to be turned off.
  • the memory circuit 41 may include a storage capacitor; in FIG. 4, the driving transistor DTFT is exemplified by an n-type transistor, in which case the first TFT of the DTFT is the drain of the DTFT, and the second of the DTFT is the DTFT. Source; alternatively, the DTFT can also be a p-type transistor.
  • the failed pixel detecting circuit of the present disclosure is connected to a pixel circuit.
  • the pixel circuit includes an organic light emitting diode OLED and a pixel driving circuit connected to each other, and the pixel driving circuit and
  • the anode connection of the OLED, the failed pixel detection circuit described in the embodiment of the present disclosure includes a display control circuit 11, a failed pixel detection circuit 12, a detection switch circuit 13, and a switch control circuit 14.
  • the detecting switch circuit 13 includes: a detecting switch transistor TD, a gate connected to the switch control circuit 14 through a switch control terminal G2, a source connected to an anode of the OLED, and a drain connected to the fail detecting line SEN.
  • the switch control circuit 14 is configured to control the detection switch transistor TD to be turned on during the detection voltage writing phase and the fail pixel detection phase, so that the anode of the OLED is electrically connected to the fail detection line SEN, and the control unit is controlled during the display phase.
  • the detection switching transistor TD is turned off so that the anode of the OLED is not electrically connected to the fail detection line SEN.
  • the pixel driving circuit includes a driving transistor DTFT, a storage capacitor Cst, and a data writing transistor T1.
  • a gate of the driving transistor DTFT is connected to a source of the data writing transistor T1
  • a drain of the driving transistor DTFT is connected to a high level input terminal Vdd, a source of the driving transistor DTFT and an anode of the OLED connection.
  • the gate of the data writing transistor T1 is connected to the scanning line G1, and the drain of the data writing transistor T1 is connected to the data line DL.
  • the storage capacitor Cst is connected between a gate of the driving transistor DTFT and a source of the driving transistor DTFT.
  • the cathode of the OLED is connected to the low level input terminal VSS.
  • the display control circuit 11 is respectively connected to the data line DL and the scan line G1, and configured to control the data write transistor T1 to be turned on during the detection voltage writing phase and the fail pixel detection phase, so that the driving A gate of the transistor DTFT is electrically connected to the data line DL, and an off voltage is written to the data line DL in a detection voltage writing phase and a failing pixel detection phase to control the driving transistor DTFT to be turned off. Since the DTFT is an n-type transistor, for example, the turn-off voltage can be zero voltage.
  • the failed pixel detecting circuit 12 is connected to the drain of the TD through the fail detecting line SEN, and is configured to provide a reference voltage Vref to the anode of the OLED through the fail detecting line SEN and the turned-on TD in the detecting voltage writing phase, and is configured to be
  • the failed pixel detection phase detects the potential of the anode of the OLED and determines whether the pixel circuit has failed based on the potential.
  • the failed pixel detecting circuit 12 is further connected to the display control circuit 11 and configured to output a dark state control signal to the display control circuit 11 when it is determined that the pixel circuit fails.
  • the display control circuit 11 is connected to the data line DL and configured to provide a dark state data voltage to the data line DL in a display phase after receiving the dark state control signal, so that the OLED is not illuminated.
  • C1 is a parasitic capacitance on the failure detecting line SEN, and the failed pixel detecting circuit 12 may be disposed in a driving IC (Integrated Circuit), and the display control circuit 11 may also be disposed in the driving IC.
  • a driving IC Integrated Circuit
  • the failed pixel detection circuit 12 may include an analog to digital converter (ADC) (the digital to analog converter ADC is used to detect the potential of the anode of the OLED to determine whether the pixel has failed), the switch, and the reference voltage output.
  • ADC analog to digital converter
  • the switch control reference voltage output terminal is connected to the fail detection line SEN during the detection voltage writing phase, and the switch controls the analog-to-digital converter to be connected to the fail detection line SEN during the failed pixel detection phase, through the analog-to-digital conversion
  • the device detects the voltage on the fail detection line SEN.
  • the working process of the failed pixel detecting circuit shown in FIG. 5 of the present disclosure includes:
  • the TD In the detection voltage writing phase, the TD is turned on, the failed pixel detecting circuit 12 applies a reference voltage Vref to the SEN, and the display control circuit 11 controls T1 to be turned on, so that the gate of the DTFT is electrically connected to the data line DL, and the display control circuit is displayed.
  • 11 writing a turn-off voltage to the data line DL to control the driving transistor DTFT to be turned off, writing a reference voltage Vref to the anode of the OLED without causing the OLED to illuminate, due to the parasitic capacitance C1 on the SEN, parasitic Vref is stored by the capacitor C1.
  • the voltage value of the reference voltage Vref may be greater than the voltage value of the cathode of the OLED.
  • the value of Vref when the cathode of the OLED is connected to a negative voltage, the value of Vref may be 0V-4V; when the cathode of the OLED is grounded, the value of Vref may be a positive voltage.
  • the TD In the failed pixel detection phase, the TD is turned on, and the failed pixel detecting circuit 12 detects the voltage of the anode of the OLED through SEN. If there is a dead pixel in the pixel to generate a short circuit between the anode of the OLED and the cathode of the OLED, the SEN is directly and low.
  • the level input terminal VSS is connected, or the voltage of the anode of the OLED detected by the failed pixel detecting circuit 12 abnormally exceeds a certain specification value, and the pixel point is marked as a dead point, and the point information of the point is stored through the memory. Come down.
  • the TD is turned off so that the anode of the OLED is not connected to the fail detection line SEN, and the display control circuit 11 controls the data voltage of the data line accessed by the dead point marked above to be 0V (at this time, the data voltage is also
  • the DTFT can be turned off for any other voltage that can control the turn-off of the DTFT, preventing the drive transistor DTFT from having a drive current through the dead point, preventing the dead point from continuing.
  • the method for detecting a failed pixel includes:
  • the display control circuit controls the pixel driving circuit not to illuminate the light emitting element, and the failed pixel detecting circuit supplies a reference voltage to the first pole of the light emitting element through the failure detecting line;
  • the display control circuit controls the pixel driving circuit not to illuminate the light emitting element, the failed pixel detecting circuit detects the potential of the first pole of the light emitting element, and determines whether the pixel circuit is invalid according to the potential.
  • the failed pixel detecting circuit when the failed pixel detecting circuit further includes a detecting switch circuit and a switch control circuit, the failed pixel detecting method further includes:
  • the switch control circuit controls the detecting switch circuit to connect the first pole of the light emitting element to the fail detecting line;
  • the switch control circuit controls the detection switch circuit such that the first pole of the light emitting element is not connected to the fail detection line.
  • the failed pixel detecting method in the embodiment of the present disclosure further includes:
  • the failed pixel detecting circuit After the failed pixel detecting circuit determines that the pixel circuit is invalid, the failed pixel detecting circuit outputs a dark state control signal to the display control circuit;
  • the display control circuit After the display control circuit receives the dark state control signal, the display control circuit supplies a dark state data voltage to the data line during a display phase such that the light emitting component is not illuminated.
  • the display device includes a pixel circuit, and further includes the above-mentioned failed pixel detecting circuit;
  • the failed pixel detection circuit is coupled to the pixel circuit.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

一种失效像素检测电路、方法和显示装置。失效像素检测电路包括显示控制电路(11)和失效像素检测电路(12)，显示控制电路(11)与像素驱动电路(10)连接，配置成在检测电压写入阶段和失效像素检测阶段控制像素驱动电路(10)不点亮发光元件(EL)；失效像素检测电路(12)通过失效检测线(SEN)与发光元件(EL)的第一极连接，配置成在检测电压写入阶段通过失效检测线(SEN)向发光元件(EL)的第一极提供参考电压，并配置成在失效像素检测阶段检测发光元件(EL)的第一极的电位，并根据该电位判断像素电路是否失效。

Description

失效像素检测电路、方法和显示装置
相关申请的交叉引用
本申请主张于2017年3月31日提交中国知识产权局、申请号为：201710206482.X的中国专利申请的优先权，其全部内容据此通过引用并入本申请。
技术领域
本公开涉及一种失效像素检测电路、方法和显示装置。
背景技术
在显示装置的生产制作过程中，由于颗粒Particle(如灰尘)等不可避免的因素会造成部分像素中的发光元件的阴极与阳极短路。在这样的像素坏点状态下，后期由于电流不断的施加到短路处，会导致该处电流变大，热效应加剧周边像素TFT(Thin Film Transistor，薄膜晶体管)和发光元件老化，甚至导致大面积不良。
发明内容
本公开的实施例提供了一种失效像素检测电路，应用于像素电路，其中所述像素电路包括发光元件和与所述发光元件的第一极连接的像素驱动电路，所述失效像素检测电路包括显示控制电路和失效像素检测电路，其中，
所述显示控制电路与所述像素驱动电路连接，配置成在检测电压写入阶段和失效像素检测阶段控制所述像素驱动电路不点亮所述发光元件；
所述失效像素检测电路通过失效检测线与所述发光元件的第一极连接，配置成在检测电压写入阶段通过失效检测线向所述发光元件的第一极提供参考电压，并在失效像素检测阶段检测所述发光元件的第一极的电位，并根据该电位判断该像素电路是否失效。
可选地，本公开实施例所述的失效像素检测电路还包括检测开关电路和开关控制电路；
所述检测开关电路的控制端与所述开关控制电路连接，所述检测开关电路的第一端与所述发光元件的第一极连接，所述检测开关电路的第二端与所述失效检测线连接；
所述开关控制电路配置成在检测电压写入阶段和失效像素检测阶段控制所述检测开关电路使得所述发光元件的第一极与所述失效检测线连接，在显示阶段控制所述检测开关电路使得所述发光元件的第一极与所述失效检测线电性断开。
可选地，所述检测开关电路包括：
检测开关晶体管，栅极与所述开关控制电路连接，第一极与所述发光元件的第一极连接，第二极与所述失效检测线连接。
可选地，所述像素驱动电路还与数据线连接；
所述失效像素检测电路还与所述显示控制电路连接，配置成在判断到该像素电路失效后，向所述显示控制电路输出暗态控制信号；
所述显示控制电路与数据线连接，配置成在接收到所述暗态控制信号后在显示阶段向所述数据线提供暗态数据电压，以使得所述发光元件不被点亮。
可选地，所述像素驱动电路包括驱动晶体管、存储电路和数据写入电路；
所述驱动晶体管的栅极通过所述数据写入电路与所述数据线连接，所述驱动晶体管的第一极与高电平输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接，所述发光元件的第二极与低电平输入端连接；
所述存储电路连接于所述驱动晶体管的栅极与所述驱动晶体管的第二极之间；
所述显示控制电路还与所述数据写入电路连接，配置成在检测电压写入阶段和失效像素检测阶段通过控制所述数据写入电路以使得所述驱动晶体管的栅极与所述数据线连接，并在检测电压写入阶段和失效像素检测阶段向所述数据线写入关断电压，以控制所述驱动晶体管断开。
可选地，所述存储电路包括存储电容。
可选地，所述数据写入电路包括数据写入晶体管，所述数据写入晶体管的栅极与所述显示控制电路连接，源极与所述驱动晶体管的源极连接，漏极与所述数据线连接。
可选地，所述发光元件为自发光元件。
可选地，所述发光元件的第一极为阳极，所述发光元件的第二极为阴极，所述参考电压的电压值大于所述发光元件的阴极接入的电压值。
可选地，所述失效像素检测电路配置成在所述失效像素检测阶段，响应于检测所述发光元件的第一极的电位低于预设的电压值，判断所述像素电路失效。
本公开还提供了一种失效像素检测方法，应用于上述的失效像素检测电路，所述失效像素检测方法包括：
在检测电压写入阶段，显示控制电路控制像素驱动电路不点亮发光元件，失效像素检测电路通过失效检测线向所述发光元件的第一极提供参考电压；
在失效像素检测阶段，显示控制电路控制像素驱动电路不点亮发光元件，失效像素检测电路检测所述发光元件的第一极的电位，并根据该电位判断像素电路是否失效。
可选地，所述失效像素检测电路还包括检测开关电路和开关控制电路，所述失效像素检测方法还包括：
在检测电压写入阶段和失效像素检测阶段，开关控制电路控制检测开关电路使得所述发光元件的第一极与所述失效检测线连接；
在显示阶段，开关控制电路控制所述检测开关电路使得所述发光元件的第一极与所述失效检测线不连接。
可选地，本公开所述的失效像素检测方法还包括：
在所述失效像素检测电路判断到该像素电路失效后，所述失效像素检测电路向所述显示控制电路输出暗态控制信号；
在所述显示控制电路接收到所述暗态控制信号后，所述显示控制电路在显示阶段向所述数据线提供暗态数据电压，以使得所述发光元件不被点亮。
可选地，所述发光元件的第一极为阳极，所述发光元件的第二极为阴极，所述参考电压的电压值大于所述发光元件的阴极接入的电压值。
可选地，所述失效像素检测电路检测所述发光元件的第一极的电位，并根据该电位判断所述像素电路是否失效，包括：所述失效像素检测电路配置成响应于检测到所述发光元件的第一极的电位低于预设的电压值，判断所述 像素电路失效。
本公开还提供了一种显示装置，包括像素电路，还包括上述的失效像素检测电路；
所述失效像素检测电路与所述像素电路连接，配置成检测所述像素电路是否失效。
附图说明
图1是根据本公开一些实施例的失效像素检测电路的结构图；
图2是根据本公开一些实施例的失效像素检测电路的结构图；
图3是根据本公开一些实施例的失效像素检测电路的结构图；
图4是根据本公开一些实施例的失效像素检测电路的结构图；
图5是根据本公开一些实施例的失效像素检测电路的的电路图；
图6是根据本公开一些实施例的失效像素检测电路的流程图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
本公开所有实施例中采用的晶体管均可以为薄膜晶体管或场效应管或其他特性相同的器件。
本公开实施例所述的失效像素检测电路与像素电路连接，如图1所示，所述像素电路包括相互连接的发光元件EL和像素驱动电路10，例如，所述像素驱动电路10可以与所述发光元件EL的第一极连接。
本公开实施例所述的失效像素检测电路包括显示控制电路11和失效像素检测电路12。
所述显示控制电路11与所述像素驱动电路10连接，配置成在检测电压写入阶段和失效像素检测阶段控制所述像素驱动电路10不点亮所述发光元件。
所述失效像素检测电路12通过失效检测线SEN与所述发光元件的第一极连接，配置成在检测电压写入阶段通过失效检测线SEN向所述发光元件的第一极提供参考电压，并配置成在失效像素检测阶段检测所述发光元件的第一极的电位，并根据该电位判断该像素电路是否失效。
本公开实施例所述的失效像素检测电路包括显示控制电路11和失效像素检测电路12，由显示控制电路11在检测电压写入阶段和失效像素检测阶段控制发光元件EL不被点亮，由失效像素检测电路12在检测电压写入阶段通过失效检测线SEN向所述发光元件的第一极提供参考电压，在失效像素检测阶段通过判断发光元件的第一极的电位来确定发光元件的第一极与该发光元件的第二极是否因像素失效而导通，从而导致发光元件的第一极的电位无法维持，来判断像素电路是否失效。
本公开实施例所述的失效像素检测电路可以检测由发光元件短路引起的像素坏点，由于在实际操作时，所述发光元件的第二极一般都接地或接低电平，因此如果发光元件的第一极和该发光元件的第二极导通的话，失效像素检测电路12在失效像素检测阶段检测得到的发光元件的第一极的电位也会相应比较低。如果该发光元件的第一极的电位异常超过一定规格值，则可以将该像素点标记为坏点，通过存储其将该像素点的点位信息存储下来。
可选地，所述发光元件可以为OLED(Organic Light-Emitting Diode，有机发光二极管)、QD-LED、Micro-LED等任何类型的会因为电流冲击老化而影响发光的自发光元件，发光元件的第一极可以为阳极，发光元件的第二极可以为阴极。
在一些实施例中，像素坏点的检测可以放在每次关机黑画面的过程中进行，不用在正常显示状态下进行，以免影响正常显示。
在一些实施例中，如图2所示，本公开实施例所述的失效像素检测电路还包括检测开关电路13和开关控制电路14。
所述检测开关电路13的控制端与所述开关控制电路14连接，所述检测开关电路13的第一端与所述发光元件EL的第一极连接，所述检测开关电路13的第二端与失效检测线SEN连接。
所述开关控制电路14配置成在检测电压写入阶段和失效像素检测阶段 控制所述检测开关电路13使得所述发光元件EL的第一极与所述失效检测线SEN之间电性连接，在显示阶段控制所述检测开关电路13使得所述发光元件EL的第一极与所述失效检测线SEN不连接(如电性断开)。
在本公开如图2所示的实施例中，所述失效像素检测电路还包括检测开关电路13和开关控制电路14，开关控制电路14在检测电压写入阶段和失效像素检测阶段控制检测开关电路13使得所述发光元件EL的第一极与所述失效检测线SEN电性连接，在显示阶段为了不影响显示控制检测开关电路13使得所述发光元件的第一极与所述失效检测线SEN不电性连接。
在一些实施例中，所述检测开关电路可以包括：
检测开关晶体管，栅极与所述开关控制电路连接，第一极与所述发光元件的第一极连接，第二极与所述失效检测线连接。
在一些实施例中，如图3所示，所述像素驱动电路10还与数据线DL连接，用于根据所述数据线DL上的数据电压控制是否点亮所述发光元件EL；
所述失效像素检测电路12还与所述显示控制电路11连接，配置成在判断到该像素电路失效后，在显示阶段向所述显示控制电路11输出暗态控制信号；
所述显示控制电路11与数据线DL连接，配置成在接收到所述暗态控制信号后，在显示阶段，向所述数据线DL提供暗态数据电压，以使得所述发光元件EL不被点亮。
在一些实施例中，当所述失效像素检测电路12判断到像素电路失效后，失效像素检测电路12通过控制显示控制电路11以在显示阶段使得失效像素包括的发光元件不被点亮，从而避免像素坏点状态下因短路处的电流不断施加而导致的电流变大，进而避免因热效应加剧周边像素TFT(薄膜晶体管)和发光元件老化导致的大面积不良的现象发生。
在一些实施例中，如图4所示，所述像素驱动电路可以包括驱动晶体管DTFT、存储电路41和数据写入电路42。
所述驱动晶体管DTFT的栅极通过所述数据写入电路42与数据线DL连接，所述驱动晶体管DTFT的第一极与高电平输入端Vdd连接，所述驱动晶体管DTFT的第二极与所述发光元件EL的第一极连接，所述发光元件EL的 第二极与低电平输入端VSS连接。
所述存储电路41连接于所述驱动晶体管DTFT的栅极与所述驱动晶体管DTFT的第二极之间。
可选地，存储电路41包括存储电容，该存储电容的第一端与驱动晶体管的栅极连接，第二端与驱动晶体管的第二极连接。
所述显示控制电路11与所述数据线DL和所述数据写入电路42连接，配置成在检测电压写入阶段和失效像素检测阶段通过控制所述数据写入电路42以使得所述驱动晶体管DTFT的栅极与所述数据线DL电性连接，并在检测电压写入阶段和失效像素检测阶段向所述数据线DL写入关断电压，以控制所述驱动晶体管DTFT断开。
在一些实施例中，所述存储电路41可以包括存储电容；在图4中，驱动晶体管DTFT以n型晶体管为例，此时DTFT的第一极为DTFT的漏极，DTFT的第二极为DTFT的源极；可选地，DTFT也可以为p型晶体管。
在一些实施例中，本公开所述的失效像素检测电路的与像素电路连接，如图5所示，所述像素电路包括相互连接的有机发光二极管OLED和像素驱动电路，所述像素驱动电路与OLED的阳极连接，本公开实施例所述的失效像素检测电路包括显示控制电路11、失效像素检测电路12、检测开关电路13和开关控制电路14。
所述检测开关电路13包括：检测开关晶体管TD，栅极通过开关控制端G2与所述开关控制电路14连接，源极与OLED的阳极连接，漏极与失效检测线SEN连接。
所述开关控制电路14配置成在检测电压写入阶段和失效像素检测阶段控制所述检测开关晶体管TD导通，以使得OLED的阳极与所述失效检测线SEN电性连接，在显示阶段控制所述检测开关晶体管TD断开，以使得OLED的阳极与所述失效检测线SEN不电性连接。
所述像素驱动电路包括驱动晶体管DTFT、存储电容Cst和数据写入晶体管T1。
所述驱动晶体管DTFT的栅极与所述数据写入晶体管T1的源极连接，所述驱动晶体管DTFT的漏极与高电平输入端Vdd连接，所述驱动晶体管DTFT 的源极与OLED的阳极连接。
所述数据写入晶体管T1的栅极与扫描线G1连接，所述数据写入晶体管T1的漏极与数据线DL连接。
所述存储电容Cst连接于所述驱动晶体管DTFT的栅极与所述驱动晶体管DTFT的源极之间。
OLED的阴极与低电平输入端VSS连接。
所述显示控制电路11分别与所述数据线DL和所述扫描线G1连接，配置成在检测电压写入阶段和失效像素检测阶段控制所述数据写入晶体管T1导通，以使得所述驱动晶体管DTFT的栅极与所述数据线DL电性连接，并在检测电压写入阶段和失效像素检测阶段向所述数据线DL写入关断电压，以控制所述驱动晶体管DTFT断开。由于DTFT为n型晶体管，因此例如，所述关断电压可以为零电压。
所述失效像素检测电路12通过失效检测线SEN与TD的漏极连接，配置成在检测电压写入阶段通过失效检测线SEN和导通的TD向OLED的阳极提供参考电压Vref，并配置成在失效像素检测阶段检测OLED的阳极的电位，并根据该电位判断该像素电路是否失效。
所述失效像素检测电路12还与所述显示控制电路11连接，配置成在判断到该像素电路失效时，向所述显示控制电路11输出暗态控制信号。
所述显示控制电路11与数据线DL连接，配置成在接收到所述暗态控制信号后在显示阶段向所述数据线DL提供暗态数据电压，以使得OLED不被点亮。
可选地，C1为失效检测线SEN上的寄生电容，所述失效像素检测电路12可以设置于驱动IC(Integrated Circuit，集成电路)中，所述显示控制电路11也可以设置于驱动IC中。
在一些实施例中，所述失效像素检测电路12可以包括模数转换器(ADC)(数模转换器ADC用于检测OLED的阳极的电位，从而判断像素是否失效)、开关和参考电压输出端，在检测电压写入阶段所述开关控制参考电压输出端与失效检测线SEN连接，在失效像素检测阶段所述开关控制所述模数转换器与失效检测线SEN连接，通过所述模数转换器来检测失效检测线SEN上的 电压。
本公开如图5所示的失效像素检测电路的工作过程包括：
在检测电压写入阶段，TD打开，失效像素检测电路12向SEN施加参考电压Vref，所述显示控制电路11控制T1导通，以使得DTFT的栅极与数据线DL电性连接，显示控制电路11向数据线DL写入关断电压，以控制所述驱动晶体管DTFT断开，在不使得OLED点亮的状态下向OLED的阳极写入参考电压Vref，由于SEN上存在寄生电容C1，在寄生电容C1的作用下存储Vref。
可选地，参考电压Vref的电压值可以大于OLED的阴极接入的电压值。例如，当OLED的阴极接入负电压时，Vref的值可以为0V-4V；当OLED的阴极接地时，Vref的值可以为正电压。
在失效像素检测阶段，TD打开，失效像素检测电路12通过SEN检测OLED的阳极的电压，如果该像素存在坏点从而产生OLED的阳极和该OLED的阴极之间短接，则SEN会直接与低电平输入端VSS连接，或者所述失效像素检测电路12检测到的OLED的阳极的电压异常超过一定规格值，即可将该像素点标记为坏点，通过存储器将该点的点位信息存储下来。
在显示阶段，TD断开，以使得OLED的阳极与所述失效检测线SEN不连接，显示控制电路11控制以上标记的坏点接入的数据线上的数据电压为0V(此时数据电压也可以为任何其他可以控制DTFT关断的电压)，控制DTFT关断，防止驱动晶体管DTFT有驱动电流经过该坏点，阻止坏点继续发生。
本公开实施例所述的失效像素检测方法，应用于上述的失效像素检测电路，如图6所示，所述失效像素检测方法包括：
S1：在检测电压写入阶段，显示控制电路控制像素驱动电路不点亮发光元件，失效像素检测电路通过失效检测线向所述发光元件的第一极提供参考电压；
S2：在失效像素检测阶段，显示控制电路控制像素驱动电路不点亮发光元件，失效像素检测电路检测所述发光元件的第一极的电位，并根据该电位判断像素电路是否失效。
在一些实施例中，当所述失效像素检测电路还包括检测开关电路和开关 控制电路时，所述失效像素检测方法还包括：
在检测电压写入阶段和失效像素检测阶段，开关控制电路控制检测开关电路使得所述发光元件的第一极与所述失效检测线连接；
在显示阶段，开关控制电路控制所述检测开关电路使得所述发光元件的第一极与所述失效检测线不连接。
在一些实施例中，本公开实施例所述的失效像素检测方法还包括：
在所述失效像素检测电路判断到该像素电路失效后，所述失效像素检测电路向所述显示控制电路输出暗态控制信号；
在所述显示控制电路接收到所述暗态控制信号后，所述显示控制电路在显示阶段向所述数据线提供暗态数据电压，以使得所述发光元件不被点亮。
本公开实施例所述的显示装置，包括像素电路，还包括上述的失效像素检测电路；
所述失效像素检测电路与所述像素电路连接。
以上所述是本公开的一些实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (16)

  1. 一种失效像素检测电路，应用于像素电路，其中所述像素电路包括发光元件和与所述发光元件的第一极连接的像素驱动电路，所述失效像素检测电路包括显示控制电路和失效像素检测电路，其中，
    所述显示控制电路，与所述像素驱动电路连接，配置成在检测电压写入阶段和失效像素检测阶段控制所述像素驱动电路不点亮所述发光元件；
    所述失效像素检测电路，通过失效检测线与所述发光元件的第一极连接，配置成在所述检测电压写入阶段通过所述失效检测线向所述发光元件的第一极提供参考电压，并配置成在所述失效像素检测阶段检测所述发光元件的第一极的电位，并根据所述电位判断所述像素电路是否失效。
  2. 如权利要求1所述的失效像素检测电路，还包括：检测开关电路和开关控制电路；其中，
    所述检测开关电路的控制端与所述开关控制电路连接，所述检测开关电路的第一端与所述发光元件的第一极连接，所述检测开关电路的第二端与所述失效检测线连接；
    所述开关控制电路配置成在所述检测电压写入阶段和所述失效像素检测阶段控制所述检测开关电路使得所述发光元件的第一极与所述失效检测线电性连接，在显示阶段控制所述检测开关电路使得所述发光元件的第一极与所述失效检测线电性断开。
  3. 如权利要求2所述的失效像素检测电路，其中，所述检测开关电路包括：
    检测开关晶体管，栅极与所述开关控制电路连接，第一极与所述发光元件的第一极连接，第二极与所述失效检测线连接。
  4. 如权利要求1至3中任一项所述的失效像素检测电路，其中，
    所述像素驱动电路还与数据线连接；
    所述失效像素检测电路还与所述显示控制电路连接，配置成在判断到所述像素电路失效后，向所述显示控制电路输出暗态控制信号；
    所述显示控制电路与数据线连接，配置成在接收到所述暗态控制信号后在显示阶段向所述数据线提供暗态数据电压，以使得所述发光元件不被点亮。
  5. 如权利要求4所述的失效像素检测电路，其中，
    所述像素驱动电路包括驱动晶体管、存储电路和数据写入电路；
    所述驱动晶体管的栅极通过所述数据写入电路与所述数据线连接，所述驱动晶体管的第一极与高电平输入端连接，所述驱动晶体管的第二极与所述发光元件的第一极连接，所述发光元件的第二极与低电平输入端连接；
    所述存储电路连接于所述驱动晶体管的栅极与所述驱动晶体管的第二极之间；
    所述显示控制电路还与所述数据写入电路连接，配置成在所述检测电压写入阶段和所述失效像素检测阶段通过控制所述数据写入电路以使得所述驱动晶体管的栅极与所述数据线电性连接，并在所述检测电压写入阶段和所述失效像素检测阶段向所述数据线写入关断电压，以控制所述驱动晶体管断开。
  6. 如权利要求5所述的失效像素检测电路，其中，所述存储电路包括存储电容。
  7. 如权利要求5或6所述的失效像素检测电路，其中，
    所述数据写入电路包括数据写入晶体管，所述数据写入晶体管的栅极与所述显示控制电路连接，源极与所述驱动晶体管的源极连接，漏极与所述数据线连接。
  8. 如权利要求1-7任一项所述的失效像素检测电路，其中，所述发光元件为自发光元件。
  9. 如权利要求1-8任一项所述的失效像素检测电路，其中，
    所述发光元件的第一极为阳极，所述发光元件的第二极为阴极，所述参考电压的电压值大于所述发光元件的阴极接入的电压值。
  10. 如权利要求9所述的失效像素检测电路，其中，
    所述失效像素检测电路配置成在所述失效像素检测阶段，响应于检测所述发光元件的第一极的电位低于预设的电压值，判断所述像素电路失效。
  11. 一种失效像素检测方法，应用于如权利要求1至10中任一权利要求所述的失效像素检测电路，所述失效像素检测方法包括：
    在所述检测电压写入阶段，所述显示控制电路控制所述像素驱动电路不点亮所述发光元件，所述失效像素检测电路通过所述失效检测线向所述发光 元件的第一极提供参考电压；
    在所述失效像素检测阶段，所述显示控制电路控制所述像素驱动电路不点亮所述发光元件，所述失效像素检测电路检测所述发光元件的第一极的电位，并根据该电位判断所述像素电路是否失效。
  12. 如权利要求11所述的失效像素检测方法，其中，所述失效像素检测电路还包括检测开关电路和开关控制电路，所述失效像素检测方法还包括：
    在所述检测电压写入阶段和所述失效像素检测阶段，所述开关控制电路控制检测开关电路使得所述发光元件的第一极与所述失效检测线电性连接；
    在显示阶段，所述开关控制电路控制所述检测开关电路使得所述发光元件的第一极与所述失效检测线不电性连接。
  13. 如权利要求11或12所述的失效像素检测方法，还包括：
    在所述失效像素检测电路判断到该像素电路失效后，所述失效像素检测电路向所述显示控制电路输出暗态控制信号；
    在所述显示控制电路接收到所述暗态控制信号后，所述显示控制电路在显示阶段向所述数据线提供暗态数据电压，以使得所述发光元件不被点亮。
  14. 如权利要求11-13任一项所述的失效像素检测方法，其中，
    所述发光元件的第一极为阳极，所述发光元件的第二极为阴极，所述参考电压的电压值大于所述发光元件的阴极接入的电压值。
  15. 如权利要求14所述的失效像素检测方法，所述失效像素检测电路检测所述发光元件的第一极的电位，并根据该电位判断所述像素电路是否失效，包括：
    所述失效像素检测电路配置成响应于检测到所述发光元件的第一极的电位低于预设的电压值，判断所述像素电路失效。
  16. 一种显示装置，包括像素电路以及如权利要求1至10中任一项所述的失效像素检测电路；
    所述失效像素检测电路与所述像素电路连接，配置成检测所述像素电路是否失效。
PCT/CN2018/077884 2017-03-31 2018-03-02 失效像素检测电路、方法和显示装置 WO2018177072A1 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US16/086,675 US10818207B2 (en) 2017-03-31 2018-03-02 Circuitry and method for detecting failed pixel and display device
EP18775675.4A EP3605511A4 (en) 2017-03-31 2018-03-02 CIRCUIT AND METHOD OF DETECTING INVALID PIXELS AND DISPLAY DEVICE
JP2019552977A JP7272729B2 (ja) 2017-03-31 2018-03-02 無効画素検出回路、方法および表示装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201710206482.X 2017-03-31
CN201710206482.XA CN106683605A (zh) 2017-03-31 2017-03-31 失效像素检测电路、方法和显示装置

Publications (1)

Publication Number Publication Date
WO2018177072A1 true WO2018177072A1 (zh) 2018-10-04

Family

ID=58826022

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/077884 WO2018177072A1 (zh) 2017-03-31 2018-03-02 失效像素检测电路、方法和显示装置

Country Status (5)

Country Link
US (1) US10818207B2 (zh)
EP (1) EP3605511A4 (zh)
JP (1) JP7272729B2 (zh)
CN (1) CN106683605A (zh)
WO (1) WO2018177072A1 (zh)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106683605A (zh) 2017-03-31 2017-05-17 京东方科技集团股份有限公司 失效像素检测电路、方法和显示装置
CN109389919B (zh) * 2017-08-08 2020-07-28 京东方科技集团股份有限公司 显示面板的检测方法及装置
KR102416705B1 (ko) * 2017-10-24 2022-07-05 엘지디스플레이 주식회사 유기발광표시장치 및 그 구동 방법
CN108962106B (zh) * 2018-07-13 2022-02-22 京东方科技集团股份有限公司 一种像素检测电路、显示基板及像素检测方法
CN109616034B (zh) * 2018-10-09 2021-07-16 华南理工大学 一种高效检测小间距cob显示模组像素坏点的方法
TWI706395B (zh) * 2019-01-25 2020-10-01 友達光電股份有限公司 畫素電路及其檢測方法
EP3934383A4 (en) * 2019-02-26 2022-11-23 Kyocera Corporation SUBSTRATE FOR LIGHT EMISSION SUBSTRATE, DISPLAY DEVICE AND METHOD OF REPAIRING A DISPLAY DEVICE
CN109817134B (zh) * 2019-03-19 2022-03-18 京东方科技集团股份有限公司 有机发光二极管显示基板及其驱动方法
CN109950293B (zh) 2019-04-10 2021-02-02 京东方科技集团股份有限公司 一种显示面板及显示装置
CN110706629B (zh) * 2019-09-27 2023-08-29 京东方科技集团股份有限公司 显示基板的检测方法和检测装置
CN111128076B (zh) * 2019-12-31 2021-06-29 合肥视涯技术有限公司 显示面板、显示面板的短路防护方法和显示装置
CN111369933B (zh) * 2020-03-23 2021-08-24 京东方科技集团股份有限公司 亚像素电路、像素驱动方法、显示面板和显示装置
KR20210149267A (ko) * 2020-06-01 2021-12-09 삼성디스플레이 주식회사 표시장치
KR20220036420A (ko) 2020-09-14 2022-03-23 삼성디스플레이 주식회사 표시 장치 및 이의 구동 방법
CN113066412B (zh) * 2021-03-29 2022-09-27 合肥鑫晟光电科技有限公司 阵列基板的电路控制方法、检测方法、制备方法
KR20230050800A (ko) * 2021-10-08 2023-04-17 주식회사 엘엑스세미콘 디스플레이 패널의 화소를 구동하는 집적회로, 화소 구동 장치, 및 화소 오류 검출 방법
CN114267274A (zh) * 2021-12-20 2022-04-01 成都天马微电子有限公司 一种阵列基板及其检测方法、发光面板和显示装置
CN114299861B (zh) 2021-12-30 2023-06-16 上海中航光电子有限公司 一种线路面板及其相关方法和装置
CN114743502A (zh) * 2022-04-25 2022-07-12 深圳市华星光电半导体显示技术有限公司 像素驱动电路及控制方法
CN114783381B (zh) * 2022-04-29 2023-11-03 惠科股份有限公司 像素驱动电路及显示面板

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1667682A (zh) * 2004-03-12 2005-09-14 东北先锋电子股份有限公司 自发光显示模块及其缺陷检验方法、安装模块的电子设备
CN1674075A (zh) * 2004-03-24 2005-09-28 东北先锋电子股份有限公司 自发光显示模块及其缺陷状态检验方法、含该模块的设备
JP2006145971A (ja) * 2004-11-22 2006-06-08 Agilent Technol Inc ディスプレイ用回路基板の検査装置および検査方法
KR20060113000A (ko) * 2005-04-28 2006-11-02 삼성에스디아이 주식회사 발광 표시장치의 불량판단방법
CN101261803A (zh) * 2007-03-07 2008-09-10 株式会社日立显示器 有机el显示装置
CN106683605A (zh) * 2017-03-31 2017-05-17 京东方科技集团股份有限公司 失效像素检测电路、方法和显示装置
CN107665663A (zh) * 2016-07-28 2018-02-06 乐金显示有限公司 显示面板、显示装置、驱动电路、控制器和驱动方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7554260B2 (en) 2004-07-09 2009-06-30 Semiconductor Energy Laboratory Co., Ltd. Display device provided with a conductive film connection between a wiring component and a metal electrode film
US8044944B2 (en) * 2005-07-22 2011-10-25 Nvidia Corporation Defective pixel management for flat panel displays
KR100719714B1 (ko) * 2005-12-21 2007-05-17 삼성에스디아이 주식회사 유기발광 표시장치 및 이의 결함검사방법
JP4780159B2 (ja) 2008-08-27 2011-09-28 ソニー株式会社 表示装置とその駆動方法
JP2010287601A (ja) * 2009-06-09 2010-12-24 Panasonic Corp 発光素子駆動装置
CA2688870A1 (en) 2009-11-30 2011-05-30 Ignis Innovation Inc. Methode and techniques for improving display uniformity
US8212581B2 (en) 2009-09-30 2012-07-03 Global Oled Technology Llc Defective emitter detection for electroluminescent display
JP2011141418A (ja) * 2010-01-07 2011-07-21 Sony Corp 表示装置、光検出方法、電子機器
JP2012242675A (ja) 2011-05-20 2012-12-10 Canon Inc 表示装置
US9711092B2 (en) 2013-03-14 2017-07-18 Sharp Kabushiki Kaisha Display device and method for driving same
KR102233719B1 (ko) 2014-10-31 2021-03-30 엘지디스플레이 주식회사 유기 발광 다이오드 표시 장치 및 그 구동 방법
KR102456724B1 (ko) * 2015-09-30 2022-10-21 엘지디스플레이 주식회사 타이밍 컨트롤러, 표시패널, 유기발광표시장치 및 그 구동방법
CN105609024B (zh) * 2016-01-05 2018-07-27 京东方科技集团股份有限公司 显示面板的测试方法及装置
CN106251798B (zh) 2016-08-08 2018-06-01 深圳市华星光电技术有限公司 Oled显示装置驱动电路缺陷检测方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1667682A (zh) * 2004-03-12 2005-09-14 东北先锋电子股份有限公司 自发光显示模块及其缺陷检验方法、安装模块的电子设备
CN1674075A (zh) * 2004-03-24 2005-09-28 东北先锋电子股份有限公司 自发光显示模块及其缺陷状态检验方法、含该模块的设备
JP2006145971A (ja) * 2004-11-22 2006-06-08 Agilent Technol Inc ディスプレイ用回路基板の検査装置および検査方法
KR20060113000A (ko) * 2005-04-28 2006-11-02 삼성에스디아이 주식회사 발광 표시장치의 불량판단방법
CN101261803A (zh) * 2007-03-07 2008-09-10 株式会社日立显示器 有机el显示装置
CN107665663A (zh) * 2016-07-28 2018-02-06 乐金显示有限公司 显示面板、显示装置、驱动电路、控制器和驱动方法
CN106683605A (zh) * 2017-03-31 2017-05-17 京东方科技集团股份有限公司 失效像素检测电路、方法和显示装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3605511A4 *

Also Published As

Publication number Publication date
CN106683605A (zh) 2017-05-17
EP3605511A1 (en) 2020-02-05
US20200152101A1 (en) 2020-05-14
US10818207B2 (en) 2020-10-27
EP3605511A4 (en) 2021-01-06
JP2020515894A (ja) 2020-05-28
JP7272729B2 (ja) 2023-05-12

Similar Documents

Publication Publication Date Title
WO2018177072A1 (zh) 失效像素检测电路、方法和显示装置
US10593260B1 (en) Pixel driving circuit for OLED display device and OLED display device
US20210118361A1 (en) Amoled pixel driving circuit, driving method, and display panel
US10347177B2 (en) Pixel driving circuit for avoiding flicker of light-emitting unit, driving method thereof, and display device
CN108492768B (zh) 一种面板裂纹检测结构及检测方法
US11355066B2 (en) Power management driver and display device having the same
KR101451584B1 (ko) 유기발광다이오드표시장치
WO2018218742A1 (zh) 像素驱动电路及其修复方法与显示装置
US10755636B2 (en) Pixel circuit and driving method for the same, display substrate and display device
US10621920B2 (en) Capacitor detection method and pixel driving circuit
US10643535B2 (en) Driving method for preventing image sticking of display panel upon shutdown, and display device
WO2019033487A1 (zh) 用于oled显示设备的像素驱动电路及oled显示设备
WO2015196700A1 (zh) 有机发光二极管像素电路及其驱动方法
WO2019033516A1 (zh) 用于oled显示设备的像素驱动电路、oled显示设备
US20170193901A1 (en) Pixel circuit, display substrate, display device, and method for driving display substrate
WO2019037300A1 (zh) Amoled像素驱动电路
WO2019223648A1 (zh) 显示面板的驱动方法和显示装置
US11355065B2 (en) Pixel compensation driving circuit, driving method thereof, and display panel
US20190385528A1 (en) Pixel driving circuit and liquid crystal display device thereof
US11308866B2 (en) OLED pixel compensation circuit and OLED pixel compensation method
WO2015135288A1 (zh) 关机控制方法及电路、驱动电路和amoled显示装置
CN107978279B (zh) 像素电路的数据电压补偿方法、补偿装置及显示系统
US20210335261A1 (en) Pixel and control method thereof and related oled display
KR20150062209A (ko) 유기발광표시장치 및 그 구동방법
CN114299849A (zh) 像素电路及其驱动方法和显示面板

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18775675

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2019552977

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2018775675

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 2018775675

Country of ref document: EP

Effective date: 20191031