WO2018135674A1 - Bidirectional conductive pattern module - Google Patents

Bidirectional conductive pattern module Download PDF

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Publication number
WO2018135674A1
WO2018135674A1 PCT/KR2017/000594 KR2017000594W WO2018135674A1 WO 2018135674 A1 WO2018135674 A1 WO 2018135674A1 KR 2017000594 W KR2017000594 W KR 2017000594W WO 2018135674 A1 WO2018135674 A1 WO 2018135674A1
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WO
WIPO (PCT)
Prior art keywords
main
hole
holes
conductive
wall
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PCT/KR2017/000594
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French (fr)
Korean (ko)
Inventor
문해중
이은주
정주연
Original Assignee
주식회사 이노글로벌
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Publication of WO2018135674A1 publication Critical patent/WO2018135674A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2855Environmental, reliability or burn-in testing
    • G01R31/286External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2863Contacting devices, e.g. sockets, burn-in boards or mounting fixtures

Definitions

  • the present invention relates to a bidirectional conductive pattern module, and more particularly, it is possible to replace a pogo-pin type semiconductor test socket, and to test at high speed with stable signal transmission, and to enable high-speed CPU and board.
  • the present invention relates to a bidirectional conductive pattern module applicable to an interposer that electrically connects a CPU and a board between them.
  • the semiconductor device After the semiconductor device is manufactured, the semiconductor device performs a test to determine whether the electrical performance is poor.
  • the positive test of the semiconductor device is performed by inserting a semiconductor test socket (or a contactor or a connector) formed between the semiconductor device and the test circuit board so as to be in electrical contact with a terminal of the semiconductor device.
  • the semiconductor test socket is also used in a burn-in test process during the manufacturing process of the semiconductor device, in addition to the final positive inspection of the semiconductor device.
  • the conventional Pogo-pin type semiconductor test socket has a limitation in manufacturing a semiconductor test socket for testing a semiconductor device to be integrated.
  • 1 to 3 are diagrams showing an example of a conventional Pogo-pin type semiconductor test socket disclosed in Korean Patent Laid-Open No. 10-2011-0065047.
  • the conventional semiconductor test socket 1100 includes a housing 1110 having a through hole 1111 formed in a vertical direction at a position corresponding to the terminal 1131 of the semiconductor device 1130, and Pogo-pins 1120 mounted in the through holes 1111 of the housing 1110 to electrically connect the terminals 1131 of the semiconductor device 1130 and the pads 1141 of the test apparatus 1140. Is done.
  • the configuration of the pogo-pin 1120 is a barrel 1124, which is used as a pogo-pin body and has a hollow cylindrical shape, and is formed below the barrel 1124.
  • a semiconductor device connected to a contact tip 1123, a spring 1122 connected to the contact tip 1123 inside the barrel 1124 and contracting and expanding, and opposite to a spring 1122 connected to the contact tip 1123. It is composed of a contact pin 1121 to perform the vertical movement according to the contact with 1130.
  • the spring 1122 contracts and expands, while absorbing the mechanical shock transmitted to the contact pins 1121 and the contact tips 1123, the springs 1122 of the terminals 1131 and the test apparatus 1140 of the semiconductor device 1130.
  • the pad 1141 is electrically connected to check whether there is an electrical failure.
  • the conventional Pogo-pin type semiconductor test socket as described above uses a physical spring to maintain elasticity in the vertical direction, inserts the spring and the pin into the barrel, and Since the process has to be inserted into the through-hole of the housing again, the process is complicated and the manufacturing cost increases due to the complexity of the process.
  • the physical configuration itself for the implementation of the electrical contact structure having elasticity in the vertical direction has a limit to implement the fine pitch, and the situation has already reached the limit to apply to the integrated semiconductor device in recent years.
  • the pogo-pin type semiconductor test socket is connected to the connecting tip 1123, the spring 1122, and the connecting pin 1121 in the upper and lower directions. Because of this structure, there is a limit in reducing the length in the vertical direction, which is a limit in testing a high-speed device.
  • the pogo-pin semiconductor test socket is used in a structure for electrically connecting two devices in addition to the test of the semiconductor device.
  • a high-speed CPU for example, an interposer connecting a pin of a CPU and a terminal of a board between a CPU and a board used in a large-capacity server.
  • the area of the CPU is larger than that of a general PC, and the number of pins is more than 1000, and if a direct contact is made with a terminal of a board, contact failure may occur.
  • a pin-type interposer elastically connects the two devices in the vertical direction.
  • An object of the present invention is to provide a bidirectional conductive pattern module that can be applied to an interposer that electrically connects a CPU and a board between a board and a board.
  • a main body formed by stacking a plurality of base substrates having an insulating layer of an insulating material and a conductive layer formed on one surface or both surfaces of the insulating layer and stacked in the vertical direction; ; A plurality of main through holes penetrating through the main body in a vertical direction; An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes; An inner conductive wall formed between at least one of the plurality of main through holes and between an inner wall surface and a corresponding inner insulating wall to electrically connect the conductive layers of the plurality of base substrates; An upper support layer having an elastic insulating material attached to an upper surface of the main body and having a plurality of upper through holes respectively corresponding to the plurality of main through holes; A lower support layer attached to a lower surface of the main body and having an elastic insulating material having a plurality of lower through holes respectively corresponding to the plurality of main through holes;
  • the above object is, according to another embodiment of the present invention, in the bidirectional conductive pattern module, a plurality of base substrates having an insulating layer of insulating material and a conductive layer formed on one surface or both surfaces of the insulating layer in the vertical direction A main body laminated and formed; A plurality of main through holes penetrating through the main body in a vertical direction; An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes; At least one sub through hole penetrating in the vertical direction of the main body; An inner conductive wall applied to an inner wall of the sub through hole and electrically connecting the conductive layers of the plurality of base substrates to each other; An upper support layer attached to an upper surface of the main body and having a plurality of upper through holes corresponding to the plurality of main through holes, respectively; A lower support layer attached to a lower surface of the main body and having a plurality of lower through holes respectively corresponding to the plurality of main through holes; Received
  • a bidirectional conductive pattern module comprising: a main body having an insulating layer of insulating material and conductive layers formed on both surfaces of the insulating layer; A plurality of main through holes penetrating through the main body in a vertical direction; An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes; An inner conductive wall formed between at least one of the plurality of main through holes and between the inner wall surface and the insulating wall to electrically connect the conductive layers on both sides; An upper support layer having an elastic insulating material attached to an upper surface of the main body and having a plurality of upper through holes respectively corresponding to the plurality of main through holes; A lower support layer attached to a lower surface of the main body and having an elastic insulating material having a plurality of lower through holes respectively corresponding to the plurality of main through holes; Received in each of the plurality of main through holes, the upper surface is exposed
  • the inner conductive wall may be formed in each of the plurality of main through holes.
  • each of the bidirectional conductive pins may be electrically isolated from the conductive layers by the respective inner insulating walls in the main through hole, and the conductive layers and the inner conductive walls electrically connected to each other may be grounded. Do.
  • the inner diameters of the upper through hole and the lower through hole may be smaller than the inner diameter of the main through hole.
  • the upper support layer includes an upper film layer and an upper silicon layer formed sequentially from the upper surface of the body;
  • the lower support layer may include a lower film layer and a lower silicon layer sequentially formed from the lower surface of the body.
  • the main through hole may be filled with an elastic silicon material.
  • the electronic device may further include a ground part electrically connected to the conductive layer and connected to an external ground to connect the conductive layer to the ground.
  • the ground part penetrates the first ground through-hole penetrating the body in the vertical direction, and the second ground through-hole and the third ground penetrating part formed in the upper support part and the lower support part to communicate with the first ground through-hole. It may include a hole and a ground conductive wall is applied to the inner wall ⁇ of the first ground through hole and electrically connected to the conductive layer.
  • the bidirectional conductive pin is formed in the upper contact portion is formed by rolling a cylindrical plate with conductivity in a cylindrical shape in the vertical direction
  • the thin plate with conductivity is formed by rolling a cylindrical shape in the axis in the vertical direction and the lower portion of the upper contact portion
  • a lower contact portion disposed to be spaced apart from and electrically connecting the upper contact portion and the lower contact portion, and a connecting portion having a ⁇ shape to a space between the upper contact portion and the lower contact portion;
  • An upper surface of the upper contact portion may be exposed upward through the upper through hole, a lower surface of the lower contact portion may be exposed downward through the lower through hole, and the connection part may be accommodated in the main through hole.
  • the bidirectional conductive pin may include an upper contact portion in which a thin conductive plate is rolled in a cylindrical shape in an up and down direction, and a thin conductive sheet is rolled in a cylindrical shape in an up and down direction, and a lower portion of the upper contact portion is formed.
  • a lower contact portion spaced apart from and at least one connecting portion electrically connecting the upper contact portion and the lower contact portion;
  • the connecting portion is connected to the upper contact portion and the lower contact portion at mutually different positions in the circumferential direction, and connects the upper contact portion and the lower contact portion in a form wound around the circumferential direction, and an upper surface of the upper contact portion passes through the upper portion.
  • the upper surface of the lower contact portion may be exposed through the hole, and the lower surface of the lower contact portion may be exposed downward through the lower through hole, and the connection part may be accommodated in the main through hole.
  • 1 to 3 are diagrams for explaining a conventional Pogo-pin type semiconductor test socket
  • FIG. 4 is a perspective view of a bidirectional conductive pattern module according to a first embodiment of the present invention.
  • FIG. 5 is a cross-sectional view taken along the line VV of FIG. 4,
  • FIG. 6 to 9 are views for explaining the manufacturing process of the bidirectional conductive pattern module according to the first embodiment of the present invention.
  • FIG. 10 is a cross-sectional view of a bidirectional conductive pattern module according to a second embodiment of the present invention.
  • FIG. 11 and 12 are views for explaining a manufacturing process of a bidirectional conductive pattern module according to a second embodiment of the present invention.
  • 13 to 16 are diagrams for describing embodiments of the bidirectional conductive pin of the bidirectional conductive pattern module according to the present invention.
  • the present invention relates to a bidirectional conductive pattern module, comprising: a main body formed by stacking a plurality of base substrates having an insulating layer of an insulating material and a conductive layer formed on one or both surfaces of the insulating layer; A plurality of main through holes penetrating through the main body in a vertical direction; An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes; An inner conductive wall formed between at least one of the plurality of main through holes and between an inner wall surface and a corresponding inner insulating wall to electrically connect the conductive layers of the plurality of base substrates; An upper support layer having an elastic insulating material attached to an upper surface of the main body and having a plurality of upper through holes respectively corresponding to the plurality of main through holes; A lower support layer attached to a lower surface of the main body and having an elastic insulating material having a plurality of lower through holes respectively corresponding to the plurality of main through holes; Received in each
  • the bidirectional conductive pattern module 100 includes a main body 110, a plurality of main through holes 171, an inner insulating wall 130, and an inner portion.
  • the conductive wall 120, the upper support layer 140, the lower support layer 150, and the bidirectional conductive pin 160 are included.
  • a plurality of base substrates 111 are stacked in a vertical direction. 4 and 5, four base substrates 111 are stacked to form a main body 110.
  • the base substrate 111 includes an insulating layer 112 made of an insulating material, and conductive layers 113 and 114 formed on one or both surfaces of the insulating layer 112.
  • 4 and 5 illustrate examples in which the conductive layers 113 and 114 are formed on both surfaces of the insulating layer 112, but the conductive layers 113 and 114 may be formed only on one surface thereof.
  • the base substrate 111 may be provided in the form of a printed circuit board (PCB).
  • the printed circuit board is composed of an insulating layer 112 made of an insulating material, for example, FR4, and conductive layers 113 and 114 made of copper. It is preferable to use a printed circuit board as the base substrate 111 according to the present invention. .
  • the plurality of main through holes 171 are formed to penetrate in the vertical direction of the main body 110 (see FIG. 7).
  • 16 main through holes 171 are formed as an example, but the number is not limited thereto, and when applied as an interposer between the CPU and the board, more than 1000 main through holes 171 may be formed. It may be.
  • the inner insulating wall 130 is applied to the inner wall surface of each main through hole 171, for example, provided with an insulating material.
  • the insulating silicon is formed inside, for example, but the material is not limited thereto.
  • the conductive layers 113 and 114 of the respective base substrates 111 and the bidirectional conductive pins 160 inserted into the main through holes 171 through the inner insulating wall 130 may be physically isolated to block the electrical connections. do.
  • the inner conductive wall 120 is formed between the inner wall surface of the main through hole 171 and the inner insulating wall 130 to electrically connect the conductive layers 113 and 114 of the base substrate 111 to each other. Through this, the conductive layers 113 and 114 of each layer forming the main body 110 are electrically connected to each other.
  • the bidirectional conductive pattern module 100 according to the present invention may be applied to a semiconductor test socket or to an interposer. In this case, when the conductive layers 113 and 114 are used as grounds, high speeds can be realized.
  • the bidirectional conductive pattern module 100 according to the present invention when used in a semiconductor test socket, when the conductive layers 113 and 114 are connected to the ground of the test circuit board, the bidirectional conductive pattern module 100 according to the present invention is used. ) Is grounded so that a stable signal can be transmitted through the bidirectional conductive pin 160. That is, the signal transmitted through the bidirectional conductive pin 160 is grounded by the surrounding conductive layers 113 and 114 and the inner conductive wall 120, thereby minimizing noise and mutual signal interference, thereby enabling stable signal transmission. High-speed implementations are possible.
  • the method of connecting the conductive layers 113 and 114 and / or the inner conductive wall 120 to an external ground may be connected through the ground portion 180 which will be described later.
  • the bidirectional conductive module 100 according to the present invention may be It may be connected in various forms according to the structure of the device applied.
  • the inner conductive wall 120 may be formed by sequentially performing nickel plating and gold plating, which will be described later.
  • the upper support layer 140 is attached to the upper surface of the body 110.
  • the upper support layer 140 is formed with upper through holes 172 at positions corresponding to the main through holes 171 formed in the main body 110, respectively.
  • the lower support layer 150 is attached to the lower surface of the body 110.
  • lower through holes 173 are formed at positions corresponding to the main through holes 171 formed in the main body 110, respectively.
  • the upper support layer 140 and the lower support layer 150 are each provided with a material having elasticity, in the present invention, the upper support layer 140 is the upper film layer 141 and the upper silicon layer 142 are sequentially stacked The lower support layer 150 is formed by stacking the lower film layer 151 and the lower silicon layer 152 sequentially.
  • Each bidirectional conductive pin 160 is accommodated in the main through hole 171, respectively, and the upper surface of the bidirectional conductive pin 160 is exposed upward through the upper through hole 172 of the upper support layer 140.
  • the lower surface of the bidirectional conductive pin 160 is exposed downward through the lower through hole 173 of the lower support layer 150.
  • the upper region of the bidirectional conductive pin 160 is supported by the upper support layer 140, and the lower region is supported by the lower support layer 150.
  • the ball (Ball) of the semiconductor device pressed from the upper direction to the lower direction is bidirectional
  • the upper surface of the conductive pin 160 is pressed to the bottom, and the bidirectional conductive pin 160 is supported by the upper support layer 140 to enable elastic support.
  • the bidirectional conductive pins 160 are formed between the semiconductor device and the test circuit board, or between the CPU and the board. Both devices are electrically connected to each other. At this time, each of the conductive layers 113 and 114 of the base substrate 111 and the inner conductive wall 120 are connected to an external ground, so that the ground is near the bidirectional conductive pin 160. It is possible to operate at high speed, as well as stable operation without noise or mutual interference.
  • the bidirectional conductive pattern module ( Since the thickness of 100 may be adjusted, the fabrication may be performed according to the condition in which the bidirectional conductive pattern module 100 is applied.
  • the bi-directional conductive pin 160 is made smaller in size than the existing pogo-pin according to the structure to be described later, the limit of the pitch and the length in the vertical direction of the existing pogo pin type The limitations can be overcome, enabling implementations of various sizes when applied to semiconductor test sockets or interposers.
  • the internal conductive walls 120 are formed in the entire plurality of main through holes 171, respectively, to electrically connect the conductive layers 113 and 114.
  • the inner conductive wall 120 may be electrically connected to the entire conductive layers 113 and 114 of the plurality of base substrates 111 even if only one of the main through holes 171 is formed.
  • the inner diameter of the upper through hole 172 and the lower through hole 173 is smaller than the inner diameter of the main through hole 171 (FIG. 5 is an enlarged area and FIG. 9B). It is taken as an example. Accordingly, the upper region and the lower region of the bidirectional conductive pin 160 are supported by the upper support layer 140 and the lower support layer 150, respectively, and the middle region is formed in the space inside the main through hole 171 and its inner wall surface. By maintaining the spaced apart state, the movement inside is free.
  • the bidirectional conductive pins 160 may be vertically moved through the empty space inside the main through hole 171.
  • the possibility of flow increases, and when the intermediate region of the bi-directional conductive pin 160 is composed of the connecting portion 163 which will be described later, or when the existing pogo-pin is used, the elastic force of the connecting portion 163 or the spring is used. This will work more smoothly, allowing for more stable testing.
  • the main through hole 171 may fill the inside with a silicone material having elasticity. In this case, the pressure is more strongly supported in the vertical direction.
  • the bidirectional conductive pattern module 100 may include a ground unit 180.
  • the ground part 180 is electrically connected to the conductive layers 113 and 114 and the inner conductive wall 120.
  • the ground unit 180 is connected to the ground of the test circuit board when the external ground, for example, the bidirectional conductive pattern module 100 according to the present invention is applied to the semiconductor test socket as described above.
  • 113 and 114 and the inner conductive wall 120 are connected to ground.
  • the ground portion 180 includes a first ground through hole 181, a second ground through hole 183, and a third ground through hole 184. And a ground conductive wall 182 as an example.
  • the first ground through hole 181 penetrates through the body 110 in the vertical direction.
  • the first ground through hole 181 may be formed together with the formation of the main through hole 171, which will be described later.
  • the second ground through hole 183 penetrates the upper support layer 140 in the vertical direction, and is formed at a position corresponding to the first ground through hole 181.
  • the third ground through hole 184 penetrates through the lower support layer 150 in the vertical direction, and is formed at a position corresponding to the first ground through hole 181.
  • the second ground through hole 183 and the third ground through hole 184 may be formed together when the upper through hole 172 and the lower through hole 173 are formed, which will be described later.
  • the ground conductive wall 182 is applied to the inner wall surface of the first ground through hole 181 and electrically connected to the conductive layers 113 and 114. As a result, when the ground conductive wall 182 is connected to an external ground, the conductive layers 113 and 114 of the bidirectional conductive pattern module 100 according to the present invention may operate as the ground.
  • a plurality of base substrates 111 are provided, and a plurality of base substrates 111 are stacked in an up and down direction to form a main body 110.
  • the four base substrates 111 are stacked to form the main body 110.
  • the number thereof is considered in consideration of the thickness of the main body 110 and the like. Can be determined.
  • the stacking of the base substrate 111 may be attached using an adhesive between the base substrate 111.
  • FIG. 6 illustrates that the base substrate 111 is configured in the form of a printed circuit board having conductive layers 113 and 114 formed on both sides of the insulating layer 112, as described above, one side of the insulating layer 112 is described. Of course, only the printed circuit board on which the conductive layers 113 and 114 are formed may be used.
  • a plurality of main through holes 171 are formed in the main body 110.
  • the first ground through hole 181 may be formed together.
  • 8 and 9 illustrate a manufacturing process through a cross section according to VIII-VIII.
  • the inner wall surface of each main through hole 171 is illustrated in FIG. 8.
  • the inner conductive wall 120 is formed.
  • the inner conductive wall 120 may be formed by sequentially performing nickel plating and gold plating. Through the formation of the inner conductive wall 120, the conductive layers 113 and 114 of each base substrate 111 are electrically connected to each other.
  • (b) of FIG. 8 illustrates that the inner conductive wall 120 is formed on the inner wall surfaces of all the main through holes 171, but as described above, the inside of the at least one main through hole 171 is included.
  • the inner conductive wall 120 may be formed on the wall.
  • the ground conductive wall 182 may be formed together on the inner wall surface of the first ground through hole 181.
  • the inner conductive wall 120 When the inner conductive wall 120 is formed on the inner wall surface of the main through hole 171, the inner wall surface (or the main through hole 171 of the inner wall surface) of the inner conductive wall 120 is illustrated in FIG. 8C. As shown, the inner insulation wall 130 is formed.
  • the internal insulating wall 130 may be formed by applying an insulating material, for example, silicon.
  • the first ground through hole 181 may not be formed on the inner wall surface of the ground conductive wall 182 formed on the inner wall surface of the first ground through hole 181.
  • the upper and lower portions of the inner insulating wall 130 may be formed.
  • the upper support layer 140 is formed on the upper portion of the main body 110, and the lower support layer (lower) on the lower portion of the main body 110. 150).
  • the upper support layer 140 may be formed by attaching the upper film layer 141 to the upper portion of the main body 110 and then applying the upper silicon layer 142.
  • the lower support layer 150 may be formed by attaching the lower film layer 151 to the lower portion of the main body 110 and then applying the lower silicon layer 152.
  • the upper through hole 172 and the lower through hole 173 are formed in the upper support layer 140 and the lower support layer 150, respectively.
  • the inner diameters of the upper through hole 172 and the lower through hole 173 may be smaller than the inner diameter of the main through hole 171 as described above.
  • the second ground through hole 183 and the second ground through hole 184 may be formed together.
  • the bidirectional conductive pin 160 When the bidirectional conductive pin 160 is inserted into each of the upper through hole 172, the main through hole 171, and the lower through hole 173, the bidirectional conductive pattern module 100 as illustrated in FIG. 5. Can be made.
  • the bidirectional conductive pin 160 may be configured to be supported by the upper support layer 140 and the lower support layer 150. Can be.
  • the plating is performed only on the inner wall surface of the main through hole 171 during the formation of the inner conductive wall 120, but both the upper surface and the lower surface of the main body 110 may be plated.
  • the insulating layer is formed only on the inner wall surface of the main through hole 171 and / or the inner wall surface of the inner conductive wall 120 during the formation of the inner insulation wall 130, but the upper portion of the main body 110 is formed.
  • An insulating layer may be formed on both the surface and the lower surface.
  • the configuration of the bidirectional conductive pattern module 100a according to the second embodiment of the present invention will be described with reference to FIG. 10.
  • the detailed description of the configuration corresponding to the configuration of the first embodiment can be omitted.
  • the bidirectional conductive pattern module 100a includes a main body 110a, a plurality of main through holes 171a, an inner insulating wall 130a, and an inner conductive wall. 120a and an upper support layer 140a, a lower support layer 150a, and a bidirectional conductive pin 160a.
  • the main body 110a includes an insulating layer 112a made of an insulating material and conductive layers 113a and 114a formed on both surfaces of the insulating layer 112a. That is, in the bidirectional conductive pattern module 100a according to the second embodiment of the present invention, one base substrate 111a forms the main body 110a unlike the first embodiment. In the second embodiment of the present invention, the main body 110a is applied to a printed circuit board on which conductive layers 113a and 114a are formed on both sides of the insulating layer 112a. Here, the thickness of the main body 110a can be adjusted by adjusting the thickness of the insulating layer 112a.
  • the plurality of main through holes 171a are formed to penetrate in the vertical direction of the main body 110a (see FIG. 11A). As in the first embodiment, the number of the main through holes 171a may vary depending on the terminals of the semiconductor device under test or the pins of the CPU.
  • the inner insulation wall 130a is applied to the inner wall surface of each of the main through holes 171a, and is provided as an example of an insulating material.
  • the insulating silicon is formed inside, for example, but the material is not limited thereto.
  • the conductive layers 113a and 114a of the main body 110a and the bidirectional conductive pins 160a inserted into the main through hole 171a are physically isolated through the internal insulating wall 130a to block the electrical connections. .
  • the inner conductive wall 120a is formed between the inner wall surface of the main through hole 171a and the inner insulating wall 130a to electrically connect the conductive layers 113a and 114a on both sides of the main body 110a. Through this, the conductive layers 113a and 114a of the main body 110a are electrically connected to each other.
  • the bidirectional conductive pattern module 100a according to the present invention is applied to a semiconductor test socket or an interposer, the conductive layers 113a and 114a are electrically connected. Using the layers 113a and 114a as ground enables high-speed implementation.
  • the inner conductive wall 120a may be formed by sequentially performing nickel plating and gold plating.
  • the upper support layer 140a is attached to the upper surface of the body 110a.
  • upper through holes 172a are formed at positions corresponding to the main through holes 171a formed in the main body 110a in the upper support layer 140a.
  • the lower support layer 150a is attached to the lower surface of the main body 110a.
  • the lower support layer 150a is formed with lower through holes 173a at positions corresponding to the main through holes 171a formed in the main body 110a, respectively.
  • the upper support layer 140a and the lower support layer 150a are each made of a material having elasticity.
  • the upper support layer 140a is formed of the upper film layer 141a and the upper silicon layer 142a.
  • the lower support layer 150a is formed by being sequentially stacked, and the lower film layer 151a and the lower silicon layer 152a are sequentially stacked.
  • Each bidirectional conductive pin 160a is accommodated in the main through hole 171a, respectively, and the upper surface of the bidirectional conductive pin 160a is exposed upward through the upper through hole 172a of the upper support layer 140a.
  • the lower surface of the bidirectional conductive pin 160a is exposed downward through the lower through hole 173a of the lower support layer 150a.
  • the upper region of the bidirectional conductive pin 160a is supported by the upper support layer 140a, and the lower region is supported by the lower support layer 150a.
  • the ball (Balla) of the semiconductor device pressed from the upper direction to the lower direction is bidirectional
  • the bi-directional conductive pin (160a) is supported by the upper support layer (140a) to enable elastic support.
  • the bidirectional conductive pin 160a is formed between the semiconductor device and the test circuit board, or between the CPU and the board. Both devices are electrically connected.
  • the conductive layers 113a and 114a and the inner conductive wall 120a formed on both sides of the insulating layer 112a of the main body 110a are connected to the external ground. Connected to the ground in the vicinity of the two-way conductive pin 160, it is possible to operate in high-speed as well as stable operation is excluded noise and mutual interference.
  • the thickness of the bidirectional conductive pattern module 100a can be adjusted, so that the bidirectional conductive pattern module 100a is manufactured according to the conditions to be applied. This becomes possible.
  • the bidirectional conductive pin 160a is made smaller in size than the existing pogo-pin according to the structure to be described later, the limit of the pitch and the length in the vertical direction of the conventional pogo pin type The limitations can be overcome, enabling implementations of various sizes when applied to semiconductor test sockets or interposers.
  • the inner conductive wall 120a is formed in the entire plurality of main through holes 171a, respectively, to electrically connect the conductive layers 113a and 114a.
  • the inner conductive wall 120a may be electrically connected to the entire conductive layers 113a and 114a of the plurality of base substrates 111a even if only one of the main through holes 171a is formed.
  • the main through hole 171a may be filled with a silicone material having elasticity. In this case, the pressure is more strongly supported in the vertical direction.
  • the bidirectional conductive pattern module 100a according to the present invention is applied to the interposer, the contact between the CPU and the board can be maintained more stably for a long time. do.
  • the ground portion 180 of the first embodiment may be applied to the second embodiment, and corresponds to the ground portion 180 of the first embodiment in the manufacturing process of the second embodiment, which will be described later.
  • the structure is applicable.
  • an insulating layer 112a and a main body 110a having conductive layers 113a and 114a formed on both sides thereof are provided. Then, as illustrated in FIG. 11B, a main through hole 171a is formed in the main body 110a.
  • an inner conductive wall 120a is formed on the inner wall surface of each main through hole 171a.
  • the inner conductive wall 120a may be formed by sequentially performing nickel plating and gold plating. Through the formation of the inner conductive wall 120a, the conductive layers 113a and 114a formed at both sides of the insulating layer 112a are electrically connected to each other.
  • (c) of FIG. 11 illustrates that the inner conductive wall 120a is formed on the inner wall surfaces of all the main through holes 171a. However, as described above, the inside of the at least one main through hole 171a is illustrated. Of course, the inner conductive wall 120a may be formed on the wall surface.
  • the inner wall surface (or the main through hole 171a of the inner wall surface) of the inner conductive wall 120a is illustrated in FIG. 12A.
  • the inner insulation wall 130a is formed.
  • the upper film layer 141a and the lower film layer 151 are formed on the upper surface and the lower surface of the main body 110a, respectively (see FIG. 12A), and the upper surface of the upper film layer 141a and The upper silicon layer 142a and the lower silicon layer 152a are formed on the lower surface of the lower film layer 151a, respectively, so that the upper support layer 140a and the lower support layer 150a as shown in FIG. To form.
  • the upper through hole 172a and the lower through hole 173a are formed in the upper support layer 140a and the lower support layer 150a, respectively.
  • the inner diameters of the upper through hole 172a and the lower through hole 173a may be smaller than the inner diameter of the main through hole 171a as in the above-described embodiment.
  • the bidirectional conductive pin 160a When the bidirectional conductive pin 160a is inserted into each of the upper through hole 172a, the main through hole 171a, and the lower through hole 173a, the bidirectional conductive pattern module 100a as shown in FIG. Can be made.
  • the upper surface of the upper support layer 140a that is, the upper silicon layer 142a and the bidirectional conductive pin 160a are fixed using silicon or the like, and the lower support layer 150a
  • the bidirectional conductive pin 160a is configured to be supported by the upper support layer 140a and the lower support layer 150a. Can be.
  • the bidirectional conductive pin 160 may include an upper contact portion 161, a lower contact portion 162, and a connection portion 163.
  • the upper contact portion 161 is formed by rolling a conductive thin plate in a cylindrical shape with an axis in the vertical direction.
  • the lower contact portion 162 is formed to be rolled so that the conductive thin plate has a cylindrical shape in the vertical direction, and is disposed in a state spaced apart from the lower portion of the upper contact portion 161.
  • the connecting portion 163 electrically connects the upper contact portion 161 and the lower contact portion 162, and is connected to the upper contact portion 161 and the lower contact portion 162 at mutually different positions in the circumferential direction, thereby providing a circumferential direction.
  • the upper contact portion 161 and the lower contact portion 162 are connected in a winding manner.
  • FIG. 14 is a view showing an example of the base thin plate 10 for manufacturing the bidirectional conductive pin 160 shown in FIG.
  • the base thin plate 10 as shown in FIG. 14 is manufactured by patterning the thin plate having conductivity.
  • the base thin plate 10 includes an upper pattern 11, a lower pattern 12, and a connection pattern 13.
  • the base sheet 10 is rolled in a circular shape from the left side to the right side of FIG. 14 through the mold, and the lower sheet is rolled circularly from the right side of FIG. 14 to the left side, the upper contact portion 161.
  • lower contact portions 162 are formed, respectively.
  • the connecting pattern 13 is rolled up along the circumferential direction, and the finally formed connecting portion 163 is different from each other in the circumferential direction. You will connect locations.
  • the bi-directional conductive pin 160 when the bi-directional conductive pin 160 is applied to the bi-directional conductive pattern module 100, the upper surface of the upper contact portion 161 is exposed in the upper direction through the upper through hole 172, the lower The lower surface of the contact portion 162 is exposed in the downward direction through the lower through hole 173, and the connection portion 163 is accommodated in the main through hole 171.
  • connection part 163 is accommodated inside the main through hole 171 in the form of being wound along the circumferential direction, thereby performing an elastic role when pressed downward, that is, playing the same role as the spring of the existing pogo-pin. Done.
  • the base thin plate 10 is formed by patterning the conductive thin plate, and the bidirectional conductive pin 160 is rolled by a method such as a mold, thereby making it possible to produce a smaller size than the existing pogo-pin.
  • the bidirectional conductive pin 160 may include a depression 164 recessed or cut inward at an outer diameter of the upper contact portion 161.
  • the upper support layer 140 elastically supports the upper contact portion 161 in the vertical direction when the upper support layer 140 holds the upper contact portion 161 and the upper contact portion 161 is pressed from the top to the lower direction. To perform the function.
  • the configuration of the recessed portion 164 may be applied to the bidirectional conductive pin 160a according to another embodiment to be described later, and may be applied to other types of pins that may be applied to the bidirectional conductive pattern module 100 according to the present invention. Do.
  • the bidirectional conductive pin 160a may include an upper contact portion 161a, a lower contact portion 162a, and a connection portion 163a.
  • the upper contact portion 161a and the lower contact portion 162a is the same as in the above-described embodiment that the conductive thin plate is formed by axially rolling in the vertical direction.
  • the connecting portion 163a electrically connects the upper contact portion 161a and the lower contact portion 162a, and has a ⁇ shape in the space between the upper contact portion 161a and the lower contact portion 162a.
  • FIG. 16 is a diagram for describing a manufacturing process of the bidirectional conductive pin 160a illustrated in FIG. 15.
  • the base plate 10a is produced by patterning a thin plate having conductivity.
  • FIG. 15A three base thin plates 10a are simultaneously formed on a thin plate.
  • the base thin plate 10a may include an upper pattern 11a, a lower pattern 12a, and a connection pattern 13a.
  • the patterning process is performed such that the base thin plates 10a are connected to each other through a connecting plate between the upper horizontal plate and the lower horizontal plate for the convenience of the work.
  • the upper pattern 11a and the lower pattern 12a are rolled up and down in an axial direction to form the upper contact portion 161a and the lower contact portion 162a as shown in FIG. 16B.
  • the connection pattern 13a is formed by pushing in the A direction to form the connection portion 163a. Then, by cutting the connecting plate, it is possible to manufacture the bi-directional conductive pin 160a.
  • the bidirectional conductive pins 160 and 160a are described as examples of the drawings illustrated in FIGS. 13 to 16, but the bidirectional conductive pins 160 and 160a may be applied in various forms. For example, even if the existing pogo-pin is applied, the high-speed operation may be performed by the ground function.
  • the inner conductive wall 120 is formed inside the main through hole 171. That is, the internal conductive wall 120 is formed in at least one of the main through holes 171 into which the bidirectional conductive pins 160 are inserted.
  • the conductive layers 113 and 114 may be formed. Of course, they can be electrically connected.
  • 112,112a insulating layer 113,113a, 114,114a: conductive layer
  • 140,140a upper support layer 141,141a: upper film layer
  • the present invention can be applied to semiconductor test sockets used for inspection of electronic devices such as semiconductor devices and displays. It can be applied to the parts to be connected.

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Abstract

The present invention relates to a bidirectional conductive pattern module, wherein the bidirectional conductive pattern module comprises: a main body in which a plurality of base substrates having an insulating layer made of an insulating material and a conductive layer formed on one surface or both surfaces of the insulating layer are formed laminated in a verticval direction; a plurality of main through-holes which are formed passing through the main body in the vertical direction; an inner insulating wall which is made of an insulating material applied to the inner wall surface side of each of the main through-holes; an inner conductive wall which is formed between the inner wall surface and the corresponding inner insulating wall in at least one of the plurality of main through-holes to mutually electrically connect the conductive layers of the plurality of base substrates; an upper support layer made of an elastic insulating material is attached to an upper surface of the main body, and has a plurality of upper through-holes corresponding to the plurality of main through-holes respectively; a lower supporting layer made of an elastic insulating material is attached to a lower surface of the main body, and has a plurality of lower through-holes corresponding to the plurality of main through-holes, respectively; a plurality of bidirectional conductive pins which are accommodated in the plurality of main through-holes respectively and are each supported by the upper supporting layer and the lower supporting layer respectively in a state where the upper surface thereof is exposed through the upper through-hole in the upper direction and the lower surface thereof is exposed through the lower through-hole in the lower direction. Accordingly, a high-speed test is possible while a pogo-pin type semiconductor test socket can be replaced and a bidirectional conductive pattern module can also be applied to an interposer that electrically connects a high-speed CPU and a substrate between the CPU and the substrate.

Description

양방향 도전성 패턴 모듈Bidirectional Conductive Pattern Module
본 발명은 양방향 도전성 패턴 모듈에 관한 것으로서, 보다 상세하게는 포고-핀 타입의 반도체 테스트 소켓을 대체가 가능하면서도 안정적인 신호 전달과 함께 하이-스피드로의 테스트가 가능하고, 하이-스피드의 CPU와 보드 사이에서 CPU와 보드를 전기적으로 연결하는 인터포저(Interposer)에도 적용 가능한 양방향 도전성 패턴 모듈에 관한 것이다.The present invention relates to a bidirectional conductive pattern module, and more particularly, it is possible to replace a pogo-pin type semiconductor test socket, and to test at high speed with stable signal transmission, and to enable high-speed CPU and board. The present invention relates to a bidirectional conductive pattern module applicable to an interposer that electrically connects a CPU and a board between them.
반도체 소자는 제조 과정을 거친 후 전기적 성능의 양불을 판단하기 위한 검사를 수행하게 된다. 반도체 소자의 양불 검사는 반도체 소자의 단자와 전기적으로 접촉될 수 있도록 형성된 반도체 테스트 소켓(또는 콘텍터 또는 커넥터)을 반도체 소자와 검사회로기판 사이에 삽입한 상태에서 검사가 수행된다. 그리고, 반도체 테스트 소켓은 반도체 소자의 최종 양불 검사 외에도 반도체 소자의 제조 과정 중 번-인(Burn-In) 테스트 과정에서도 사용되고 있다.After the semiconductor device is manufactured, the semiconductor device performs a test to determine whether the electrical performance is poor. The positive test of the semiconductor device is performed by inserting a semiconductor test socket (or a contactor or a connector) formed between the semiconductor device and the test circuit board so as to be in electrical contact with a terminal of the semiconductor device. The semiconductor test socket is also used in a burn-in test process during the manufacturing process of the semiconductor device, in addition to the final positive inspection of the semiconductor device.
반도체 소자의 집적화 기술의 발달과 소형화 추세에 따라 반도체 소자의 단자 즉, 리드의 크기 및 간격도 미세화되는 추세이고, 그에 따라 테스트 소켓의 도전 패턴 상호간의 간격도 미세하게 형성하는 방법이 요구되고 있다.With the development and miniaturization of semiconductor device integration technology, the size and spacing of terminals of semiconductor devices, that is, leads, are also miniaturized. Accordingly, there is a demand for a method of forming minute spacing between conductive patterns of test sockets.
그런데, 기존의 포고-핀(Pogo-pin) 타입의 반도체 테스트 소켓으로는 집적화되는 반도체 소자를 테스트하기 위한 반도체 테스트 소켓을 제작하는데 한계가 있었다. 도 1 내지 도 3은 한국공개특허 제10-2011-0065047호에 개시된 종래의 포고-핀(Pogo-pin) 타입의 반도체 테스트 소켓의 예를 나타낸 도면이다.However, the conventional Pogo-pin type semiconductor test socket has a limitation in manufacturing a semiconductor test socket for testing a semiconductor device to be integrated. 1 to 3 are diagrams showing an example of a conventional Pogo-pin type semiconductor test socket disclosed in Korean Patent Laid-Open No. 10-2011-0065047.
도 1 내지 도 3을 참조하여 설명하면 기존이 반도체 테스트 소켓(1100)은 반도체 디바이스(1130)의 단자(1131)와 대응되는 위치에 상하방향으로 관통공(1111)이 형성된 하우징(1110)과, 하우징(1110)의 관통공(1111) 내에 장착되어 반도체 디바이스(1130)의 단자(1131) 및 테스트 장치(1140)의 패드(1141)를 전기적으로 연결시키는 포고-핀(Pogo-pin)(1120)으로 이루어진다.1 to 3, the conventional semiconductor test socket 1100 includes a housing 1110 having a through hole 1111 formed in a vertical direction at a position corresponding to the terminal 1131 of the semiconductor device 1130, and Pogo-pins 1120 mounted in the through holes 1111 of the housing 1110 to electrically connect the terminals 1131 of the semiconductor device 1130 and the pads 1141 of the test apparatus 1140. Is done.
포고-핀(Pogo-pin)(1120)의 구성은, 포고-핀(Pogo-pin) 본체로 사용되며 내부가 비어있는 원통형 형태를 가지는 배럴(1124)과, 배럴(1124)의 하측에 형성되는 접촉팁(1123)과, 배럴(1124) 내부에서 접촉팁(1123)과 연결되어 수축과 팽창 운동을 하는 스프링(1122) 및 접촉팁(1123)과 연결된 스프링(1122) 반대편에 연결되어 반도체 디바이스(1130)와의 접촉에 따라 상하운동을 수행하는 접촉핀(1121)으로 구성된다.The configuration of the pogo-pin 1120 is a barrel 1124, which is used as a pogo-pin body and has a hollow cylindrical shape, and is formed below the barrel 1124. A semiconductor device connected to a contact tip 1123, a spring 1122 connected to the contact tip 1123 inside the barrel 1124 and contracting and expanding, and opposite to a spring 1122 connected to the contact tip 1123. It is composed of a contact pin 1121 to perform the vertical movement according to the contact with 1130.
이 때, 스프링(1122)은 수축 및 팽창을 하면서 접촉핀(1121)과 접촉팁(1123)에 전달되는 기계적인 충격을 흡수하면서 반도체 디바이스(1130)의 단자(1131)와 테스트 장치(1140)의 패드(1141)를 전기적으로 접속시켜 전기적인 불량여부를 검사하게 한다.At this time, the spring 1122 contracts and expands, while absorbing the mechanical shock transmitted to the contact pins 1121 and the contact tips 1123, the springs 1122 of the terminals 1131 and the test apparatus 1140 of the semiconductor device 1130. The pad 1141 is electrically connected to check whether there is an electrical failure.
그런데, 상기와 같은 기존의 포고-핀(Pogo-pin) 타입의 반도체 테스트 소켓은 상하 방향으로의 탄성을 유지하기 위해 물리적인 스프링을 사용하게 되고, 배럴 내부에 스프링과 핀을 삽입하고, 배럴을 다시 하우징의 관통공 내부에 삽입하여야 하므로 그 공정이 복잡할 뿐만 아니라 공정의 복잡성으로 인해 제조 가격이 상승하는 문제가 있다.However, the conventional Pogo-pin type semiconductor test socket as described above uses a physical spring to maintain elasticity in the vertical direction, inserts the spring and the pin into the barrel, and Since the process has to be inserted into the through-hole of the housing again, the process is complicated and the manufacturing cost increases due to the complexity of the process.
뿐만 아니라, 상하 방향으로 탄성을 갖는 전기적 접촉 구조의 구현을 위한 물리적인 구성 자체가 미세 피치를 구현하는데 한계가 있으며, 근래에 집적화된 반도체 소자에는 적용하는데 이미 한계치까지 도달해 있는 실정이다.In addition, the physical configuration itself for the implementation of the electrical contact structure having elasticity in the vertical direction has a limit to implement the fine pitch, and the situation has already reached the limit to apply to the integrated semiconductor device in recent years.
또한, 도 1 내지 도 3에 도시된 바와 같이, 포고-핀(Pogo-pin) 타입의 반도체 테스트 소켓은 상부의 상하 방향으로 접속팁(1123), 스프링(1122) 및 접속핀(1121)으로 연결되는 구조를 가지고 있어, 상하 방향으로의 길이를 줄이는데 한계가 있는데, 이와 같은 길이의 한계는 하이-스피드의 디바이스를 테스트하는데 한계로 작용하게 된다.In addition, as shown in FIGS. 1 to 3, the pogo-pin type semiconductor test socket is connected to the connecting tip 1123, the spring 1122, and the connecting pin 1121 in the upper and lower directions. Because of this structure, there is a limit in reducing the length in the vertical direction, which is a limit in testing a high-speed device.
한편, 포고-핀(Pogo-pin)의 반도체 테스트 소켓은 반도체 디바이스의 테스트 외에 두 디바이스를 전기적으로 연결하는 구조에서도 사용된다. 대표적인 예로, 하이-스피드의 CPU, 예컨대 대용량의 서버에 사용되는 CPU와 보드 사이에서 CPU의 핀과 보드의 단자 간을 연결하는 인터포저(Interposer)로 적용되고 있다.Meanwhile, the pogo-pin semiconductor test socket is used in a structure for electrically connecting two devices in addition to the test of the semiconductor device. As a representative example, a high-speed CPU, for example, an interposer connecting a pin of a CPU and a terminal of a board between a CPU and a board used in a large-capacity server.
대용량 서버에 사용되는 CPU이 경우, 일반 PC의 CPU 보다 면적이 넓고 핀의 수가 1000여개가 넘는 경우가 많아, 보드의 단자와 직접 접촉시키는 경우 접촉 불량이 발생할 수 있어, CPU와 보드 사이에서 포고-핀(Pogo-pin) 타입의 인터포저(Interposer)가 상하 방향으로 탄성적으로 두 디바이스를 연결하게 된다.In the case of a CPU used in a large-capacity server, the area of the CPU is larger than that of a general PC, and the number of pins is more than 1000, and if a direct contact is made with a terminal of a board, contact failure may occur. A pin-type interposer elastically connects the two devices in the vertical direction.
그런데, 포고-핀(Pogo-pin) 타입의 인터포저(Interposer)의 경우, 상술한 바와 같이, 피치의 한계로 인해 피치 간격이 좁아지는 CPU에 적용하는데 한계가 있을 뿐만 아니라, 상하 방향으로의 길이 한계로 인해 하이-스피드로 동작하는 CPU의 속도를 따라가기 어려운 문제점이 제기되고 있다.However, in the case of the Pogo-pin type interposer, as described above, there is a limitation in applying to a CPU in which the pitch interval is narrowed due to the limitation of the pitch, as well as the length in the vertical direction. Limitations raise the difficulty of keeping up with the speed of high-speed CPUs.
이에, 본 발명은 상기와 같은 문제점을 해소하기 위해 안출된 것으로서, 포고-핀 타입의 반도체 테스트 소켓을 대체가 가능하면서도 안정적인 신호 전달과 함께 하이-스피드로의 테스트가 가능하고, 하이-스피드의 CPU와 보드 사이에서 CPU와 보드를 전기적으로 연결하는 인터포저(Interposer)에도 적용 가능한 양방향 도전성 패턴 모듈을 제공하는데 그 목적이 있다.Accordingly, the present invention has been made to solve the above problems, it is possible to replace the pogo-pin type semiconductor test socket, but also to test the high-speed with a stable signal transmission, high-speed CPU An object of the present invention is to provide a bidirectional conductive pattern module that can be applied to an interposer that electrically connects a CPU and a board between a board and a board.
상기 목적은 본 발명에 따라, 양방향 도전성 패턴 모듈에 있어서, 절연성 재질의 절연층과 상기 절연층의 일측 표면 또는 양측 표면에 형성된 도전층을 갖는 복수의 베이스 기판이 상하 방향으로 적층되어 형성되는 본체와; 상기 본체에 상하 방향으로 관통 형성되는 복수의 메인 관통홀과; 각각의 상기 메인 관통홀의 내벽면 측에 도포되는 절연성 재질의 내부 절연벽과; 복수의 상기 메인 관통홀 중 적어도 하나의 내부에 그 내벽면과 해당 내부 절연벽 사이에 형성되어 복수의 상기 베이스 기판의 상기 도전층들을 상호 전기적으로 연결하는 내부 도전벽과; 상기 본체의 상부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 상부 관통홀이 형성된 탄성을 갖는 절연성 재질의 상부 지지층과; 상기 본체의 하부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 하부 관통홀이 형성된 탄성을 갖는 절연성 재질의 하부 지지층과; 복수의 상기 메인 관통홀에 각각 수용되되 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출된 상태로 각각의 상기 상부 지지층 및 상기 하부 지지층에 의해 각각 지지되는 복수의 양방향 도전성 핀을 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈에 의해서 달성된다.According to the present invention, in the bidirectional conductive pattern module, a main body formed by stacking a plurality of base substrates having an insulating layer of an insulating material and a conductive layer formed on one surface or both surfaces of the insulating layer and stacked in the vertical direction; ; A plurality of main through holes penetrating through the main body in a vertical direction; An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes; An inner conductive wall formed between at least one of the plurality of main through holes and between an inner wall surface and a corresponding inner insulating wall to electrically connect the conductive layers of the plurality of base substrates; An upper support layer having an elastic insulating material attached to an upper surface of the main body and having a plurality of upper through holes respectively corresponding to the plurality of main through holes; A lower support layer attached to a lower surface of the main body and having an elastic insulating material having a plurality of lower through holes respectively corresponding to the plurality of main through holes; Received in each of the plurality of main through holes, the upper surface is exposed in the upper direction through the upper through hole and the lower surface is exposed in the lower direction through the lower through hole in each of the upper support layer and the lower support layer It is achieved by a bidirectional conductive pattern module, characterized in that it comprises a plurality of bidirectional conductive pins each supported by.
한편, 상기 목적은 본 발명의 다른 실시 형태에 따라, 양방향 도전성 패턴 모듈에 있어서, 절연성 재질의 절연층과 상기 절연층의 일측 표면 또는 양측 표면에 형성된 도전층을 갖는 복수의 베이스 기판이 상하 방향으로 적층되어 형성되는 본체와; 상기 본체에 상하 방향으로 관통 형성되는 복수의 메인 관통홀과; 각각의 상기 메인 관통홀의 내벽면 측에 도포되는 절연성 재질의 내부 절연벽과; 상기 본체의 상하 방향으로 관통 형성되는 적어도 하나의 서브 관통홀과; 상기 서브 관통홀의 내벽면에 도포되어 복수의 상기 베이스 기판의 상기 도전층들을 상호 전기적으로 연결하는 내부 도전벽과; 상기 본체의 상부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 상부 관통홀이 형성된 절연성 재질의 상부 지지층과; 상기 본체의 하부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 하부 관통홀이 형성된 절연성 재질의 하부 지지층과; 복수의 상기 메인 관통홀에 각각 수용되되 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출된 상태로 각각의 상기 상부 지지층 및 상기 하부 지지층에 의해 각각 지지되는 복수의 양방향 도전성 핀을 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈에 의해서도 달성된다.On the other hand, the above object is, according to another embodiment of the present invention, in the bidirectional conductive pattern module, a plurality of base substrates having an insulating layer of insulating material and a conductive layer formed on one surface or both surfaces of the insulating layer in the vertical direction A main body laminated and formed; A plurality of main through holes penetrating through the main body in a vertical direction; An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes; At least one sub through hole penetrating in the vertical direction of the main body; An inner conductive wall applied to an inner wall of the sub through hole and electrically connecting the conductive layers of the plurality of base substrates to each other; An upper support layer attached to an upper surface of the main body and having a plurality of upper through holes corresponding to the plurality of main through holes, respectively; A lower support layer attached to a lower surface of the main body and having a plurality of lower through holes respectively corresponding to the plurality of main through holes; Received in each of the plurality of main through holes, the upper surface is exposed in the upper direction through the upper through hole and the lower surface is exposed in the lower direction through the lower through hole in each of the upper support layer and the lower support layer It is also achieved by a bi-directional conductive pattern module, characterized in that it comprises a plurality of bi-directional conductive pins each supported by.
한편, 상기 목적은 본 발명의 또 다른 실시 형태에 따라, 양방향 도전성 패턴 모듈에 있어서, 절연성 재질의 절연층과 상기 절연층의 양측 표면에 형성된 도전층을 갖는 본체와; 상기 본체에 상하 방향으로 관통 형성되는 복수의 메인 관통홀과; 각각의 상기 메인 관통홀의 내벽면 측에 도포되는 절연성 재질의 내부 절연벽과; 복수의 상기 메인 관통홀 중 적어도 하나의 내부에 그 내벽면과 해당 절연벽 사이에 형성되어 양측의 상기 도전층을 상호 전기적으로 연결하는 내부 도전벽과; 상기 본체의 상부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 상부 관통홀이 형성된 탄성을 갖는 절연성 재질의 상부 지지층과; 상기 본체의 하부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 하부 관통홀이 형성된 탄성을 갖는 절연성 재질의 하부 지지층과; 복수의 상기 메인 관통홀에 각각 수용되되 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출된 상태로 각각의 상기 상부 지지층 및 상기 하부 지지층에 의해 각각 지지되는 복수의 양방향 도전성 핀을 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈에 의해서도 달성된다.On the other hand, the above object is, according to another embodiment of the present invention, a bidirectional conductive pattern module, comprising: a main body having an insulating layer of insulating material and conductive layers formed on both surfaces of the insulating layer; A plurality of main through holes penetrating through the main body in a vertical direction; An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes; An inner conductive wall formed between at least one of the plurality of main through holes and between the inner wall surface and the insulating wall to electrically connect the conductive layers on both sides; An upper support layer having an elastic insulating material attached to an upper surface of the main body and having a plurality of upper through holes respectively corresponding to the plurality of main through holes; A lower support layer attached to a lower surface of the main body and having an elastic insulating material having a plurality of lower through holes respectively corresponding to the plurality of main through holes; Received in each of the plurality of main through holes, the upper surface is exposed in the upper direction through the upper through hole and the lower surface is exposed in the lower direction through the lower through hole in each of the upper support layer and the lower support layer It is also achieved by a bi-directional conductive pattern module, characterized in that it comprises a plurality of bi-directional conductive pins each supported by.
여기서, 상기 내부 도전벽은 복수의 상기 메인 관통홀 각각에 형성될 수 있다.The inner conductive wall may be formed in each of the plurality of main through holes.
또한, 각각의 상기 양방향 도전성 핀은 상기 메인 관통홀의 내부에서 각각의 상기 내부 절연벽에 의해 상기 도전층들과 전기적으로 격리되어 상호 전기적으로 연결되는 상기 도전층 및 상기 내부 도전벽이 그라운드로 동작 가능하다.In addition, each of the bidirectional conductive pins may be electrically isolated from the conductive layers by the respective inner insulating walls in the main through hole, and the conductive layers and the inner conductive walls electrically connected to each other may be grounded. Do.
그리고, 상기 상부 관통홀 및 상기 하부 관통홀의 내경은 상기 메인 관통홀의 내경보다 작게 형성될 수 있다.The inner diameters of the upper through hole and the lower through hole may be smaller than the inner diameter of the main through hole.
또한, 상기 상부 지지층은 상기 본체의 상부 표면으로부터 순차적으로 형성되는 상부 필름층 및 상부 실리콘층을 포함하고; 상기 하부 지지층은 상기 본체의 하부 표면으로부터 순차적으로 형성되는 하부 필름층 및 하부 실리콘층을 포함할 수 있다.In addition, the upper support layer includes an upper film layer and an upper silicon layer formed sequentially from the upper surface of the body; The lower support layer may include a lower film layer and a lower silicon layer sequentially formed from the lower surface of the body.
그리고, 상기 메인 관통홀에는 탄성을 갖는 실리콘 재질이 충진될 수 있다.The main through hole may be filled with an elastic silicon material.
또한, 상기 도전층과 전기적으로 연결되고, 외부의 그라운드와 연결되어 상기 도전층을 그라운드와 연결시키는 그라운드부를 더 포함할 수 있다.The electronic device may further include a ground part electrically connected to the conductive layer and connected to an external ground to connect the conductive layer to the ground.
여기서, 상기 그라운드부는 상기 본체에 상하 방향으로 관통된 제1 그라운드 관통홀과, 상기 상부 지지부 및 상기 하부 지지부에 관통 형성되고 상기 제1 그라운드 관통홀과 연통되는 제2 그라운드 관통홀 및 제3 그라운드 관통홀과, 상기 제1 그라운드 관통홀의 내벽멱에 도포되어 상기 도전층과 전기적으로 연결되는 그라운드 도전벽을 포함할 수 있다.Here, the ground part penetrates the first ground through-hole penetrating the body in the vertical direction, and the second ground through-hole and the third ground penetrating part formed in the upper support part and the lower support part to communicate with the first ground through-hole. It may include a hole and a ground conductive wall is applied to the inner wall 의 of the first ground through hole and electrically connected to the conductive layer.
여기서, 상기 양방향 도전성 핀은 도전성을 갖는 박판이 상하 방향을 축으로 원통 형상으로 말려 형성되는 상부 접촉부와, 도전성을 갖는 박판이 상하 방향을 축으로 원통 형상을 축으로 말려 형성되고 상기 상부 접촉부의 하부에 이격된 상태로 배치되는 하부 접촉부와, 상기 상부 접촉부와 상기 하부 접촉부를 전기적으로 연결하고, 상기 상부 접촉부와 상기 하부 접촉부 사이의 공간으로 휜 형상을 갖는 연결부를 포함하며; 상기 상부 접촉부의 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고, 상기 하부 접촉부의 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출되며, 상기 연결부는 상기 메인 관통홀에 수용될 수 있다.Here, the bidirectional conductive pin is formed in the upper contact portion is formed by rolling a cylindrical plate with conductivity in a cylindrical shape in the vertical direction, and the thin plate with conductivity is formed by rolling a cylindrical shape in the axis in the vertical direction and the lower portion of the upper contact portion A lower contact portion disposed to be spaced apart from and electrically connecting the upper contact portion and the lower contact portion, and a connecting portion having a 휜 shape to a space between the upper contact portion and the lower contact portion; An upper surface of the upper contact portion may be exposed upward through the upper through hole, a lower surface of the lower contact portion may be exposed downward through the lower through hole, and the connection part may be accommodated in the main through hole. .
또한, 상기 양방향 도전성 핀은 도전성을 갖는 박판이 상하 방향을 축으로 원통 형상으로 말려 형성되는 상부 접촉부와, 도전성을 갖는 박판이 상하 방향을 축으로 원통 형상을 축으로 말려 형성되고 상기 상부 접촉부의 하부에 이격된 상태로 배치되는 하부 접촉부와, 상기 상부 접촉부와 상기 하부 접척부를 전기적으로 연결하는 적어도 하나의 연결부를 포함하며; 상기 연결부는 상기 상부 접촉부와 상기 하부 접촉부에 원주 방향으로 상호 상이한 위치에서 연결되어, 원주 방향을 따라 감기는 형태로 상기 상부 접촉부와 상기 하부 접촉부를 연결하고, 상기 상부 접촉부의 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고, 상기 하부 접촉부의 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출되며, 상기 연결부는 상기 메인 관통홀에 수용될 수 있다.The bidirectional conductive pin may include an upper contact portion in which a thin conductive plate is rolled in a cylindrical shape in an up and down direction, and a thin conductive sheet is rolled in a cylindrical shape in an up and down direction, and a lower portion of the upper contact portion is formed. A lower contact portion spaced apart from and at least one connecting portion electrically connecting the upper contact portion and the lower contact portion; The connecting portion is connected to the upper contact portion and the lower contact portion at mutually different positions in the circumferential direction, and connects the upper contact portion and the lower contact portion in a form wound around the circumferential direction, and an upper surface of the upper contact portion passes through the upper portion. The upper surface of the lower contact portion may be exposed through the hole, and the lower surface of the lower contact portion may be exposed downward through the lower through hole, and the connection part may be accommodated in the main through hole.
상기와 같은 구성에 따라 본 발명에 따르면, 포고-핀 타입의 반도체 테스트 소켓을 대체가 가능하면서도 하이-스피드로의 테스트가 가능하고, 하이-스피드의 CPU와 보드 사이에서 CPU와 보드를 전기적으로 연결하는 인터포저(Interposer)에도 적용 가능한 양방향 도전성 패턴 모듈이 제공된다.According to the present invention according to the above configuration, it is possible to replace the pogo-pin type semiconductor test socket, but also to test at high-speed, electrically connecting the CPU and the board between the high-speed CPU and the board Provided is a bidirectional conductive pattern module applicable to an interposer.
도 1 내지 도 3은 종래의 포고-핀(Pogo-pin) 타입의 반도체 테스트 소켓을 설명하기 위한 도면이고,1 to 3 are diagrams for explaining a conventional Pogo-pin type semiconductor test socket,
도 4는 본 발명의 제1 실시예에 따른 양방향 도전성 패턴 모듈의 사시도이고,4 is a perspective view of a bidirectional conductive pattern module according to a first embodiment of the present invention;
도 5는 도 4의 Ⅴ-Ⅴ 선에 따른 단면도이고,5 is a cross-sectional view taken along the line VV of FIG. 4,
도 6 내지 도 9는 본 발명의 제1 실시예에 따른 양방향 도전성 패턴 모듈의 제조 과정을 설명하기 위한 도면이고,6 to 9 are views for explaining the manufacturing process of the bidirectional conductive pattern module according to the first embodiment of the present invention,
도 10은 본 발명의 제2 실시예에 따른 양방향 도전성 패턴 모듈의 단면을 나타낸 도면이고,10 is a cross-sectional view of a bidirectional conductive pattern module according to a second embodiment of the present invention;
도 11 및 도 12는 본 발명의 제2 실시예에 따른 양방향 도전성 패턴 모듈의 제조 과정을 설명하기 위한 도면이고,11 and 12 are views for explaining a manufacturing process of a bidirectional conductive pattern module according to a second embodiment of the present invention,
도 13 내지 도 16은 본 발명에 따른 양방향 도전성 패턴 모듈의 양방향 도전성 핀의 실시예들을 설명하기 위한 도면이다.13 to 16 are diagrams for describing embodiments of the bidirectional conductive pin of the bidirectional conductive pattern module according to the present invention.
본 발명은 양방향 도전성 패턴 모듈에 관한 것으로, 절연성 재질의 절연층과 상기 절연층의 일측 표면 또는 양측 표면에 형성된 도전층을 갖는 복수의 베이스 기판이 상하 방향으로 적층되어 형성되는 본체와; 상기 본체에 상하 방향으로 관통 형성되는 복수의 메인 관통홀과; 각각의 상기 메인 관통홀의 내벽면 측에 도포되는 절연성 재질의 내부 절연벽과; 복수의 상기 메인 관통홀 중 적어도 하나의 내부에 그 내벽면과 해당 내부 절연벽 사이에 형성되어 복수의 상기 베이스 기판의 상기 도전층들을 상호 전기적으로 연결하는 내부 도전벽과; 상기 본체의 상부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 상부 관통홀이 형성된 탄성을 갖는 절연성 재질의 상부 지지층과; 상기 본체의 하부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 하부 관통홀이 형성된 탄성을 갖는 절연성 재질의 하부 지지층과; 복수의 상기 메인 관통홀에 각각 수용되되 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출된 상태로 각각의 상기 상부 지지층 및 상기 하부 지지층에 의해 각각 지지되는 복수의 양방향 도전성 핀을 포함한다.The present invention relates to a bidirectional conductive pattern module, comprising: a main body formed by stacking a plurality of base substrates having an insulating layer of an insulating material and a conductive layer formed on one or both surfaces of the insulating layer; A plurality of main through holes penetrating through the main body in a vertical direction; An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes; An inner conductive wall formed between at least one of the plurality of main through holes and between an inner wall surface and a corresponding inner insulating wall to electrically connect the conductive layers of the plurality of base substrates; An upper support layer having an elastic insulating material attached to an upper surface of the main body and having a plurality of upper through holes respectively corresponding to the plurality of main through holes; A lower support layer attached to a lower surface of the main body and having an elastic insulating material having a plurality of lower through holes respectively corresponding to the plurality of main through holes; Received in each of the plurality of main through holes, the upper surface is exposed in the upper direction through the upper through hole and the lower surface is exposed in the lower direction through the lower through hole in each of the upper support layer and the lower support layer And a plurality of bidirectional conductive pins, each of which is supported by.
이하에서는 첨부된 도면을 참조하여 본 발명에 따른 실시예들을 상세히 설명한다.Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention;
도 4는 본 발명의 제1 실시예에 따른 양방향 도전성 패턴 모듈(100)의 사시도이고, 도 5는 도 4의 Ⅴ-Ⅴ 선에 따른 단면도이다. 도 4 및 도 5를 참조하여 설명하면, 본 발명의 제1 실시예에 다른 양방향 도전성 패턴 모듈(100)은 본체(110), 복수의 메인 관통홀(171), 내부 절연벽(130), 내부 도전벽(120), 상부 지지층(140), 하부 지지층(150) 및 양방향 도전성 핀(160)을 포함한다.4 is a perspective view of the bidirectional conductive pattern module 100 according to the first embodiment of the present invention, and FIG. 5 is a cross-sectional view taken along the line VV of FIG. 4. Referring to FIGS. 4 and 5, the bidirectional conductive pattern module 100 according to the first embodiment of the present invention includes a main body 110, a plurality of main through holes 171, an inner insulating wall 130, and an inner portion. The conductive wall 120, the upper support layer 140, the lower support layer 150, and the bidirectional conductive pin 160 are included.
본 발명의 제1 실시예에 따른 본체(110)는 복수의 베이스 기판(111)이 상하 방향으로 적층되어 형성된다. 도 4 및 도 5에서는 4개의 베이스 기판(111)의 적층되어 본체(110)를 형성하는 것을 예로 한다.In the main body 110 according to the first embodiment of the present invention, a plurality of base substrates 111 are stacked in a vertical direction. 4 and 5, four base substrates 111 are stacked to form a main body 110.
베이스 기판(111)은 절연성 재질의 절연층(112)과, 절연층(112)의 일측 또는 양측 표면에 형성되는 도전층(113,114)을 포함한다. 도 4 및 도 5에서는 도전층(113,114)이 절연층(112)의 양측 표면에 형성되는 예를 도시하고 있으나, 일측 표면에만 도전층(113,114)의 형성되도록 마련될 수 있다.The base substrate 111 includes an insulating layer 112 made of an insulating material, and conductive layers 113 and 114 formed on one or both surfaces of the insulating layer 112. 4 and 5 illustrate examples in which the conductive layers 113 and 114 are formed on both surfaces of the insulating layer 112, but the conductive layers 113 and 114 may be formed only on one surface thereof.
여기서, 베이스 기판(111)은 인쇄회로기판(PCB : Printed Circuit Board) 형태로 마련될 수 있다. 인쇄회로기판은 절연성 재질, 예컨대 FR4 재질의 절연층(112)과, 구리 재질의 도전층(113,114)으로 구성되는 바, 본 발명에 따른 베이스 기판(111)으로 인쇄회로기판을 사용하는 것이 바람직하다.Here, the base substrate 111 may be provided in the form of a printed circuit board (PCB). The printed circuit board is composed of an insulating layer 112 made of an insulating material, for example, FR4, and conductive layers 113 and 114 made of copper. It is preferable to use a printed circuit board as the base substrate 111 according to the present invention. .
복수의 메인 관통홀(171)은 본체(110)의 상하 방향으로 관통 형성된다(도 7 참조). 본 발명에서는 16개의 메인 관통홀(171)이 형성된 것을 예로 하여 설명하고 있으나, 그 개수는 이에 국한되지 않으며, CPU와 보드 사이의 인터포저로 적용될 경우 1000개 이상의 메인 관통홀(171)이 형성될 수도 있다.The plurality of main through holes 171 are formed to penetrate in the vertical direction of the main body 110 (see FIG. 7). In the present invention, 16 main through holes 171 are formed as an example, but the number is not limited thereto, and when applied as an interposer between the CPU and the board, more than 1000 main through holes 171 may be formed. It may be.
내부 절연벽(130)은 각각의 메인 관통홀(171)의 내벽면에 도포되는데, 절연성 재질로 마련되는 것을 예로 한다. 본 발명에서는 절연성 실리콘을 내부에 형성하는 것을 예로 하는데, 그 재질은 이에 국한되지 않는다. 내부 절연벽(130)을 통해 각각의 베이스 기판(111)의 도전층(113,114)과 메인 관통홀(171)에 삽입되는 양방향 도전성 핀(160)이 물리적으로 격리되어 상호 전기적으로 연결되는 것을 차단하게 된다.The inner insulating wall 130 is applied to the inner wall surface of each main through hole 171, for example, provided with an insulating material. In the present invention, the insulating silicon is formed inside, for example, but the material is not limited thereto. The conductive layers 113 and 114 of the respective base substrates 111 and the bidirectional conductive pins 160 inserted into the main through holes 171 through the inner insulating wall 130 may be physically isolated to block the electrical connections. do.
내부 도전벽(120)은 메인 관통홀(171)의 내벽면과 내부 절연벽(130) 사이에 형성되어 복수의 베이스 기판(111)의 도전층(113,114)들을 상호 전기적으로 연결한다. 이를 통해 본체(110)를 형성하는 각 층의 도전층(113,114)들은 전기적으로 상호 연결된 상태가 되는데, 본 발명에 따른 양방향 도전성 패턴 모듈(100)을 반도체 테스트용 소켓에 적용하거나 인터포저에 적용할 경우 도전층(113,114)들을 그라운드(Ground)로 사용하게 되면 하이-스피드의 구현이 가능하게 된다. 예를 들어, 본 발명에 따른 양방향 도전성 패턴 모듈(100)이 반도체 테스트 소켓에 사용되는 경우, 검사회로기판의 그라운드에 도전층(113,114)이 연결되는 경우 본 발명에 따르느 양방향 도전성 패턴 모듈(100)이 그라운드화 되어 안정된 신호가 양방향 도전성 핀(160)을 통해 전달 가능하게 된다. 즉, 양방향 도전성 핀(160)을 통해 전달되는 신호가 주변의 도전층(113,114) 및 내부 도전벽(120)에 의해 그라운드화되어 노이즈 및 상호 신호 간섭을 최소화하여 안정적인 신호의 전달이 가능하게 되고, 하이-스피드의 구현이 가능하게 된다.The inner conductive wall 120 is formed between the inner wall surface of the main through hole 171 and the inner insulating wall 130 to electrically connect the conductive layers 113 and 114 of the base substrate 111 to each other. Through this, the conductive layers 113 and 114 of each layer forming the main body 110 are electrically connected to each other. The bidirectional conductive pattern module 100 according to the present invention may be applied to a semiconductor test socket or to an interposer. In this case, when the conductive layers 113 and 114 are used as grounds, high speeds can be realized. For example, when the bidirectional conductive pattern module 100 according to the present invention is used in a semiconductor test socket, when the conductive layers 113 and 114 are connected to the ground of the test circuit board, the bidirectional conductive pattern module 100 according to the present invention is used. ) Is grounded so that a stable signal can be transmitted through the bidirectional conductive pin 160. That is, the signal transmitted through the bidirectional conductive pin 160 is grounded by the surrounding conductive layers 113 and 114 and the inner conductive wall 120, thereby minimizing noise and mutual signal interference, thereby enabling stable signal transmission. High-speed implementations are possible.
여기서, 도전층(113,114) 및/또는 내부 도전벽(120)을 외부의 그라운드와 연결하는 방법은 후술할 그라운드부(180)를 통해 연결 가능하며, 이외에도 본 발명에 따른 양방향 도전성 모듈(100)이 적용되는 디바이스의 구조에 따라 다양한 형태로 연결 가능할 것이다. 여기서, 내부 도전벽(120)은 니켈 도금 및 금 도금을 순차적으로 수행하여 형성될 수 있는 바, 이에 대한 상세한 설명은 후술한다.Here, the method of connecting the conductive layers 113 and 114 and / or the inner conductive wall 120 to an external ground may be connected through the ground portion 180 which will be described later. In addition, the bidirectional conductive module 100 according to the present invention may be It may be connected in various forms according to the structure of the device applied. Here, the inner conductive wall 120 may be formed by sequentially performing nickel plating and gold plating, which will be described later.
상부 지지층(140)은 본체(110)의 상부 표면에 부착된다. 여기서, 상부 지지층(140)에는 본체(110)에 형성된 메인 관통홀(171)에 대응하는 위치에 각각 상부 관통홀(172)이 형성된다. 마찬가지로 하부 지지층(150)은 본체(110)의 하부 표면에 부착된다. 그리고, 하부 지지층(150)에는 본체(110)에 형성된 메인 관통홀(171)에 대응하는 위치에 각각 하부 관통홀(173)이 형성된다.The upper support layer 140 is attached to the upper surface of the body 110. Here, the upper support layer 140 is formed with upper through holes 172 at positions corresponding to the main through holes 171 formed in the main body 110, respectively. Similarly, the lower support layer 150 is attached to the lower surface of the body 110. In the lower support layer 150, lower through holes 173 are formed at positions corresponding to the main through holes 171 formed in the main body 110, respectively.
여기서, 상부 지지층(140) 및 하부 지지층(150)은 각각 탄성을 갖는 재질로 마련되는데, 본 발명에서는 상부 지지층(140)이 상부 필름층(141) 및 상부 실리콘층(142)이 순차적으로 적층되어 형성되고, 하부 지지층(150)이 하부 필름층(151) 및 하부 실리콘층(152)이 순차적으로 적층되어 형성되는 것을 예로 한다.Here, the upper support layer 140 and the lower support layer 150 are each provided with a material having elasticity, in the present invention, the upper support layer 140 is the upper film layer 141 and the upper silicon layer 142 are sequentially stacked The lower support layer 150 is formed by stacking the lower film layer 151 and the lower silicon layer 152 sequentially.
각각의 양방향 도전성 핀(160)은 메인 관통홀(171)에 각각 수용되는데, 양방향 도전성 핀(160)의 상부 표면이 상부 지지층(140)의 상부 관통홀(172)을 통해 상부 방향으로 노출된다. 그리고, 양방향 도전성 핀(160)의 하부 표면은 하부 지지층(150)의 하부 관통홀(173)을 통해 하부 방향으로 노출된다. 여기서, 양방향 도전성 핀(160)의 상부 영역은 상부 지지층(140)에 의해 지지되고, 하부 영역은 하부 지지층(150)에 의해 지지된다.Each bidirectional conductive pin 160 is accommodated in the main through hole 171, respectively, and the upper surface of the bidirectional conductive pin 160 is exposed upward through the upper through hole 172 of the upper support layer 140. The lower surface of the bidirectional conductive pin 160 is exposed downward through the lower through hole 173 of the lower support layer 150. Here, the upper region of the bidirectional conductive pin 160 is supported by the upper support layer 140, and the lower region is supported by the lower support layer 150.
상기와 같은 구성에 따라, 본 발명에 따른 양방향 도전성 패턴 모듈(100)이 반도체 소자의 테스트를 위한 반도체 테스트 소켓에 적용되는 경우, 상부 방향에서 하부 방향으로 가압하는 반도체 소자의 볼(Ball)이 양방향 도전성 핀(160)의 상부 표면에 접촉하여 하부로 가압하게 되는데, 상부 지지층(140)에 의해 양방향 도전성 핀(160)이 지지되어 탄성적인 지지가 가능하게 된다.According to the configuration as described above, when the bidirectional conductive pattern module 100 according to the present invention is applied to the semiconductor test socket for the test of the semiconductor device, the ball (Ball) of the semiconductor device pressed from the upper direction to the lower direction is bidirectional The upper surface of the conductive pin 160 is pressed to the bottom, and the bidirectional conductive pin 160 is supported by the upper support layer 140 to enable elastic support.
마찬가지로, 반도체 소자의 테스트 과정에서 상부 방향에서 하부 방향으로 본 발명에 따른 양방향 도전성 패턴 모듈(100)이 가압될 때 양방향 도전성 핀(160)의 하부 표면이 검사회로기판의 단자와 접촉될 때 하부 지지층(150)이 탄성적으로 지지하게 된다.Similarly, the lower support layer when the lower surface of the bidirectional conductive pin 160 is in contact with the terminal of the test circuit board when the bidirectional conductive pattern module 100 according to the present invention is pressed from the upper direction to the lower direction during the test of the semiconductor device. 150 is elastically supported.
상기와 같은 구성에 따라, 본 발명에 따른 양방향 도전성 패턴 모듈(100)을 반도체 테스트 소켓이나 인터포저에 적용하게 되면, 양방향 도전성 핀(160)이 반도체 소자와 검사회로기판, 또는 CPU와 보드 사이에서 양 디바이스를 전기적으로 연결시키게 되는데, 이 때 복수의 베이스 기판(111)의 각 도전층(113,114)과, 내부 도전벽(120)이 외부의 그라운드와 연결되어 양방향 도전성 핀(160)의 인근에서 그라운드로 동작할 수 있게 되어, 노이즈나 상호 간섭이 배제된 안정적인 동작 뿐만 아니라 하이-스피드로의 동작이 가능하게 된다.According to the above configuration, when the bidirectional conductive pattern module 100 according to the present invention is applied to a semiconductor test socket or an interposer, the bidirectional conductive pins 160 are formed between the semiconductor device and the test circuit board, or between the CPU and the board. Both devices are electrically connected to each other. At this time, each of the conductive layers 113 and 114 of the base substrate 111 and the inner conductive wall 120 are connected to an external ground, so that the ground is near the bidirectional conductive pin 160. It is possible to operate at high speed, as well as stable operation without noise or mutual interference.
또한, 베이스 기판(111)의 적층 두께, 예를 들어 적층되는 베이스 기판(111)의 수를 조절하거나 베이스 기판(111)의 절연층(112)의 두께를 조절하는 것에 의해, 양방향 도전성 패턴 모듈(100)의 두께를 조절할 수 있어, 양방향 도전성 패턴 모듈(100)이 적용되는 조건에 따라 제작이 가능하게 된다.In addition, by controlling the thickness of the base substrate 111, for example, the number of the base substrates 111 to be stacked or the thickness of the insulating layer 112 of the base substrate 111, the bidirectional conductive pattern module ( Since the thickness of 100 may be adjusted, the fabrication may be performed according to the condition in which the bidirectional conductive pattern module 100 is applied.
또한, 양방향 도전성 핀(160)을 후술할 구조에 따라 그 크기를 기존의 포고-핀(Pogo-pin)보다 작게 제작하는 경우, 기존의 포고핀 타입이 갖는 피치의 한계 및 상하 방향으로의 길이의 한계를 극복할 수 있어, 반도체 테스트 소켓이나 인터포저에 적용할 때 다양한 사이즈로의 구현이 가능하게 된다.In addition, when the bi-directional conductive pin 160 is made smaller in size than the existing pogo-pin according to the structure to be described later, the limit of the pitch and the length in the vertical direction of the existing pogo pin type The limitations can be overcome, enabling implementations of various sizes when applied to semiconductor test sockets or interposers.
전술한 실시예에서는 내부 도전벽(120)이 복수의 메인 관통홀(171) 전체에 각각 형성되어, 도전층(113,114)을 전기적으로 연결하는 것을 예로 하고 있다. 이외에도, 내부 도전벽(120)은 메인 관통홀(171) 중 적어도 한 곳에만 형성되더라도 복수의 베이스 기판(111)의 전체 도전층(113,114)을 전기적으로 연결할 수 있음은 물론이다.In the above-described embodiment, the internal conductive walls 120 are formed in the entire plurality of main through holes 171, respectively, to electrically connect the conductive layers 113 and 114. In addition, the inner conductive wall 120 may be electrically connected to the entire conductive layers 113 and 114 of the plurality of base substrates 111 even if only one of the main through holes 171 is formed.
한편, 본 발명의 제1 실시예에서는, 상부 관통홀(172) 및 하부 관통홀(173)의 내경이 메인 관통홀(171)의 내경보다 작게(도 5이 확대 영역 및 도 9의 (b) 참조) 형성되는 것을 예로 한다. 이에 따라, 양방향 도전성 핀(160)의 상부 영역과 하부 영역은 각각 상부 지지층(140) 및 하부 지지층(150)에 의해 지지되고, 중간 영역은 메인 관통홀(171) 내부의 공간에서 그 내벽면과 이격된 상태가 유지됨으로써, 내부에서의 움직임이 자유로워진다.On the other hand, in the first embodiment of the present invention, the inner diameter of the upper through hole 172 and the lower through hole 173 is smaller than the inner diameter of the main through hole 171 (FIG. 5 is an enlarged area and FIG. 9B). It is taken as an example. Accordingly, the upper region and the lower region of the bidirectional conductive pin 160 are supported by the upper support layer 140 and the lower support layer 150, respectively, and the middle region is formed in the space inside the main through hole 171 and its inner wall surface. By maintaining the spaced apart state, the movement inside is free.
이에 따라, 본 발명의 제1 실시예에 따른 양방향 도전성 패턴 모듈(100)이 반도체 테스트 소켓에 적용될 때, 메인 관통홀(171)의 내부의 빈 공간을 통해 상하 방향으로 양방향 도전성 핀(160)의 유동 가능성이 커지게 되고, 양방향 도전성 핀(160)의 중간 영역을 후술할 연결부(163)로 구성하거나, 기존의 포고-핀(Pogo-pin)을 사용하는 경우에 연결부(163)나 스프링의 탄성력이 보다 원활하게 작용하게 되어 보다 안정적인 테스트가 가능하게 된다.Accordingly, when the bidirectional conductive pattern module 100 according to the first embodiment of the present invention is applied to the semiconductor test socket, the bidirectional conductive pins 160 may be vertically moved through the empty space inside the main through hole 171. The possibility of flow increases, and when the intermediate region of the bi-directional conductive pin 160 is composed of the connecting portion 163 which will be described later, or when the existing pogo-pin is used, the elastic force of the connecting portion 163 or the spring is used. This will work more smoothly, allowing for more stable testing.
또한, 본 발명에서는, 메인 관통홀(171)이 내부를 탄성을 갖는 실리콘 재질로 충진할 수 있다. 이 경우, 상하 방향으로 가압을 보다 강하게 지지하게 되는데, 본 발명에 따른 양방향 도전성 패턴 모듈(100)을 인터포저에 적용할 경우, CPU와 보드 사이에서 오랜 시간 동안 보다 안정적으로 접촉을 유지시킬 수 있게 된다.In addition, in the present invention, the main through hole 171 may fill the inside with a silicone material having elasticity. In this case, the pressure is more strongly supported in the vertical direction. When the bidirectional conductive pattern module 100 according to the present invention is applied to the interposer, the CPU and the board can be stably maintained for a long time. do.
다시 도 4 및 도 5를 참조하여 설명하면, 본 발명의 제1 실시예에 따른 양방향 도전성 패턴 모듈(100)은 그라운드부(180)를 포함할 수 있다.Referring to FIGS. 4 and 5 again, the bidirectional conductive pattern module 100 according to the first embodiment of the present invention may include a ground unit 180.
그라운드부(180)는 도전층(113,114) 및 내부 도전벽(120)과 전기적으로 연결된다. 그리고, 그라운드부(180)는 외부의 그라운드, 예를 들어 상술한 바와 같이, 본 발명에 따른 양방향 도전성 패턴 모듈(100)이 반도체 테스트 소켓에 적용되는 경우 검사회로기판의 그라운드와 연결되어 도전층(113,114) 및 내부 도전벽(120)을 그라운드와 연결시킨다.The ground part 180 is electrically connected to the conductive layers 113 and 114 and the inner conductive wall 120. In addition, the ground unit 180 is connected to the ground of the test circuit board when the external ground, for example, the bidirectional conductive pattern module 100 according to the present invention is applied to the semiconductor test socket as described above. 113 and 114 and the inner conductive wall 120 are connected to ground.
본 발명의 제1 실시예에 따른 그라운드부(180)는, 도 5에 도시된 바와 같이, 제1 그라운드 관통홀(181), 제2 그라운드 관통홀(183), 제3 그라운드 관통홀(184) 및 그라운드 도전벽(182)을 포함하는 것을 예로 한다.As illustrated in FIG. 5, the ground portion 180 according to the first embodiment of the present invention includes a first ground through hole 181, a second ground through hole 183, and a third ground through hole 184. And a ground conductive wall 182 as an example.
제1 그라운드 관통홀(181)은 본체(110)에 상하 방향으로 관통 형성된다. 여기서, 제1 그라운드 관통홀(181)은 메인 관통홀(171)의 형성시 함께 형성될 수 있는 바, 그 상세한 설명은 후술한다.The first ground through hole 181 penetrates through the body 110 in the vertical direction. Here, the first ground through hole 181 may be formed together with the formation of the main through hole 171, which will be described later.
제2 그라운드 관통홀(183)은 상부 지지층(140)에 상하 방향으로 관통 형성되는데, 제1 그라운드 관통홀(181)에 대응하는 위치에 형성된다. 마찬가지로, 제3 그라운드 관통홀(184)은 하부 지지층(150)에 상하 방향으로 관통 형성되는데, 제1 그라운드 관통홀(181)에 대응하는 위치에 형성된다. 여기서, 제2 그라운드 관통홀(183) 및 제3 그라운드 관통홀(184)는 상부 관통홀(172) 및 하부 관통홀(173)의 형성시 함께 형성될 수 있는데 이에 대한 상세한 설명은 후술한다.The second ground through hole 183 penetrates the upper support layer 140 in the vertical direction, and is formed at a position corresponding to the first ground through hole 181. Similarly, the third ground through hole 184 penetrates through the lower support layer 150 in the vertical direction, and is formed at a position corresponding to the first ground through hole 181. Here, the second ground through hole 183 and the third ground through hole 184 may be formed together when the upper through hole 172 and the lower through hole 173 are formed, which will be described later.
그리고, 그라운드 도전벽(182)는 제1 그라운드 관통홀(181)의 내벽면에 도포되어 도전층(113,114)과 전기적으로 연결된다. 이를 통해, 그라운드 도전벽(182)을 외부의 그라운드에 연결하게 되면, 본 발명에 따른 양방향 도전성 패턴 모듈(100)의 도전층(113,114)들이 그라운드로 동작 가능하게 된다.The ground conductive wall 182 is applied to the inner wall surface of the first ground through hole 181 and electrically connected to the conductive layers 113 and 114. As a result, when the ground conductive wall 182 is connected to an external ground, the conductive layers 113 and 114 of the bidirectional conductive pattern module 100 according to the present invention may operate as the ground.
이하에서는, 도 6 내지 도 9를 참조하여 본 발명의 제1 실시예에 따른 양방향 도전성 패턴 모듈(100)의 제조 방법에 대해 상세히 설명한다.Hereinafter, a method of manufacturing the bidirectional conductive pattern module 100 according to the first embodiment of the present invention will be described in detail with reference to FIGS. 6 to 9.
먼저, 도 6에 도시된 바와 같이, 복수의 베이스 기판(111)을 마련하고, 복수의 베이스 기판(111)을 상하 방향으로 적층하여, 본체(110)를 형성한다. 본 발명에서는 도 6에 도시된 바와 같이, 4개의 베이스 기판(111)을 적층하여 본체(110)를 형성하는 것을 예로 하고 있으나, 상술한 바와 같이, 본체(110)의 두께 등을 고려하여 그 개수가 결정될 수 있다. 여기서, 베이스 기판(111)의 적층은 베이스 기판(111)의 사이에 접착제를 이용하여 부착할 수 있다.First, as illustrated in FIG. 6, a plurality of base substrates 111 are provided, and a plurality of base substrates 111 are stacked in an up and down direction to form a main body 110. In the present invention, as shown in FIG. 6, the four base substrates 111 are stacked to form the main body 110. However, as described above, the number thereof is considered in consideration of the thickness of the main body 110 and the like. Can be determined. Here, the stacking of the base substrate 111 may be attached using an adhesive between the base substrate 111.
또한, 도 6에서는 베이스 기판(111)이 절연층(112)의 양측에 도전층(113,114)이 형성된 인쇄회로기판 형태로 구성하는 것을 예로 하고 있으나, 상술한 바와 같이, 절연층(112)의 일측에만 도전층(113,114)이 형성된 인쇄회로기판을 사용 가능함은 물론이다.In addition, although FIG. 6 illustrates that the base substrate 111 is configured in the form of a printed circuit board having conductive layers 113 and 114 formed on both sides of the insulating layer 112, as described above, one side of the insulating layer 112 is described. Of course, only the printed circuit board on which the conductive layers 113 and 114 are formed may be used.
상기와 같이 베이스 기판(111)의 적층을 통해 본체(110)가 완성되면, 도 7에 도시된 바와 같이, 본체(110)에 복수의 메인 관통홀(171)을 형성한다. 여기서, 메인 관통홀(171)의 형성시 제1 그라운드 관통홀(181)이 함께 형성될 수 있다. 도 8 및 도 9는 도 7이 VIII-VIII에 따른 단면을 통해 제조 과정을 도시한 도면이다.When the main body 110 is completed by stacking the base substrate 111 as described above, as shown in FIG. 7, a plurality of main through holes 171 are formed in the main body 110. Here, when the main through hole 171 is formed, the first ground through hole 181 may be formed together. 8 and 9 illustrate a manufacturing process through a cross section according to VIII-VIII.
도 8의 (a)에 도시된 바와 같이, 본체(110)에 메인 관통홀(171) 및 제1 그라운드 관통홀(181)이 형성되면, 각각의 메인 관통홀(171)의 내벽면에 도 8의 (b)에 도시된 바와 같이, 내부 도전벽(120)을 형성한다. 내부 도전벽(120)은 니켈 도금 및 금 도금을 순차적으로 수행하여 형성할 수 있다. 내부 도전벽(120)의 형성을 통해 각각의 베이스 기판(111)의 도전층(113,114)들이 상호 전기적으로 연결된다. 여기서, 도 8의 (b)는 모든 메인 관통홀(171)의 내벽면에 내부 도전벽(120)이 형성되는 것을 예로 하고 있으나, 상술한 바와 같이, 적어도 하나의 메인 관통홀(171)의 내벽면에 내부 도전벽(120)이 형성될 수 있음은 물론이다. 또한, 내부 도전벽(120)을 형성하는 도금 과정에서 제1 그라운드 관통홀(181)의 내벽면에 그라운드 도전벽(182)이 함께 형성될 수 있다.As shown in FIG. 8A, when the main through hole 171 and the first ground through hole 181 are formed in the main body 110, the inner wall surface of each main through hole 171 is illustrated in FIG. 8. As shown in (b) of the, the inner conductive wall 120 is formed. The inner conductive wall 120 may be formed by sequentially performing nickel plating and gold plating. Through the formation of the inner conductive wall 120, the conductive layers 113 and 114 of each base substrate 111 are electrically connected to each other. Here, (b) of FIG. 8 illustrates that the inner conductive wall 120 is formed on the inner wall surfaces of all the main through holes 171, but as described above, the inside of the at least one main through hole 171 is included. Of course, the inner conductive wall 120 may be formed on the wall. In addition, in the plating process of forming the inner conductive wall 120, the ground conductive wall 182 may be formed together on the inner wall surface of the first ground through hole 181.
메인 관통홀(171)이 내벽면에 내부 도전벽(120)이 형성되면, 내부 도전벽(120)의 내벽면(또는 메인 관통홀(171)이 내벽면)에 도 8의 (c)에 도시된 바와 같이, 내부 절연벽(130)을 형성한다. 내부 절연벽(130)은 절연성 재질, 예를 들어 실리콘을 도포하여 형성할 수 있다.When the inner conductive wall 120 is formed on the inner wall surface of the main through hole 171, the inner wall surface (or the main through hole 171 of the inner wall surface) of the inner conductive wall 120 is illustrated in FIG. 8C. As shown, the inner insulation wall 130 is formed. The internal insulating wall 130 may be formed by applying an insulating material, for example, silicon.
여기서, 내부 절연벽(130)을 형성할 때, 제1 그라운드 관통홀(181)의 내벽면에 형성된 그라운드 도전벽(182)의 내벽면에 절연벽이 형성되지 않도록 제1 그라운드 관통홀(181)의 상부 및 하부를 막은 후 내부 절연벽(130)의 형성 과정이 진행될 수 있다.Here, when the inner insulating wall 130 is formed, the first ground through hole 181 may not be formed on the inner wall surface of the ground conductive wall 182 formed on the inner wall surface of the first ground through hole 181. After forming the upper and lower portions of the inner insulating wall 130 may be formed.
내부 절연벽(130)의 형성이 완료되면, 도 9의 (a)에 도시된 바와 같이, 본체(110)의 상부에 상부 지지층(140)을 형성하고, 본체(110)의 하부에 하부 지지층(150)을 형성한다. 여기서, 상부 지지층(140)은 상부 필름층(141)을 본체(110)의 상부에 부착한 후 상부 실리콘층(142)을 도포하여 형성할 수 있다. 마찬가지로, 하부 지지층(150)은 하부 필름층(151)을 본체(110)의 하부에 부착한 후 하부 실리콘층(152)을 도포하여 형성할 수 있다.When the formation of the inner insulation wall 130 is completed, as shown in FIG. 9A, the upper support layer 140 is formed on the upper portion of the main body 110, and the lower support layer (lower) on the lower portion of the main body 110. 150). Here, the upper support layer 140 may be formed by attaching the upper film layer 141 to the upper portion of the main body 110 and then applying the upper silicon layer 142. Similarly, the lower support layer 150 may be formed by attaching the lower film layer 151 to the lower portion of the main body 110 and then applying the lower silicon layer 152.
그런 다음, 도 9의 (b)에 도시된 바와 같이, 상부 지지층(140)과 하부 지지층(150)에 각각 상부 관통홀(172) 및 하부 관통홀(173)을 형성한다. 이 때, 상부 관통홀(172) 및 하부 관통홀(173)의 내경은 메인 관통홀(171)의 내경보다 작게 형성할 수 있음은 상술한 바와 같다. 여기서, 상부 관통홀(172) 및 하부 관통홀(173)의 형성 과정에서 제2 그라운드 관통홀(183) 및 제2 그라운드 관통홀(184)이 함께 형성될 수 있다.Then, as shown in FIG. 9B, the upper through hole 172 and the lower through hole 173 are formed in the upper support layer 140 and the lower support layer 150, respectively. In this case, the inner diameters of the upper through hole 172 and the lower through hole 173 may be smaller than the inner diameter of the main through hole 171 as described above. Here, in the process of forming the upper through hole 172 and the lower through hole 173, the second ground through hole 183 and the second ground through hole 184 may be formed together.
그리고, 각각의 상부 관통홀(172), 메인 관통홀(171) 및 하부 관통홀(173)에 양방향 도전성 핀(160)을 삽입하게 되면, 도 5에 도시된 바와 같은 양방향 도전성 패턴 모듈(100)의 제작이 가능하게 된다.When the bidirectional conductive pin 160 is inserted into each of the upper through hole 172, the main through hole 171, and the lower through hole 173, the bidirectional conductive pattern module 100 as illustrated in FIG. 5. Can be made.
여기서, 양방향 도전성 핀(160)의 삽입 후, 상부 지지층(140)의 상부 표면, 즉 상부 실리콘층(142)과 양방향 도전성 핀(160)을 실리콘 등을 이용하여 고정시키고, 하부 지지층(150)의 하부 표면, 즉 하부 실리콘층(152)과 양방향 도전성 핀(160)을 실리콘 등을 이용하여 고정시킴으로써, 양방향 도전성 핀(160)이 상부 지지층(140) 및 하부 지지층(150)에 의해 지지되도록 구성할 수 있다.Here, after the insertion of the bidirectional conductive pins 160, the upper surface of the upper support layer 140, that is, the upper silicon layer 142 and the bidirectional conductive pins 160 are fixed using silicon or the like, and the lower support layer 150 of By fixing the lower surface, that is, the lower silicon layer 152 and the bidirectional conductive pin 160 using silicon or the like, the bidirectional conductive pin 160 may be configured to be supported by the upper support layer 140 and the lower support layer 150. Can be.
전술한 실시예에서는 내부 도전벽(120)의 형성 과정에서 메인 관통홀(171)의 내벽면에만 도금이 되는 것으로 설명하고 있으나, 본체(110)의 상부 표면 및 하부 표면이 모두 도금될 수 있다. 마찬가지로, 내부 절연벽(130)의 형성 과정에서 메인 관통홀(171)의 내벽면 및/또는 내부 도전벽(120)의 내벽면에만 절연층이 형성되는 것을 예로 하고 있으나, 본체(110)의 상부 표면 및 하부 표면에 모두 절연층이 형성될 수 있다.In the above-described embodiment, the plating is performed only on the inner wall surface of the main through hole 171 during the formation of the inner conductive wall 120, but both the upper surface and the lower surface of the main body 110 may be plated. Similarly, the insulating layer is formed only on the inner wall surface of the main through hole 171 and / or the inner wall surface of the inner conductive wall 120 during the formation of the inner insulation wall 130, but the upper portion of the main body 110 is formed. An insulating layer may be formed on both the surface and the lower surface.
이하에서는, 도 10을 참조하여 본 발명의 제2 실시예에 따른 양방향 도전성 패턴 모듈(100a)의 구성에 대해서 설명한다. 여기서, 본 발명이 제2 실시예에 따른 양방향 도전성 패턴 모듈(100a)의 구성을 설명하는데 있어, 제1 실시예의 구성과 대응하는 구성에 대해서는 그 상세한 설명을 생략할 수 있다.Hereinafter, the configuration of the bidirectional conductive pattern module 100a according to the second embodiment of the present invention will be described with reference to FIG. 10. Here, in the present invention to explain the configuration of the bidirectional conductive pattern module 100a according to the second embodiment, the detailed description of the configuration corresponding to the configuration of the first embodiment can be omitted.
본 발명의 제2 실시예에 따른 양방향 도전성 패턴 모듈(100a)은, 도 10에 도시된 바와 같이, 본체(110a), 복수의 메인 관통홀(171a), 내부 절연벽(130a), 내부 도전벽(120a) 및 상부 지지층(140a), 하부 지지층(150a) 및 양방향 도전성 핀(160a)을 포함할 수 있다.As shown in FIG. 10, the bidirectional conductive pattern module 100a according to the second embodiment of the present invention includes a main body 110a, a plurality of main through holes 171a, an inner insulating wall 130a, and an inner conductive wall. 120a and an upper support layer 140a, a lower support layer 150a, and a bidirectional conductive pin 160a.
본체(110a)는 절연성 재질의 절연층(112a)과 절연층(112a)의 양측 표면에 형성된 도전층(113a,114a)을 포함한다. 즉, 본 발명의 제2 실시예에 따른 양방향 도전성 패턴 모듈(100a)은 제1 실시예에서와 달리, 하나의 베이스 기판(111a)이 본체(110a)를 형성하게 된다. 본 발명의 제2 실시예에서는 본체(110a)가 절연층(112a)의 양측에 도전층(113a,114a)이 형성된 인쇄회로기판이 적용되는 것을 예로 한다. 여기서, 본체(110a)의 두께는 절연층(112a)의 두께를 조절함으로써, 조절 가능하게 된다.The main body 110a includes an insulating layer 112a made of an insulating material and conductive layers 113a and 114a formed on both surfaces of the insulating layer 112a. That is, in the bidirectional conductive pattern module 100a according to the second embodiment of the present invention, one base substrate 111a forms the main body 110a unlike the first embodiment. In the second embodiment of the present invention, the main body 110a is applied to a printed circuit board on which conductive layers 113a and 114a are formed on both sides of the insulating layer 112a. Here, the thickness of the main body 110a can be adjusted by adjusting the thickness of the insulating layer 112a.
복수의 메인 관통홀(171a)은 본체(110a)의 상하 방향으로 관통 형성된다(도 11 참조a). 제1 실시예에서와 마찬가지로, 메인 관통홀(171a)의 개수는 테스트 대상인 반도체 소자의 단자나 CPU의 핀에 따라 달라질 수 있다.The plurality of main through holes 171a are formed to penetrate in the vertical direction of the main body 110a (see FIG. 11A). As in the first embodiment, the number of the main through holes 171a may vary depending on the terminals of the semiconductor device under test or the pins of the CPU.
내부 절연벽(130a)은 각각의 메인 관통홀(171a)의 내벽면에 도포되는데, 절연성 재질로 마련되는 것을 예로 한다. 본 발명에서는 절연성 실리콘을 내부에 형성하는 것을 예로 하는데, 그 재질은 이에 국한되지 않는다. 내부 절연벽(130a)을 통해 본체(110a)의 도전층(113a,114a)과 메인 관통홀(171a)에 삽입되는 양방향 도전성 핀(160a)을 물리적으로 격리시켜 상호 전기적으로 연결되는 것을 차단하게 된다.The inner insulation wall 130a is applied to the inner wall surface of each of the main through holes 171a, and is provided as an example of an insulating material. In the present invention, the insulating silicon is formed inside, for example, but the material is not limited thereto. The conductive layers 113a and 114a of the main body 110a and the bidirectional conductive pins 160a inserted into the main through hole 171a are physically isolated through the internal insulating wall 130a to block the electrical connections. .
내부 도전벽(120a)은 메인 관통홀(171a)의 내벽면과 내부 절연벽(130a) 사이에 형성되어 본체(110a) 양측의 도전층(113a,114a)을 상호 전기적으로 연결한다. 이를 통해, 본체(110a)의 도전층(113a,114a)은 상호 전기적으로 연결된 상태가 되는데, 본 발명에 따른 양방향 도전성 패턴 모듈(100a)을 반도체 테스트용 소켓에 적용하거나 인터포저에 적용할 경우 도전층(113a,114a)들을 그라운드(Grounda)로 사용하게 되면 하이-스피드의 구현이 가능하게 된다. 여기서, 내부 도전벽(120a)은 니켈 도금 및 금 도금을 순차적으로 수행하여 형성될 수 있다.The inner conductive wall 120a is formed between the inner wall surface of the main through hole 171a and the inner insulating wall 130a to electrically connect the conductive layers 113a and 114a on both sides of the main body 110a. Through this, the conductive layers 113a and 114a of the main body 110a are electrically connected to each other. When the bidirectional conductive pattern module 100a according to the present invention is applied to a semiconductor test socket or an interposer, the conductive layers 113a and 114a are electrically connected. Using the layers 113a and 114a as ground enables high-speed implementation. Here, the inner conductive wall 120a may be formed by sequentially performing nickel plating and gold plating.
상부 지지층(140a)은 본체(110a)의 상부 표면에 부착된다. 여기서, 상부 지지층(140a)에는 본체(110a)에 형성된 메인 관통홀(171a)에 대응하는 위치에 각각 상부 관통홀(172a)이 형성된다. 마찬가지로 하부 지지층(150a)은 본체(110a)의 하부 표면에 부착된다. 그리고, 하부 지지층(150a)에는 본체(110a)에 형성된 메인 관통홀(171a)에 대응하는 위치에 각각 하부 관통홀(173a)이 형성된다.The upper support layer 140a is attached to the upper surface of the body 110a. Here, upper through holes 172a are formed at positions corresponding to the main through holes 171a formed in the main body 110a in the upper support layer 140a. Similarly, the lower support layer 150a is attached to the lower surface of the main body 110a. The lower support layer 150a is formed with lower through holes 173a at positions corresponding to the main through holes 171a formed in the main body 110a, respectively.
여기서, 상부 지지층(140a) 및 하부 지지층(150a)은 각각 탄성을 갖는 재질로 마련되는데, 제1 실시예에서와 마찬가지로 상부 지지층(140a)이 상부 필름층(141a) 및 상부 실리콘층(142a)이 순차적으로 적층되어 형성되고, 하부 지지층(150a)이 하부 필름층(151a) 및 하부 실리콘층(152a)이 순차적으로 적층되어 형성되는 것을 예로 한다.Here, the upper support layer 140a and the lower support layer 150a are each made of a material having elasticity. As in the first embodiment, the upper support layer 140a is formed of the upper film layer 141a and the upper silicon layer 142a. For example, the lower support layer 150a is formed by being sequentially stacked, and the lower film layer 151a and the lower silicon layer 152a are sequentially stacked.
각각의 양방향 도전성 핀(160a)은 메인 관통홀(171a)에 각각 수용되는데, 양방향 도전성 핀(160a)의 상부 표면이 상부 지지층(140a)의 상부 관통홀(172a)을 통해 상부 방향으로 노출된다. 그리고, 양방향 도전성 핀(160a)의 하부 표면은 하부 지지층(150a)의 하부 관통홀(173a)을 통해 하부 방향으로 노출된다. 여기서, 양방향 도전성 핀(160a)의 상부 영역은 상부 지지층(140a)에 의해 지지되고, 하부 영역은 하부 지지층(150a)에 의해 지지된다.Each bidirectional conductive pin 160a is accommodated in the main through hole 171a, respectively, and the upper surface of the bidirectional conductive pin 160a is exposed upward through the upper through hole 172a of the upper support layer 140a. The lower surface of the bidirectional conductive pin 160a is exposed downward through the lower through hole 173a of the lower support layer 150a. Here, the upper region of the bidirectional conductive pin 160a is supported by the upper support layer 140a, and the lower region is supported by the lower support layer 150a.
상기와 같은 구성에 따라, 본 발명에 따른 양방향 도전성 패턴 모듈(100a)이 반도체 소자의 테스트를 위한 반도체 테스트 소켓에 적용되는 경우, 상부 방향에서 하부 방향으로 가압하는 반도체 소자의 볼(Balla)이 양방향 도전성 핀(160a)의 상부 표면에 접촉하여 하부로 가압하게 되는데, 상부 지지층(140a)에 의해 양방향 도전성 핀(160a)이 지지되어 탄성적인 지지가 가능하게 된다.According to the configuration as described above, when the bidirectional conductive pattern module 100a according to the present invention is applied to the semiconductor test socket for the test of the semiconductor device, the ball (Balla) of the semiconductor device pressed from the upper direction to the lower direction is bidirectional In contact with the upper surface of the conductive pin (160a) is pressed to the bottom, the bi-directional conductive pin (160a) is supported by the upper support layer (140a) to enable elastic support.
마찬가지로, 반도체 소자의 테스트 과정에서 상부 방향에서 하부 방향으로 본 발명에 따른 양방향 도전성 패턴 모듈(100a)이 가압될 때 양방향 도전성 핀(160a)의 하부 표면이 검사회로기판의 단자와 접촉될 때 하부 지지층(150a)이 탄성적으로 지지하게 된다.Similarly, the lower support layer when the lower surface of the bidirectional conductive pin 160a contacts the terminal of the test circuit board when the bidirectional conductive pattern module 100a according to the present invention is pressed from the upper direction to the lower direction during the test of the semiconductor device. 150a is elastically supported.
상기와 같은 구성에 따라, 본 발명에 따른 양방향 도전성 패턴 모듈(100a)을 반도체 테스트 소켓이나 인터포저에 적용하게 되면, 양방향 도전성 핀(160a)이 반도체 소자와 검사회로기판, 또는 CPU와 보드 사이에서 양 디바이스를 전기적으로 연결시키게 되는데, 이 때 본체(110a)의 절연층(112a) 양측에 형성된 도전층(113a,114a)과 내부 도전벽(120a)이 양방향 도전성 핀(160a)이 외부의 그라운드와 연결되어 양방향 도전성 핀(160)의 인근에서 그라운드로 동작할 수 있게 되어, 노이즈나 상호 간섭이 배제된 안정적인 동작 뿐만 아니라 하이-스피드로의 동작이 가능하게 된다.According to the configuration described above, when the bidirectional conductive pattern module 100a according to the present invention is applied to a semiconductor test socket or an interposer, the bidirectional conductive pin 160a is formed between the semiconductor device and the test circuit board, or between the CPU and the board. Both devices are electrically connected. At this time, the conductive layers 113a and 114a and the inner conductive wall 120a formed on both sides of the insulating layer 112a of the main body 110a are connected to the external ground. Connected to the ground in the vicinity of the two-way conductive pin 160, it is possible to operate in high-speed as well as stable operation is excluded noise and mutual interference.
또한, 본체(110a)룰 구성하는 절연층(112a)의 두께를 조절하는 것에 의해, 양방향 도전성 패턴 모듈(100a)의 두께를 조절할 수 있어, 양방향 도전성 패턴 모듈(100a)이 적용되는 조건에 따라 제작이 가능하게 된다.In addition, by adjusting the thickness of the insulating layer 112a constituting the main body 110a, the thickness of the bidirectional conductive pattern module 100a can be adjusted, so that the bidirectional conductive pattern module 100a is manufactured according to the conditions to be applied. This becomes possible.
또한, 양방향 도전성 핀(160a)을 후술할 구조에 따라 그 크기를 기존의 포고-핀(Pogo-pin)보다 작게 제작하는 경우, 기존의 포고핀 타입이 갖는 피치의 한계 및 상하 방향으로의 길이의 한계를 극복할 수 있어, 반도체 테스트 소켓이나 인터포저에 적용할 때 다양한 사이즈로의 구현이 가능하게 된다.In addition, when the bidirectional conductive pin 160a is made smaller in size than the existing pogo-pin according to the structure to be described later, the limit of the pitch and the length in the vertical direction of the conventional pogo pin type The limitations can be overcome, enabling implementations of various sizes when applied to semiconductor test sockets or interposers.
전술한 실시예에서는 내부 도전벽(120a)이 복수의 메인 관통홀(171a) 전체에 각각 형성되어, 도전층(113a,114a)을 전기적으로 연결하는 것을 예로 하고 있다. 이외에도, 내부 도전벽(120a)은 메인 관통홀(171a) 중 적어도 한 곳에만 형성되더라도 복수의 베이스 기판(111a)의 전체 도전층(113a,114a)을 전기적으로 연결할 수 있음은 물론이다.In the above-described embodiment, the inner conductive wall 120a is formed in the entire plurality of main through holes 171a, respectively, to electrically connect the conductive layers 113a and 114a. In addition, the inner conductive wall 120a may be electrically connected to the entire conductive layers 113a and 114a of the plurality of base substrates 111a even if only one of the main through holes 171a is formed.
또한, 본 발명에서는, 메인 관통홀(171a)이 내부를 탄성을 갖는 실리콘 재질로 충진할 수 있다. 이 경우, 상하 방향으로 가압을 보다 강하게 지지하게 되는데, 본 발명에 따른 양방향 도전성 패턴 모듈(100a)을 인터포저에 적용할 경우, CPU와 보드 사이에서 오랜 시간 동안 보다 안정적으로 접촉을 유지시킬 수 있게 된다.In addition, in the present invention, the main through hole 171a may be filled with a silicone material having elasticity. In this case, the pressure is more strongly supported in the vertical direction. When the bidirectional conductive pattern module 100a according to the present invention is applied to the interposer, the contact between the CPU and the board can be maintained more stably for a long time. do.
또한, 제1 실시예에서와 마찬가지로 제2 실시예에도 제1 실시예의 그라운드부(180)가 적용될 수 있으며, 후술할 제2 실시예에서의 제조 과정에서 제1 실시예의 그라운드부(180)에 대응하는 구조가 적용 가능함은 물론이다.In addition, as in the first embodiment, the ground portion 180 of the first embodiment may be applied to the second embodiment, and corresponds to the ground portion 180 of the first embodiment in the manufacturing process of the second embodiment, which will be described later. Of course, the structure is applicable.
이하에서는 도 11 및 도 12를 참조하여 본 발명의 제2 실시예에 따른 양방향 도전성 패턴 모듈(100a)의 제조 방법에 대해 설명한다.Hereinafter, a method of manufacturing the bidirectional conductive pattern module 100a according to the second embodiment of the present invention will be described with reference to FIGS. 11 and 12.
먼저, 도 11의 (a)에 도시된 바와 같이, 절연층(112a)과, 그 양측에 도전층(113a,114a)이 형성된 본체(110a)를 마련된다. 그런 다음, 도 11의 (b)에 도시된 바와 같이, 본체(110a)에 메인 관통홀(171a)을 형성한다.First, as shown in FIG. 11A, an insulating layer 112a and a main body 110a having conductive layers 113a and 114a formed on both sides thereof are provided. Then, as illustrated in FIG. 11B, a main through hole 171a is formed in the main body 110a.
그리고, 각각의 메인 관통홀(171a)의 내벽면에 도 11의 (c)에 도시된 바와 같이, 내부 도전벽(120a)을 형성한다. 내부 도전벽(120a)은 니켈 도금 및 금 도금을 순차적으로 수행하여 형성할 수 있다. 내부 도전벽(120a)의 형성을 통해 절연층(112a)의 양측에 형성된 도전층(113a,114a)이 상호 전기적으로 연결된다. 여기서, 도 11의 (c)는 모든 메인 관통홀(171a)의 내벽면에 내부 도전벽(120a)이 형성되는 것을 예로 하고 있으나, 상술한 바와 같이, 적어도 하나의 메인 관통홀(171a)의 내벽면에 내부 도전벽(120a)이 형성될 수 있음은 물론이다.As shown in FIG. 11C, an inner conductive wall 120a is formed on the inner wall surface of each main through hole 171a. The inner conductive wall 120a may be formed by sequentially performing nickel plating and gold plating. Through the formation of the inner conductive wall 120a, the conductive layers 113a and 114a formed at both sides of the insulating layer 112a are electrically connected to each other. Here, (c) of FIG. 11 illustrates that the inner conductive wall 120a is formed on the inner wall surfaces of all the main through holes 171a. However, as described above, the inside of the at least one main through hole 171a is illustrated. Of course, the inner conductive wall 120a may be formed on the wall surface.
메인 관통홀(171a)이 내벽면에 내부 도전벽(120a)이 형성되면, 내부 도전벽(120a)의 내벽면(또는 메인 관통홀(171a)이 내벽면)에 도 12의 (a)에 도시된 바와 같이, 내부 절연벽(130a)을 형성한다. 그리고, 본체(110a)의 상부 표면 및 하부 표면에 각각 상부 필름층(141a) 및 하부 필름층(151)을 형성하고(도 12의 (a) 참조), 상부 필름층(141a)의 상부 표면 및 하부 필름층(151a)의 하부 표면에 각각 상부 실리콘층(142a) 및 하부 실리콘층(152a)을 형성하여, 도 12의 (b)에 도시된 바와 같은 상부 지지층(140a) 및 하부 지지층(150a)을 형성한다.When the inner conductive wall 120a is formed on the inner wall surface of the main through hole 171a, the inner wall surface (or the main through hole 171a of the inner wall surface) of the inner conductive wall 120a is illustrated in FIG. 12A. As described above, the inner insulation wall 130a is formed. Then, the upper film layer 141a and the lower film layer 151 are formed on the upper surface and the lower surface of the main body 110a, respectively (see FIG. 12A), and the upper surface of the upper film layer 141a and The upper silicon layer 142a and the lower silicon layer 152a are formed on the lower surface of the lower film layer 151a, respectively, so that the upper support layer 140a and the lower support layer 150a as shown in FIG. To form.
그런 다음, 도 12의 (c)에 도시된 바와 같이, 상부 지지층(140a)과 하부 지지층(150a)에 각각 상부 관통홀(172a) 및 하부 관통홀(173a)을 형성한다. 이 때, 상부 관통홀(172a) 및 하부 관통홀(173a)의 내경은 메인 관통홀(171a)의 내경보다 작게 형성할 수 있음은 전술한 실시예에서와 동일하다.Then, as shown in (c) of FIG. 12, the upper through hole 172a and the lower through hole 173a are formed in the upper support layer 140a and the lower support layer 150a, respectively. In this case, the inner diameters of the upper through hole 172a and the lower through hole 173a may be smaller than the inner diameter of the main through hole 171a as in the above-described embodiment.
그리고, 각각의 상부 관통홀(172a), 메인 관통홀(171a) 및 하부 관통홀(173a)에 양방향 도전성 핀(160a)을 삽입하게 되면, 도 10에 도시된 바와 같은 양방향 도전성 패턴 모듈(100a)의 제작이 가능하게 된다.When the bidirectional conductive pin 160a is inserted into each of the upper through hole 172a, the main through hole 171a, and the lower through hole 173a, the bidirectional conductive pattern module 100a as shown in FIG. Can be made.
여기서, 양방향 도전성 핀(160a)의 삽입 후, 상부 지지층(140a)의 상부 표면, 즉 상부 실리콘층(142a)과 양방향 도전성 핀(160a)을 실리콘 등을 이용하여 고정시키고, 하부 지지층(150a)의 하부 표면, 즉 하부 실리콘층(152a)과 양방향 도전성 핀(160a)을 실리콘 등을 이용하여 고정시킴으로써, 양방향 도전성 핀(160a)이 상부 지지층(140a) 및 하부 지지층(150a)에 의해 지지되도록 구성할 수 있다.Here, after the insertion of the bidirectional conductive pin 160a, the upper surface of the upper support layer 140a, that is, the upper silicon layer 142a and the bidirectional conductive pin 160a are fixed using silicon or the like, and the lower support layer 150a By fixing the lower surface, that is, the lower silicon layer 152a and the bidirectional conductive pin 160a with silicon, the bidirectional conductive pin 160a is configured to be supported by the upper support layer 140a and the lower support layer 150a. Can be.
이하에서는, 도 13 내지 도 17을 참조하여 본 발명에 따른 양방향 도전성 핀(160)의 실시예들에 대해 상세히 설명한다.Hereinafter, embodiments of the bidirectional conductive pin 160 according to the present invention will be described in detail with reference to FIGS. 13 to 17.
먼저, 도 13을 참조하여 설명하면, 본 발명의 일 실시예에 따른 양방향 도전성 핀(160)은 상부 접촉부(161), 하부 접촉부(162) 및 연결부(163)를 포함할 수 있다.First, referring to FIG. 13, the bidirectional conductive pin 160 according to the exemplary embodiment may include an upper contact portion 161, a lower contact portion 162, and a connection portion 163.
상부 접촉부(161)는 도전성을 갖는 박판이 상하 방향을 축으로 원통 형상으로 말려 형성된다. 마찬가지로, 하부 접촉부(162)는 도전성 박판이 상하 방향을 축으로 원통 형상을 갖도록 말려 형성되며, 상부 접촉부(161)의 하부에 이격된 상태로 배치된다.The upper contact portion 161 is formed by rolling a conductive thin plate in a cylindrical shape with an axis in the vertical direction. Similarly, the lower contact portion 162 is formed to be rolled so that the conductive thin plate has a cylindrical shape in the vertical direction, and is disposed in a state spaced apart from the lower portion of the upper contact portion 161.
이 때, 연결부(163)는 상부 접촉부(161)와 하부 접촉부(162)를 전기적으로 연결하는데, 상부 접촉부(161)와 하부 접촉부(162)에 원주 방향으로 상호 상이한 위치에서 연결되어, 원주 방향을 따라 감기는 형태로 상부 접촉부(161)와 하부 접촉부(162)를 연결한다.At this time, the connecting portion 163 electrically connects the upper contact portion 161 and the lower contact portion 162, and is connected to the upper contact portion 161 and the lower contact portion 162 at mutually different positions in the circumferential direction, thereby providing a circumferential direction. The upper contact portion 161 and the lower contact portion 162 are connected in a winding manner.
도 14는 도 13에 도시된 양방향 도전성 핀(160)을 제작하기 위한 베이스 박판(10)의 예를 나타낸 도면이다. 도전성을 갖는 박판의 패터닝을 통해 도 14에 도시된 바와 같은 베이스 박판(10)을 제작한다. 베이스 박판(10)은, 도 14에 도시된 바와 같이, 상부 패턴(11), 하부 패턴(12) 및 연결 패턴(13)을 포함한다. 이와 같은 베이스 박판(10)을 금형을 통해 상부 패턴(11)을 도 14의 좌측에서 우측 방향으로 원형으로 말고, 하부 박판을 도 14의 우측 방향에서 좌측 방향으로 원형으로 말게 되면, 상부 접촉부(161) 및 하부 접촉부(162)가 각각 형성된다.FIG. 14 is a view showing an example of the base thin plate 10 for manufacturing the bidirectional conductive pin 160 shown in FIG. The base thin plate 10 as shown in FIG. 14 is manufactured by patterning the thin plate having conductivity. As shown in FIG. 14, the base thin plate 10 includes an upper pattern 11, a lower pattern 12, and a connection pattern 13. When the base sheet 10 is rolled in a circular shape from the left side to the right side of FIG. 14 through the mold, and the lower sheet is rolled circularly from the right side of FIG. 14 to the left side, the upper contact portion 161. ) And lower contact portions 162 are formed, respectively.
여기서 상부 패턴(11) 및 하부 패턴(12)을 상하 방향을 축으로 마는 과정에서, 연결 패턴(13)이 원주 방향을 따라 말리는 위치가 되고, 최종적으로 형성된 연결부(163)는 원주 방향으로 상호 상이한 위치를 연결하게 된다.Here, in the process of rolling the upper pattern 11 and the lower pattern 12 in the up and down direction, the connecting pattern 13 is rolled up along the circumferential direction, and the finally formed connecting portion 163 is different from each other in the circumferential direction. You will connect locations.
상기와 같은 구성에 따라, 양방향 도전성 핀(160)이 양방향 도전성 패턴 모듈(100)에 적용되는 경우, 상부 접촉부(161)의 상부 표면이 상부 관통홀(172)을 통해 상부 방향으로 노출되고, 하부 접촉부(162)의 하부 표면이 하부 관통홀(173)을 통해 하부 방향으로 노출된 상태가 되며, 연결부(163)가 메인 관통홀(171)에 수용된 상태가 된다.According to the above configuration, when the bi-directional conductive pin 160 is applied to the bi-directional conductive pattern module 100, the upper surface of the upper contact portion 161 is exposed in the upper direction through the upper through hole 172, the lower The lower surface of the contact portion 162 is exposed in the downward direction through the lower through hole 173, and the connection portion 163 is accommodated in the main through hole 171.
그리고, 연결부(163)가 원주 방향을 따라 감기는 형태로 메인 관통홀(171) 내부에 수용됨으로써, 하부 방향으로 가압될 때 탄성적인 역할, 즉, 기존의 포고-핀의 스프링과 동일한 역할을 수행하게 된다.In addition, the connection part 163 is accommodated inside the main through hole 171 in the form of being wound along the circumferential direction, thereby performing an elastic role when pressed downward, that is, playing the same role as the spring of the existing pogo-pin. Done.
이와 같이, 도전성 박판의 패터닝을 통해 베이스 박판(10)을 형성하고, 금형 등의 방법으로 말아 양방향 도전성 핀(160)을 제작함으로써, 기존의 포고-핀보다 작은 사이즈로의 제작이 가능하게 된다.As described above, the base thin plate 10 is formed by patterning the conductive thin plate, and the bidirectional conductive pin 160 is rolled by a method such as a mold, thereby making it possible to produce a smaller size than the existing pogo-pin.
여기서, 양방향 도전성 핀(160)이 상부 접촉부(161)의 외경에는, 내측으로 함몰되거나 절취된 함몰부(164)를 포함할 수 있다. 이를 통해, 양방향 도전성 핀(160)이 양방향 도전성 패턴 모듈(100)의 메인 관통홀(171)에 삽입된 후, 상부 지지층(140)에 의해 지지될 때, 상부 지지층(140), 특히 상부 실리콘층(142)이 함몰부(164)로 삽입되어(도 5 참조) 상부 지지층(140)이 상부 접촉부(161)를 잡아주는 형태가 된다.Here, the bidirectional conductive pin 160 may include a depression 164 recessed or cut inward at an outer diameter of the upper contact portion 161. Through this, when the bidirectional conductive pin 160 is inserted into the main through hole 171 of the bidirectional conductive pattern module 100 and then supported by the upper support layer 140, the upper support layer 140, in particular, the upper silicon layer The 142 is inserted into the recess 164 (see FIG. 5) so that the upper support layer 140 holds the upper contact portion 161.
이를 통해, 상부 지지층(140)이 상부 접촉부(161)를 잡아주어 상부로부터 하부 방향으로 상부 접촉부(161)가 가압될 때 상부 지지층(140)이 상부 접촉부(161)를 상하 방향으로 탄성적으로 지지하는 기능을 수행할 수 있게 된다.As a result, the upper support layer 140 elastically supports the upper contact portion 161 in the vertical direction when the upper support layer 140 holds the upper contact portion 161 and the upper contact portion 161 is pressed from the top to the lower direction. To perform the function.
여기서, 함몰부(164)의 구성은 후술할 다른 실시예에 따른 양방향 도전성 핀(160a)에도 적용될 수 있으며, 본 발명에 따른 양방향 도전성 패턴 모듈(100)에 적용될 수 있는 다른 형태의 핀에도 적용 가능하다.Here, the configuration of the recessed portion 164 may be applied to the bidirectional conductive pin 160a according to another embodiment to be described later, and may be applied to other types of pins that may be applied to the bidirectional conductive pattern module 100 according to the present invention. Do.
도 15는 본 발명이 다른 실시예에 따른 양방향 도전성 핀(160a)의 구성을 나타낸 도면이다. 도 15에 도시된 바와 같이, 본 발명의 다른 실시예에 따른 양방향 도전성 핀(160a)은, 상부 접촉부(161a), 하부 접촉부(162a) 및 연결부(163a)를 포함할 수 있다.15 is a diagram illustrating a configuration of a bidirectional conductive pin 160a according to another embodiment of the present invention. As shown in FIG. 15, the bidirectional conductive pin 160a according to another embodiment of the present invention may include an upper contact portion 161a, a lower contact portion 162a, and a connection portion 163a.
여기서, 상부 접촉부(161a) 및 하부 접촉부(162a)는 도전성을 갖는 박판이 상하 방향을 축으로 말려 형성되는 것은 상술한 실시예에서와 동일하다. 여기서, 연결부(163a)는 상부 접촉부(161a)와 하부 접촉부(162a)를 전기적으로 연결하는데, 상부 접촉부(161a)와 하부 접촉부(162a) 사이의 공간에서 휜 형상을 갖게 된다.Here, the upper contact portion 161a and the lower contact portion 162a is the same as in the above-described embodiment that the conductive thin plate is formed by axially rolling in the vertical direction. Here, the connecting portion 163a electrically connects the upper contact portion 161a and the lower contact portion 162a, and has a 휜 shape in the space between the upper contact portion 161a and the lower contact portion 162a.
도 16은 도 15에 도시된 양방향 도전성 핀(160a)의 제조 과정을 설명하기 위한 도면이다. 도 15를 참조하여 설명하면, 도전성을 갖는 박판을 패터닝 처리하여, 베이스 박판(10a)을 제작한다. 도 15의 (a)에서는 박판에 3개의 베이스 박판(10a)을 동시에 형성하는 것을 예로 하고 있다.FIG. 16 is a diagram for describing a manufacturing process of the bidirectional conductive pin 160a illustrated in FIG. 15. Referring to FIG. 15, the base plate 10a is produced by patterning a thin plate having conductivity. In FIG. 15A, three base thin plates 10a are simultaneously formed on a thin plate.
여기서, 베이스 박판(10a)은 상부 패턴(11a), 하부 패턴(12a) 및 연결 패턴(13a)을 포함할 수 있다. 그리고, 작업의 편의를 위해 상부 가로판과 하부 가로판 사이에 연결판을 통해 베이스 박판(10a)들이 연결된 상태가 되도록 패터닝 처리한다.Here, the base thin plate 10a may include an upper pattern 11a, a lower pattern 12a, and a connection pattern 13a. In addition, the patterning process is performed such that the base thin plates 10a are connected to each other through a connecting plate between the upper horizontal plate and the lower horizontal plate for the convenience of the work.
그런 다음, 상부 패턴(11a) 및 하부 패턴(12a)을 상하 방향을 축으로 말라, 도 16의 (b)에 도시된 바와 같은 상부 접촉부(161a)와 하부 접촉부(162a)를 형성한다. 그리고, 연결 패턴(13a)을 도 16의 (c)에 도시된 바와 같이, A 방향으로 밀어 휜 형태로 형성함으로써 연결부(163a)를 형성하게 된다. 그런 다음, 연결판을 절단하게 되면, 양방향 도전성 핀(160a)의 제작이 가능하게 된다.Then, the upper pattern 11a and the lower pattern 12a are rolled up and down in an axial direction to form the upper contact portion 161a and the lower contact portion 162a as shown in FIG. 16B. And, as shown in (c) of FIG. 16, the connection pattern 13a is formed by pushing in the A direction to form the connection portion 163a. Then, by cutting the connecting plate, it is possible to manufacture the bi-directional conductive pin 160a.
전술한 실시예에서는 양방향 도전성 핀(160,160a)의 예로, 도 13 내지 16에 도시된 도면을 예로 하여 설명하고 있으나, 양방향 도전성 핀(160,160a)은 다양한 형태가 적용 가능하다. 일 예로, 기존의 포고-핀이 적용되더라도 그라운드 기능에 의해 하이-스피드로의 동작이 가능할 것이다.In the above-described embodiment, the bidirectional conductive pins 160 and 160a are described as examples of the drawings illustrated in FIGS. 13 to 16, but the bidirectional conductive pins 160 and 160a may be applied in various forms. For example, even if the existing pogo-pin is applied, the high-speed operation may be performed by the ground function.
한편, 전술한 실시예들에서는 메인 관통홀(171)의 내부에 내부 도전벽(120)이 형성되는 것을 예로 하고 있다. 즉, 양방향 도전성 핀(160)이 삽입되는 메인 관통홀(171) 중 적어도 한 곳에 내부 도전벽(120)이 형성되는 것을 예로 하였다. 그러나, 본체(110)에 양방향 도전성 핀(160)이 삽입되지 않는 별도의 서브 관통홀(미도시)을 형성하고, 서브 관통홀의 내벽면에 내부 도전벽(120)을 형성하더라도 도전층(113,114)들이 전기적으로 연결될 수 있음은 물론이다.Meanwhile, in the above embodiments, the inner conductive wall 120 is formed inside the main through hole 171. That is, the internal conductive wall 120 is formed in at least one of the main through holes 171 into which the bidirectional conductive pins 160 are inserted. However, even if a separate sub through hole (not shown) is formed in the main body 110 to which the bidirectional conductive pin 160 is not inserted, and the inner conductive wall 120 is formed on the inner wall surface of the sub through hole, the conductive layers 113 and 114 may be formed. Of course, they can be electrically connected.
비록 본 발명의 몇몇 실시예들이 도시되고 설명되었지만, 본 발명이 속하는 기술분야의 통상의 지식을 가진 당업자라면 본 발명의 원칙이나 정신에서 벗어나지 않으면서 본 실시예를 변형할 수 있음을 알 수 있을 것이다. 발명의 범위는 첨부된 청구항과 그 균등물에 의해 정해질 것이다.Although some embodiments of the invention have been shown and described, it will be apparent to those skilled in the art that modifications may be made to the embodiment without departing from the spirit or spirit of the invention. . It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.
[부호의 설명][Description of the code]
100,100a : 양방향 도전성 패턴 모듈100,100a: Bidirectional conductive pattern module
110,110a : 본체 111 : 베이스 기판110,110a: main body 111: base substrate
112,112a : 절연층 113,113a,114,114a : 도전층112,112a: insulating layer 113,113a, 114,114a: conductive layer
120,120a : 내부 도전벽 130,130a : 내부 절연벽120,120a: Internal conductive wall 130,130a: Internal insulating wall
140,140a : 상부 지지층 141,141a : 상부 필름층140,140a: upper support layer 141,141a: upper film layer
142,142a : 상부 실리콘층 150,150a : 하부 지지층142,142a: upper silicon layer 150,150a: lower support layer
151,151a : 하부 필름층 152,152a : 하부 실리콘층151,151a: lower film layer 152,152a: lower silicon layer
160,160a : 양방향 도전성 핀 161,161a : 상부 접촉부160,160a: Bidirectional conductive pins 161,161a: Upper contact
162,162a : 하부 접촉부 163,163a : 연결부162,162a: Lower contact 163,163a: Connection part
171,171a : 메인 관통홀 172,172a : 상부 관통홀171,171a: Main through hole 172,172a: Upper through hole
173,173a : 하부 관통홀173,173a: Lower through hole
본 발명은 반도체 소자나 디스플레이 등의 전자 디바이스의 검사에 사용되는 반도체 테스트 소켓에 적용될 수 있고, CPU와 보드 간을 연결하는 인터포저와 같이 다수의 볼, 핀, 전극으로 연결되는 두 디바이스 간을 전기적으로 연결하는 부품에 적용될 수 있다.INDUSTRIAL APPLICABILITY The present invention can be applied to semiconductor test sockets used for inspection of electronic devices such as semiconductor devices and displays. It can be applied to the parts to be connected.

Claims (12)

  1. 양방향 도전성 패턴 모듈에 있어서,In the bidirectional conductive pattern module,
    절연성 재질의 절연층과 상기 절연층의 일측 표면 또는 양측 표면에 형성된 도전층을 갖는 복수의 베이스 기판이 상하 방향으로 적층되어 형성되는 본체와;A main body formed by stacking a plurality of base substrates having an insulating layer made of an insulating material and a conductive layer formed on one or both surfaces of the insulating layer in a vertical direction;
    상기 본체에 상하 방향으로 관통 형성되는 복수의 메인 관통홀과;A plurality of main through holes penetrating through the main body in a vertical direction;
    각각의 상기 메인 관통홀의 내벽면 측에 도포되는 절연성 재질의 내부 절연벽과;An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes;
    복수의 상기 메인 관통홀 중 적어도 하나의 내부에 그 내벽면과 해당 내부 절연벽 사이에 형성되어 복수의 상기 베이스 기판의 상기 도전층들을 상호 전기적으로 연결하는 내부 도전벽과;An inner conductive wall formed between at least one of the plurality of main through holes and between an inner wall surface and a corresponding inner insulating wall to electrically connect the conductive layers of the plurality of base substrates;
    상기 본체의 상부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 상부 관통홀이 형성된 탄성을 갖는 절연성 재질의 상부 지지층과;An upper support layer having an elastic insulating material attached to an upper surface of the main body and having a plurality of upper through holes respectively corresponding to the plurality of main through holes;
    상기 본체의 하부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 하부 관통홀이 형성된 탄성을 갖는 절연성 재질의 하부 지지층과;A lower support layer attached to a lower surface of the main body and having an elastic insulating material having a plurality of lower through holes respectively corresponding to the plurality of main through holes;
    복수의 상기 메인 관통홀에 각각 수용되되 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출된 상태로 각각의 상기 상부 지지층 및 상기 하부 지지층에 의해 각각 지지되는 복수의 양방향 도전성 핀을 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈.Received in each of the plurality of main through holes, the upper surface is exposed in the upper direction through the upper through hole and the lower surface is exposed in the lower direction through the lower through hole in each of the upper support layer and the lower support layer And a plurality of bidirectional conductive pins each supported by the bidirectional conductive pattern module.
  2. 양방향 도전성 패턴 모듈에 있어서,In the bidirectional conductive pattern module,
    절연성 재질의 절연층과 상기 절연층의 일측 표면 또는 양측 표면에 형성된 도전층을 갖는 복수의 베이스 기판이 상하 방향으로 적층되어 형성되는 본체와;A main body formed by stacking a plurality of base substrates having an insulating layer made of an insulating material and a conductive layer formed on one or both surfaces of the insulating layer in a vertical direction;
    상기 본체에 상하 방향으로 관통 형성되는 복수의 메인 관통홀과;A plurality of main through holes penetrating through the main body in a vertical direction;
    각각의 상기 메인 관통홀의 내벽면 측에 도포되는 절연성 재질의 내부 절연벽과;An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes;
    상기 본체의 상하 방향으로 관통 형성되는 적어도 하나의 서브 관통홀과;At least one sub through hole penetrating in the vertical direction of the main body;
    상기 서브 관통홀의 내벽면에 도포되어 복수의 상기 베이스 기판의 상기 도전층들을 상호 전기적으로 연결하는 내부 도전벽과;An inner conductive wall applied to an inner wall of the sub through hole and electrically connecting the conductive layers of the plurality of base substrates to each other;
    상기 본체의 상부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 상부 관통홀이 형성된 절연성 재질의 상부 지지층과;An upper support layer attached to an upper surface of the main body and having a plurality of upper through holes corresponding to the plurality of main through holes, respectively;
    상기 본체의 하부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 하부 관통홀이 형성된 절연성 재질의 하부 지지층과;A lower support layer attached to a lower surface of the main body and having a plurality of lower through holes respectively corresponding to the plurality of main through holes;
    복수의 상기 메인 관통홀에 각각 수용되되 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출된 상태로 각각의 상기 상부 지지층 및 상기 하부 지지층에 의해 각각 지지되는 복수의 양방향 도전성 핀을 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈.Received in each of the plurality of main through holes, the upper surface is exposed in the upper direction through the upper through hole and the lower surface is exposed in the lower direction through the lower through hole in each of the upper support layer and the lower support layer And a plurality of bidirectional conductive pins each supported by the bidirectional conductive pattern module.
  3. 양방향 도전성 패턴 모듈에 있어서,In the bidirectional conductive pattern module,
    절연성 재질의 절연층과 상기 절연층의 양측 표면에 형성된 도전층을 갖는 본체와;A main body having an insulating layer made of an insulating material and conductive layers formed on both surfaces of the insulating layer;
    상기 본체에 상하 방향으로 관통 형성되는 복수의 메인 관통홀과;A plurality of main through holes penetrating through the main body in a vertical direction;
    각각의 상기 메인 관통홀의 내벽면 측에 도포되는 절연성 재질의 내부 절연벽과;An inner insulating wall made of an insulating material applied to the inner wall surface side of each of the main through holes;
    복수의 상기 메인 관통홀 중 적어도 하나의 내부에 그 내벽면과 해당 절연벽 사이에 형성되어 양측의 상기 도전층을 상호 전기적으로 연결하는 내부 도전벽과;An inner conductive wall formed between at least one of the plurality of main through holes and between the inner wall surface and the insulating wall to electrically connect the conductive layers on both sides;
    상기 본체의 상부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 상부 관통홀이 형성된 탄성을 갖는 절연성 재질의 상부 지지층과;An upper support layer having an elastic insulating material attached to an upper surface of the main body and having a plurality of upper through holes respectively corresponding to the plurality of main through holes;
    상기 본체의 하부 표면에 부착되고, 복수의 상기 메인 관통홀에 각각 대응하는 복수의 하부 관통홀이 형성된 탄성을 갖는 절연성 재질의 하부 지지층과;A lower support layer attached to a lower surface of the main body and having an elastic insulating material having a plurality of lower through holes respectively corresponding to the plurality of main through holes;
    복수의 상기 메인 관통홀에 각각 수용되되 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출된 상태로 각각의 상기 상부 지지층 및 상기 하부 지지층에 의해 각각 지지되는 복수의 양방향 도전성 핀을 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈.Received in each of the plurality of main through holes, the upper surface is exposed in the upper direction through the upper through hole and the lower surface is exposed in the lower direction through the lower through hole in each of the upper support layer and the lower support layer And a plurality of bidirectional conductive pins each supported by the bidirectional conductive pattern module.
  4. 제1항 또는 제3항에 있어서,The method according to claim 1 or 3,
    상기 내부 도전벽은 복수의 상기 메인 관통홀 각각에 형성되는 것을 특징으로 하는 양방향 도전성 패턴 모듈.And the inner conductive wall is formed in each of the plurality of main through holes.
  5. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    각각의 상기 양방향 도전성 핀은 상기 메인 관통홀의 내부에서 각각의 상기 내부 절연벽에 의해 상기 도전층들과 전기적으로 격리되어 상호 전기적으로 연결되는 상기 도전층 및 상기 내부 도전벽이 그라운드로 동작 가능한 것을 특징으로 하는 양방향 도전성 패턴 모듈.Each of the bidirectional conductive pins is electrically isolated from the conductive layers by each of the inner insulating walls in the main through hole, and the conductive layers and the inner conductive walls electrically connected to each other are operable to the ground. Bidirectional conductive pattern module.
  6. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 상부 관통홀 및 상기 하부 관통홀의 내경은 상기 메인 관통홀의 내경보다 작게 형성되는 것을 특징으로 하는 양방향 도전성 패턴 모듈.The inner diameter of the upper through hole and the lower through hole is bidirectional conductive pattern module, characterized in that formed smaller than the inner diameter of the main through hole.
  7. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 상부 지지층은 상기 본체의 상부 표면으로부터 순차적으로 형성되는 상부 필름층 및 상부 실리콘층을 포함하고;The upper support layer comprises an upper film layer and an upper silicon layer sequentially formed from an upper surface of the body;
    상기 하부 지지층은 상기 본체의 하부 표면으로부터 순차적으로 형성되는 하부 필름층 및 하부 실리콘층을 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈.The lower support layer includes a lower film layer and a lower silicon layer sequentially formed from a lower surface of the main body.
  8. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 메인 관통홀에는 탄성을 갖는 실리콘 재질이 충진되는 것을 특징으로 하는 양방향 도전성 패턴 모듈.Bidirectional conductive pattern module, characterized in that the main through-hole is filled with a silicon material having elasticity.
  9. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 도전층과 전기적으로 연결되고, 외부의 그라운드와 연결되어 상기 도전층을 그라운드와 연결시키는 그라운드부를 더 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈.And a ground part electrically connected to the conductive layer and connected to an external ground to connect the conductive layer to the ground.
  10. 제9항에 있어서,The method of claim 9,
    상기 그라운드부는The ground part
    상기 본체에 상하 방향으로 관통된 제1 그라운드 관통홀과,A first ground through hole penetrating the body in a vertical direction;
    상기 상부 지지부 및 상기 하부 지지부에 관통 형성되고 상기 제1 그라운드 관통홀과 연통되는 제2 그라운드 관통홀 및 제3 그라운드 관통홀과,A second ground through hole and a third ground through hole formed through the upper support part and the lower support part and communicating with the first ground through hole;
    상기 제1 그라운드 관통홀의 내벽멱에 도포되어 상기 도전층과 전기적으로 연결되는 그라운드 도전벽을 포함하는 것을 특징으로 하는 양방향 도전성 패턴 모듈.And a ground conductive wall applied to the inner wall 의 of the first ground through hole and electrically connected to the conductive layer.
  11. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 양방향 도전성 핀은The bidirectional conductive pin
    도전성을 갖는 박판이 상하 방향을 축으로 원통 형상으로 말려 형성되는 상부 접촉부와,An upper contact portion in which a conductive thin plate is rolled in a cylindrical shape with an axis in an up and down direction,
    도전성을 갖는 박판이 상하 방향을 축으로 원통 형상을 축으로 말려 형성되고 상기 상부 접촉부의 하부에 이격된 상태로 배치되는 하부 접촉부와,A lower contact portion having a conductive thin plate formed by rolling a cylindrical shape around an axis in an up-down direction and spaced apart from a lower portion of the upper contact portion;
    상기 상부 접촉부와 상기 하부 접촉부를 전기적으로 연결하고, 상기 상부 접촉부와 상기 하부 접촉부 사이의 공간으로 휜 형상을 갖는 연결부를 포함하며;An electrical connection between the upper contact portion and the lower contact portion, wherein the connection portion has a shape that is shaped as a space between the upper contact portion and the lower contact portion;
    상기 상부 접촉부의 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고,An upper surface of the upper contact portion is exposed upward through the upper through hole,
    상기 하부 접촉부의 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출되며,A lower surface of the lower contact portion is exposed downward through the lower through hole,
    상기 연결부는 상기 메인 관통홀에 수용되는 것을 특징으로 하는 양방향 도전성 패턴 모듈.And the connection part is accommodated in the main through hole.
  12. 제1항 내지 제3항 중 어느 한 항에 있어서,The method according to any one of claims 1 to 3,
    상기 양방향 도전성 핀은The bidirectional conductive pin
    도전성을 갖는 박판이 상하 방향을 축으로 원통 형상으로 말려 형성되는 상부 접촉부와,An upper contact portion in which a conductive thin plate is rolled in a cylindrical shape with an axis in an up and down direction,
    도전성을 갖는 박판이 상하 방향을 축으로 원통 형상을 축으로 말려 형성되고 상기 상부 접촉부의 하부에 이격된 상태로 배치되는 하부 접촉부와,A lower contact portion having a conductive thin plate formed by rolling a cylindrical shape around an axis in an up-down direction and spaced apart from a lower portion of the upper contact portion;
    상기 상부 접촉부와 상기 하부 접척부를 전기적으로 연결하는 적어도 하나의 연결부를 포함하며;At least one connecting portion electrically connecting the upper contact portion and the lower contact portion;
    상기 연결부는 상기 상부 접촉부와 상기 하부 접촉부에 원주 방향으로 상호 상이한 위치에서 연결되어, 원주 방향을 따라 감기는 형태로 상기 상부 접촉부와 상기 하부 접촉부를 연결하고,The connecting portion is connected to the upper contact portion and the lower contact portion in mutually different positions in the circumferential direction, connecting the upper contact portion and the lower contact portion in the form of winding along the circumferential direction,
    상기 상부 접촉부의 상부 표면이 상기 상부 관통홀을 통해 상부 방향으로 노출되고,An upper surface of the upper contact portion is exposed upward through the upper through hole,
    상기 하부 접촉부의 하부 표면이 상기 하부 관통홀을 통해 하부 방향으로 노출되며,A lower surface of the lower contact portion is exposed downward through the lower through hole,
    상기 연결부는 상기 메인 관통홀에 수용되는 것을 특징으로 하는 양방향 도전성 패턴 모듈.And the connection part is accommodated in the main through hole.
PCT/KR2017/000594 2017-01-17 2017-01-18 Bidirectional conductive pattern module WO2018135674A1 (en)

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