WO2018113247A1 - 显示基板及其制备方法、显示面板和压接设备 - Google Patents
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- 239000000758 substrate Substances 0.000 title claims abstract description 151
- 238000002788 crimping Methods 0.000 title claims abstract description 51
- 238000000034 method Methods 0.000 title claims abstract description 44
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000000463 material Substances 0.000 claims abstract description 130
- 239000010409 thin film Substances 0.000 claims abstract description 14
- 239000010410 layer Substances 0.000 claims description 185
- 238000001723 curing Methods 0.000 claims description 55
- 239000010408 film Substances 0.000 claims description 36
- 239000012790 adhesive layer Substances 0.000 claims description 14
- 230000003287 optical effect Effects 0.000 claims description 7
- 238000013007 heat curing Methods 0.000 claims description 5
- 229920001187 thermosetting polymer Polymers 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 3
- 230000007547 defect Effects 0.000 description 6
- 238000002360 preparation method Methods 0.000 description 5
- 230000002950 deficient Effects 0.000 description 4
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 238000003848 UV Light-Curing Methods 0.000 description 1
- 239000002313 adhesive film Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000011343 solid material Substances 0.000 description 1
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Abstract
Description
Claims (15)
- 一种显示基板的制备方法,所述显示基板包括柔性衬底,所述柔性衬底包括相对的第一面和第二面,所述第一面包括第一区域和第二区域;所述显示基板的制备方法包括:在所述第一区域上形成薄膜晶体管和发光器件;在所述第二区域上形成用于电路邦定的引线;在所述第二面上形成固化材料层;以及对所述固化材料层对应所述第二区域的部分进行固化处理,以形成固化层。
- 根据权利要求1所述的显示基板的制备方法,所述固化材料层包括紫外线固化材料,所述对所述固化材料层对应所述第二区域的部分进行固化处理的步骤包括:对所述固化材料层对应所述第二区域的部分进行紫外线固化处理。
- 根据权利要求1所述的显示基板的制备方法,所述固化材料层包括热固化材料,所述对所述固化材料层对应所述第二区域的部分进行固化处理的步骤包括:对所述固化材料层对应所述第二区域的部分进行热固化处理。
- 根据权利要求1所述的显示基板的制备方法,还包括:在所述第二区域上对电路元件进行邦定。
- 根据权利要求1所述的显示基板的制备方法,其中,所述显示基板还包括背膜基底,所述在所述第二面上形成固化材料层的步骤包括:在所述柔性衬底与所述背膜基底之间形成固化材料层。
- 根据权利要求1所述的显示基板的制备方法,其中,所述固化材料层为背膜胶材层,所述在所述第二面上形成固化材料层的步骤包括:在所述柔性衬底上帖附包括所述背膜胶材层的背膜基底。
- 一种显示基板,包括柔性衬底,所述柔性衬底包括相对的第一面和第二面,所述第一面包括第一区域和第二区域,所述第一区域上设置有薄膜晶体管和发光器件,所述第二区域上设置有用于电路邦定的引线,所述第二面上设置有固化材料层和固化层,所述固化层与所述第二区域对应设置,所述固化层被配置为通过对所述固化材料层进行固化处理而形成。
- 根据权利要求7所述的显示基板,其中,所述第二区域包括集成电路芯片区域和柔性电路板区域,所述固化层在所述柔性衬底上的投影区域包含所述集成电路芯片区域和/或所述柔性电路板区域。
- 根据权利要求7所述的显示基板,还包括背膜基底,所述固化材料层和所述固化层设置在所述柔性衬底与所述背膜基底之间。
- 根据权利要求7所述的显示基板,其中,所述固化材料层为背膜胶材层,所述背膜胶材层包括光学胶层。
- 一种显示面板,包括权利要求7至10中任一项所述的显示基板。
- 一种压接设备,用于对显示基板进行压接处理,所述显示基板包括柔性衬底,所述柔性衬底包括相对的第一面和第二面,所述第一面包括第一区域和第二区域,所述第一区域上设置有薄膜晶体管和发光器件,所述第二区域上设置有用于电路邦定的引线,所述第二 面上设置有固化材料层;所述压接设备包括固化单元和压接单元;所述固化单元用于对所述固化材料层对应所述第二区域的部分进行固化处理,以形成固化层;所述压接单元用于在所述第二区域上对电路元件进行邦定。
- 根据权利要求12所述的压接设备,其中,所述固化单元包括第一热压头,所述第一热压头设置在所述显示基板的上方,所述第一热压头用于对所述固化材料层对应所述第二区域的部分进行加热处理,或者所述固化单元包括第二热压头,所述第二热压头设置在所述显示基板的下方,所述第二热压头用于对所述固化材料层对应所述第二区域的部分进行加热处理。
- 根据权利要求12所述的压接设备,其中,所述固化单元包括第一热压头和第二热压头,所述第一热压头设置在所述显示基板的上方,所述第二热压头设置在所述显示基板的下方,所述第一热压头和所述第二热压头用于对所述固化材料层对应所述第二区域的部分进行加热处理。
- 根据权利要求12所述的压接设备,其中,所述电路元件包括集成电路芯片和/或柔性电路板。
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US15/744,959 US10276592B2 (en) | 2016-12-19 | 2017-07-04 | Display substrate, method of fabricating the same, display panel and pressure welding device |
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CN106783878A (zh) * | 2016-12-19 | 2017-05-31 | 京东方科技集团股份有限公司 | 显示基板及其制备方法、显示面板和压接设备 |
CN107665854B (zh) * | 2017-09-21 | 2020-08-07 | 京东方科技集团股份有限公司 | 背膜结构及其制备方法、柔性显示屏 |
CN107768415B (zh) * | 2017-10-30 | 2024-03-08 | 京东方科技集团股份有限公司 | 柔性显示器件、显示装置以及制造方法 |
WO2020124416A1 (zh) * | 2018-12-19 | 2020-06-25 | 深圳市柔宇科技有限公司 | 柔性面板及柔性面板制作方法 |
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CN103296056A (zh) * | 2012-12-30 | 2013-09-11 | 上海天马微电子有限公司 | 有机发光二极管显示装置及其制造方法 |
CN105977400A (zh) * | 2016-07-21 | 2016-09-28 | 京东方科技集团股份有限公司 | 一种显示面板及其制备方法、显示装置 |
CN106783878A (zh) * | 2016-12-19 | 2017-05-31 | 京东方科技集团股份有限公司 | 显示基板及其制备方法、显示面板和压接设备 |
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JP2003077940A (ja) * | 2001-09-06 | 2003-03-14 | Sony Corp | 素子の転写方法及びこれを用いた素子の配列方法、画像表示装置の製造方法 |
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JP6202662B2 (ja) * | 2012-11-27 | 2017-09-27 | 日東電工株式会社 | 光電気混載基板およびその製法 |
CN103400850B (zh) * | 2013-08-14 | 2016-01-20 | 中国科学院长春光学精密机械与物理研究所 | 用于微显示与照明的柔性led阵列器件及制作方法 |
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CN103296056A (zh) * | 2012-12-30 | 2013-09-11 | 上海天马微电子有限公司 | 有机发光二极管显示装置及其制造方法 |
CN105977400A (zh) * | 2016-07-21 | 2016-09-28 | 京东方科技集团股份有限公司 | 一种显示面板及其制备方法、显示装置 |
CN106783878A (zh) * | 2016-12-19 | 2017-05-31 | 京东方科技集团股份有限公司 | 显示基板及其制备方法、显示面板和压接设备 |
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