WO2018062252A1 - 発光素子 - Google Patents
発光素子 Download PDFInfo
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- WO2018062252A1 WO2018062252A1 PCT/JP2017/034908 JP2017034908W WO2018062252A1 WO 2018062252 A1 WO2018062252 A1 WO 2018062252A1 JP 2017034908 W JP2017034908 W JP 2017034908W WO 2018062252 A1 WO2018062252 A1 WO 2018062252A1
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- rod
- layer
- semiconductor
- light emitting
- ridge line
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- 239000004065 semiconductor Substances 0.000 claims abstract description 230
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
- H01L33/18—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous within the light emitting region
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/08—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
Definitions
- This disclosure relates to a light emitting element.
- rod-shaped light emitting devices including rod-shaped structures have attracted attention (for example, Patent Documents 1 to 3).
- the rod-shaped light emitting element one or more semiconductor rods made of a first conductivity type semiconductor (for example, n-type semiconductor), an active layer that covers the surface of the rod, and a second conductivity type semiconductor layer (for example, a p-type semiconductor) that covers the active layer. Layer). Since the entire surface of the semiconductor rod can be a light emitting surface, the rod-shaped light emitting element has an advantage that the light emitting area per unit volume can be widened as compared with the conventional light emitting element.
- a first conductivity type semiconductor for example, n-type semiconductor
- an active layer that covers the surface of the rod
- a second conductivity type semiconductor layer for example, a p-type semiconductor
- JP 2013-004661 A Japanese Patent Laid-Open No. 2015-142020 JP2015-508941A
- a typical rod-shaped light emitting element has one or more cylindrical or polygonal rod-shaped structures having a thickness of 20 nm to 3 ⁇ m and a length of 100 nm to 100 ⁇ m. It cannot be said that the light emitting element having such a rod-shaped structure has sufficiently high luminous efficiency.
- an object of the present disclosure is to provide a rod-shaped light emitting element capable of improving the light emission efficiency.
- the light emitting device is A first conductivity type semiconductor rod having a plurality of side surfaces arranged to form side surfaces of a polygonal column; An active layer made of a semiconductor covering the side surface of the first conductivity type semiconductor rod; A second conductivity type semiconductor layer covering the active layer,
- the active layer includes a plurality of well layers respectively disposed on at least two adjacent sides of the plurality of side surfaces, The adjacent well layers among the plurality of well layers are separated along a ridge line where the adjacent side surfaces are in contact with each other,
- the active layer is made of a semiconductor, and further includes a ridge line portion arranged on the ridge line and connecting the adjacent well layers, The band gap of the ridge line portion is wider than the band gap of each of the plurality of well layers.
- the light emission efficiency of the rod-shaped light emitting device can be increased.
- FIG. 1 is a schematic top view of a light emitting device according to an embodiment of the present disclosure.
- FIG. 2 is a schematic sectional view taken along line AA in FIG.
- FIG. 3A is a partially enlarged view of a cross-sectional view of the rod-shaped light emitting unit shown in FIG. 2
- FIG. 3B is a partially enlarged view of a modification of the rod-shaped light emitting unit.
- FIG. 4 is a schematic sectional view taken along line BB in FIG.
- FIG. 5 is a schematic cross-sectional view showing a modification of the rod-like light emitting unit.
- 6A (a) to 6 (d) are cross-sectional views for describing a method for manufacturing a light emitting device according to the present disclosure.
- FIG. 6B (e) to 6 (f) are cross-sectional views for describing a method for manufacturing a light emitting device according to the present disclosure.
- 6C (g) to 6 (h) are cross-sectional views for describing a method for manufacturing a light emitting device according to the present disclosure.
- FIG. 7 is a TEM image of a cross section of the rod-shaped light emitting part manufactured in the experimental example.
- FIG. 8 is a TEM image of a cross section of the rod-shaped light emitting part manufactured in the experimental example.
- the light emitting device of the present disclosure includes a first conductivity type semiconductor rod, an active layer that covers a side surface of the semiconductor rod, and a second conductivity type semiconductor layer that covers the active layer.
- the semiconductor rod has a plurality of side surfaces arranged to form side surfaces of a polygonal column.
- the active layer made of a semiconductor includes a plurality of well layers provided on the side surface of the semiconductor rod and a ridge line portion provided on the ridge line of the semiconductor rod. Adjacent well layers are separated by a ridge line portion, and the band gap of the ridge line portion is wider than the band gap of the well layer. Therefore, carrier movement hardly occurs between adjacent well layers, and the carrier confinement effect in the well layers is improved. Thereby, the luminous efficiency of the light emitting element can be increased.
- FIG. 1 is a schematic top view of a light-emitting element 1 according to an embodiment of the present disclosure
- FIG. 2 is a schematic cross-sectional view of the light-emitting element 1 along the line AA in FIG.
- the light emitting device 1 includes a growth substrate 50, a buffer layer 45, an underlayer 40, insulating films 90 and 91, a rod-shaped light emitting portion 5 (hereinafter “rod-shaped light emitting portion”). 5 ”), and electrodes 70, 71, 80, 81, 82.
- the rod-shaped light emitting portion 5 has a column shape, and in the example of FIG.
- the light emitting element 1 includes at least one rod-shaped light emitting portion 5.
- the light-emitting element 1 in FIG. 1 includes 21 light-emitting elements (3 ⁇ 7).
- FIG. 3A is a partially enlarged view of the cross-sectional view of the rod-like light emitting unit 5 shown in FIG.
- each rod-shaped light-emitting portion 5 includes a first conductivity type semiconductor rod (semiconductor rod 10), an active layer 20, and a second conductivity type semiconductor layer (semiconductor layer 30). .
- Part or all of the side surface 10 c of the semiconductor rod 10 is covered with the active layer 20. That is, some of the side surfaces 10c or all of the side surfaces 10c of the plurality of side surfaces 10c are covered with the active layer 20, and some of the regions or all of the side surfaces 10c covered with the active layer 20 are covered. These regions are covered with the active layer 20. In the present embodiment, at least two or more adjacent sides 10c (e.g., side 10c 1 and the side surface 10c 2 in FIG. 4) must be covered with the active layer 20 to be continuous. Therefore, “a part of the side surfaces 10c among the plurality of side surfaces 10c” includes at least two or more adjacent side surfaces 10c.
- the case where only a part of the region on one side surface 10c is covered with the active layer 20 indicates, for example, the state shown in FIG. That is, as shown in FIG. 3A, the side surface 10 c (for example, one side surface 10 c 1 ) of the semiconductor rod 10 is partly covered with the insulating film 90 and exposed from the insulating film 90. Only the region that has been covered may be covered with the active layer 20. Specifically, when the total area of the region exposed from the insulating film 90 is 100%, a range of about 70 to 100% from the upper surface 10a side is covered with the active layer 20, and 30 to 0 from the lower surface 10b side. % Range can be a shape not covered with the active layer 20.
- a range of about 70 to 100% is defined when the total area of the region exposed from the insulating film 90 is 100%, and is a range of about 70 to 100% with respect to all the side surfaces 10c. Not that. For example, it is assumed that 10% of the area of the side surface 10 c is covered with the insulating film 90 and 90% of the area of the side surface 10 c is exposed from the insulating film 90. In this case, the “range of about 70 to 100%” means about 63% (90% ⁇ 70%) to 90% (90% ⁇ 100%) of the area of the side surface 10c. In the present disclosure, in the manufacturing method described later, when the insulating film 90 is used when forming the semiconductor rod 10, such a form can be obtained.
- the active layer 20 functioning as the light emitting layer. That is, in the first sense, it is preferable that the active layer 20 is disposed on all the side surfaces 10c. In the second meaning, it is preferable that 100% of the region exposed from the insulating film 90 in the side surface 10 c is covered with the active layer 20. More preferably, both of these should be satisfied. Moreover, it is preferable that the thickness of the active layer 20 is substantially the same in all the side surfaces of the rod-shaped light emitting portion 5. Similarly, it is preferable that the thickness of the semiconductor layer 30 is substantially the same on all side surfaces of the rod-shaped light emitting unit 5. As a result, the same level of light emission can be obtained from all the side surfaces of the rod-shaped light emitting unit 5.
- the upper surface 10 a of the semiconductor rod 10 may be covered with the active layer 20.
- the lower surface 10 b of the semiconductor rod 10 is not covered with the active layer 20 and is used as an energization path to the semiconductor rod 10.
- the active layer 20 is covered with a semiconductor layer 30.
- the active layer 20 is formed on the side surface 10c and the upper surface 10a of the semiconductor rod 10, and the semiconductor layer 30 is provided so as to cover the side surface 20c and the upper surface 20a of the active layer 20. .
- FIG. 4 is a schematic cross-sectional view of the rod-shaped light-emitting portion 5 along the line BB in FIG.
- the semiconductor rod 10 has a hexagonal shape, with six sides corresponding to the side surface 10c (side surfaces 10c 1 to 10c 6 ) of the semiconductor rod 10 and six vertices corresponding to the ridgeline 10r (10r 1 to 10r 6 ) of the semiconductor rod 10. To do.
- the ridge line 10 r is formed by the adjacent side surface 10 c and extends in the longitudinal direction (z direction) of the semiconductor rod 10. For example, from the side surface 10c 1 and the side surface 10c 2 Prefecture, ridge 10r 1 is formed.
- the active layer 20 continuously surrounds the entire hexagonal outer periphery of the semiconductor rod 10.
- the active layer 20 includes a well layer 21 and a ridge line portion 22.
- the well layer 21 is disposed on the side surface 10 c of the semiconductor rod 10.
- the two well layers 21 that respectively cover the two adjacent side surfaces 10 c are separated at the position of the ridge line 10 r of the semiconductor rod 10. That is, the well layer 21 is discontinuous in the outer circumferential direction of the semiconductor rod 10.
- a ridge line portion 22 is provided between two adjacent well layers 21, that is, at the position of the ridge line 10 r of the semiconductor rod 10. By connecting two adjacent well layers 21 by this ridge line portion 22, an active layer 20 that is continuous in the outer peripheral direction of the semiconductor rod 10 is formed.
- the ridge line 10r extends in the longitudinal direction (z direction) of the semiconductor rod 10
- the ridge line portion 22 of the active layer 20 also extends in the longitudinal direction (z direction) of the semiconductor rod 10 along the ridge line 10r. It is growing.
- the band gap of the ridge line portion 22 is wider than the band gap of the well layer 21. That is, the ridge part 22 exhibits the same function as the barrier layer of the quantum well structure. Thereby, the luminous efficiency of the rod-shaped light emission part 5 can be improved for the following reasons.
- a voltage is applied to the light emitting element 1.
- carriers are injected into the active layer 20 and light emission occurs.
- the frequency of light emission recombination in the well layer 21 can be increased, and the light emission efficiency can be improved.
- the distance between the ridge portions 22 is sufficiently small, such as about several tens of nanometers, for example, the quantum effect can be obtained, so that carriers can be confined more efficiently in the well layer 21.
- Both the well layer 21 and the ridge line portion 22 can be formed of a nitride semiconductor.
- the well layer 21 is formed from InGaN
- the ridge line portion 22 is formed from GaN or InGaN having a smaller In composition ratio than the well layer 21.
- the band gap between the well layer 21 and the ridge line portion 22 can be controlled by the In content (In composition ratio) contained in the nitride semiconductor.
- the band gap is narrowed when the In composition ratio is high, and the band gap is widened when the In composition ratio is low. Therefore, the band gap of the ridge line portion 22 can be made wider than the band gap of the well layer 21 by making the In composition ratio of the well layer 21 higher than the In composition ratio of the ridge line portion 22.
- the crystal distortion of the nitride semiconductor crystal forming the well layer 21 increases and the crystallinity deteriorates, so that the light emission efficiency may be reduced.
- the volume of the well layer 21 is increased, crystal distortion becomes significant.
- the well layer 21 is divided by the ridge line portion 22 to have a small volume, the strain of each well layer 21 is difficult to be manifested.
- the ridge portion 22 is formed of a nitride semiconductor having a small In composition ratio or not containing In, there is little crystal distortion and acts to alleviate the crystal distortion in the well layer 21.
- the crystal distortion of the well layer 21 can be reduced and the crystallinity of the well layer 21 can be improved by reducing the volume by dividing the ridge line portion 22. Since the crystallinity of the well layer 21 is improved, the light emitting device 1 can be made highly efficient. Further, since the crystallinity of the well layer 21 is improved by having the ridge line portion 22, it is possible to increase the In composition ratio of the well layer 21 as compared with the case where the ridge line portion 22 does not exist. When the In composition ratio of the well layer 21 is increased, the light emission shifts to a long wavelength, so that the light emitting element 1 capable of emitting light with a longer wavelength than conventional can be formed.
- the nitride-based semiconductor light-emitting element by controlling the In composition ratio of the well layer 21, it is possible to form a light-emitting element having a light emission wavelength in a wide range from red to ultraviolet.
- the thickness of the said layer exists in the tendency which becomes the maximum at a ridgeline. For example, as shown in FIG. 4, the film thickness 22t of the ridge line portion 22 in the ridge line 10r is thicker than the film thickness 21t of the well layer 21 in the side surface 10c.
- the thickness of the well layer 21 is thicker than the other parts in the ridge line 10r. Since the well layer 21 is likely to deteriorate in crystallinity as the film thickness increases, the crystallinity of the well layer 21 in the ridge line 10r may deteriorate if the well layer 21 is provided on the ridge line 10r. By providing the ridge line portion 22, it is possible to avoid such a thickening of the well layer 21 in the ridge line 10r.
- the well layer 21 and the ridge line portion 22 are both formed of a nitride semiconductor containing In, and the ridge line portion 22
- the In composition ratio may be lower than the In composition ratio of the well layer 21.
- the well layer 21 is formed from a nitride semiconductor containing In
- the ridge line portion 22 is formed from a nitride semiconductor containing no In.
- the well layer 21 can be formed from InGaN
- the ridge line portion 22 can be formed from GaN.
- the band gap of the ridge line portion 22 can be made wider than the band gap of the well layer 21.
- the ridge line portions 22 are preferably provided at the positions of all the ridge lines 10r as well. Thereby, the effect by having provided the ridgeline part 22 in the well layer 21 of all the side surfaces 10c can be acquired.
- the active layer 20 includes a barrier layer (n-side barrier layer) disposed between the well layer 21 and the semiconductor rod 10, and a barrier layer (p-side) disposed between the well layer 21 and the semiconductor layer 30. A barrier layer). Thereby, the well layer 21 can be sandwiched between the n-side barrier layer and the p-side barrier layer.
- the active layer 20 may have a multiple quantum well structure (MQW).
- the active layer 20 shown in FIG. 5 can include a plurality of well layers 21 stacked in the thickness direction of the active layer 20.
- the barrier layer 25 is interposed between the adjacent well layers 21.
- the well layers 21 and the barrier layers 25 are alternately arranged in a direction N (matching the thickness direction of the active layer 20) perpendicular to the side surface 10 c 1. Laminate to. Since the well layer 21 is surrounded by the barrier layer 25 having a wide band gap and the ridge line portion 22 having a wide band gap, carriers can be efficiently confined in the well layer 21.
- the aspect ratio of the rod-shaped light emitting unit 5 is, for example, 2 or more, and can be 5 or more. Moreover, if the aspect ratio is, for example, 20 or less, the rod-shaped light emitting portion 5 can be easily manufactured stably.
- the aspect ratio of the rod-shaped light-emitting portion 5 should be selected in consideration of the density of the rod-shaped light-emitting portion 5 so that the light-emitting area is larger than that of a conventional light-emitting element having a flat active layer. Is preferred.
- “thickness” is the diameter of a circumscribed circle of a polygon when the cross-sectional shape is a polygon.
- the first conductivity type semiconductor forming the semiconductor rod 10 and the second conductivity type semiconductor forming the semiconductor layer 30 are semiconductors of different conductivity types.
- the semiconductor rod 10 is preferably formed from a first conductivity type nitride semiconductor
- the semiconductor layer 30 having the second conductivity type is preferably formed from a second conductivity type nitride semiconductor.
- the semiconductor rod 10 is formed from an n-type semiconductor (for example, an n-type nitride semiconductor)
- the semiconductor layer 30 is formed from a p-type semiconductor (for example, a p-type nitride semiconductor).
- the semiconductor layer 30 is formed from an n-type semiconductor (for example, an n-type nitride semiconductor).
- the semiconductor rod 10 can be formed from a wurtzite crystal.
- the wurtzite crystal is a hexagonal crystal, which suppresses the growth in the lateral direction (m-axis direction) so that it has a hexagonal shape when viewed from above, and grows the crystal in the vertical direction to increase the aspect ratio of the rod.
- the side surface 10c (see FIGS. 3A and 4) of the semiconductor rod 10 corresponds to the M plane of the crystal.
- the side surface 10c of the semiconductor rod 10 is the M-plane of the wurtzite crystal, and the side surface 10c is arranged so as to have a hexagonal shape when viewed from above.
- “viewed from the top” means observing from the z direction as shown in FIGS. 1 and 4.
- the semiconductor rod 10 can be formed from a GaN crystal. At this time, it is preferable that the semiconductor rod 10 has the [000-1] direction of the GaN crystal in the upward direction from the underlayer 40 (z direction in FIG. 3A).
- FIG. 3B is a modification of the rod-shaped light emitting unit.
- the rod-shaped light emitting portion 6 in FIG. 3B has an inclined surface (facet 16d) between the upper surface 6a and the side surface 6c.
- the rod-shaped light emitting portion 6 includes a semiconductor rod 16 having a facet 16d, an active layer 26 that covers the outer surface of the semiconductor rod 16, and a semiconductor layer 36 that covers the outer surface of the active layer 26.
- the semiconductor rod 10 has a ridge line 10e where the side surface 10c and the upper surface 10a contact each other.
- the portion covering the ridge line 10 e may be the well layer 21. That is, the active layer 20 may include a continuous well layer 21 from the side surface 10 c to the upper surface 10 a of the semiconductor rod 10.
- the semiconductor rod 16 has a ridge line 16e where the side surface 16c and the facet 16d are in contact, and a ridge line 16f where the facet 16d and the upper surface 16a are in contact.
- the portion covering these ridge lines 16 e and 16 f may be the well layer 21. That is, the active layer 26 may include the well layer 21 that continues from the side surface 16c of the semiconductor rod 16 to the upper surface 16a through the facet 16d.
- the angle formed by the facet 16d and the side surface 16c is preferably about 152 degrees.
- Such facet 16d is considered to be the (10-11) plane of the GaN-based crystal.
- a negative index is expressed by adding a bar on the number, but in this specification, “ ⁇ ” is added before the number to indicate a negative index.
- the semiconductor rod 10 has such facets 16d, the well layer 21 having good crystallinity can be formed on the facets 16d and the ridges 16e.
- the upper surface 16a may not be provided. That is, in the cross-sectional view shown in FIG. 3B, the upper end portion of the semiconductor rod 10 is trapezoidal, but it may be triangular.
- a plurality of rod-shaped light emitting portions 5 are disposed on the upper surface 40 b of the base layer 40. More precisely, as shown in FIG. 3A, the semiconductor rod 10 of the rod-shaped light emitting unit 5 is disposed on the upper surface 40 b of the base layer 40. Thereby, it is possible to energize the semiconductor rod 10 through the underlayer 40.
- a first translucent electrode 81 is formed on the surface of the semiconductor layer 30 of the rod-shaped light emitting unit 5, and a second translucent electrode 82 is further formed on the surface. By the first translucent electrode 81, the semiconductor layers 30 of the plurality of rod-shaped light emitting units 5 are connected in parallel.
- the second translucent electrode 82 extends to the upper side of the base layer 40, and the second translucent electrode 82 and the base layer 40 are electrically insulated by an insulating film 91 disposed therebetween. Yes.
- the light emitted from the rod-shaped light emitting unit 5 can be taken out of the light emitting element 1 through the first light transmitting electrode 81 and the second light transmitting electrode 82.
- the well layer 21 included in the active layer 20 has a configuration in which the ridge line portion 22 having a larger band gap than the well layer 21 is connected.
- the inventor of the present invention has found that the well layer 21 and the ridge line portion 22 can be formed simultaneously in one laminating process by adjusting the atmosphere, source gas, and formation temperature.
- a buffer layer 45 and a base layer 40 are sequentially stacked on the growth substrate 50.
- a reaction apparatus for forming the buffer layer 45 and the base layer 40 for example, an MOCVD apparatus can be used. Note that the formation of the buffer layer 45 and the base layer 40 may be omitted, and the semiconductor rod 10 may be formed directly on the growth surface of the growth substrate 50.
- the growth substrate 50 a sapphire substrate, a SiC substrate, a nitride semiconductor substrate, or the like can be used as will be described later.
- an example using a sapphire (Al 2 O 3 ) substrate will be described.
- the (0001) plane is preferably the growth plane.
- the “(0001) plane” includes a plane slightly inclined with respect to the (0001) plane. Specifically, it is more preferable to use a plane having an off angle of 0.5 ° or more and 2.0 ° or less with respect to the (0001) plane as the growth plane.
- the growth substrate 50 Prior to forming the buffer layer 45 on the growth substrate 50, the growth substrate 50 is preferably pretreated. First, the growth substrate 50 is heated in the reaction apparatus, and the growth surface (upper surface 50a) is subjected to heat treatment (thermal cleaning). An example of the heating temperature is 900 to 1200 ° C., and an example of the heating time is about 2 to 15 minutes. By this heat treatment, a crystallographic step appears on the upper surface 50a of the growth substrate 50, which becomes a generation site of a crystal nucleus. Thereafter, NH 3 gas is introduced into the reaction apparatus to nitride the upper surface 50 a of the growth substrate 50. The nitriding treatment can be performed, for example, at a processing temperature of 900 to 1100 ° C. and a processing time of 1 to 30 minutes. By such nitriding treatment, the surface of the nitride semiconductor grown thereon can be set to the (000-1) plane.
- heat treatment thermal cleaning
- An example of the heating temperature is 900 to
- a buffer layer 45 is grown on the upper surface 50a of the growth substrate 50 after the nitriding treatment.
- the temperature of the growth substrate 50 is set to 550 ° C., for example, and a source gas is supplied to grow the buffer layer 45 made of GaN.
- the thickness of the buffer layer 45 is about 20 nm, for example.
- Amorphous GaN may be formed as the buffer layer 45, and then heat treatment may be performed.
- the heat treatment temperature is preferably 1000 ° C. or more, the heat treatment time is about several minutes to 1 hour, and the atmosphere during the heat treatment is preferably nitrogen gas or a mixed gas containing one or both of hydrogen gas and NH 3 gas in addition to nitrogen gas.
- a base layer 40 is formed on the buffer layer 45.
- the underlayer 40 is, for example, a GaN layer. Further, it is preferable to add an n-type impurity to the base layer 40, and for example, a GaN layer to which Si is added is formed as the base layer 40.
- An insulating film 90 is formed on the upper surface 40 a of the foundation layer 40.
- the insulating film 90 is formed from an insulating member such as SiO 2 or SiN.
- the insulating film 90 includes a plurality of through holes 90h penetrating in the thickness direction (z direction).
- the upper surface 40a of the foundation layer 40 is exposed from the through hole 90h.
- the through hole 90h can be formed by, for example, a photolithography technique.
- the through-hole 90h can have a shape such as a circle, an ellipse, or a polygon in a top view (viewed from the z direction). In particular, the circular through hole 90h is preferable because it is easy to form.
- the shortest distance between adjacent through holes 90h is substantially constant.
- the semiconductor rods 10 grown from the through holes 90h can be arranged at substantially constant intervals.
- the distance between the adjacent semiconductor rods 10 may affect the growth rate of the active layer 20 and the semiconductor layer 30.
- the growth rate of the active layer 20 and the semiconductor layer 30 formed on the side surfaces 10c can be made substantially constant.
- the through holes 90h are arranged in a regular triangular lattice shape when viewed from above.
- the direction connecting the centers of the through-holes 90 h in a top view is the direction that is the m-axis direction of the GaN-based crystal constituting the semiconductor rod 10, that is, the a-axis direction of sapphire.
- regular hexagonal semiconductor rods 10 made of GaN-based crystals are arranged in a regular triangular lattice shape with side surfaces 10 c of adjacent semiconductor rods 10 facing substantially parallel to each other. Can do. Therefore, the growth rate of the active layer 20 and the semiconductor layer 30 formed on each side surface 10c of each semiconductor rod 10 can be made substantially constant, and the thickness of each layer can be made the same.
- the semiconductor rod 10 is formed on the upper surface 40a of the foundation layer 40 exposed from the through hole 90h.
- the insulating film 90 functions as a mask, and the semiconductor rod 10 grown upward (z direction) from the through hole 90h can be formed.
- the growth direction of the GaN-based crystal to be grown is the [000-1] direction. Therefore, the growth direction of the semiconductor rod 10 is also the GaN-based crystal. [000-1] direction. That is, the upward direction (z direction) from the underlayer 40 of the semiconductor rod 10 is the [000-1] direction of the GaN crystal.
- the growth direction of the GaN-based semiconductor is set to the [000-1] direction, migration of the GaN-based semiconductor is suppressed and lateral growth is unlikely to occur. For this reason, the semiconductor rod 10 grows in the upward direction (z direction) while maintaining the thickness that has started to grow in the through hole 90h of the insulating film 90. As a result, the semiconductor rod 10 having a relatively uniform thickness is obtained.
- the semiconductor rod 10 When the semiconductor rod 10 is formed from a wurtzite (hexagonal) GaN-based crystal, the semiconductor rod 10 tends to grow in a hexagonal column shape. Therefore, even if the through hole 90h of the insulating film 90 is circular, the semiconductor rod 10 is not a columnar shape but a hexagonal columnar shape. At this time, the side surface of the semiconductor rod 10 becomes the M plane of the GaN-based crystal. If the inner diameter of the through hole 90h is large, the thickness of the semiconductor rod 10 is increased accordingly. Therefore, the thickness of the semiconductor rod 10 can be controlled by the inner diameter of the through hole 90h.
- the semiconductor rod 10 is grown by setting the temperature of the growth substrate 50 to 900 to 1100 ° C., for example, and supplying a source gas.
- the semiconductor rod 10 is formed from, for example, a GaN crystal.
- the source gas a mixed gas containing TMG or TEG as a gallium source and NH 3 as a nitrogen source can be used as in the case of the base layer 40.
- an n-type impurity also to the semiconductor rod 10.
- silane gas is added to the above-described raw material gas, and a GaN crystal to which Si is added is formed as the semiconductor rod 10.
- the length (dimension in the z direction) of the semiconductor rod 10 can be controlled by the supply time of the source gas. When the supply time of the source gas is set to 20 to 60 minutes, for example, the semiconductor rod 10 having a length of about 5 to 15 ⁇ m can be formed.
- the semiconductor rod 16 having facets as shown in FIG. 3B can be formed by appropriately adjusting the conditions for forming the semiconductor rod 10 (growth temperature, flow rate of source gas, inner diameter of the through hole 90h, etc.). it can.
- the active layer 20 is formed on the outer surface of the semiconductor rod 10.
- the active layer 20 is formed by setting the temperature of the growth substrate 50 to about 800 to 900 ° C. and supplying a source gas.
- a source gas a mixed gas containing TMG or TEG as a gallium source, NH 3 as a nitrogen source, and TMI (trimethylindium) as an indium source can be used.
- the ratio of the nitrogen element to the gallium element in the source gas is preferably set to 5.5 ⁇ 10 3 to 2.2 ⁇ 10 5 .
- the ratio of the nitrogen element to the gallium element is within this range, the InGaN film for forming the well layer 21 (see FIGS. 4 and 5) of the active layer 20 can be satisfactorily formed.
- the ratio is less than the above range, In generated from the indium source becomes difficult to combine with Ga and N, and is easily deposited as In metal.
- the ratio exceeds the above range, In produced from the indium source is easily eliminated by H produced from NH 3 which is a nitrogen source, and InGaN is hardly formed.
- the ratio of the nitrogen element to the gallium element is more preferably 2.2 ⁇ 10 4 to 2.2 ⁇ 10 5 , and particularly preferably 4.4 ⁇ 10 4 to 1.1 ⁇ 10 5 .
- the mixed gas may contain H 2 gas or N 2 gas as a carrier gas.
- N 2 gas it is preferable to use N 2 gas as the carrier gas because it tends to be difficult to grow when the carrier gas is H 2 gas.
- the above formation conditions are such that the portion formed on the side surface 10c of the semiconductor rod 10 has a higher In composition ratio and becomes the well layer 21, and the portion formed on the ridge line 10r of the semiconductor rod 10 has a lower In composition ratio.
- the ridgeline portion 22 is set. Specifically, it is preferable to adjust the ratio of the gallium element and the nitrogen element contained in the source gas. For example, suitable conditions can be found by changing one of these conditions to form the active layer 20 and confirming the In composition ratio of the obtained well layer 21 and the like.
- the In composition ratio of the ridge line portion 22 is selectively reduced is not certain, but when InGaN formed on the side surface 10c of the semiconductor rod 10 is compared with InGaN formed on the ridge line portion 22, the above-described ratio is obtained.
- In tends to selectively separate from InGaN on the ridge line portion 22.
- the ridge line portion 22 can be formed when the InGaN crystal grown on the ridge line 10r is unstable. That is, it is presumed that when an unstable InGaN crystal grows on the ridge line 10r, In having a relatively low binding energy is desorbed, and a ridge line portion 22 having a small In composition ratio is formed.
- the well layer 21 and the ridge line portion 22 can be easily identified from a TEM (transmission electron microscope) image of a cross section (see FIGS. 4 and 5) of the rod-like light emitting portion 5.
- TEM transmission electron microscope
- the well layer 21 having a high In composition ratio is dark gray or black
- the ridge line portion 22 having a low In composition ratio is light gray or white.
- the width 22w of the ridge line portion 22 is 1 atom or more, and can be, for example, 2 nm or less.
- the width of the ridge line portion 22 refers to the shortest distance between the two well layers 21 sandwiching the ridge line portion 22.
- a part of the side surface 10c of the semiconductor rod 10 on the lower surface 10b side is covered with an insulating film 90. Therefore, the active layer 20 is not formed in that portion. In other words, only the outer surface of the semiconductor rod 10 exposed above the insulating film 90 can be covered with the active layer 20.
- a semiconductor layer 30 is formed on the outer surface of the active layer 20.
- the semiconductor rod 10 is formed from an n-type GaN-based crystal (n-type nitride semiconductor)
- the semiconductor layer 30 is formed from a p-type GaN-based crystal (p-type nitride semiconductor).
- the semiconductor layer 30 is formed by stacking a plurality of p-type GaN layers or p-type AlGaN layers with different p-type impurity concentrations.
- the semiconductor layer 30 is formed by setting the temperature of the growth substrate 50 to 800 to 900 ° C., for example, and supplying a source gas.
- the source gas a mixed gas containing TMG or TEG as a gallium source and NH 3 as a nitrogen source can be used. Further, in order to add p-type impurities, for example, Cp 2 Mg (biscyclopentadienyl magnesium) is added to these source gases, and a GaN layer to which Mg is added is formed as the semiconductor layer 30.
- the semiconductor layer 30 having a thickness of about 40 to 120 nm can be formed. By forming the semiconductor layer 30, the rod-shaped light emitting portion 5 is obtained.
- the first translucent electrode 81 is formed so as to continuously cover the outer surface of the semiconductor layer 30 of the rod-shaped light emitting unit 5 and the upper surface 90a of the insulating film 90. Then, as shown in FIG. 6B (f), a part of the first translucent electrode 81 and a part of the plurality of rod-like light emitting portions 5 are removed, and a part of the base layer 40 is exposed from the insulating film 90. Let The portions exposed from the insulating film 90 are referred to as a first exposed portion 40x and a second exposed portion 40y. An electrode for energizing the semiconductor rod 10 is formed on the first exposed portion 40x.
- an electrode for energizing the semiconductor layer 30 is formed via the insulating film 91.
- Each electrode will be described in detail later.
- the etching for forming the first exposed portion 40x and the second exposed portion 40y is performed. It is possible to protect the rod-shaped light emitting portion 5 from the stripping solution for stripping the mask. That is, since the rod-shaped light emitting unit 5 is covered with the first light-transmissive electrode 81, the stripping solution is difficult to contact the rod-shaped light emitting unit 5. Therefore, possibility that the required rod-shaped light emission part 5 will be removed can be reduced.
- the rod-shaped light emitting portion 5 is not grown in advance, that is, the through hole 90h of the insulating film 90 may not be formed.
- the formation positions of the first exposed portion 40x and the second exposed portion 40y are not set in advance, and the first and second exposed portions 40x and 40y of the first exposed portion 40x and the second exposed portion 40y are confirmed after confirming the quality of the formed rod-like light emitting portion 5.
- the formation position may be determined. Thereby, the 1st exposed part 40x and the 2nd exposed part 40y can be formed in the position with the defective rod-shaped light emission part 5 with insufficient growth.
- the translucent electrode 81 can be formed from a translucent conductive film such as an ITO film, for example.
- Insulating Film 91 As shown in FIG. 6C (g), a part of the first translucent electrode 81 and a part of the first exposed portion 40x of the underlayer 40 (a part where the n-side translucent electrode 71 is not formed) Then, the insulating film 91 is formed so as to cover the entire second exposed portion 40y of the foundation layer 40.
- the insulating film 91 is formed from an insulating member such as SiO 2 or SiN. Since SiO 2 has translucency, there is an advantage that light emitted from the rod-shaped light emitting portion 5 can be extracted through the insulating film 91.
- n-side translucent electrode 71 and a second translucent electrode 82 are formed.
- the n-side translucent electrode 71 is formed on the first exposed portion 40 x of the foundation layer 40.
- the second translucent electrode 82 is in contact with the first translucent electrode 81 and extends to the upper side of the second exposed portion 40 y of the foundation layer 40.
- the n-side pad electrode 70 is formed on the n-side translucent electrode 71.
- the p-side pad electrode 80 is formed on the second translucent electrode 82 immediately above the second exposed portion 40 y of the foundation layer 40.
- the p-side pad electrode 80 and the rod-like light emitting unit 5 are electrically connected via the second light-transmissive electrode 82 and the first light-transmissive electrode 81.
- the n-side pad electrode 70 and the rod-like light emitting portion 5 are electrically connected via the n-side translucent electrode 71 and the base layer 40.
- the first translucent electrode 81 is in contact with the semiconductor layers 30 of the plurality of rod-shaped light emitting sections 5, and in the n-side current path, the base layer 40 is in the plurality of rod-shaped light emitting sections 5. It is in contact with the semiconductor rod 10. That is, the several rod-shaped light emission part 5 is connected in parallel.
- the light emitting element 1 of the present disclosure is a so-called semiconductor light emitting element, and includes, for example, a light emitting diode (LED) and a laser diode (LD).
- LED light emitting diode
- LD laser diode
- the rod-shaped light emitting portion 5 has a polygonal columnar outer shape or a polygonal columnar outer shape having a facet at the upper end.
- the rod-shaped light emitting portion 5 can be formed of a semiconductor material such as a III-V group compound semiconductor or a II-VI group compound semiconductor, for example.
- a nitride semiconductor such as In X Al Y Ga 1-XY N (0 ⁇ X, 0 ⁇ Y, X + Y ⁇ 1) (for example, InN, AlN, GaN, InGaN, AlGaN, InGaAlN, etc.) is used.
- the semiconductor suitable for each structure (semiconductor rod 10, active layer 20, and semiconductor layer 30) of the rod-shaped light emission part 5 is explained in full detail.
- the semiconductor rod 10 includes a first conductivity type semiconductor (for example, an n-type semiconductor). Suitable semiconductors for the semiconductor rod 10 include GaN and AlGaN. Si, Ge, O, or the like may be added as an n-type impurity.
- the semiconductor rod 10 may be composed of only the first conductivity type semiconductor.
- the active layer 20 includes a ridge line portion 22 having a large band gap and a well layer 21 having a small band gap.
- a semiconductor suitable for the well layer 21 is In x Ga 1-x N.
- Examples of the semiconductor suitable for the ridge line portion 22 include GaN and In y Ga 1-y N.
- the semiconductor layer 30 includes a second conductivity type semiconductor (for example, a p-type semiconductor).
- a semiconductor suitable for the semiconductor layer 30 includes GaN containing p-type impurities such as Mg.
- the semiconductor layer 30 may have a stacked structure including a layer made of a p-type semiconductor containing a p-type impurity and an undoped layer.
- the n-side translucent electrode 71, the first translucent electrode 81, and the second translucent electrode 82 can be formed of a translucent conductive material, and a conductive oxide is particularly preferable.
- the conductive oxide include ZnO, In 2 O 3 , ITO, SnO 2 , and MgO.
- ITO is preferable because it is a material having high light transmittance in visible light (visible region) and high conductivity.
- the p-side translucent electrode it is preferable to provide two layers of the first translucent electrode 81 and the second translucent electrode 82 as described above.
- the p-side translucent electrode may be a single layer.
- the p-side translucent electrode is provided after the insulating film 91 is formed, the rod-shaped light emission covered with the insulating film 91 is provided. The portion 5 cannot be energized, and the light emission area is reduced.
- the formation area of the insulating film 91 is reduced so as not to cover the rod-shaped light emitting portion 5, the possibility that the p-side electrode and the base layer 40 are short-circuited increases.
- the insulating film 91 can be formed on the rod-shaped light emitting portion 5 to such an extent that the possibility of a short circuit is low.
- the rod-shaped light emitting portion 5 under the insulating film 91 can be energized. It should be noted that the light transmittance is reduced in the portion where the second light-transmissive electrode 82 overlaps the portion where only the first light-transmissive electrode 81 is provided.
- the surface area of the portion where the first light transmitting electrode 81 is exposed from the second light transmitting electrode 82 is made larger than the surface area of the portion where the first light transmitting electrode 81 and the second light transmitting electrode 82 overlap. It is preferable. Thereby, the light extraction efficiency of the rod-shaped light-emitting portion 5 can be improved.
- the n-side translucent electrode 71 may be omitted. In this case, the n-side pad electrode 70 is formed directly on the foundation layer 40.
- an insulating substrate such as sapphire (A1 2 O 3 ) is used.
- a nitride semiconductor GaN, AlN, etc.
- a sapphire growth substrate having a C plane, that is, a (0001) plane as a growth plane is preferable.
- the growth plane preferably has an off angle of 0.5 ° to 2.0 ° with respect to the (0001) plane, rather than exactly coincident with the (0001) plane.
- the insulating films 90 and 91 can be formed from, for example, silicon dioxide (SiO 2 ) or SiN.
- n-side pad electrode 70 and the p-side pad electrode 80 As the n-side pad electrode 70 and the p-side pad electrode 80, a good electrical conductor can be used, and for example, a metal such as Cu, Au, Ag, Ni, or Sn is suitable.
- a metal such as Cu, Au, Ag, Ni, or Sn is suitable.
- the pad electrodes 70 and 80 are formed on the translucent electrodes 71 and 81, it is preferable to form the pad electrodes 70 and 80 from a conductive material capable of making ohmic contact with the translucent electrode.
- the p-side pad electrode 80 may be provided directly on the rod-shaped light emitting unit 5, and in that case, the p-side translucent electrode may be only one layer (only the first translucent electrode 81). .
- the p-side pad electrode 80 is not directly provided on the rod-shaped light-emitting portion 5, but a region where the rod-shaped light-emitting portion 5 does not exist is provided and the p-side pad electrode 80 is formed in that region as shown in FIG. To do.
- the light from the rod-shaped light emission part 5 can be extracted outside without being blocked by the p-side pad electrode 80, the light extraction efficiency of the light emitting element 1 can be improved.
- the semiconductor rod 10 and the active layer 20 according to the present disclosure were manufactured.
- the active layer 20 has a multiple quantum well structure (MQW), and each semiconductor layer is formed by MOCVD.
- a sapphire substrate having a surface that is offset by about 1 ° from the (0001) surface as a growth surface was prepared as a growth substrate 50.
- the upper surface 50a of the growth substrate 50 is nitrided so that the upper surface of the nitride semiconductor grown thereon (a surface parallel to the upper surface 50a of the growth substrate 50) becomes the (000-1) plane.
- an SiO 2 insulating film 90 (thickness: about 0.3 ⁇ m) having a plurality of through holes 90 h having a circular opening shape with a diameter of 2 ⁇ m was formed on the growth substrate 50 by photolithography.
- a GaN buffer layer 45 (thickness of about 20 nm) was formed on the growth substrate 50 on which the insulating film 90 was formed, and then heat treatment was performed.
- the buffer layer 45 was formed after the insulating film 90 was formed in this way.
- a semiconductor rod 10 made of GaN was formed under the following formation conditions to obtain a plurality of substantially hexagonal columnar semiconductor rods 10 having a thickness of about 3 ⁇ m and a length of about 10 ⁇ m.
- -Substrate temperature 1045 ° C ⁇ Manufacturing time: 40 minutes ⁇
- Atmosphere gas Mixed atmosphere of hydrogen and nitrogen ⁇
- Carrier gas Nitrogen 11 slm NH 3 : 50 sccm (about 2 ⁇ 10 ⁇ 3 mol / min)
- TMG 20 sccm (about 65 ⁇ 10 ⁇ 6 mol / min)
- the formation conditions were changed as follows to form the active layer 20.
- the active layer 20 produced the barrier layer 25 and the layer containing the well layer 21 and the ridgeline part 22 (herein, referred to as “mixed layer”) alternately from the semiconductor rod 10 side.
- the barrier layer 25 and the mixed layer were as follows.
- the formation condition of the barrier layer 25 is that of GaN
- the formation condition of the mixed layer is that of InGaN.
- the growth times of the second to seventh layers of the barrier layer 25 and the mixed layer are the same, there is a difference in the growth rate in the length direction of the semiconductor rod 10, and as shown in a TEM image described later.
- the thicknesses of the barrier layer 25 and the mixed layer are not necessarily the same.
- FIG. 7 is a TEM image of the entire cross section of the rod-shaped light emitting unit 5
- FIG. 8 is a TEM image of a part of the cross section of the rod-shaped light emitting unit 5.
- the side surface 10 c and the ridge line 10 r of the semiconductor rod 10 the well layer 21, the ridge line portion 22, and the barrier layer 25 of the active layer 20 can be confirmed.
- the active layer 20 includes a barrier layer 25, a well layer 21, and a ridge line portion 22.
- Each well layer 21 extends in a direction parallel to the side surface 10 c of the semiconductor rod 10.
- the extending direction of the well layer 21 changes at a position of a line (virtual line v) connecting the ridge line 10r of the semiconductor rod 10 and the ridge line 5r of the rod-shaped light emitting unit 5.
- the ridgeline part 22 (linear thin gray part) is located in the part where the well layer 21 bends, and the well layer 21 in the both sides of the ridgeline part 22 is isolate
- the GaN barrier layer (seventh layer) is grown on the outermost periphery in the TEM image of FIG. A part of the outer periphery is dark gray, which is presumed to be caused by the fact that the growth was stopped here. It was found that in all six well layers 21 stacked in the thickness direction of the active layer 20, the well layers 21 were separated by the ridge line portions 22 arranged along the virtual line v.
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Abstract
Description
ロッド状発光素子は、半導体ロッドの表面全体が発光面となり得るため、従来の発光素子に比べて、単位体積当たりの発光面積を広くできる利点がある。
そこで、本開示は、発光効率を高めることのできるロッド状発光素子を提供することを目的とする。
多角柱の側面を成すように配置された複数の側面を有する第1導電型半導体ロッドと、
前記第1導電型半導体ロッドの前記側面を覆う半導体から成る活性層と、
前記活性層を覆う第2導電型半導体層と、を含み、
前記活性層は、前記複数の側面のうち少なくとも隣接する2つにそれぞれ配置された複数の井戸層を含み、
前記複数の井戸層のうち隣接する井戸層同士はそれぞれ、隣接する前記側面同士が接する稜線に沿って分離されており、
前記活性層は、半導体から成り、前記稜線上に配置されて前記隣接する井戸層同士を繋ぐ稜線部をさらに含み、
前記稜線部のバンドギャップは、前記複数の井戸層それぞれのバンドギャップよりも広いことを特徴とする。
図3(a)は、図2に示すロッド状発光部5の断面図の部分拡大図である。図3(a)に示すように、個々のロッド状発光部5は、第1導電型半導体ロッド(半導体ロッド10)、活性層20および第2導電型半導体層(半導体層30)を含んでいる。
本開示では、後述する製造方法において、半導体ロッド10の形成の際に絶縁膜90を利用するときには、このような形態になり得る。
また、ロッド状発光部5のすべての側面において、活性層20の厚さは実質的に同じであることが好ましい。同様に、ロッド状発光部5のすべての側面において、半導体層30の厚さは実質的に同じであることが好ましい。これにより、ロッド状発光部5のすべての側面から同程度の発光を得ることができる。
活性層20は、半導体ロッド10の六角形状の外周全体を連続して囲んでいる。活性層20は、井戸層21と稜線部22とを含んでいる。井戸層21は、半導体ロッド10の側面10cに配置されている。隣接する2つの側面10cをそれぞれ覆う2つの井戸層21は、半導体ロッド10の稜線10rの位置において分離されている。つまり、井戸層21は、半導体ロッド10の外周方向において不連続である。隣接する2つの井戸層21の間、つまり半導体ロッド10の稜線10rの位置には稜線部22が設けられている。この稜線部22によって隣接する2つの井戸層21が接続されることにより、半導体ロッド10の外周方向に連続する活性層20が形成される。
上述したように、稜線10rは半導体ロッド10の長手方向(z方向)に伸びているので、活性層20の稜線部22も、稜線10rに沿って、半導体ロッド10の長手方向(z方向)に伸びている。
ロッド状発光部5を点灯する場合、発光素子1に電圧を印加する。これにより活性層20にキャリアが注入され、発光が生じる。ここで、井戸層21を、バンドギャップの大きい稜線部22で分断することにより、分断された小寸法の井戸層21内にキャリアを閉じ込めることができる。その結果、井戸層21内での発光再結合の頻度を増加させることができ、発光効率を向上させることができる。また、稜線部22間の距離が例えば数十nm程度など十分に小さければ、量子効果を得ることができるため、より効率的にキャリアを井戸層21内に閉じ込めることができる。
井戸層21の結晶性が向上することにより、発光素子1を高効率化することができる。また、稜線部22を有することによって井戸層21の結晶性が向上するため、稜線部22が存在しない場合と比較して井戸層21のIn組成比を高くすることも可能である。井戸層21のIn組成比を高くすると、発光が長波長にシフトするので、従来よりも長波長の発光が可能な発光素子1を形成することができる。その結果、窒化物系半導体の発光素子において、井戸層21のIn組成比を制御することにより、赤色~紫外線の広い範囲の発光波長の発光素子を形成することができる。
また、多角柱の側面に稜線を跨ぐ層を設ける場合、当該層の厚みは稜線で最大となる傾向にある。例えば図4に示すように、稜線10rにおける稜線部22の膜厚22tは側面10cにおける井戸層21の膜厚21tよりも厚い。仮に稜線部22がなく稜線10rにも井戸層21が形成されていれば、井戸層21の膜厚が稜線10rにおいて他の部分よりも厚くなる。そして井戸層21は膜厚が厚いほど結晶性が悪化しやすいため、稜線10rに井戸層21が設けられていると稜線10rにおける井戸層21の結晶性が悪化する場合がある。稜線部22を設けることで、このような稜線10rにおける井戸層21の厚膜化を避けることができる。
別の方法としては、井戸層21をInを含む窒化物半導体から形成し、稜線部22をInを含まない窒化物半導体から形成することが挙げられる。具体的には、井戸層21をInGaNから形成し、稜線部22をGaNから形成することができる。
いずれの例でも、稜線部22のバンドギャップを井戸層21のバンドギャップより広くすることができる。上述したように、井戸層21は半導体ロッド10の全ての側面10c上に配置されることが好ましいため、稜線部22も同様に全ての稜線10rの位置に設けられていることが好ましい。これにより、すべての側面10cの井戸層21において稜線部22を設けたことによる効果を得ることができる。なお、活性層20は、井戸層21と半導体ロッド10との間に配置された障壁層(n側障壁層)、および井戸層21と半導体層30との間に配置された障壁層(p側障壁層)を含むことができる。これにより、井戸層21をn側障壁層とp側障壁層とで挟むことができる。
井戸層21が、バンドギャップの広い障壁層25とバンドギャップの広い稜線部22とで囲まれているので、井戸層21内にキャリアを効率よく閉じ込めることができる。
図3(b)は、ロッド状発光部の変形例である。図3(b)のロッド状発光部6は、上面6aと側面6cとの間に傾斜面(ファセット16d)を有している。ロッド状発光部6は、ファセット16dを有する半導体ロッド16と、半導体ロッド16の外面を覆う活性層26と、活性層26の外面を覆う半導体層36を有している。
このため、半導体ロッド10の上面10a側を、図3(b)に示すような形状とすることが好ましい。図3(b)においても、半導体ロッド16は、側面16cとファセット16dとが接する稜線16eと、ファセット16dと上面16aとが接する稜線16fを有している。半導体ロッド16を覆う活性層26のうち、これらの稜線16e、16fを覆う部分は、井戸層21としてよい。つまり、活性層26は、半導体ロッド16の側面16cから、ファセット16dを通って上面16aまで連続する井戸層21を含んでいてもよい。GaN系結晶におけるM面が側面16cであるときに、ファセット16dと側面16cとの成す角は約152度であることが好ましい。このようなファセット16dはGaN系結晶の(10-11)面であると考えられる。なお、ミラー指数において負の指数は数字の上にバーを付して表されるが、本明細書では数字の前に「-」を付して負の指数を表している。半導体ロッド10がこのようなファセット16dを有することにより、ファセット16d及び稜線16eに結晶性の良好な井戸層21を形成することができる。なお、上面16aはなくてもよい。すなわち、図3(b)に示す断面視では半導体ロッド10の上端部は台形状であるが、三角形状であってもよい。
また、ロッド状発光部5の半導体層30の表面には第1透光性電極81が形成され、さらにその表面に第2透光性電極82が形成されている。第1透光性電極81により、複数のロッド状発光部5の半導体層30は並列に接続される。第2透光性電極82は下地層40の上側まで延在しており、第2透光性電極82と下地層40とはこれらの間に配置された絶縁膜91によって電気的に絶縁されている。
ロッド状発光部5から発光する光は、第1透光性電極81および第2透光性電極82を通って発光素子1の外部に取り出すことができる。
本開示においては、活性層20に含まれる井戸層21が、井戸層21よりバンドギャップの大きい稜線部22で繋がれた構成を有している。井戸層21と稜線部22は、雰囲気、原料ガスおよび形成温度を調節することにより、1つの積層工程内で同時に形成することができることを本発明の発明者は見いだした。
図6A(a)に示すように、成長基板50の上に、バッファ層45および下地層40を順次積層する。バッファ層45および下地層40を形成するための反応装置としては、例えばMOCVD装置を用いることができる。なお、バッファ層45と下地層40の形成を省略して、成長基板50の成長面に直接半導体ロッド10を形成してもよい。
成長基板50としては、後述するようにサファイア基板、SiC基板、窒化物半導体基板などが利用できる。ここでは、サファイア(Al2O3)基板を用いた例を説明する。サファイアの成長基板50の場合、(0001)面を成長面とするのが好ましい。ここで「(0001)面」とは、(0001)面に対してわずかに傾斜した面を含む。具体的には、(0001)面に対し0.5°以上2.0°以下のオフ角をもつ面を成長面とするのがより好ましい。
その後、反応装置にNH3ガスを導入して、成長基板50の上面50aを窒化する。窒化処理は、例えば処理温度900~1100℃、処理時間1~30分で行うことができる。このような窒化処理により、その上に成長する窒化物半導体の表面を(000-1)面とすることができる。
図6A(b)に示すように、貫通孔90hから露出した下地層40の上面40aに、半導体ロッド10を形成する。半導体ロッド10を形成する際に、絶縁膜90がマスクとして機能して、貫通孔90hから上向き(z方向)に成長した半導体ロッド10を形成することができる。このとき、サファイアの成長基板50の窒化された表面を成長面とした場合、成長させるGaN系結晶の成長方向は[000-1]方向となるから、半導体ロッド10の成長方向もGaN系結晶の[000-1]方向となる。つまり、半導体ロッド10の下地層40から上方に向う方向(z方向)が、GaN系結晶の[000-1]方向になる。
図6A(c)に示すように、半導体ロッド10の外面に活性層20を形成する。
例えば、ロッド状発光部5を青色発光させる場合、活性層20は、成長基板50の温度を800~900℃程度とし、原料ガスを供給して形成する。原料ガスは、ガリウム源としてTMGまたはTEGと、窒素源としてNH3と、インジウム源としてTMI(トリメチルインジウム)を含む混合ガスが利用できる。ここで、原料ガス中におけるガリウム元素に対する窒素元素の比を、5.5×103~2.2×105にするのが好ましい。ガリウム元素に対する窒素元素の比がこの範囲内にあると、活性層20の井戸層21(図4および図5参照)を形成するInGaN膜を良好に形成することができる。なお、比率が前記範囲を下回ると、インジウム源から生じるInがGaやNと結合しにくくなり、In金属として析出されやすくなる。比率が前記範囲を上回ると、窒素源であるNH3から生じるHにより、インジウム源から生じるInが排除されやすくなり、InGaNが形成されにくくなる。
ガリウム元素に対する窒素元素の比は、より好ましくは2.2×104~2.2×105であり、特に好ましくは4.4×104~1.1×105である。
稜線部22の幅22wは、1原子以上であり、例えば2nm以下とすることができる。なお、稜線部22の幅とは、稜線部22を挟む2つの井戸層21の最短距離を指す。
図6A(d)に示すように、活性層20の外面に半導体層30を形成する。半導体ロッド10をn型のGaN系結晶(n型窒化物半導体)から形成した場合、半導体層30はp型のGaN系結晶(p型窒化物半導体)から形成する。例えば、半導体層30は、p型GaN層やp型AlGaN層をp型不純物濃度を変えて複数積層させることにより形成する。
半導体層30は、成長基板50の温度を例えば800~900℃とし、原料ガスを供給して形成する。原料ガスは、ガリウム源としてTMGまたはTEGと、窒素源としてNH3とを含む混合ガスが利用できる。さらに、p型不純物を添加するため、これらの原料ガスに例えばCp2Mg(ビスシクロペンタジエニルマグネシウム)を追加し、Mgが添加されたGaN層を半導体層30として形成する。原料ガスの供給時間を例えば20~60分とすると、約40~120nm程度の厚さの半導体層30を形成できる。
半導体層30の形成により、ロッド状発光部5が得られる。
図6B(e)に示すように、ロッド状発光部5の半導体層30の外面と、絶縁膜90の上面90aとを連続して覆うように、第1透光性電極81を形成する。
そして、図6B(f)に示すように、第1透光性電極81の一部と複数のロッド状発光部5の一部とを除去し、下地層40の一部を絶縁膜90から露出させる。絶縁膜90から露出した部分を、第1露出部40xおよび第2露出部40yと称する。なお、第1露出部40xには、半導体ロッド10に通電するための電極が形成される。第2露出部40yの上側には、絶縁膜91を介して、半導体層30に通電するための電極が形成される。各電極については後で詳述する。
このように、第1透光性電極81を形成した後で第1露出部40xおよび第2露出部40yを形成すれば、第1露出部40xおよび第2露出部40yを形成するためのエッチング用のマスクを剥離する剥離液からロッド状発光部5を保護することができる。すなわち、ロッド状発光部5が第1透光性電極81に被覆されているので、剥離液がロッド状発光部5に接触し難い。したがって、必要なロッド状発光部5が除去される可能性を低減することができる。
透光性電極81は、例えばITO膜等の透光性導電膜から形成することができる。
図6C(g)に示すように、第1透光性電極81の一部と、下地層40の第1露出部40xの一部(n側透光性電極71が形成されていない部分)と、下地層40の第2露出部40yの全体とを覆うように、絶縁膜91を形成する。
絶縁膜91は、SiO2、SiN等の絶縁部材から形成する。SiO2は、透光性を有するため、絶縁膜91を通してロッド状発光部5からの発光を取り出すことができる利点がある。
図6C(h)に示すように、n側透光性電極71と第2透光性電極82とを形成する。n側透光性電極71は、下地層40の第1露出部40x上に形成する。第2透光性電極82は、第1透光性電極81と接触し、かつ下地層40の第2露出部40yの上側まで延在している。第2透光性電極82と下地層40の第2露出部40yの間に絶縁膜91を配置することにより、それらが短絡するのを防止している。
次いで、n側透光性電極71上にn側パッド電極70を形成する。および、下地層40の第2露出部40yの直上において、第2透光性電極82上にp側パッド電極80を形成する。
p側の電流経路において、第1透光性電極81が複数のロッド状発光部5の半導体層30と接触しており、n側の電流経路において、下地層40が複数のロッド状発光部5の半導体ロッド10と接触している。つまり、複数のロッド状発光部5は、並列接続されている。
ロッド状発光部5は、多角柱状の外形、もしくは多角柱状で上端にファセットを有する外形を有している。
ロッド状発光部5は、例えば、III-V族化合物半導体、II-VI族化合物半導体等の半導体材料から形成することができる。具体的には、InXAlYGa1-X-YN(0≦X、0≦Y、X+Y≦1)等の窒化物半導体(例えばInN、AlN、GaN、InGaN、AlGaN、InGaAlN等)を用いることができる。
ロッド状発光部5の各構成(半導体ロッド10、活性層20および半導体層30)に適した半導体について詳述する。
活性層20は、バンドギャップの大きい稜線部22と、バンドギャップの小さい井戸層21を含む。井戸層21に適した半導体としては、InxGa1-xNが挙げられる。稜線部22に適した半導体としては、GaNおよびInyGa1-yNが挙げられる。なお、井戸層21と稜線部22が共にInGaNから成るときは、井戸層21のIn組成比は稜線部22のIn組成比より大きくする(つまり、x>y)。
半導体層30は、第2導電型半導体(例えばp型半導体)を含む。半導体層30に適した半導体としては、Mg等のp型不純物を含むGaNが挙げられる。半導体層30は、p型不純物を含有するp型半導体から成る層と、アンドープの層とを含む積層構造であってもよい。
n側透光性電極71、第1透光性電極81および第2透光性電極82は、透光性の導電材料から形成することができ、特に、導電性酸化物が好適である。導電性酸化物としては、例えば、ZnO、In2O3、ITO、SnO2、MgOが挙げられる。特にITOは、可視光(可視領域)において高い光透過性を有し、導電率の高い材料であることから好ましい。
なお、n側透光性電極71は省略してもよい。この場合、n側パッド電極70を下地層40に直接形成する。
窒化物半導体を成長させる場合の成長基板50としては、典型的には、サファイア(A12O3)等の絶縁性基板を用いる。また、窒化物半導体(GaN、AlN等)等を用いることもできる。
特に、C面、すなわち(0001)面を成長面とするサファイアの成長基板が好ましい。成長面は厳密に(0001)面と一致するよりは、(0001)面に対して0.5°~2.0°のオフ角を有しているのが好ましい。このような面を窒化することにより、GaN系半導体を[000-1]方向に成長させることができる。
絶縁膜90、91は、例えば、二酸化ケイ素(SiO2)やSiNから形成することができる。
n側パッド電極70およびp側パッド電極80としては、電気良導体を用いることができ、例えばCu、Au、Ag、Ni、Sn等の金属が好適である。パッド電極70、80を透光性電極71、81上に形成する場合には、透光性電極とオーミックコンタクトできる導電材料から形成するのが好ましい。なお、p側パッド電極80をロッド状発光部5に直接設けてもよく、その場合は、p側の透光性電極は1層のみ(第1透光性電極81のみ)であってもよい。好ましくは、p側パッド電極80をロッド状発光部5に直接設けるのではなく、図2に示すように、ロッド状発光部5が存在しない領域を設け、その領域にp側パッド電極80を形成する。これにより、ロッド状発光部5からの光をp側パッド電極80によって遮られることなく外部に取り出すことができるため、発光素子1の光取り出し効率を向上させることができる。
本開示に係る半導体ロッド10及び活性層20を製造した。活性層20は、多重量子井戸構造(MQW)とし、各半導体層はMOCVD法により形成した。
次いで、絶縁膜90が形成された成長基板50に、GaNのバッファ層45(厚さ約20nm)を形成し、その後、熱処理を行った。ここでは下地層40は設けなかったため、このように絶縁膜90形成後にバッファ層45の形成を行った。
・基板温度:1045℃
・製造時間:40分
・雰囲気ガス:水素と窒素の混合雰囲気
・キャリアガス:窒素 11slm
・NH3:50sccm(約2×10-3モル/分)
・TMG:20sccm(約65×10-6モル/分)
・基板温度:810℃
・雰囲気ガス:窒素
・キャリアガス:窒素 8slm
・NH3:4slm(約2×10-1モル/分)
・TEG:16sccm(約4×10-6モル/分)
GaNからなる障壁層25は、第1層(半導体ロッド10と接触している層)のみSiドープした。1層目の形成の際には、上記の原料ガスに加えて、Siドーパント源としてSiH4ガスを8×10-9モル/分で添加した。
障壁層25の形成時間は、第1層は約9分(厚さ10nm程度)、第2層~第7層は、それぞれ4分(厚さ4~10nm程度)とした。
・基板温度:810℃
・雰囲気ガス:窒素
・キャリアガス:窒素 8slm
・NH3:4slm(約2×10-1モル/分)
・TEG:16sccm(約4×10-6モル/分)
・TMI:142sccm(約12×10-6モル/分)
混合層の形成時間は、第1層~第6層の全てにおいて、それぞれ4分(厚さ4~10nm程度)とした。なお、障壁層25の第2層~第7層と混合層との成長時間は同じであるが、半導体ロッド10の長さ方向において成長速度の差が生じるため、後述するTEM像に示すように、障壁層25と混合層との厚さは同じとは限らない。
図8のTEM像において、活性層20が、障壁層25、井戸層21、および稜線部22を含んでいることが観察できる。各井戸層21は、半導体ロッド10の側面10cと平行な方向に延在している。井戸層21(濃いグレー部分)は、半導体ロッド10の稜線10rとロッド状発光部5の稜線5rとを結ぶ線(仮想線v)の位置で、延在方向が変わる。そして、井戸層21が屈曲する部分に稜線部22(線状の薄いグレー部分)が位置して、稜線部22の両側にある井戸層21を分離している。なお、図8のTEM像において最外周に成長させたのはGaN障壁層(第7層)である。外周部の一部が濃いグレーとなっているが、これはここで成長を止めたことが原因と推測される。
活性層20の厚さ方向に積層された6層の井戸層21の全てにおいて、仮想線vに沿って配置された稜線部22により、井戸層21は分離されていることがわかった。
5、6 ロッド状発光部
10、16 第1導電型半導体ロッド(半導体ロッド)
10c、16c 半導体ロッドの側面
20、26 活性層
21 井戸層
22 稜線部
25 障壁層
30、36 第2導電型半導体層(半導体層)
40 下地層
45 バッファ層
50 成長基板
90、91 絶縁膜
90h 貫通孔
Claims (8)
- 多角柱の側面を成すように配置された複数の側面を有する第1導電型半導体ロッドと、
前記第1導電型半導体ロッドの前記側面を覆う半導体から成る活性層と、
前記活性層を覆う第2導電型半導体層と、を含み、
前記活性層は、前記複数の側面のうち少なくとも隣接する2つにそれぞれ配置された複数の井戸層を含み、
前記複数の井戸層のうち隣接する井戸層同士はそれぞれ、隣接する前記側面同士が接する稜線に沿って分離されており、
前記活性層は、半導体から成り、前記稜線上に配置されて前記隣接する井戸層同士を繋ぐ稜線部をさらに含み、
前記稜線部のバンドギャップは、前記複数の井戸層それぞれのバンドギャップよりも広いことを特徴とする発光素子。 - 前記複数の井戸層は、前記第1導電型半導体ロッドの全ての側面にそれぞれ配置されており、
前記複数の井戸層のうち隣接する井戸層同士は全て前記稜線部により繋がれていることを特徴とする請求項1に記載の発光素子。 - 前記井戸層は、前記第1導電型半導体ロッドの側面と垂直をなす方向において、障壁層を介して複数積層されていることを特徴とする請求項1または2に記載の発光素子。
- 前記複数の井戸層はInを含有する窒化物半導体から成り、
前記稜線部のIn組成比は、前記井戸層のIn組成比より低いことを特徴とする請求項1~3のいずれか1項に記載の発光素子。 - 前記稜線部がGaNから成り、前記複数の井戸層がInGaNから成ることを特徴とする請求項1~3のいずれか1項に記載の発光素子。
- 前記第1導電型半導体ロッドは第1導電型窒化物半導体を含む第1導電型窒化物半導体ロッドであり、
前記第2導電型半導体層は第2導電型窒化物半導体を含む第2導電型窒化物半導体層であり、
前記第1導電型窒化物半導体ロッドは、下地層の上面に配置されると共に、ウルツ鉱型の結晶から成り、
前記側面は、前記結晶のM面であり、上面視で六角形状に配置されていることを特徴とする請求項1~5のいずれか1項に記載の発光素子。 - 前記第1導電型半導体ロッドは、GaN結晶から成ることを特徴とする請求項6に記載の発光素子。
- 前記第1導電型窒化物半導体ロッドは、前記下地層から上方に向う方向が前記GaN結晶の[000-1]方向であることを特徴とする請求項7に記載の発光素子。
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