WO2018055838A1 - Procédé de fabrication d'élément semi-conducteur et substrat semi-conducteur - Google Patents

Procédé de fabrication d'élément semi-conducteur et substrat semi-conducteur Download PDF

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Publication number
WO2018055838A1
WO2018055838A1 PCT/JP2017/020355 JP2017020355W WO2018055838A1 WO 2018055838 A1 WO2018055838 A1 WO 2018055838A1 JP 2017020355 W JP2017020355 W JP 2017020355W WO 2018055838 A1 WO2018055838 A1 WO 2018055838A1
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substrate
layer
single crystal
semiconductor element
crystal layer
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PCT/JP2017/020355
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English (en)
Japanese (ja)
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光治 加藤
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株式会社テンシックス
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Priority to JP2018540631A priority Critical patent/JP6930746B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/47—Schottky barrier electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes

Definitions

  • the present invention relates to a method for manufacturing a semiconductor element and a semiconductor substrate. Specifically, the present invention relates to a semiconductor element manufacturing method for manufacturing a semiconductor element having a high thickness and a high breakdown voltage by using a temporary substrate, and a semiconductor substrate on which the high breakdown voltage semiconductor element is formed.
  • FIG. 16A shows a cross-sectional structure of a general vertical structure Schottky diode (91) made of SiC.
  • An active layer 902 is formed by epitaxial growth on a support substrate 901 made of a single crystal, and P-type impurity layers 911 and 912 serving as a guard ring and a Schottky electrode 913 are formed in the active layer 902 region.
  • the current i flows between the Schottky electrode 913 and the back electrode 903 formed on the bottom surface of the support substrate 901.
  • FIG. 2B shows the cross-sectional structure of a general vertical MOSFET (92) made of SiC.
  • An active layer 902 is formed by epitaxial growth on a support substrate 901 made of a single crystal, and a source 921, a drain 922, and a gate 923 are formed in the region of the active layer 902.
  • the conduction and interruption of the current between the source 921 and the drain 922 are controlled by the gate 923.
  • the drain current i during conduction flows between the drain 922 and the back electrode 903 formed on the bottom surface of the support substrate 901.
  • FIG. 6C shows a cross-sectional structure of a MOSFET (94) provided with a single crystal buffer layer 904 having a high nitrogen concentration in the initial stage of forming the active layer 902 by epitaxial growth.
  • the single crystal buffer layer 904 is formed in order to reduce the crystal defect density of the epitaxial layer as compared with the crystal defect density of the support substrate 901.
  • the support substrate 901 is a region where current flows in the vertical direction (vertical direction in the drawing), and has a low resistivity of 20 m ⁇ ⁇ cm or less.
  • the active layer 902 requires a high voltage withstand voltage, and therefore has a resistivity that is two to three orders of magnitude higher than that of the support substrate 901. Since a semiconductor element using SiC has a large band gap width, the thickness of the active layer 902 can be reduced to about 5 to 10 ⁇ m.
  • the active layer 902 is formed on the support substrate 901 by epitaxial growth, the crystallinity of the active layer 902 depends on the base support substrate 901. For this reason, the SiC crystal quality of the support substrate 901 is important.
  • the thickness of the support substrate 901 is required to be about 300 ⁇ m in the case of a 6-inch substrate in order to prevent cracking when handling the single crystal substrate. Then, after forming the element on the front surface side of the substrate, in order to reduce the resistance of the support substrate portion, the back surface is ground and the thickness is reduced to 100 ⁇ m or less.
  • the support substrate 901 which is the base of the active layer 902 to be epitaxially grown.
  • the support substrate 901 is an N-type semiconductor by adding high-concentration nitrogen in order to reduce the resistivity.
  • the resistance of the support substrate layer is further reduced by processing the support substrate 901 thinly.
  • an expensive single crystal substrate is used as a substrate for a semiconductor element, and the thickness of the single crystal substrate is not increased for the active layer, but is increased for handling the substrate in the element formation process. Has been. Further, after the element is formed, the substrate is processed thinly, and a large part of the single crystal substrate is currently removed by grinding.
  • the substrate of the semiconductor element made of SiC only the surface active layer may be a single crystal.
  • the supporting substrate layer may be monocrystalline, polycrystalline, or amorphous regardless of crystallinity.
  • a substrate manufacturing method in which a single crystal active layer and a non-single crystal support substrate layer are bonded.
  • a substrate manufacturing method in which amorphous silicon is deposited on a polycrystalline SiC support, the polycrystalline SiC support and a single crystal SiC substrate are joined, and integrated by direct bonding see Patent Document 1).
  • An example in which substrates are bonded by a surface activation method is also disclosed (see Patent Document 3).
  • a thin film layer made of a single crystal is formed as an active layer on a support substrate (support layer) having a certain thickness.
  • the active layer is manufactured by epitaxial growth. Since this support substrate may be a single crystal or a polycrystal, a method of bonding a thin single crystal layer and an inexpensive polycrystalline semiconductor substrate by a bonding technique has been proposed (Patent Documents 1, 2, 3, etc.). .
  • Patent Documents 1, 2, 3, etc. a method of bonding a thin single crystal layer and an inexpensive polycrystalline semiconductor substrate by a bonding technique has been proposed (Patent Documents 1, 2, 3, etc.).
  • the bonding substrate made of different materials has a large amount of warpage due to a difference in thermal expansion coefficient and non-uniformity of crystals, and there are many problems in practical use.
  • a thick single crystal SiC substrate of about 350 ⁇ m is used for handling during processing, and the thickness of the support layer is finally reduced to about 100 ⁇ m in order to obtain good device characteristics.
  • this has a problem that an expensive single crystal substrate is not fully utilized.
  • the support layer is thinned after forming the element, it is conceivable to use a thin substrate as the element substrate.
  • the thickness of the substrate is sufficient for the thickness of the epitaxial layer portion of the surface layer even for a high voltage element. You can pay attention.
  • a thin substrate is easy to bend and warpage increases.
  • the single crystal buffer layer 904 is provided as shown in FIG. 16C to reduce the crystal defects of the epitaxial layer 902, the phenomenon that the crystal defects increase due to the influence of minority carriers during the operation of the MOSFET element is known. ing. For this reason, it is preferable to remove the single crystal buffer layer 904 after the element is formed, but it is impossible to remove the single crystal buffer layer 904 which is the base of the epitaxial layer 902 on which the MOSFET element is formed with a general structure. It is.
  • the present invention has been made in view of the above situation, and a semiconductor device manufacturing method for manufacturing a semiconductor device having a thin thickness and a high breakdown voltage by using a temporary substrate, and a high breakdown voltage semiconductor element formed.
  • An object of the present invention is to provide a semiconductor substrate.
  • the present invention is as follows. 1. A second film forming step of forming a second single crystal layer made of a single crystal of a second semiconductor material on a second substrate to be a temporary support substrate; and forming a semiconductor element on the second single crystal layer An element forming step, a second bonding step of bonding a third substrate on the second single crystal layer on which the semiconductor element is formed, and removing the second substrate after bonding the third substrate And a substrate removing step for performing a semiconductor device manufacturing method. 2. A bonding step of bonding one plane of the first substrate made of a single crystal of the first semiconductor material and the second substrate; and the first substrate at a predetermined depth from the bonding surface of the second substrate.
  • the first single crystal layer is formed on the first single crystal layer formed on the second substrate.
  • the first single crystal layer is formed on the surface thin film layer formed on the second substrate by separating the first substrate with the hydrogen injection layer in the separation step.
  • the second film forming step leaves a multi-layer substrate in which the surface thin film layer, the first single crystal layer, and the second single crystal layer are sequentially stacked on the second substrate, and the substrate is removed.
  • the surface thin film layer is further removed.
  • the second single crystal layer is formed after forming a single crystal buffer layer made of a single crystal of the second semiconductor material.
  • the substrate removing step the single crystal buffer layer is formed Further removing the above 1.
  • the manufacturing method of the semiconductor element in any one of. 6). 6. The method of manufacturing a semiconductor element according to claim 2, further comprising a silicide layer forming step of forming a silicide layer on the one plane of the first substrate. 7).
  • the silicon oxide film or the compound semiconductor film containing Ga is formed on the one surface of the second substrate as the surface thin film layer.
  • the buffer layer made of a semiconductor material is further formed on the one plane side of the second substrate as the surface thin film layer.
  • the polycrystalline SiC film made of SiC polycrystal is formed on the other plane of the second substrate as the surface thin film layer.
  • the second substrate is a light transmitting substrate, and the surface thin film layer is a semiconductor material containing Ga.
  • Ga is deposited by irradiating a laser beam from the second substrate side. Removing the second substrate by To 5.
  • the first substrate is a substrate made of sapphire or SiC.
  • the manufacturing method of the semiconductor element in any one of. 12 The second substrate is a substrate made of carbon, and in the first film formation step, the surface thin film layer is formed so as to cover a side surface side of the second substrate.
  • the first substrate is a metal substrate.
  • the third substrate is a substrate made of one of alkali-free glass, sapphire, and Si. To 12.
  • the through-hole is formed in a tapered shape that expands toward the surface side of the third substrate.
  • the first semiconductor material is one of SiC, GaN and gallium oxide
  • the second semiconductor material is one of SiC, GaN and gallium oxide.
  • a first single crystal layer made of a single crystal of a first semiconductor material is provided on the second single crystal layer, and the back electrode layer is formed on the first single crystal layer or on the first single crystal layer.
  • the above-mentioned 20 provided on a buffer layer made of a semiconductor material provided on the substrate.
  • the first semiconductor material is one of SiC, GaN, and gallium oxide
  • the second semiconductor material is one of SiC, GaN, and gallium oxide.
  • the method for manufacturing a semiconductor device of the present invention includes a second film forming step of forming a second single crystal layer made of a single crystal of a second semiconductor material on a second substrate to be a temporary support substrate, And an element formation step of forming a semiconductor element in the second single crystal layer. For this reason, a multi-layer substrate on which the second single crystal layer is formed using the second substrate as a base is obtained, and can be a substrate for element formation that can withstand high temperatures and has less warpage. Thus, in the element formation step, a semiconductor element can be formed in the second single crystal layer using a general-purpose photolithography apparatus or the like.
  • the method for manufacturing a semiconductor device of the present invention includes a second bonding step of bonding a third substrate on the second single crystal layer on which the semiconductor device is formed, and a substrate removal step of removing the second substrate. And. For this reason, after joining the 3rd board
  • a multilayer substrate in which layers are stacked is obtained, and the amount of the first substrate made of a single crystal of the first semiconductor material (for example, SiC) can be minimized.
  • a single crystal SiC substrate having a high concentration of N-type and having a thickness of about 350 ⁇ m is used as a support layer, and a single crystal having a thickness of about 5 ⁇ m is formed thereon by epitaxial growth.
  • a SiC layer (low-concentration N-type layer) is formed.
  • the substrate is polished and thinned to about 100 ⁇ m in order to reduce the resistance value of the support layer portion, and then the electrode is processed on the back surface of the substrate. .
  • an N-type layer is constituted by the first single crystal layer, and the thickness thereof can be reduced to about 0.5 ⁇ m.
  • a second single crystal layer having a necessary thickness and a necessary impurity concentration can be formed by epitaxial growth or MOCVD (Metal Organic Chemical Vapor Deposition) in terms of the breakdown voltage of the semiconductor element.
  • MOCVD Metal Organic Chemical Vapor Deposition
  • the first single crystal layer is formed on the surface thin film layer formed on the second substrate by separating the first substrate with the hydrogen injection layer in the separation step.
  • the second film forming step leaves a multi-layer substrate in which the surface thin film layer, the first single crystal layer, and the second single crystal layer are sequentially stacked on the second substrate, and the substrate is removed.
  • the substrate when the surface thin film layer is further removed, The substrate can be easily bonded to the second substrate which surface thin film layer is formed.
  • the first substrate can be easily separated in the hydrogen injection layer, and the first single crystal layer having a small thickness can be left on the second substrate. Then, since the surface thin film layer is removed in the substrate removal step, the back electrode of the semiconductor element can be provided on the surface of the first single crystal layer exposed thereby.
  • the second single crystal layer is formed after forming a single crystal buffer layer made of a single crystal of the second semiconductor material.
  • the substrate removing step the single crystal buffer layer is formed In the case of further removal, the crystal defect density of the second single crystal layer formed on the single crystal buffer layer can be lowered.
  • the second substrate used for forming the semiconductor element is removed, and the single crystal buffer layer is also removed. Even if a forward current flows through the PN junction, it is possible to suppress an increase in defects due to minority carrier recombination.
  • the first film formation step when a compound semiconductor film containing a silicon oxide film or Ga is formed on the one plane of the second substrate as the surface thin film layer, the first substrate in the bonding step , Removal of the second substrate in the substrate removal step, and removal of the surface thin film layer after removal of the second substrate can be facilitated. Further, the surface thin film layer and the second single crystal layer laminated thereon can be combined to form a substrate for an element that can withstand high temperatures and has less warpage as a multilayer substrate.
  • a silicon oxide film or a compound semiconductor film containing Ga can be formed as a two-layer surface thin film layer with the first layer as the first layer and the buffer layer as the second layer.
  • the surface thin film layer is used to form the second substrate.
  • the entire surface can be covered, and the second substrate can be protected from high-temperature processing or the like when forming the semiconductor element.
  • the stress on both sides can be balanced, so that a thin multilayer substrate with less warpage can be obtained.
  • the surface thin film layer is formed so that the thickness is uniform up to the plate end on the plane of the second substrate. A film can be formed and bonded to the first substrate without polishing its surface.
  • the second substrate is a light transmitting substrate, and the surface thin film layer is a semiconductor material containing Ga.
  • Ga is deposited by irradiating a laser beam from the second substrate side.
  • the second substrate can be easily removed by laser light irradiation.
  • the removed second substrate can be reused after the residue of the material containing Ga is removed.
  • the second substrate is a substrate made of sapphire or SiC
  • it can be a substrate for element formation that can withstand high temperatures and has less warpage as the base of the multilayer substrate.
  • the second substrate is a substrate made of carbon.
  • the first film formation step when the surface thin film layer is formed so as to cover the side surface of the second substrate, the entire carbon substrate is formed. Since the surface is covered with the surface thin film layer, carbon that burns out in an environment where oxygen exists at a high temperature can be protected. This makes it possible to perform high-temperature heat treatment, film formation containing high-density oxygen, or the like in the element formation process. Further, even if the thickness of the carbon substrate is reduced, the stress on both sides can be balanced, so that a thin multilayer substrate with less warpage can be obtained.
  • the metal substrate serving as a support substrate for the semiconductor element can be used as an electrode terminal for external connection as it is.
  • the metal substrate can be an anode electrode, and the cathode electrode can be formed on the surface from which the second substrate is removed.
  • the semiconductor element is a MOSFET
  • the metal substrate can be used as it is as the source electrode. In these cases, it becomes easy to mount the metal substrate on the mounting substrate after element division.
  • the third substrate is a substrate made of one of alkali-free glass, sapphire, and Si, it is easy to join and is suitable as a support substrate for a semiconductor element.
  • the surface exposed after removing the second substrate first single crystal layer, A back electrode layer can be provided on the buffer layer or the second single crystal layer.
  • an electrode wiring for mounting the semiconductor element is provided in the case where the third substrate is provided with an opening step for forming a through hole to be an electrode portion of the semiconductor element. Can be made easier.
  • the opening step when the through hole is formed in a tapered shape that expands toward the surface side of the third substrate, wiring such as aluminum may be formed on the wall surface of the through hole that becomes a slope.
  • electrical wiring can be formed on the surface of the third substrate.
  • the first semiconductor material is one of SiC, GaN, and gallium oxide
  • the second semiconductor material is one of SiC, GaN, and gallium oxide
  • the first semiconductor material having a large band gap is used. Since the second single crystal layer made of the second semiconductor material having a large band gap is formed on the single crystal layer, SiC elements, GaN elements, gallium oxide elements, etc. suitable for high power applications Can be manufactured. For example, if the first semiconductor material and the second semiconductor material are SiC, a single crystal SiC layer is stacked, which is more preferable.
  • the support substrate is made of one of an insulating material, a semiconductor material, and a metal, and is formed of a single crystal of the second semiconductor material laminated on the support substrate with a bonding layer interposed therebetween.
  • a second single crystal layer is provided, a semiconductor element is formed on the second single crystal layer, and a back electrode layer of the semiconductor element is provided on the second single crystal layer. Since the back surface electrode layer of the semiconductor element is directly formed on the second single crystal layer, it has excellent conductivity. If the buffer layer is formed of a polycrystalline layer containing a high nitrogen concentration, a lower ohmic contact can be obtained.
  • the thickness of the first single crystal layer made of the single crystal of the first semiconductor material is minimized. Therefore, a low-cost semiconductor substrate can be obtained.
  • the second single crystal layer having a necessary thickness and a necessary impurity concentration is formed from the surface of the withstand voltage of the semiconductor element, and the supporting substrate which is a permanent supporting layer of the semiconductor substrate may have an arbitrary thickness. it can.
  • the back electrode layer is provided on the first single crystal layer or on the buffer layer made of a semiconductor material provided on the first single crystal layer. It has excellent thermal conductivity and is suitable for semiconductor devices for high power applications.
  • the first semiconductor material is one of SiC, GaN, and gallium oxide
  • the second semiconductor material is one of SiC, GaN, and gallium oxide
  • the first semiconductor material having a large band gap is used. Since the second single crystal layer made of the second semiconductor material having a large band gap is formed on the single crystal layer, an SiC element, a GaN element, a gallium oxide element, etc. suitable for high power applications The semiconductor substrate on which is formed.
  • Typical sectional drawing which shows the process of removing the 1st layer of a 2nd board
  • Schematic sectional view showing the manufacturing process of Schottky diode Schematic cross-sectional view showing the manufacturing process of MOSFET
  • Typical sectional drawing which shows the manufacturing process of the semiconductor substrate (MOSFET element) using a metal support substrate
  • Schematic cross-sectional view showing the basic structure of a semiconductor substrate Schematic sectional view showing the structure of a semiconductor substrate
  • the semiconductor element manufacturing method uses a semiconductor element suitable for high power applications by using, for example, a carbon substrate, an SiC substrate, or the like as a temporary support substrate (second substrate (2)).
  • a carbon substrate, an SiC substrate, or the like As a temporary support substrate (second substrate (2)).
  • Carbon substrates and SiC substrates have a feature that they can withstand high temperatures with little warping.
  • the carbon substrate (2) or the like is used as a temporary support layer, and a single crystal layer such as SiC (first single crystal layer (11) is provided on one surface of the carbon substrate (2) via a silicon oxide film or the like (41). ))
  • a thin film layer (second single crystal layer (5)) made of a single crystal such as SiC for forming a semiconductor element is formed (see FIGS. 2A and 2B).
  • a polycrystalline film made of SiC or the like can be formed on the other surface of the carbon substrate (2).
  • a semiconductor element can be formed in the second single crystal layer (5) using the multilayer substrate (6) formed on the basis of the carbon substrate (2) or the like in this way. Then, after the formation of the semiconductor element, a substrate (third substrate (3)) to be a final support layer is bonded, and the carbon substrate (2) and the like which are temporary substrates are removed. Thus, a semiconductor substrate in which the third substrate (3) is a permanent support layer and a semiconductor element is formed on the second single crystal layer (5) laminated thereon can be manufactured.
  • a back electrode layer to be a back electrode of the semiconductor element can be formed on the back surface of the semiconductor element (the surface from which the carbon substrate or the like has been removed and the silicon oxide film has been removed).
  • the carbon substrate (2) can have a thermal expansion coefficient substantially the same as that of the second single crystal layer (5) made of SiC and the polycrystalline SiC film (42) made of SiC. If the thickness of the carbon substrate (2) is several mm, a multilayer substrate (6) having high rigidity and no warpage can be obtained.
  • the thickness of the second single crystal layer (5) made of SiC laminated on one surface of the carbon substrate (2) and the thickness of the polycrystalline SiC film (42) formed on the other surface should be made substantially the same. For example, even if the thickness of the carbon substrate (2) is 1 mm or less, a multilayer substrate (6) with little warpage can be obtained.
  • the carbon substrate (2) is formed from the formation of a silicon oxide film or the like (41), the formation of a polycrystalline SiC film (42), the bonding of the first single crystal layer (11), the second single crystal layer (5). It serves as a foundation from film formation to formation of the semiconductor element.
  • the third substrate (3) is bonded to the multilayer substrate (6), the carbon substrate (2) and the silicon oxide film (41) are removed, so that the back surface of the multilayer substrate (6) is removed.
  • the first single crystal layer (11) is exposed, and the back electrode of the semiconductor element can be formed.
  • the third substrate (3) plays the role of the support substrate as a base.
  • the conventional structure see FIG.
  • a single crystal layer for forming a semiconductor element is provided on a thick support substrate made of a single crystal, and the thickness of the support substrate is further reduced.
  • the conventional support substrate can be eliminated, and the thinning step can be eliminated.
  • a high-quality second single crystal layer (5) serving as an active layer of a semiconductor element can be formed on the first single crystal layer (11) made of a single crystal with good crystallinity.
  • a single crystal single crystal buffer layer (52) containing high-concentration nitrogen is formed on a first single crystal layer (11) formed using a carbon substrate (2) or the like as a base, and then a second single crystal layer ( 5) may be formed.
  • the single crystal buffer layer (52) can reduce the crystal defects in the second single crystal layer (5) more than the crystal defects in the first single crystal layer (11).
  • the carbon substrate (2), the silicon oxide film (41), etc. are removed, and the first single crystal layer is further removed.
  • the second single crystal (5) is exposed on the back surface of the multilayer substrate (6), and the back electrode of the semiconductor element is formed on the back surface. be able to.
  • the third substrate (3) that will be the final support layer of the semiconductor element is bonded, and the second substrate (2), which was a temporary substrate, is removed.
  • the third substrate (3) is a metal substrate
  • the third substrate (3) can be used as an electrode terminal for external connection of a semiconductor element.
  • the semiconductor element is a Schottky diode
  • the anode electrode can be used.
  • the source electrode can be used.
  • the second substrate (2) for example, a substrate that transmits laser light, such as a SiC substrate (25) or a sapphire substrate (26), can be used.
  • a substrate that transmits laser light such as a SiC substrate (25) or a sapphire substrate (26)
  • a surface thin film layer for example, a GaN film (413)
  • a semiconductor material containing Ga for example, GaN film (413)
  • the SiC substrate or the sapphire substrate can be repeatedly used as the second substrate (2) after removing the Ga-based thin film.
  • the method of manufacturing a semiconductor device according to this embodiment has a predetermined depth from one plane 101 of the first substrate 1 made of a single crystal of a first semiconductor material. Then, a hydrogen layer forming step for forming the hydrogen injection layer 15 and a first thin film layer 4 made of one or more thin films of an insulating material or a semiconductor material are formed on at least one plane of the second substrate 2. A film forming process, a bonding process for bonding one flat surface 101 of the first substrate 1 and the surface of the surface thin film layer 4 formed on the second substrate 2, and the first substrate 1 to the hydrogen injection layer 15.
  • a second bonding step for bonding the third substrate 3 to the surface of the multilayer substrate 6 on which the semiconductor element is formed, and a substrate removing step for removing the second substrate 2 are provided.
  • the surface thin film layer 41 can be formed on one flat surface 201 of the second substrate 2.
  • the surface thin film layer 42 can be formed on the other plane 202 of the second substrate 2.
  • the second film forming step after forming a single crystal buffer layer 52 made of a single crystal of a second semiconductor material on the surface of the first single crystal layer 11, the second single crystal layer 5 is formed, and the substrate In the removing step, the single crystal buffer layer 52 can be removed after removing the second substrate 2.
  • the single crystal buffer layer 52 can be formed of, for example, a single crystal of a second semiconductor material containing nitrogen at a high concentration.
  • the first substrate 1 is a single crystal SiC substrate.
  • a carbon substrate is used as the second substrate 2
  • the surface thin film layer 41 formed on one surface 201 is a silicon oxide film (SiO 2 ).
  • the material of the surface thin film layer 42 formed on the other surface 202 is preferably the same as that of the second semiconductor material, and the crystallinity thereof is not limited. In the following, it is assumed that the surface thin film layer 42 is a polycrystalline SiC film made of polycrystalline SiC.
  • FIG. 1A is a top view and a side view showing an example of a single crystal SiC substrate 1 that is a base material for the carbon substrate 2, the silicon oxide film 41, the polycrystalline SiC film 42, and the first single crystal layer 11.
  • One plane of the carbon substrate 2 is an upper surface 201
  • the other plane is a lower surface (or back surface) 202
  • the entire side surface is a side surface 203.
  • the silicon oxide film 41 is formed on the upper surface 201 and the side surface 203 of the carbon substrate 2 (the side surface 203 portion is not shown), and the polycrystalline SiC film 42 is formed on the lower surface 202 and the side surface 203 of the carbon substrate 1.
  • the shape of the carbon substrate 2 and the single crystal SiC substrate 1 is not limited, but is preferably a disc-shaped or columnar substrate.
  • the sizes of the carbon substrate 2 and the single crystal SiC substrate 1 are not limited, but the carbon substrate 2 is made slightly larger than the single crystal SiC substrate 1 in terms of handling.
  • the diameter of the carbon substrate 2 is preferably about 1 to 10 mm larger than the diameter of the single crystal SiC substrate 1. For example, when the single crystal SiC substrate 1 has an outer diameter of 6 inches (about 150 mm), the carbon substrate 2 may have an outer diameter of about 160 mm.
  • the surface of the silicon oxide film 41 provided on the surface 201 of the carbon substrate 2 and the lower surface 101 of the single crystal SiC substrate 1 are bonded.
  • FIG. 1B shows an example in which a SiC substrate (or sapphire substrate) 25 is used as the second substrate, and a GaN film 413 is formed as a surface thin film layer on one surface 201 thereof. Since SiC is stable in an atmosphere such as oxygen, it is not necessary to form a surface thin film layer on the lower surface 202. In the bonding step, the surface of the GaN film 413 formed on the SiC substrate 25 and the lower surface 101 of the single crystal SiC substrate 1 are bonded.
  • the diameter of SiC substrate 25 is preferably about 1 mm larger than the diameter of single crystal SiC substrate 1.
  • FIG. 2A and 2B show a surface thin film layer 41, a first single crystal layer (single crystal SiC layer) 11, and a second single crystal layer (single crystal SiC layer) on one surface 201 of the carbon substrate 2.
  • FIG. FIG. 5 is a schematic cross-sectional view showing a multilayer substrate 6 in which 5 and 5 are sequentially stacked.
  • the multilayer substrate 6 (6a) shown in FIG. 2A has a silicon oxide film 41, a first single crystal layer 11, and a second single crystal layer 5 as a surface thin film layer on the upper surface 201 of the carbon substrate 2.
  • the polycrystalline SiC film 42 is formed on the other surface (lower surface) 202 of the carbon substrate 2.
  • the silicon oxide film 41 is formed on the upper surface 201 and the side surface 203 of the carbon substrate 2, and then the polycrystalline SiC film 42 is formed on the lower surface 202 and the side surface 203 of the carbon substrate 2. Be filmed. Then, the carbon substrate 2 and the first single crystal layer 11 (single crystal SiC substrate 1) are bonded via the silicon oxide film 41, and further, an SiC layer (covering the upper surface 201 side and the side surface 203 side of the carbon substrate 2). 5, 51) are formed to form the multilayer substrate 6a.
  • the diameter of the first substrate 1 is smaller than the diameter of the carbon substrate 2, so that the second surface made of single crystal is formed on the upper surface of the first single crystal layer 11.
  • the single crystal layer 5 is formed, and a polycrystal layer (on the outer peripheral portion exceeding the diameter of the first single crystal layer 11 (that is, the diameter of the first substrate 1) and the side surface 203 side of the carbon substrate 2 ( The second polycrystalline layer) 51 is formed.
  • the surface thin film layer formed on one surface 201 of the second substrate 2 can be composed of two thin films.
  • the multilayer substrate 6 (6b) shown in FIG. 2 (b) is different from the multilayer substrate 6a shown in FIG. 2 (a) in that the surface thin film layer formed on the upper surface 201 of the carbon substrate 2 consists of two layers. Different.
  • a silicon oxide film 41 is formed as a first layer on the upper surface 201 of the carbon substrate 2
  • a SiC layer is formed as a second layer (buffer layer made of a semiconductor material) thereon. .
  • This SiC layer is made of polycrystal.
  • the multilayer substrate 6b provided with the buffer layer is formed on the upper surface 201 of the carbon substrate 2 with a buffer layer 412 made of a silicon oxide film 41 and SiC polycrystal as a surface thin film layer, a first single crystal layer 11 and a second single crystal.
  • the layer 5 is sequentially formed, and the polycrystalline SiC film 42 is formed on the other surface (lower surface) 202 of the carbon substrate 2.
  • the side surface 203 side of the carbon substrate 2 is covered with a silicon oxide film 41, a buffer layer 412 made of SiC polycrystal, and a polycrystalline SiC film 42.
  • the buffer layer 412 may be a high-concentration polycrystalline SiC layer.
  • a polycrystalline SiC layer having a high nitrogen concentration By using a polycrystalline SiC layer having a high nitrogen concentration, ohmic contractability can be improved when a back electrode is formed later.
  • a potential barrier is generated between the polycrystalline SiC layer having a high nitrogen concentration and the first single crystal layer 11 due to a difference in the bandwidth, thereby hindering ohmic connection.
  • a very thin surface layer of the first single crystal layer 11 may be set to a high nitrogen concentration before bonding.
  • FIG. 2C shows a multi-layer substrate 6 (6c) in which a SiC substrate (or sapphire substrate) 25 is used as the second substrate and a GaN film 413 is formed as a surface thin film layer on one surface 201 thereof. Is shown.
  • the multilayer substrate 6 c is configured by forming a GaN film 413, the first single crystal layer 11, and the second single crystal layer 5 in this order on the upper surface 201 of the SiC substrate 25.
  • the second single crystal layer 5 is formed, the second polycrystalline layer 51 is formed at the periphery.
  • a single crystal buffer layer 52 made of SiC single crystal containing nitrogen at a high concentration is formed in the multilayer substrate 6 (6a, 6b, 6c).
  • a single crystal buffer layer 52 made of SiC single crystal containing nitrogen at a high concentration is formed in the multilayer substrate 6 (6a, 6b, 6c).
  • FIG. 2D a single crystal buffer layer 52 made of a single crystal of the second semiconductor material is formed on the surface of the first single crystal layer 11, and then the second single crystal layer 5 is formed.
  • a layer substrate 6 (6d) is shown.
  • FIG. 2E shows a GaN film 413, a high nitrogen concentration polycrystalline SiC layer 53 as a buffer layer, the first single crystal layer 11, and the second single crystal layer 5 on the upper surface 201 of the SiC substrate 25. Shows a multilayer substrate 6 (6e) that is formed in order.
  • the ohmic contractability can be improved when the back electrode is formed later.
  • a potential barrier is generated between the polycrystalline SiC layer 53 having a high nitrogen concentration and the first single crystal layer 11 due to the difference in the bandwidth, thereby hindering ohmic connection.
  • a very thin surface layer of the first single crystal layer 11 may be set to a high nitrogen concentration before bonding.
  • the first substrate 1 is made of a single crystal of a first semiconductor material.
  • the first semiconductor material is not limited to SiC, and, for example, SiC, GaN, gallium oxide, or the like can be employed.
  • the first semiconductor material is the material of the second single crystal layer 5. It is preferably the same as a certain second semiconductor material or SiC.
  • the hydrogen layer forming step is a step of forming the hydrogen injection layer 15 at a predetermined depth from the lower surface 101 of the first substrate 1.
  • the hydrogen implantation layer 15 can be formed by implanting hydrogen ions at the predetermined depth (for example, a depth of about 0.2 to 1.5 ⁇ m, preferably about 0.5 ⁇ m).
  • a silicide layer can be formed in advance on the surface of the first single crystal layer 11 on the second substrate side.
  • a silicide layer is formed on the lower surface 101 of the first substrate 1 before bonding to the second substrate. In this way, the silicidation process when the second substrate is removed later to form the back electrode layer of the semiconductor element can be omitted.
  • the first film forming step is a step of forming a surface thin film layer 4 made of a thin film of an insulating material or a semiconductor material on at least one plane of the second substrate 2.
  • the insulating material or the semiconductor material to be used may be appropriately selected according to the bonding property with the first substrate 1 and the necessity of protection of the second substrate 2, for example, silicon oxide (SiO 2 ), SiC, GaN, etc. can be mentioned.
  • SiO 2 silicon oxide
  • SiC SiC
  • GaN GaN
  • the silicon oxide film 41 or the buffer layer 412 made of the silicon oxide film 41 and SiC is formed on the one plane 201 of the carbon substrate 2 as the surface thin film layer 4. To be able to.
  • a polycrystalline SiC film (42) can be formed on the other flat surface 202 of the carbon substrate 2. Any of the surface thin film layers 41, 412 and 42 may be formed first. When the surface thin film layers (41, 412, and 42) are formed, the same thin film layers (41, 412, and 41) are also formed on the side surface 203 side of the second substrate 2. When a sapphire substrate is used as the second substrate 2, a GaN film or a silicon oxide film can be formed on the one surface 201 as the surface thin film layer 4. Since the sapphire substrate does not need to be protected from the heat treatment in the element formation process, it is not necessary to form the surface thin film layer 4 on the other plane 202 and side surface 203.
  • a semiconductor layer for example, a GaN film or a Ga oxide film
  • Ga can be formed as the surface thin film layer 4 on one plane 201 of the SiC substrate 25. Since it is not necessary to protect the SiC substrate 25 from the heat treatment in the element formation process, it is not necessary to form the surface thin film layer 4 on the other plane 202 and the side surface 203. Further, the sapphire substrate and the SiC substrate are rigid and warpage is suppressed.
  • a process of raising the temperature to about 1700 ° C. is necessary to activate impurities such as nitrogen, phosphorus, and aluminum.
  • a carbon substrate can be used as the second substrate 2 as a base for forming the semiconductor element.
  • Carbon is a material that can withstand such high temperatures in an inert gas. However, carbon burns out at 400 ° C. or higher when oxygen is present. In order to protect such carbon, a method of covering the entire surface of the carbon substrate 2 can be employed.
  • the polycrystalline SiC film 42 is formed so as to cover the upper surface 201 and the side surface 203 of the carbon substrate 2 with the silicon oxide film 41 and cover the lower surface 202 and the side surface 203 side of the carbon substrate 2. It is preferable to form a film. Further, in the subsequent process, the upper surface 201 side and the side surface 203 side of the carbon substrate 2 are covered with a thin film layer (second single crystal layer 5 and second polycrystalline layer 51) made of the second semiconductor material. In this way, the entire surface of the carbon substrate 2 is covered with the polycrystalline SiC film 42, the second single crystal layer 5, the second polycrystalline layer 51, etc., and the carbon substrate 2 is not exposed to the outside. The existing high temperature processing can be performed.
  • the warp of the carbon substrate 2 can be extremely reduced.
  • the thickness of the polycrystalline SiC film 42 formed on the back surface 202 of the carbon substrate 2 is formed on the upper surface 201 side of the carbon substrate 2 for the purpose of covering the carbon substrate 2 and reducing warpage of the multilayer substrate 6.
  • a thickness necessary for balancing so as not to cause warpage for example, about 1 to 10 ⁇ m
  • the thickness of the carbon substrate 2 can be set to a minimum thickness (for example, about 250 to 1000 ⁇ m) necessary for suppressing warpage and facilitating handling.
  • FIG. 3 is a cross-sectional image of the edge of the substrate when the carbon substrate 2 is covered with the silicon oxide film 41 and the polycrystalline SiC film 42.
  • the silicon oxide film 41 is formed on the upper surface 201 of the carbon substrate 2 using a thermal CVD apparatus, the silicon oxide film 41 is also formed on the side surface 203 side of the carbon substrate 2.
  • the polycrystalline SiC film 42 is formed on the lower surface 202 of the carbon substrate 2 from above with the silicon oxide film 41 face down, the polycrystalline SiC film 42 is also formed on the side surface 203 side of the carbon substrate 2.
  • a boundary 43 between the polycrystalline SiC film 42 and the silicon oxide film 41 is indicated by a broken line.
  • the corner of the end of the carbon substrate 2 is chamfered (beveled). It is preferable that the thickness and thickness of the silicon oxide film 41 and the polycrystalline SiC film 42 be uniform until reaching the end of the carbon substrate 2 by appropriately determining the shape and size of the chamfer.
  • the bonding step the lower surface 101 of the first substrate (single crystal SiC substrate) 1 and the surface of the surface thin film layer 4 (silicon oxide film 41) formed on the second substrate (carbon substrate) 2 are bonded. It is a process.
  • the bonding method is not particularly limited, and for example, both surfaces can be activated and bonded with an argon beam or the like.
  • the surface thin film layer 4 the silicon oxide film 41 and the buffer layer 412 made of SiC
  • the second substrate is the SiC substrate 25 (or sapphire substrate) and the GaN film 413 is formed as the surface thin film layer 4, the lower surface 101 of the first substrate 1 and the SiC substrate 25 are formed on the bonding step.
  • the surface of the GaN film 413 formed on the surface is joined.
  • the bonding method is not particularly limited, and for example, both surfaces can be activated and bonded with an argon beam or the like.
  • the separation step separates the first substrate at a predetermined depth from the bonding surface with the second substrate, that is, the lower surface 101 of the first substrate, so that the lower surface side of the first substrate becomes the first single crystal.
  • the first substrate (single crystal SiC substrate) 1 can be separated by the hydrogen injection layer 15.
  • the lower surface 101 side of the separated first substrate 1 is left as the first single crystal layer 11 on the surface thin film layer 4 (silicon oxide film 41) formed on the second substrate (carbon substrate) 2. be able to.
  • Separation in the hydrogen injection layer 15 is possible by raising the temperature of the bonded substrate.
  • the first substrate 1 is a single crystal SiC substrate
  • blisters are generated in the hydrogen injection layer 15 at 900 to 1000 ° C., and the single crystal SiC substrate 1 is separated with the hydrogen injection layer 15 as a boundary.
  • the second substrate is the SiC substrate 25 (or sapphire substrate) and the GaN film 413 is formed as the surface thin film layer 4.
  • the second film forming step is a step of forming a second single crystal layer 5 made of a single crystal of a second semiconductor material on a second substrate which is a temporary support substrate. Specifically, the second single crystal layer 5 made of a single crystal of the second semiconductor material is formed on the surface of the first single crystal layer 11 formed on the second substrate 2 (25). Can do.
  • the second semiconductor material is not particularly limited, and for example, one of SiC, GaN, gallium oxide, and the like can be employed.
  • a single crystal SiC layer (second single crystal layer) formed by forming a silicon oxide film 41 and a single crystal SiC layer (first single crystal layer) 11 on the carbon substrate (second substrate) 2 is formed.
  • a multilayer substrate 6 in which a crystal layer 5) is laminated in order can be obtained.
  • the single crystal layer 5 of the second semiconductor material is formed on the first single crystal layer 11, and the portion where the first single crystal layer 11 does not exist (that is, the second substrate 2).
  • the polycrystalline layer 51 of the second semiconductor material is formed on the outer peripheral portion where the first single crystal layer 11 is not present on the upper surface 201 side and on the side surface 203 side of the second substrate 2.
  • the first single crystal layer 11 having good crystallinity is suitable as a base for the second single crystal layer 5 formed thereon.
  • a specific film forming method of the second single crystal layer 5 is not particularly limited.
  • the second single crystal layer 5 can be formed on the first single crystal layer 11 by epitaxial growth.
  • the film can be formed by the MOCVD method. Since the second single crystal layer 5 is formed on the first single crystal layer 11 having good crystallinity, the second single crystal layer 5 can be a high-quality single crystal layer and is suitable for forming a semiconductor element. The thickness of the second single crystal layer 5 only needs to be a thickness necessary for forming an active layer of a semiconductor element (about 5 to 10 ⁇ m when the second semiconductor material is SiC). Through the above steps, the multilayer substrate 6 shown in FIG. 2 is formed.
  • a single crystal single crystal buffer layer 52 containing nitrogen at a high concentration is formed on the first single crystal layer 11, and then the second single crystal layer 5 having a low nitrogen concentration is epitaxially grown. You can also.
  • the element forming step is a step of forming the semiconductor element 7 on the second single crystal layer 5 which is the surface layer of the multilayer substrate 6 obtained by the second film forming step.
  • the process of forming the semiconductor element is a process of forming an impurity region, an insulator region, a surface electrical wiring region, and the like necessary for configuring the target semiconductor device 7 such as a Schottky diode, MOSFET, JFET, and the like. (See FIGS. 11 and 12). Since the multilayer substrate 6 is prevented from being bent or warped by the thickness of the carbon substrate 2 or the balance of the thin films formed on both surfaces thereof, the semiconductor element 7 can be formed using a general-purpose photolithography apparatus. When the second substrate is a SiC substrate or a sapphire substrate, bending and warping of the multilayer substrate 6 are suppressed by the rigidity of the SiC substrate or sapphire substrate itself.
  • the second bonding step is a step of bonding the third substrate 3 to the surface of the multilayer substrate 6 on which the semiconductor element 7 is formed in the element forming step on the second single crystal layer 5 side.
  • the bonding method of the third substrate 3 is not particularly limited, and for example, the third substrate 3 and the surface of the second single crystal layer 5 on which the semiconductor element 7 is formed are connected through an appropriately selected adhesive layer 34 or the like. (See FIGS. 6 and 8).
  • a substrate (31) made of an insulating material such as non-alkali glass or sapphire can be used.
  • a substrate using a semiconductor material such as a Si substrate (32) can also be used.
  • an adhesive layer 34 coated with a photocurable adhesive is provided on the surface of the second single crystal layer 5 in which the element forming process has been completed, and on that, The third substrate 31 can be bonded and bonded by ultraviolet curing.
  • a TEOS oxide film Tetra Ethyl Ortho Silicate oxide film
  • Bonding is possible by plasma activation or the like.
  • the bonding layer 34 and the metal bonding layer 38 are provided on the surface of the second single crystal layer 5 on which the semiconductor element 7 is formed, and the metal substrate 33 is bonded thereon. (See FIG. 6C and FIG. 8C).
  • the metal bonding layer 38 may be formed by sputtering a metal such as Ni, forming a thick plating layer, and flattening the thick plating layer and then bonding the metal substrate 33 to the metal. When the metal substrate 33 is used, the following opening process is not necessary.
  • an opening step of forming a through hole that becomes an electrode portion of the semiconductor element 7 in the third substrate 3 can be provided.
  • the opening step is a step of forming through holes (36, 37) in the third substrate 3 after bonding the multilayer substrate 6 and the third substrate 3 (31, 32) in the second bonding step. (See FIGS. 6 and 8).
  • the third substrate 3 is made of alkali-free glass, sapphire, or the like, a through hole can be provided in a necessary portion as an electrode portion by photolithography.
  • the third substrate 3 is a semiconductor material such as Si, a through hole can be provided by photolithography.
  • a taper having an angle of 54 degrees can be formed by setting the surface orientation of Si to 100 and etching with KOH liquid. If this taper is used to form an electrode on the surface of the Si substrate later, the electrode of the semiconductor element can be guided to the surface of the Si substrate. This opening step can also be performed after removing the second substrate 2 from the multilayer substrate 6.
  • the substrate removing step is a step of removing the second substrate (carbon substrate) 2 from the multilayer substrate 6 bonded to the third substrate 3 (see FIGS. 9 and 10).
  • a specific method for removing the substrate is not particularly limited. For example, when the lower surface 202 of the carbon substrate 2 is covered with the polycrystalline SiC film 42, first, the peripheral portion of the multilayer substrate 6 (at least the second polycrystalline layer 51 formed on the side surface 203 side of the carbon substrate 2). Then, the silicon oxide film 41 and the polycrystalline SiC film 42) are cut and removed to expose the side surface portion 203 ′ of the carbon substrate 2. Thereafter, the carbon substrate 2 is removed by incineration or the like. Carbon can be easily incinerated by raising the temperature to about 500 ° C. After the carbon substrate 2 is removed, the remaining surface thin film layer (silicon oxide film) 41 can be removed by acid or dry etching.
  • the substrate removal step when the second substrate 2 is a sapphire substrate or a SiC substrate 25 and the surface thin film layer is a GaN film 413, the GaN film is irradiated by irradiating laser light from the second substrate 2 side. Ga can be deposited from 413 and the second substrate 2 can be easily removed. The removed second substrate 2 can be reused as the second substrate 2 after the surface thin film layer is removed by etching or the like.
  • the surface thin film layer 4 remaining after the removal of the second substrate 2 carbon substrate, SiC substrate, etc.
  • the first single crystal layer 11 may be further removed.
  • the second substrate 2 and the surface thin film layer 41 are removed. Then, the first single crystal layer 11 is exposed on the back side of the semiconductor element 7. In this case, the first single crystal layer 11 and the single crystal buffer layer 52 may be removed.
  • the specific removal method is not particularly limited, and can be removed by polishing such as CMP.
  • the back electrode forming step is a step of forming the back electrode layer 8 (81, 82) on the back surface of the semiconductor element 7, that is, the surface from which the second substrate 2 and the surface thin film layer 41 are removed (see FIG. 9). .
  • the first single crystal layer 11 is exposed on the back surface side of the semiconductor element 7.
  • a metal thin film for silicide such as Ni is formed on the back surface of the semiconductor element 7 and then silicidation is performed at the interface between the first single crystal layer 11 and the metal such as Ni at a high temperature.
  • the silicide layer 81 can be formed.
  • the metal layer 82 can be formed by copper plating or silver plating.
  • the silicide layer 81 and the metal layer 82 can be formed even if the substrate is warped.
  • the silicidation process may be performed before the element formation process (silicide layer formation process). That is, an ultrathin Ni thin film is formed on one surface 101 of the first substrate 1 before bonding to the second substrate 2. Then, heat treatment is performed to form a silicide layer on one surface 101 of the first substrate 1, and then the Ni thin film layer is removed. Thereafter, one surface 101 of the first substrate 1 whose surface is silicided and the second substrate 2 are bonded. Through the subsequent steps, the silicide layer on one surface 101 of the first substrate 1 is exposed in a state where the second substrate 2 and the surface thin film layer 41 are removed after the bonding of the third substrate 3. A metal layer 82 can be formed on the exposed silicide layer by copper plating or silver plating in the back electrode forming step.
  • the back electrode layer 8 includes the second single crystal layer 5 exposed by removing the single crystal buffer layer 52. Formed on the surface.
  • a carbon substrate 2 having a thickness of about 0.5 mm is used as the second substrate, and the thermal expansion coefficient thereof is adjusted to be approximately the same as that of polycrystalline SiC.
  • the coefficient of thermal expansion of carbon can be adjusted by adjusting the density and firing temperature.
  • the carbon substrate 2 is a high-purity material with a metal density as an impurity being as low as 10 10 / cm 3 or less.
  • the first substrate is a single crystal SiC substrate 1.
  • FIG. 4 shows a manufacturing process of the multilayer substrate 6 shown in FIG.
  • the first substrate 1 is made of single crystal SiC
  • the second single crystal layer 5 is also made of SiC.
  • FIG. 4A shows the substrate 61 in which the silicon oxide film 41 is formed on the upper surface 201 and the side surface 203 of the carbon substrate 2 and the polycrystalline SiC film 42 is formed on the lower surface 202 and the side surface 203 side of the carbon substrate 2.
  • FIG. 2B shows a state in which the hydrogen implantation layer 15 is formed by implanting hydrogen ions from the lower surface 101 of the single crystal SiC substrate 1 to a depth of 0.5 ⁇ m.
  • the amount of hydrogen ions is about 1 ⁇ 10 17 / cm 2
  • the hydrogen density of the hydrogen injection layer 15 is a high concentration of about 1 ⁇ 10 22 / cm 3 .
  • the plane 101 side from the hydrogen injection layer 15 becomes the first single crystal layer 11 made of single crystal SiC.
  • FIG. 2C shows a state where the substrate 61 and the single crystal SiC substrate 1 are bonded.
  • the surface of the silicon oxide film 41 formed on the surface of the carbon substrate 2 and the flat surface 101 of the single crystal SiC substrate 1 are joined after activating both surfaces.
  • FIG. 4D shows a state in which the single-crystal SiC substrate 1 is separated with the hydrogen injection layer 15 as a boundary by bringing the bonded substrates to a high temperature of about 1000 ° C.
  • the base material side of the SiC substrate 1 is not shown.
  • the first single crystal layer 11 is laminated on the surface of the silicon oxide film 41 formed on the carbon substrate 2 to form a substrate 62.
  • the second single crystal layer 5 is formed by epitaxially growing single crystal SiC on the surface of the first single crystal layer 11 of the substrate 62. Simultaneously with the formation of the second single crystal layer 5, a polycrystal grows on the peripheral portion on the silicon oxide film 41 where the first single crystal layer 11 does not exist and on the side surface side (on the polycrystalline SiC film 42) of the carbon substrate 2. Then, the second polycrystalline layer 51 having the same thickness as the second single crystal layer 5 is formed.
  • the thickness of the second single crystal layer 5 varies depending on the material and application, and in the case of SiC, is approximately 5 ⁇ m (withstand voltage of 600 V) to 10 ⁇ m (withstand voltage of 1500 V).
  • a single crystal buffer layer 52 may be formed after the substrate 62 shown in FIG. 6D is formed and before the second single crystal 5 is epitaxially grown (see FIG. 2D).
  • FIG. 5 shows an example in which a Schottky diode 71 is formed as the semiconductor element 7 in the second single crystal layer 5.
  • FIG. 4A shows only one element portion (A portion) formed on the multilayer substrate 6, and FIG. 5B is an enlarged view of the one element portion.
  • FIG. 7 shows an example in which a MOSFET 75 is formed as the semiconductor element 7 in the second single crystal layer 5.
  • FIG. 4A shows only one element portion (A portion) formed on the multilayer substrate 6, and FIG. 5B is an enlarged view of the one element portion. 5 and 7, the detailed structure of the element portion is omitted.
  • FIGS. 5A and 5B show examples in which the carbon substrate 2 is used as the second substrate and the surface thin film layers 41 and 42 are formed.
  • FIG. 5C shows an example in which the SiC substrate 25 is used as the second substrate, and the Schottky diode 71 is formed with the surface thin film layer as the GaN film 413.
  • FIGS. 7A and 7B show an example in which the carbon substrate 2 is used as the second substrate and the surface thin film layers 41 and 42 are formed.
  • FIG. 7C shows an example in which the SiC substrate 25 is used as the second substrate, and the MOSFET 75 is formed with the surface thin film layer as the GaN film 413. The illustrated through electrode 85 will be described later.
  • the third substrate 3 serving as a permanent support substrate for the semiconductor element 7 is bonded to the surface of the multilayer substrate 6 on the second single crystal layer 5 side.
  • an insulating material such as alkali-free glass or sapphire, or a semiconductor material such as Si can be used.
  • an opening process for forming a through hole for forming the electrode portion of the semiconductor element 7 in the third substrate 3 can be performed.
  • FIG. 6 shows a second bonding step and an opening step in the case where an alkali-free glass substrate 31 is used as the third substrate 3.
  • a photo-curing adhesive layer 34 is coated as a bonding layer on the surface of the multilayer substrate 6 (see FIG. 5) on the second single crystal layer 5 side where a Schottky diode 71 is formed in the A part.
  • attached the alkali free glass substrate 31 through the joining layer is shown.
  • the photocurable adhesive layer 34 is cured by irradiation with ultraviolet light.
  • FIG. 2B shows a state in which a through-hole 36 for forming an electrode portion of a semiconductor element is provided in the alkali-free glass substrate 31.
  • the through hole 36 can be formed by photolithography.
  • the surface electrode of the Schottky diode 71 can be electrically connected to an external package through the through hole 36 by wire bonding or the like.
  • a metal substrate 33 can be used as the third substrate 3.
  • This figure shows an example in which the SiC substrate 25 (or sapphire substrate) is used as the second substrate and the surface thin film layer is the GaN film 413, but the carbon substrate 2 is used and the surface thin film layers 41, 42 are used. May be formed.
  • the element surface of the Schottky diode 71 is protected by a silicon oxide film, the anode electrode part is opened by photolithography, a nickel thin film is formed on the entire surface, and if necessary, the film is increased by plating to form a metal bonding layer 38 is formed.
  • the metal substrate 33 can be used as an anode electrode for external connection.
  • FIG. 8 shows a second bonding step and an opening step when the Si substrate 32 is used as the third substrate 3.
  • a TEOS oxide film 35 is formed as a bonding layer on the surface of the second single crystal layer 5 side of the multilayer substrate 6 (see FIG. 7) in which the MOSFET 75 is formed in the A part, and the TEOS oxide film 35 is formed thereon.
  • the state which joined Si substrate 32 is shown.
  • the TEOS oxide film 35 and the Si substrate 32 can be bonded after the surfaces to be bonded are planarized and activated by plasma irradiation.
  • FIG. 4B shows a state in which a through hole 37 for forming an electrode portion of a semiconductor element is provided in the Si substrate 32.
  • the through hole 37 can be formed by photolithography.
  • the through hole 37 is formed with a taper angle of 54 degrees.
  • the wall surface of the through-hole 37 can be a gentle slope with an inclination angle of 54 degrees.
  • an electrode can be formed on the surface of the Si substrate 32. It is also possible to provide a heat sink on the upper surface of the Si substrate 32.
  • a metal substrate 33 can be used as the third substrate 3.
  • This figure shows an example in which a SiC substrate (or sapphire substrate) 25 is used as the second substrate, and the surface thin film layer is a GaN film 413.
  • the surface thin film layers 41 and 42 may be formed using the carbon substrate 2.
  • An interconnection layer 36 for performing necessary electrical wiring is formed on the element surface of the MOSFET 75.
  • the interconnect layer 36 also serves as the bonding layer 34.
  • a metal junction layer 38 electrically connected to the source of the MOSFET 75 is formed on the surface of the interconnect layer 36.
  • FIG. 9 shows a process of forming the back electrode layer 8 (81, 82) to be the back electrode of the semiconductor element 7 after forming the semiconductor element 7 on the multilayer substrate 6 and bonding the third substrate 3.
  • FIG. 9A is the same view as FIG. 6B, and the portion A shows a portion corresponding to one semiconductor element.
  • the outer peripheries of the circular single crystal layers 11 and 5 in a top view are represented by boundaries z1-z1 ′ and z2-z2 ′, and the boundary is defined by performing a circle cut along these boundaries. Remove excess substrate periphery.
  • FIG. 9B shows a state in which the outer peripheral portion has been removed by performing a circle cut along the boundary.
  • the side surface 203 ′ of the cut carbon substrate 2 is exposed. If the carbon substrate 2 is removed by incineration in an oxygen atmosphere and the silicon oxide film 41 is removed by etching, the back surface of the first single crystal layer (single crystal SiC layer) 11 is exposed. Therefore, as shown in FIG. 3C, Ni is deposited on the exposed surface of the single crystal SiC layer 11 in an extremely thin manner, and silicide is formed by siliciding the interface between Ni and the single crystal SiC layer by laser annealing. Layer 81 is formed. Then, a metal layer 82 to be a back electrode can be formed on the silicide layer 81 by plating. In addition, when the silicide layer 81 is formed in advance on the surface of the first single crystal layer 11 on the second substrate 2 side, the metal layer 82 serving as the back electrode can be formed by direct plating.
  • FIG. 10 removes the second substrate 2 and the first layer 41 of the surface thin film layer from the multilayer substrate 6 (6b) shown in FIG. 2B, and forms the back electrode layer 8 (81, 81) on the buffer layer 412. 82).
  • a silicon oxide film 41 and a buffer layer 412 made of SiC are formed as a surface thin film layer on the upper surface of the carbon 2.
  • FIG. 10A shows the semiconductor element 7 formed on the multilayer substrate 6 (6b), the third substrate 3 is bonded, and the outer periphery along the boundaries z1-z1 ′ and z2-z2 ′ as in the previous figure. This shows a state in which the outer peripheral portion of the substrate beyond the boundary is removed by circle cutting. A part corresponds to one semiconductor element.
  • the side surface 203 'of the cut carbon substrate 2 is exposed.
  • the buffer layer 412 made of SiC polycrystal is exposed. Therefore, as shown in FIG. 6B, Ni is deposited on the exposed buffer layer 412 to be extremely thin, and the silicide layer 81 is formed by siliciding between the Ni and the single crystal SiC layer 11 by laser annealing. Form. Then, a metal layer 82 to be a back electrode can be formed on the silicide layer 81 by plating.
  • the buffer layer 412 made of SiC polycrystal formed as the surface thin film layer becomes a thermal buffer layer to the aluminum electrode of the semiconductor element 7 when the electrode interface becomes high temperature by laser annealing.
  • the silicide layer 81 can be formed by siliciding the interface between the first single crystal layer 5 and the second single crystal layer 5.
  • the silicide layer 81 and the metal layer 82 serving as the back electrode can be formed.
  • the metal substrate 33 is used as the third substrate 3 (see, for example, FIG. 6C)
  • the silicide layer 81 and the metal layer 82 to be the back electrode can be formed in the same manner.
  • the surface of the single-crystal SiC layer 11 to be silicided may be ion-implanted immediately before it to obtain a high nitrogen concentration.
  • a very thin high nitrogen concentration layer may be provided in advance on the surface layer.
  • an extremely thin high nitrogen concentration layer can be formed on the lower surface 101 of the first substrate 1 before being bonded to the second substrate 2 in the bonding step.
  • a semiconductor substrate for forming a vertical element for high power use vertical electrical conductivity and thermal conductivity are important.
  • the resistance between the first single crystal layer 11 and the metal layer 82 serving as the back electrode is important, but this resistance is eliminated by silicidation. .
  • the carbon substrate 2 is removed, the electric resistance of the support layer is substantially minimized. The same applies to thermal conductivity, and the carbon substrate 2 is removed to form only the metal layer 82, so that thermal conduction is not hindered.
  • FIG. 11 shows a process of forming the Schottky diode element 71 on the second single crystal layer 5 formed on the surface layer of the multilayer substrate 6.
  • the first substrate 1 is single crystal SiC.
  • FIG. 11A shows the multilayer substrate 6 shown in FIG. 2 in a simplified manner, and the first single crystal layer 11 and the polycrystalline SiC layer 51 are not shown.
  • a portion in the figure is a region corresponding to one semiconductor element in the multilayer substrate 6.
  • the A portion is shown in an enlarged manner, and represents a process of forming one element.
  • an SiO 2 film is formed on the surface of the N-type second single crystal layer 5, and a mask 701 is formed by opening necessary portions by photolithography.
  • P-type impurities are ion-implanted into the opening of the mask 701 while being heated to about 500 ° C., and then the mask 701 is removed.
  • a P-type impurity region 711 is formed in the surface layer portion of the second single crystal layer 5 as shown in FIG.
  • a SiO 2 film is formed on the surface of the second single crystal layer 5, and a mask 702 is formed by opening necessary portions by photolithography.
  • a SiO 2 film having a thickness of about 1 ⁇ m is formed on the surface of the second single crystal layer 5 by thermal CVD, and a portion to be an electrode is removed by etching and opened.
  • an SiO 2 interlayer insulating film 713 is formed on the second single crystal layer 5 as shown in FIG.
  • the electrode film 714 is formed by patterning. In this state, a Schottky interface is formed by instantaneously raising the temperature to over 1000 ° C. by lamp annealing or the like.
  • the electrode film 714 can be further increased using aluminum or the like.
  • a multilayer substrate on which the main part of the Schottky diode 71 is formed is obtained.
  • the back electrode is formed on the surface of the first single crystal layer 11 exposed by removing the carbon substrate 2 and the silicon oxide film 41 in the same manner as the example shown in FIG.
  • a Schottky diode 71 having a vertical structure can be formed.
  • the bonding layer 34 and the metal bonding are formed on the surface of the second single crystal layer 5 on which the semiconductor element 71 is formed.
  • a layer 38 can be provided on which the metal substrate 33 can be bonded.
  • the metal bonding layer 38 can be formed by forming a thick plating layer on a metal such as Ni by sputtering and planarizing the surface of the plating layer.
  • the metal bonding layer 38 and the metal substrate 33 can be directly bonded by intermetal bonding.
  • FIG. 12 shows a step of forming the MOSFET element 75 on the second single crystal layer 5 formed on the surface layer of the multilayer substrate 6.
  • the first substrate 1 is single crystal SiC.
  • FIG. 12A shows the multilayer substrate 6 shown in FIG. 2 in a simplified manner, and the first single crystal layer 11 and the polycrystalline SiC layer 51 are not shown.
  • a portion in the figure is a region corresponding to one semiconductor element in the multilayer substrate 6.
  • the A portion is shown in an enlarged manner, and represents a process of forming one element.
  • a SiO 2 film is formed on the surface of the N-type second single crystal layer 5, and a mask is formed by opening necessary portions by photolithography.
  • FIG. 5B shows a state in which a P well 751, a source part 752, a drain part 753, and the like are formed.
  • an annealing process is performed at a high temperature to activate these impurities.
  • the second single crystal layer 5 is SiC
  • annealing is performed at about 1700 ° C.
  • a SiO 2 film having a thickness of about 1 ⁇ m is formed on the surface of the second single crystal layer 5 by thermal CVD, and a portion to be an electrode is removed by etching and opened.
  • the insulating film is partially removed by etching around the gate portion 755.
  • an interlayer insulating film 754 is formed on the second single crystal layer 5 as shown in FIG. The figure shows a state before the generation of the gate oxide film.
  • a gate oxide film 756 is formed as shown in FIG.
  • the gate oxide film 756 can be formed in an oxygen atmosphere because the carbon substrate 2 is completely covered with the polycrystalline SiC layers 42 and 51.
  • the contact portion is opened.
  • a gate metal is formed in a region where the gate oxide film 756 between the source portion 752 and the drain portion 753 becomes the gate portion 755 (not shown).
  • FIG. 5E shows a structure in which an electrode film 758, a wiring layer 759, and the like are further formed. As described above, a multilayer substrate in which the main part of the MOSFET 75 is formed is obtained. Subsequently, in the same manner as in the example shown in FIG.
  • FIG. 12 shows a structural example of a MOSFET having a planar structure, a MOSFET having a trench structure can also be formed by modifying the element formation process described above.
  • FIG. 13 shows a step of forming the MOSFET element 76 on the second single crystal layer 5 formed on the surface layer of the multilayer substrate 6.
  • a semiconductor substrate 66 (MOSFET element 76) shown in FIG. 5E uses a metal substrate 33 as a third substrate (support substrate) 3 and is made of a single second semiconductor material layered on the metal substrate 33 in order.
  • a second single crystal layer 5 made of crystals, a semiconductor element is formed on the second single crystal layer 5, and a back electrode layer 82 is provided on the upper side of the second single crystal layer 5 (see FIG. 13).
  • the metal substrate 33 is drawn on the upper side and the back electrode layer 82 is on the lower side.
  • the back electrode layer 82 may be formed on the first single crystal layer 11 made of a single crystal of the first semiconductor material provided on the second single crystal layer 5, and further, the first single crystal layer 11 may be formed on a buffer layer made of a semiconductor material provided on the substrate 11. That is, the configuration of the multilayer substrate 6 forming the MOSFET element 76 may be any of the multilayer substrates 6a, 6b, 6c, 6d, and 6e shown in FIG. FIG. 13 shows an example in which a SiC substrate 25 is used as the second substrate 2 and the second semiconductor material (and the first semiconductor material) is SiC. Each drawing in FIG.
  • FIG. 13 represents a region corresponding to one semiconductor element, and the single crystal buffer layer 52, the first single crystal layer 11, the buffer layers (41, 412, 413), and the like are omitted.
  • FIG. 6A shows a P well 751, a source portion 752, a drain portion 753, an interlayer insulating film 754, and a gate oxide film formed on the second single crystal layer 5 by the same process as the case of the MOSFET element 75 shown in FIG. 756, an electrode film 758, a wiring layer 759, and the like are formed.
  • the SiC substrate 25 does not need to be covered with the polycrystalline SiC layer 42 or the like.
  • FIG. 13B shows a state in which a through hole 851 penetrating the second single crystal layer 5 is formed.
  • the through hole 851 can be formed by a trench structure.
  • the inner wall surface of the through hole 851 is covered with an insulating film 852, and a through electrode 85 is formed by evaporating metal or the like.
  • the through hole 851 can be tapered.
  • the metal bonding layer 38 shows a state in which the interconnection layer 36 and the metal bonding layer 38 are provided on the element, and the metal substrate 33 is bonded as a support substrate on the metal bonding layer 38.
  • the gate portion 755, which is a metal film portion on the gate oxide film, and the through electrode 85 are electrically connected.
  • the metal bonding layer 38 is electrically connected to the source portion 752 by the interconnection layer 36, and the metal substrate 33 becomes the source electrode S for external connection.
  • the metal bonding layer 38 can be formed by forming a thick plating layer on a metal such as Ni by sputtering and planarizing the surface of the plating layer.
  • the metal bonding layer 38 and the metal substrate 33 can be directly bonded by intermetal bonding.
  • SiC substrate 25 bonded to the lower surface side of second single crystal layer 5 is removed.
  • the SiC substrate 25 can be removed by irradiating the laser beam.
  • the first single crystal layer 11, the single crystal buffer layer 52, and the like can be removed by polishing or the like.
  • a back insulating layer 83 is selectively formed on the surface of the second single crystal layer 5 exposed by removing the SiC substrate 25 and the like, and further, a back electrode layer 82 is selectively formed. Shows the state.
  • the back electrode layer 82 part in contact with the lower surface side (back drain part) of the second single crystal layer 5 becomes the drain electrode D for external connection
  • the back electrode layer 82 part in contact with the through electrode 85 is the gate for external connection. It becomes the electrode G.
  • the thickness of the interconnect layer 36 is preferably thin.
  • the region of the second single crystal layer 5 under the gate wiring portion in the interconnection layer 36 is arranged to have a source or P well potential close to the gate potential. It is preferable to do.
  • the length from the surface of the second single crystal layer 5 where the source portion and the P well portion exist to the metal substrate 33 is short, and the wiring area is increased. It is preferable to do.
  • the through electrode 85 is formed before the metal substrate 33 is bonded. However, after the metal substrate 33 is bonded, the through electrode 85 can be formed by performing trench processing from the back surface side. It is.
  • the MOSFET manufacturing process of this example can be applied to a MOSFET having a trench structure by modifying the element forming process.
  • the second substrate 2 is a carbon substrate and the first semiconductor material and the second semiconductor material are SiC has been mainly described.
  • the thermal expansion coefficient can be adjusted by the density, the size of crystal grains, and the like.
  • the thermal expansion coefficient of the carbon substrate can be matched according to the thermal expansion coefficients of the first semiconductor material and the second semiconductor material.
  • the crystal defects of the second single crystal layer 5 formed on the first single crystal layer 11 can be reduced.
  • the second semiconductor material is GaN, gallium oxide, gallium oxide, or the like.
  • the material of the second substrate 2 is sapphire or SiC, it is preferable to form a compound semiconductor film containing Ga as the surface thin film layer 4.
  • Examples of the compound semiconductor film containing Ga include GaN, gallium oxide, and GaAs.
  • GaN gallium oxide
  • GaAs GaAs
  • the first semiconductor material and the second semiconductor material are SiC and a semiconductor element having a vertical structure is formed has been described, even when a semiconductor element having a horizontal structure is formed using GaN or the like, It can be manufactured similarly.
  • a silicon oxide film 41 is formed on the second substrate 2, the first substrate 1 is bonded thereon, and a GaN layer is formed as the second single crystal layer 5 to form a lateral element.
  • the second substrate 2 can be removed after the third substrate 3 is bonded.
  • the internal stress of the GaN layer is minimized by matching the thermal expansion coefficient of the carbon substrate, which is the second substrate 2 as a base, to GaN. It is possible. This is because the thermal expansion coefficient of the carbon substrate can be adjusted depending on the density and the size of the crystal grains.
  • the multilayer substrate 6 (6a, 6b, 6c, 6d, 6e) shown in FIG. 2 is suitable as a semiconductor substrate for forming an element for high power use.
  • a semiconductor substrate on which a semiconductor element is formed can be formed based on the multilayer substrate 6.
  • 14 and 15 show a semiconductor substrate 65 using a multilayer substrate 6 and using a substrate made of one of an insulating material, a semiconductor material, and a metal as the support substrate 3 (the third substrate 3). ing.
  • a semiconductor element 7 is formed on the semiconductor substrate 65.
  • FIG. 14 and 15 are drawn with the support substrate 3 on the bottom and the back electrode layer 8 on the top.
  • the 14 has a support substrate 3 (31, 32 or 33) made of one of an insulating material, a semiconductor material, and a metal, and a bonding layer 34 (35, 36) sandwiched on the support substrate 3. And a second single crystal layer 5 made of a single crystal of the second semiconductor material laminated.
  • the semiconductor element 7 is formed on the second single crystal layer 5, and the back electrode layer 8 (81, 82) of the semiconductor element 7 is provided on the second single crystal layer 5.
  • the Schottky diode 71 and the MOSFETs 75 and 76 described above can be used.
  • FIG. 15 shows another form (65a, 65b, 65c) of the semiconductor substrate 65.
  • the semiconductor substrate (65a, 65b, 65c) includes a first single crystal layer 11 made of a single crystal of a first semiconductor material on the second single crystal layer 5, and the back electrode layer 8 (81, 82) is It is provided on the first single crystal layer 11 or on the buffer layer 412 made of a semiconductor material provided on the first single crystal layer 11. That is, the second single crystal layer 5 and the first single crystal layer 11 are provided on the support substrate 3 (31, 32, or 33) with the bonding layer 34 (35, 36) interposed therebetween.
  • a semiconductor element 7 is formed on the substrate.
  • FIG. 5A shows an example of a semiconductor substrate 65 a provided with the back electrode layer 8 of the semiconductor element 7 on the first single crystal layer 11.
  • the back electrode layer 8 may be provided on the first single crystal layer 11 via a buffer layer 412 made of a semiconductor material, as shown in FIG.
  • a substrate made of alkali-free glass, sapphire, Si, or the like can be used as the support substrate 3.
  • the support substrate 3 may be formed with through holes 3 (36, 37) serving as electrode portions of the semiconductor element 7.
  • FIG. 3C shows a semiconductor substrate 65 c in which a metal substrate 33 is bonded as a support substrate 3 via a metal bonding layer 38. If the metal substrate 33 is used, a power semiconductor having excellent thermal conductivity can be obtained.
  • the first semiconductor material used for the semiconductor substrate is preferably one of SiC, GaN, and gallium oxide
  • the second semiconductor material is preferably one of SiC, GaN, and gallium oxide.
  • the semiconductor substrate since the thickness of the first single crystal layer 11 may be thin (about 0.5 to 1 ⁇ m), the first substrate 1 made of a single crystal of the first semiconductor material is used. Only a small amount is used.
  • the second substrate 2 is a sapphire substrate or a SiC substrate 25, and can be repeatedly used as the second substrate 2 if it is removed by laser lift-off. As described above, since the number of members consumed in the manufacturing process is extremely small, the semiconductor substrate 65 of this embodiment can be extremely low in cost.
  • Power-based compound semiconductor elements using SiC and the like are becoming increasingly important with the spread of hybrid cars and electric cars in cars.
  • the role of power-based compound semiconductor devices becomes important for home appliance control and energy management with the spread of smart grids at home.
  • the amount of SiC single crystal, which is an expensive material can be greatly reduced, and an inexpensive power semiconductor element can be manufactured.

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Abstract

L'invention concerne un procédé de fabrication d'élément semi-conducteur qui comprend : une seconde étape de formation de film consistant à former un film d'une seconde couche monocristalline (5) sur un deuxième substrat (2), c'est-à-dire un substrat de support temporaire, ladite seconde couche monocristalline étant formée du monocristal d'un second matériau semi-conducteur ; une étape de formation d'élément consistant à former un élément semi-conducteur (7) sur la seconde couche monocristalline ; une seconde étape de liaison consistant à lier un troisième substrat (3) sur la seconde couche monocristalline sur laquelle est formé l'élément semi-conducteur ; et une étape de retrait de substrat consistant à retirer le deuxième substrat après la liaison du troisième substrat.
PCT/JP2017/020355 2016-09-23 2017-05-31 Procédé de fabrication d'élément semi-conducteur et substrat semi-conducteur WO2018055838A1 (fr)

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JP2021044408A (ja) * 2019-09-11 2021-03-18 キオクシア株式会社 半導体装置の製造方法

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