JP2004214635A - 半導体装置の作製方法、半導体装置及び電子機器 - Google Patents
半導体装置の作製方法、半導体装置及び電子機器 Download PDFInfo
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- JP2004214635A JP2004214635A JP2003411870A JP2003411870A JP2004214635A JP 2004214635 A JP2004214635 A JP 2004214635A JP 2003411870 A JP2003411870 A JP 2003411870A JP 2003411870 A JP2003411870 A JP 2003411870A JP 2004214635 A JP2004214635 A JP 2004214635A
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- metal oxide
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Landscapes
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
【解決手段】 本発明では、支持体として機能する基板上に成膜した膜厚500nm以下の薄膜の半導体膜を、連続発振のレーザ光で結晶化し、その結晶化された半導体膜を用いて、トータルの膜厚5μm、より望ましくは2μm以下の薄膜の半導体素子を有するチップを形成する。そして最終的に基板を剥離した状態で、該チップをインターポーザにマウントする。
【選択図】 図1
Description
本実の形態では、第1及び第2のレーザ光により結晶化された薄膜の半導体膜で、パッケージを形成する方法について説明する。なお本実施の形態では半導体素子として2つのTFTを例に挙げて示すが、本発明においてチップに含まれる半導体素子はこれに限定されずあらゆる回路素子が含まれる。例えば、TFTの他に、記憶素子、ダイオード、光電変換素子、抵抗素子、コイル、容量素子、インダクタなどが代表的に挙げられる。
(実施の形態2)
図4を用いて、本発明のパッケージの作製において用いるレーザ照射装置の構成について説明する。
第1の基板上に複数のチップを同時に作製する場合、パッケージとして完成する前に、途中でダイシングを行ない、チップどうしを切り離す必要がある。本実施の形態では、ダイシングのタイミングについて説明する。
本実施の形態では、インターポーザとチップとの電気的な接続の仕方について説明する。
本実施の形態では、具体的なチップの積層方法の一例を示す。まず実施の形態1に示した作製方法に従って、図7(B)のように1層目のチップをマウントした状態まで作製する。
Claims (16)
- 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いて半導体素子を形成し、
前記半導体素子を間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
加熱処理を施すことで前記金属酸化膜を結晶化し、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
前記金属酸化膜の一部が付着した前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせ、
前記第1の接着剤を除去することで前記第2の基板を取り除き、
前記インターポーザと前記半導体素子とを電気的に接続することを特徴とする半導体装置の作製方法。 - 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いて半導体素子を形成し、
前記半導体素子を間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
加熱処理を施すことで前記金属酸化膜を結晶化し、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
前記金属酸化膜の一部が付着した前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせることで、前記インターポーザと前記半導体素子とを電気的に接続し、
前記第1の接着剤を除去することで前記第2の基板を取り除くことを特徴とする半導体装置の作製方法。 - 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いて半導体素子を形成し、
前記半導体素子を間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
加熱処理を施すことで前記金属酸化膜を結晶化し、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
前記絶縁膜に部分的に付着した前記金属酸化膜を除去し、
前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせ、
前記第1の接着剤を除去することで前記第2の基板を取り除き、
前記インターポーザと前記半導体素子とを電気的に接続することを特徴とする半導体装置の作製方法。 - 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いて半導体素子を形成し、
前記半導体素子を間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
前記第1の基板の裏側に第2の接着剤を用いて第3の基板を貼り合わせ、
加熱処理を施すことで前記金属酸化膜を結晶化し、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
前記金属酸化膜の一部が付着した前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせ、
前記第1の接着剤を除去することで前記第2の基板を取り除き、
前記インターポーザと前記半導体素子とを電気的に接続することを特徴とする半導体装置の作製方法。 - 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いた半導体素子と、前記半導体素子に電気的に接続されたパッドとを形成し、
前記半導体素子及び前記パッドを間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
前記第1の基板の裏側に第2の接着剤を用いて第3の基板を貼り合わせ、
加熱処理を施すことで前記金属酸化膜を結晶化し、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
前記金属酸化膜の一部が付着した前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせ、
前記第1の接着剤を除去することで前記第2の基板を取り除き、
前記インターポーザと前記パッドとを電気的に接続することを特徴とする半導体装置の作製方法であって、 - 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いて複数の半導体素子を形成し、
前記複数の半導体素子を間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
加熱処理を施すことで前記金属酸化膜を結晶化し、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
ダイシングにより前記第2の基板の少なくとも一部を分割することで、前記複数の半導体素子のうち少なくとも一つの半導体素子を切り離し、
前記分割された第2の基板の一部において、前記金属酸化膜の一部が付着した前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせ、
前記第1の接着剤を除去することで前記分割された第2の基板の一部を取り除くことを特徴とする半導体装置の作製方法。 - 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いて複数の半導体素子を形成し、
前記複数の半導体素子を間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
加熱処理を施すことで前記金属酸化膜を結晶化し、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
前記金属酸化膜の一部が付着した前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせ、
ダイシングにより前記第2の基板及び前記インターポーザの少なくとも一部を分割することで、前記複数の半導体素子のうち少なくとも一つの半導体素子を切り離し、
前記第1の接着剤を除去することで前記分割された第2の基板の一部を取り除くことを特徴とする半導体装置の作製方法。 - 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いて複数の半導体素子を形成し、
前記複数の半導体素子を間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
加熱処理を施すことで前記金属酸化膜を結晶化し、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
前記金属酸化膜の一部が付着した前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせ、
前記第1の接着剤を除去することで前記第2の基板を取り除き、
ダイシングにより前記インターポーザの少なくとも一部を分割することで、前記複数の半導体素子のうち少なくとも一つの半導体素子を切り離すことを特徴とする半導体装置の作製方法。 - 第1の基板の表側に金属膜と、金属酸化膜と、絶縁膜と、半導体膜とを順に積層するように形成し、
前記半導体膜に対する吸収係数が1×104cm-1以上の波長を有するパルス発振された第1のレーザ光と、連続発振された第2のレーザ光とを、互いの照射領域が重なるように前記半導体膜に照射することで、前記半導体膜を結晶化し、
前記結晶化された半導体膜を用いて半導体素子を形成し、
前記半導体素子を間に挟んで前記第1の基板と向かい合うように、第1の接着剤を用いて第2の基板を貼り合わせ、
前記金属酸化膜を前記金属膜側と前記絶縁膜側とに分離させることで、前記第1の基板及び前記第3の基板を取り除き、
前記金属酸化膜の一部が付着した前記絶縁膜に第3の接着剤を用いてインターポーザを貼り合わせ、
前記第1の接着剤を除去することで前記第2の基板を取り除き、
前記インターポーザと前記半導体素子とを電気的に接続する半導体装置の作製方法であって、
前記半導体素子を形成する際に、加熱処理を施すことで前記金属酸化膜を結晶化することを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項9のいずれか1項において、
前記金属酸化膜は、前記金属膜の表面を酸化することで形成されていることを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項10のいずれか1項において、
前記第1のレーザ光は第2高調波を有することを特徴とする半導体装 置の作製方法。 - 請求項1乃至請求項11のいずれか1項において、
前記第2のレーザ光は基本波を有することを特徴とする半導体装置の作製方法。 - 請求項1乃至請求項12のいずれか1項において、
前記結晶化において、前記半導体膜に対して前記第1のレーザ光の照射領域及び前記第2のレーザ光の照射領域を相対的に移動させており、前記半導体素子は、前記移動の向きに対して垂直の方向における前記第2のレーザ光の照射領域の幅に収まる領域に形成されていることを特徴とする半導体装置の作製方法。 - 請求項13において、前記移動の向きに対して垂直の方向における前記第2のレーザ光の照射領域の幅を10mm以上50mm以下とすることを特徴とする半導体装置の作製方法。
- 請求項1乃至請求項14のいずれか1項において、前記作製方法を用いて作製された事を特徴とする半導体装置。
- 請求項15において、前記半導体装置を用いることを特徴とする電子機器。
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