WO2017130361A1 - ダイピックアップ装置 - Google Patents
ダイピックアップ装置 Download PDFInfo
- Publication number
- WO2017130361A1 WO2017130361A1 PCT/JP2016/052549 JP2016052549W WO2017130361A1 WO 2017130361 A1 WO2017130361 A1 WO 2017130361A1 JP 2016052549 W JP2016052549 W JP 2016052549W WO 2017130361 A1 WO2017130361 A1 WO 2017130361A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wafer
- die
- mark
- unit
- bare chip
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
Definitions
- the present invention relates to a die pickup apparatus that picks up a die from a diced wafer.
- a component mounting apparatus that picks up a bare chip (die) from a diced wafer and mounts it on a substrate is known.
- This component mounting apparatus includes a head capable of individually sucking bare chips and a control unit that controls the operation of the head. The control unit moves the head based on a wafer map that indicates the quality of each bare chip created in advance for a wafer to be attracted, and sequentially attracts the target bare chip (see, for example, Patent Document 1).
- a reference mark provided on the wafer may be referred to in order to align the wafer map and the actual bare chip of the wafer.
- the reference mark is, for example, a print mark given to a bare chip located at a specific coordinate on the wafer.
- a bare chip (mirror die) on which no pattern is formed may be formed at specific coordinates when a wafer is manufactured, and the mirror die may be used as a reference mark.
- the control unit identifies the position of such a reference mark based on a captured image of the wafer, and fits the position of the reference mark to the wafer map, thereby aligning the wafer map and the bare chip of the wafer. .
- the control unit recognizes the position of the bare chip at the first suction point with reference to the reference mark, and causes the head to perform a suction operation.
- the reference mark may be misaligned, for example, when a bare chip or mirror die on which correct printing has been performed floats up from the bonded surface of the wafer. If these deviations are large, the wafer map and the bare chip of the wafer cannot be accurately aligned, and the control unit erroneously recognizes the position of the bare chip at the first suction point. In this case, it is not possible to pick up bare chips along the wafer map, typically picking up only good bare chips.
- Patent Document 1 a technique for recognizing a wafer ID mark in addition to a reference mark and obtaining a positional deviation between the wafer ID mark and the wafer map is disclosed.
- the technique of Patent Document 1 cannot be applied to a wafer having no wafer ID mark.
- the technique of Patent Document 1 does not consider the problem of positional deviation of the reference mark.
- the wafer ID mark is also appended by laser printing or the like, there may be a problem of printing deviation.
- the present invention has been made in view of the above points, and an object of the present invention is to provide a die pick-up device that can accurately identify the position of a die even if a reference mark is misaligned.
- a die pick-up apparatus includes a wafer that is diced into a plurality of dies, an imaging device that captures an image of a wafer in which a mark indicating a reference position is attached to an arbitrary die, and the wafer
- a storage unit that stores in advance a set positional relationship that is a positional relationship between the known reference position of the wafer and the mark of the wafer; and image processing of the captured image of the wafer;
- An extraction processing unit that extracts a feature portion and derives the reference position based on the geometric feature portion, an actual measurement positional relationship between the reference position and the mark specified from the image of the wafer, and the storage unit
- an abnormality detection unit that detects an abnormality in the position of the mark by comparing the set positional relationship stored in FIG.
- FIG. 1 is a top plan view showing the overall configuration of a component mounting apparatus to which a die pickup apparatus according to the present invention is applied.
- FIG. 2 is an exploded perspective view showing mechanical components of the die pickup device in the component mounting apparatus.
- FIG. 3 is a block diagram showing a control system of the component mounting apparatus.
- 4A is a plan view of the wafer
- FIG. 4B is a diagram showing an example of a wafer map.
- FIG. 5 is a diagram illustrating an example of a reference mark.
- 6A and 6B are diagrams illustrating examples of defects of the reference mark.
- FIG. 7A is a plan view of a wafer with a notch
- FIG. 7B is a plan view of a wafer with an orientation flat.
- FIG. 8 is a functional block diagram of the main arithmetic unit.
- FIG. 9 is a diagram illustrating a first embodiment of reference mark position abnormality detection.
- FIG. 10 is a diagram illustrating a method for specifying an initial suction bare chip in the first embodiment.
- FIG. 11 is a diagram for explaining a modification of the first embodiment.
- FIG. 12 is a diagram illustrating a second embodiment of reference mark position abnormality detection.
- FIG. 13 is a diagram for explaining a modification of the second embodiment.
- FIG. 14 is a flowchart showing the operation of the component mounting apparatus.
- FIG. 15 is a diagram for explaining the rotation angle correction process.
- the die pickup device according to the present invention can be applied to various devices such as a die bonder, a taping device that accommodates a diced die on a tape, or a component mounting device that mounts the die on a substrate.
- a die bonder a taping device that accommodates a diced die on a tape
- a component mounting device that mounts the die on a substrate.
- FIG. 1 is a top plan view showing an overall configuration of a component mounting apparatus 100 to which a die pickup apparatus D according to an embodiment of the present invention is applied.
- FIG. 2 is an exploded perspective view mainly showing mechanical components of the die pickup device D in the component mounting apparatus 100.
- the component mounting apparatus 100 takes out a die (hereinafter referred to as “bare chip C”) from the diced wafer W and mounts it on the printed circuit board 20, and mounts a chip component supplied by the tape feeder 31 on the printed circuit board 20.
- bare chip C a die from the diced wafer W and mounts it on the printed circuit board 20, and mounts a chip component supplied by the tape feeder 31 on the printed circuit board 20.
- This is a composite type component mounting apparatus capable of.
- the component mounting apparatus 100 includes a base 1, a conveyor 2, two chip component supply units 3, a mounting unit 4, a wafer holding table 5, a push-up unit 6 (shown only in FIG. 2), an extraction unit 7, and components.
- a recognition camera 8 (imaging device), a fixed camera 9, a wafer storage unit 10, and a control unit 12 are included.
- the conveyor 2 carries the printed circuit board 20 into a predetermined mounting work position, and carries the printed circuit board 20 out of the working position after the mounting work.
- the conveyor 2 includes a conveyor main body that extends in the X direction that conveys the printed circuit board 20, and a positioning mechanism (not shown) that lifts and positions the printed circuit board 20 on the conveyor main body.
- the conveyor 2 conveys the printed circuit board 20 from the X2 direction side to the X1 direction side in the X direction in a substantially horizontal posture, and the printed circuit board 20 is placed at a predetermined mounting work position (positions of the two printed circuit boards 20 shown in FIG. 1). Fix the positioning.
- the two chip component supply units 3 are provided at both ends on the front side (Y1 direction side) of the component mounting apparatus 100, respectively.
- the chip component supply unit 3 supplies chip components such as transistors, resistors, and capacitors.
- the chip component supply unit 3 is equipped with a plurality of tape feeders 31 having carrier tapes for holding the chip components at predetermined intervals. Each tape feeder 31 intermittently sends out the carrier tape, and sends out the chip component to a predetermined component supply position.
- the mounting unit 4 mounts the bare chip C or the chip component on the printed circuit board 20.
- the mounting unit 4 includes two head units (first head unit 41 and second head unit 42) and support members (first support member 43 and second support member 44).
- the first and second head units 41 and 42 can be moved in the horizontal direction (XY direction) at a position above the conveyor 2 (Z2 direction) by an XY movement mechanism (not shown).
- the first head unit 41 mainly uses the upstream side (X2 direction side) region of the base 1 as a movable region
- the second head unit 42 mainly uses the downstream side (X1 direction side) region as a movable region. It is said.
- FIG. 2 shows the first head unit 41.
- the first head unit 41 includes two component mounting heads 411 and 412 and one board recognition camera 45 arranged along the X direction. The same applies to the second head unit 42.
- the component mounting heads 411 and 412 are configured so that a chip component supplied from the tape feeder 31 or a bare chip C supplied from a take-out unit 7 described later is generated by a negative pressure generated by a negative pressure generator (not shown). It is possible to adsorb and hold at the tip.
- the mounting unit 4 causes the chip component or the bare chip C to be adsorbed to the tip portions of the component mounting heads 411 and 412, and these are mounted on the printed board 20.
- the board recognition camera 45 is a camera that images the printed board 20. Prior to mounting the components on the printed circuit board 20 by the first head unit 41, a fiducial mark attached to the printed circuit board 20 is based on a photographed image of the printed circuit board 20 by the substrate recognition camera 45. Be recognized. As a result, the positional deviation of the printed circuit board 20 is recognized, and the positional deviation is corrected when the component is mounted.
- the wafer storage unit 10 stores a plurality of diced wafers W, and is disposed in the central portion on the front side (Y1 direction side) of the component mounting apparatus 100.
- the wafer W is held by a substantially annular holder 11.
- Wafer storage unit 10 includes a rack for storing holders 11 holding wafer W in a plurality of upper and lower stages, and drive means for driving the rack up and down.
- Each wafer W accommodated in the wafer accommodating portion 10 is in a state in which the bare chip C is stuck on a film-like wafer sheet, and is held by the holder 11 via the wafer sheet.
- the wafer storage unit 10 arranges a desired wafer W at a predetermined loading / unloading height position that allows the wafer holding table 5 to be loaded / unloaded by raising / lowering the rack.
- the wafer holding table 5 supports the wafer W pulled out from the wafer storage unit 10.
- the component mounting apparatus 100 pulls out the wafer W from the wafer storage unit 10 and mounts it on the wafer holding table 5. Conversely, the component mounting apparatus 100 performs an operation of returning the wafer W from the wafer holding table 5 to the wafer storage unit 10 (not shown). ).
- the wafer holding table 5 has a circular opening at the center, and holds the holder 11 so that the opening, the opening of the holder 11b, and the opening of the wafer holding table 5 overlap.
- the wafer holding table 5 is movable in the Y direction on the base 1 between the component picking work position and the wafer receiving position. Specifically, the wafer holding table 5 is movably supported by a pair of fixed rails 51 provided on the base 1 so as to extend in the Y direction, and along the fixed rails 51 by a predetermined driving means. Moved.
- the drive means includes a ball screw shaft 52 extending in parallel with the fixed rail 51 and screwed into the nut portion of the wafer holding table 5, and a drive motor 53 for driving the ball screw shaft 52 to rotate.
- the wafer holding table 5 passes through a position below the conveyor 2 and moves between a predetermined part picking work position and a wafer receiving position in the vicinity of the wafer storage unit 10.
- the push-up unit 6 pushes out the bare chip C to be taken out from the lower side of the bare chip group of the wafer W on the wafer holding table 5 arranged at the component take-out work position, thereby removing the bare chip C from the wafer sheet. Lift while peeling.
- the push-up unit 6 includes a push-up head 61 and a fixed rail 62.
- the push-up head 61 includes a first push-up rod 611 and a second push-up rod 612 that incorporate a push-up pin.
- the first and second push-up rods 611 and 612 adsorb the bare chip C by the negative pressure generated at the tip portion thereof by a negative pressure generator (not shown). Thereby, the position shift of the bare chip C at the time of pushing up is suppressed.
- the fixed rail 62 is fixed on the base 1 and supports the push-up head 61 so as to be movable in the X direction.
- the push-up unit 6 includes a drive mechanism that moves the push-up head 61 along the fixed rail 62.
- This drive mechanism includes a push-up head drive motor 63 (see FIG. 3) as a drive source.
- the take-out unit 7 (head) sucks the bare chip C pushed up by the push-up unit 6 (picks up the die) and delivers it to the first head unit 41 or the second head unit 42.
- the take-out unit 7 is moved in the horizontal direction (XY direction) at a position above the component take-out work position (Z2 direction) by a predetermined driving means.
- the take-out unit 7 includes four wafer heads 7a to 7d, a frame member 7e, two bracket members 7f, two wafer head rotation motors 7h, and a wafer head lifting motor 7i (see FIG. 3). Yes.
- the wafer heads 7a to 7d can rotate around the X axis and can move in the vertical direction (Z direction).
- the wafer heads 7a to 7d adsorb the bare chip C by the negative pressure generated at the tip portion by a negative pressure generator (not shown).
- the wafer heads 7a to 7d deliver the bare chip C to the component mounting heads 411 and 412 at a predetermined delivery position.
- the wafer heads 7a and 7b are supported by the bracket member 7f on the X2 direction side, and the wafer heads 7c and 7d are supported by the bracket member 7f on the X1 direction side so as to be rotatable around the X axis.
- the wafer head rotation motor 7h is a motor that rotationally drives the wafer heads 7a and 7c and the wafer heads 7b and 7d so that the vertical positions (Z direction) are switched. This is to invert (flip) the bare chip C attracted to the wafer heads 7a to 7d.
- the two bracket members 7f are supported by the frame member 7e so as to be movable up and down.
- the wafer head elevating motor 7i is a drive source that elevates and lowers the bracket member 7f relative to the frame member 7e, whereby the wafer heads 7a to 7d are raised and lowered.
- the drive means of the take-out unit 7 includes a pair of fixed rails 71, a frame member 72, a pair of ball screw shafts 73, and a pair of frame drive motors 74.
- the pair of fixed rails 71 are fixed on the base 1 and extend in the Y direction parallel to each other with a predetermined interval in the X direction. Both ends of the frame member 72 are movably supported on the fixed rail 71 and extend in the X direction.
- the pair of ball screw shafts 73 are disposed so as to extend in the Y direction at positions close to the fixed rail 71, and are screwed and inserted into nut members (not shown) at both ends of the frame member 72.
- the pair of frame drive motors 74 rotationally drive the ball screw shaft 73.
- the frame member 72 is mounted with the take-out unit 7 and the component recognition camera 8.
- the frame member 72 moves along the fixed rail 71, and the extraction unit 7 and the component recognition camera 8 integrally move in the Y direction as the frame member 72 moves.
- a drive motor 75 for moving the take-out portion 7 in the X direction along the frame member 72 and a component recognition camera 8 are moved in the X direction along the frame member 72 at the X1 side end of the frame member 72.
- Drive motor 76 is arranged.
- the component recognition camera 8 takes an image of the wafer W (bare chip C) placed on the wafer holding table 5 prior to the pickup of the bare chip C from the wafer W.
- the captured image data is output to the control unit 12.
- the geometric feature of the wafer W is extracted.
- the fixed camera 9 is a camera for component recognition that is arranged on the base 1 and in the movable regions of the first and second head units 41 and 42.
- the fixed camera 9 captures an image of the component sucked by the component mounting heads 411 and 412 of the first and second head units 41 and 42 from the lower side (Z1 direction side), and sends the image signal to the control unit 12. Output.
- FIG. 3 is a block diagram illustrating a control system of the component mounting apparatus 100.
- the control unit 12 includes a drive motor 53, a push-up head drive motor 63, a frame drive motor 74, a drive motor 75, a drive motor 76, a wafer head rotation motor 7h, a wafer head lifting motor 7i, a component recognition camera 8, and a fixed camera. 9 and the board recognition camera 45 are electrically connected to each other.
- an input device (not shown) is electrically connected to the control unit 12, and various types of information by the user are input based on operations of the input device.
- an output signal from position detection means such as an encoder (not shown) built in each drive motor is input to the control unit 12.
- the control unit 12 includes an axis control unit 13, an image processing unit 14, an I / O processing unit 15, a communication control unit 16, a storage unit 17, and a main calculation unit 18.
- the axis control unit 13 is a driver that drives each drive motor, and operates each drive motor in accordance with an instruction from the main calculation unit 18.
- the image processing unit 14 performs various types of image processing on image data input from each camera (the component recognition camera 8, the fixed camera 9, and the board recognition camera 45).
- the I / O processing unit 15 controls input of signals from various sensors (not shown) included in the component mounting apparatus 100 and output of various control signals.
- the communication control unit 16 controls communication with an external device.
- the storage unit 17 stores various programs such as a mounting program and various data.
- the main arithmetic unit 18 controls the control unit 12 in an integrated manner and executes various arithmetic processes. The functional configuration of the main calculation unit 18 will be described later with reference to FIG.
- the control unit 12 controls each drive motor and the like based on a predetermined program, so that the conveyor 2, the wafer holding table 5, the push-up unit 6, the take-out unit 7, the first and second head units 41, 42 is controlled. Thereby, the suction position adjustment of the bare chip C is performed by the take-out unit 7 (wafer heads 7a to 7d).
- the control unit 12 controls a series of operations such as loading / unloading of the wafer W into / from the wafer storage unit 10, pickup of the bare chip C from the wafer W, and mounting of components by the first and second head units 41 and 42. Done.
- FIG. 4A is a plan view of a typical wafer W in a top view
- FIG. 4B is a diagram showing an example of a wafer map WM for the wafer W.
- the wafer W has a plurality of bare chips C that are made independent by dicing.
- the bare chips C are in a matrix array in the XY direction on the wafer sheet.
- the position of each bare chip C is managed by an address based on the XY coordinate system.
- the wafer map WM is a file describing the evaluation of each bare chip C provided on the wafer W as a good product or a defective product based on a predetermined standard. The evaluation value is described in association with the address of the bare chip C.
- “1” indicates a non-defective bare chip C
- “2” indicates a non-defective but low-grade bare chip C
- “3” indicates a defective bare chip C.
- N indicates that there is no bare chip C at the address.
- the alignment of the position of the wafer W (bare chip C) actually placed on the wafer holding table 5 and the wafer map WM is important.
- the alignment mentioned here is the alignment of the XY coordinates of the address on the wafer W of each bare chip C and the address on the wafer map WM. If the coordinates do not match, for example, a defective bare chip C evaluated as “3” is picked up, or only a bare chip C evaluated as “1” is intended to be picked up. Troubles to pick up the camera.
- a reference mark (a mark indicating a reference position) previously given to the wafer W may be used.
- FIG. 5 is a diagram illustrating an example of the reference mark Rm.
- the upper diagram is an overall view of the wafer W, and an enlarged view of the frame portion A attached to the wafer W is a lower diagram.
- a bare chip (arbitrary die) located at a specific coordinate is predetermined as the reference bare chip Cs.
- the reference mark Rm is a print mark applied to the reference bare chip Cs by means such as laser marking.
- the reference bare chip Cs may be a mirror die that is not patterned when the wafer W is manufactured. In the mirror die, the mirror surface itself becomes the reference mark Rm. In any case, the reference bare chip Cs is in a state where it can be distinguished from other bare chips C in the captured image of the wafer W.
- the component recognition camera 8 takes an image of the wafer W (bare chip C) prior to the pickup of the bare chip C.
- the image processing unit 14 performs image processing on the image data acquired by the imaging so that the reference mark Rm is identified on the captured image of the wafer W. Since the address of the reference bare chip Cs is known, by applying this to the wafer map WM, the alignment of the address of the bare chip C on the wafer W actually placed on the wafer holding table 5 and the wafer map WM is performed. Can be planned. Then, the control unit 12 recognizes the position of the bare chip C at the first suction point in the pickup sequence using the reference mark Rm as a reference, and causes the extraction unit 7 to sequentially perform a suction operation.
- FIGS. 6A and 6B are diagrams illustrating examples of defects of the reference mark Rm.
- FIG. 6A shows a problem of “floating” of the reference bare chip Cs.
- the bare chip C including the reference bare chip Cs is bonded to the wafer sheet, but the reference bare chip Cs may be lifted from the wafer sheet for some reason.
- the reference mark Rm is normally printed on the reference bare chip Cs
- the position of the reference mark Rm identified on the photographed image of the wafer W is recognized at a position shifted from the true position of the reference bare chip Cs. Will be.
- FIG. 6B shows a problem of “print misalignment” of the reference mark Rm. This is a case where the reference mark Rm is not printed at the center of the reference bare chip Cs. Although this defect does not occur in the case of a mirror die, in the case where the reference mark Rm is printed on the wafer W afterwards, it may occur due to a laser marking target misalignment or the like. Even in this case, the position of the reference mark Rm identified on the captured image of the wafer W is recognized at a position that is deviated from the true position of the reference bare chip Cs.
- the controller 12 may misrecognize the position of the bare chip C at the first suction point. For example, when the deviation is 1 ⁇ 2 or more of the arrangement pitch of the bare chips C, an event may occur in which the bare chip C adjacent to the reference bare chip Cs is recognized as the reference bare chip Cs on the wafer map WM. This phenomenon is called map shift, and when the map shift occurs, the pick-up operation of the bare chip C along the wafer map WM cannot be performed.
- the shape feature is not particularly limited as long as it is a unique shape derived from the shape of the wafer W.
- a display shape indicating the crystal axis direction of the wafer W is used as the shape feature.
- Such display shapes include notches or orientation flats. These are portions that are attached to any wafer W to indicate the crystal axis direction of the wafer W, and the shape clearly appears.
- FIG. 7A is a plan view of the wafer WL provided with a notch N.
- the notch N is a cutout portion having an opening at the periphery of the wafer WL and having a V-shaped or U-shaped shape cut toward the radial center of the wafer WL.
- the notch N is a display shape in the crystal axis direction that is mainly applied to a wafer WL having a large diameter of about 8 to 12 inches.
- FIG. 7B is a plan view of the wafer WS to which the orientation flat OF is attached.
- the orientation flat OF is a portion in which a portion of the arc periphery of the wafer WS is cut away to form a straight portion Wa.
- the orientation flat OF is a display shape in the crystal axis direction that is mainly applied to a wafer WS having a small diameter of 2 to 6 inches.
- FIG. 8 is a functional block diagram of the main arithmetic unit 18 for realizing the processing of the first embodiment.
- the main calculation unit 18 functionally includes a pickup control unit 181, a rotation correction unit 182 (correction unit), an extraction control unit 183, an abnormality detection unit 184, and an abnormality notification unit 185 by executing a predetermined program. To work.
- the pickup control unit 181 controls the pickup operation of the bare chip C by the extraction unit 7. Specifically, the pickup control unit 181 reads the wafer map WM stored in the storage unit 17 in association with the identification number of the wafer W currently placed on the wafer holding table 5 and sets the pickup sequence of the bare chip C. Then, the pickup unit 7 is caused to perform a pickup operation. The pickup control unit 181 determines the bare chip C that is first picked up by the extraction unit 7 with reference to the reference bare chip Cs to which the reference mark Rm is given.
- the rotation correction unit 182 performs alignment processing in the rotation direction of the wafer W mounted on the wafer holding table 5.
- the rotation correcting unit 182 extracts, for example, a dicing line of the wafer W based on a photographed image of the wafer W on the wafer holding table 5 captured by the component recognition camera 8 and rotates indicating the deviation of the dicing line with respect to a predetermined reference line. Find the corner. If there is a deviation, the rotation correction unit 182 performs a process of generating rotation angle correction data corresponding to the deviation.
- the extraction control unit 183 acquires image data obtained by performing image processing on the captured image of the wafer W by the component recognition camera 8 by the image processing unit 14.
- the extraction control unit 183 extracts the reference mark Rm and the shape feature of the wafer W based on the acquired image data.
- the shape feature is the notch N or the orientation flat OF, and these portions are specified on the image by, for example, edge extraction processing. Further, the extraction control unit 183 derives the reference position P based on the geometric feature.
- the abnormality detection unit 184 obtains the coordinates of the reference position P specified from the image of the wafer W and the coordinates of the reference mark Rm, and obtains the measured positional relationship between them. In addition, the abnormality detection unit 184 reads the coordinates of the reference position P and the coordinates of the reference mark Rm stored in advance in the storage unit 17, and acquires a set position relationship that is a positional relationship between them. Since the reference position P and the reference mark Rm are determined at known positions on the wafer W, these coordinates can be stored in the storage unit 17 in advance as set values.
- the abnormality detection unit 184 compares the measured position relationship with the set position relationship to determine whether or not the reference mark Rm is printed at a predetermined position, that is, there is a position abnormality of the reference mark Rm. The process which detects whether or not is performed.
- the abnormality notification unit 185 displays an alarm message indicating that a positional abnormality has occurred on a monitor (not shown) included in the component mounting apparatus 100.
- the alarm message can be set to be issued when the degree of the position abnormality is 1 ⁇ 2 or more of the arrangement pitch of the bare chips C.
- the user who has recognized the warning message performs an input for teaching the address of the bare chip C to be sucked for the first time using an input device, for example, and starts picking up the bare chip C from the wafer W.
- FIG. 9 shows a wafer WL having a notch N, and is a diagram for explaining a first embodiment of detection of an abnormal position of the reference mark Rm.
- an enlarged view of the frame portion A1 including the reference mark Rm is shown on the lower side of the overall view of the wafer WL, and an enlarged view of the frame portion A2 in which the notch N is formed is shown on the right side.
- the reference mark Rm is attached to the reference bare chip Cs located at a specific coordinate among the bare chips C provided on the wafer W.
- the notch N is a U-shaped notch formed so as to remove a part of the periphery of the wafer WL.
- the control unit 12 causes the component recognition camera 8 to capture a planar image of the wafer WL.
- the image data acquired by the shooting is input to the image processing unit 14 of the control unit 12.
- the image processing unit 14 performs, for example, processing for detecting an edge on the image with respect to the image data, and extracts an outer shape of the wafer WL and a pattern appearing on the wafer WL.
- the extraction control unit 183 performs a process of applying, for example, a template corresponding to the notch N to the extracted outer shape data of the wafer WL, and extracts the notch N that is a shape feature of the wafer WL. Further, based on the shape of the notch N, the reference position P is derived. Specifically, the extraction control unit 183 incorporates the outer shape data of the wafer WL into the XY coordinate system, and obtains the coordinates of the two opening edges N1 and N2 facing each other of the notches that define the notch N. Then, an intermediate point between the opening edges N1 and N2 is derived as the reference position P. The coordinates of the reference position P are (X0, Y0).
- the extraction control unit 183 performs a process of applying, for example, a template corresponding to the shape of the reference mark Rm (vertically long ellipse in FIG. 9) to the extracted pattern data of the wafer WL, and extracts the reference mark Rm. . Further, the extraction control unit 183 performs processing for obtaining the center of the elliptical reference mark Rm.
- the center coordinates of the reference mark Rm are (X1, Y1).
- FIG. 10 shows the positional relationship between the reference position P and the reference mark Rm. Further, FIG. 10 shows a direction vector V11 from the coordinate (X0, Y0) of the reference position P to the center coordinate (X1, Y1) of the reference mark Rm. Further, FIG. 10 shows an initial suction bare chip C1.
- the first suction bare chip C1 is a bare chip that is designated to be sucked first in the wafer map WM.
- the center coordinates of the initial suction bare chip C1 are (X2, Y2).
- the position of the first suction bare chip C1 is recognized with reference to the reference mark Rm.
- FIG. 10 also shows a direction vector V2 from the center coordinates (X1, Y1) of the reference mark Rm to the center coordinates (X2, Y2) of the initial suction bare chip C1. If the coordinates of the first suction bare chip C1 can be recognized, the relative positional relationship between the first suction bare chip C1 and the other bare chip C is already known. It can be executed accurately.
- the abnormality detection unit 184 acquires the coordinates (X0, Y0) of the reference position P obtained by the extraction control unit 183 and the center coordinates (X1, Y1) of the reference mark Rm, and the measured positional relationship between them. A direction vector V11 is obtained. Then, the abnormality detection unit 184 compares the direction vector V11 with the direction vector (set position relationship) obtained from the positional relationship between the reference position P and the reference mark Rm stored in the storage unit 17. By this comparison processing, it is determined whether or not the reference mark Rm is printed at a predetermined position. The abnormality detection unit 184 determines that there is no position abnormality of the reference mark Rm if the bidirectional vectors match or substantially match. In this case, with the center coordinates (X1, Y1) of the reference mark Rm as a starting point, the bare chip C existing at the position indicated by the direction vector V2 is recognized as the first suction bare chip C1, and the pickup operation is started.
- the abnormality detection unit 184 determines that there is a positional abnormality of the reference mark Rm. In this case, there is a high possibility that not the initial suction bare chip C1 but the surrounding bare chip C is present at the position indicated by the direction vector V2 starting from the reference mark Rm specified on the image. Therefore, the abnormality detection unit 184 causes the abnormality notification unit 185 to notify the abnormality of the position of the reference mark Rm without starting the pickup operation.
- FIG. 11 is a diagram for explaining a modification of the first embodiment.
- the wafer shown in FIG. 11 is a wafer WS having an orientation flat OF.
- the wafer WS has a straight portion Wa formed by cutting out a part of the arc periphery.
- shape features that are easy to grasp are corner portions P11 and P12 where both ends of the straight line portion Wa intersect with the arc periphery of the wafer WS.
- the extraction control unit 183 first specifies the positions of the corners P11 and P12 based on the image data of the wafer WS and obtains the coordinates thereof. Next, the extraction control unit 183 derives the intermediate point between the one corner P11 and the other corner P12, that is, the intermediate point of the straight line Wa as the reference position P. Further, the extraction control unit 183 extracts the reference mark Rm and obtains the center coordinates thereof.
- the abnormality detection unit 184 obtains the direction vector V12 that is the measured positional relationship between the reference position P and the center coordinates of the reference mark Rm.
- FIG. 11 shows the direction vector V12.
- the abnormality detection unit 184 compares the direction vector V12 with the direction vector from the reference position P stored in the storage unit 17 to the reference mark Rm, and whether the reference mark Rm is printed at a predetermined position. Determine whether or not.
- the bare chip C existing at the position indicated by the direction vector V2 is recognized as the first suction bare chip C1 with the center coordinate of the reference mark Rm as a starting point, and the pickup operation is started.
- the position of the corner P11 or P12 itself may be used as the reference position P if the rotation correction of the wafer WS (described later with reference to FIG. 15) is performed.
- FIG. 12 is a diagram for explaining a second embodiment of detection of the position abnormality of the reference mark Rm.
- the wafer W generally has a circular shape.
- the arc shape itself at the periphery of the wafer is treated as a shape feature.
- the wafer W may be any wafer having a notch N, an orientation flat OF, or another display portion indicating another crystal axis direction.
- the image processing unit 14 When the plane image data of the wafer W is acquired by the component recognition camera 8, the image processing unit 14 performs an edge detection process to extract the outer shape of the wafer W and the pattern appearing on the wafer WL. Subsequently, the extraction control unit 183 obtains an arc vertex of the outer peripheral edge of the wafer W based on the extracted outer shape data of the wafer W.
- FIG. 12 shows four arc vertices P21, P22, P23, and P24 in the X direction and the Y direction.
- the reference position P is the center position of the wafer derived from the arc shape of the wafer W. That is, the extraction control unit 183 obtains the coordinates of the center position of the circular wafer W from the coordinates of the four arc vertices P21, P22, P23, and P24. This center position is set as a reference position P. Note that three arc vertices may be obtained. Further, the extraction control unit 183 extracts the reference mark Rm and obtains the center coordinate thereof.
- the abnormality detection unit 184 obtains a direction vector V13 that is an actually measured positional relationship between the reference position P and the center coordinates of the reference mark Rm.
- FIG. 11 shows the direction vector V13.
- the abnormality detection unit 184 compares this direction vector V13 with the direction vector from the reference position P stored in the storage unit 17 to the reference mark Rm, and whether the reference mark Rm is printed at a predetermined position. Determine whether or not.
- the bare chip C existing at the position indicated by the direction vector V2 is recognized as the first suction bare chip C1 with the center coordinate of the reference mark Rm as a starting point, and the pickup operation is started.
- the abnormality notification unit 185 notifies the abnormality in the position of the reference mark Rm.
- FIG. 13 is a diagram for explaining a modification of the second embodiment.
- the processing for obtaining the center position of the wafer W can be omitted.
- FIG. 13 shows three circular arc vertices P31, P32, and P33.
- the positions of the arc vertices P31, P32, and P33 can be arranged at predetermined positions in the XY coordinate system. Therefore, it is sufficient to obtain a direction vector toward the reference mark Rm from any one of the coordinates of the arc vertices P31, P32, and P33 as the measured positional relationship.
- FIG. 13 shows an example in which a circular arc vertex P33 is treated as a reference position P, and a direction vector V14 that is an actual measurement position relationship between the reference position P and the center coordinates of the reference mark Rm is obtained.
- the abnormality detection unit 184 compares the direction vector V14 with the direction vector from the arc vertex P33 stored in the storage unit 17 to the reference mark Rm, and determines whether the reference mark Rm is printed at a predetermined position. Is determined.
- the reference position can be set without depending on the notch N, the orientation flat OF, or the like.
- the control unit 12 causes the wafer W to be carried in (step S1). Specifically, the control unit 12 controls the shaft control unit 13 to operate the drive motor 53 to move the wafer holding table 5 to a wafer receiving position in the vicinity of the wafer storage unit 10. When a predetermined wafer W in the wafer storage unit 10 is placed on the wafer holding table 5, the control unit 12 moves the wafer holding table 5 toward the component extraction work position.
- the control unit 12 causes the component recognition camera 8 to take an image of the wafer W on the wafer holding table 5 (step S2).
- the image data of the wafer W is taken into the image processing unit 14 and subjected to predetermined image processing.
- the control unit 12 executes a correction process of the rotation angle ⁇ based on the photographed image of the wafer W in order to eliminate this rotation shift (step S3).
- FIG. 15 is a diagram for explaining the rotation angle correction process.
- the rotation correction unit 182 of the control unit 12 detects a plurality of predetermined calibration chips CA based on the image data of the wafer W processed by the image processing unit 14.
- the plurality of calibration chips CA are bare chips arranged at a predetermined pitch L1 along a single dicing line and arranged within a predetermined calibration distance L2. Therefore, the direction of the dicing line can be recognized by recognizing the plurality of calibration chips CA on the image.
- the rotation correction unit 182 obtains the inclination of the recognized dicing line with respect to the X axis of the component mounting apparatus 100, and acquires the rotation angle ⁇ .
- the rotation correction unit 182 replaces the rotation angle ⁇ with rotation angle correction data, and stores it in the storage unit 17.
- the reference position P is calibrated so as to exist at a predetermined position.
- the wafer holding table 5 may be actually rotated by the rotation angle ⁇ to practically eliminate the rotational deviation.
- the rotation angle ⁇ may be detected by directly detecting a dicing line.
- the rotation angle ⁇ may be detected by recognizing two unique bear chips C defined in advance.
- the extraction control unit 183 of the control unit 12 performs the process of extracting the shape feature of the wafer W described in the first embodiment or the second embodiment (step S4). Further, the extraction control unit 183 obtains the reference position P based on the obtained geometric feature, and derives the coordinates of the reference position P (step S5). Further, the extraction control unit 183 also recognizes the position of the reference mark Rm on the image and specifies the coordinates of the reference mark Rm (step S6). The coordinates of the reference position P and the coordinates of the reference mark Rm acquired in steps S5 and S6 are given to the abnormality detection unit 184 as position data of the measured position relationship.
- the abnormality detection unit 184 reads the coordinates of the reference position P and the coordinates of the reference mark Rm stored in the storage unit 17, and acquires a set position relationship that is a positional relationship between them. Then, the abnormality detection unit 184 performs a process of comparing the set positional relationship with the measured positional relationship given previously (step S7).
- the abnormality detection unit 184 determines whether or not the reference mark Rm is printed at a predetermined position, that is, whether or not there is a position abnormality of the reference mark Rm (step S8).
- a position abnormality of the reference mark Rm is detected, for example, the coordinate of the reference mark Rm related to the actually measured position is 1 ⁇ 2 or more of the arrangement pitch of the bare chips C compared to the coordinate of the reference mark Rm related to the set position.
- the abnormality notifying unit 185 notifies the occurrence of a position abnormality (step S9).
- the pickup control unit 181 reads the wafer map WM from the storage unit 17 and sets a pickup sequence (step S10), and causes the take-out unit 7 to perform the pickup operation of the bare chip C (step S11). Specifically, the pickup control unit 181 controls the shaft control unit 13 to operate the push-up head drive motor 63 and causes the push-up head 61 to push up the bare chip C designated.
- the wafer head lifting motor 7i and the like are operated to cause the take-out section 7 (wafer heads 7a to 7d) to attract the bare chip C pushed up by the pushing-up section 6, and the wafer head rotating motor 7h.
- the operation of operating and flipping the bare chip C attracted to the wafer heads 7a to 7d is executed.
- the bare chip C is adsorbed from the wafer heads 7a to 7d to the component mounting heads 411 and 412 at a predetermined delivery position.
- the mounting portion 4 is moved above a flux supply device (not shown) while being attracted to the component mounting heads 411 and 412, and flux is applied to the bump forming surface of the bare chip C (step S 12).
- the mounting unit 4 is moved so as to pass over the fixed camera 9, the bump forming surface of the bare chip C is photographed, and the defect determination of the bump forming surface and the recognition of the suction position deviation are performed (step S13). After this photographing, the mounting unit 4 is moved above the printed circuit board 20 held on the conveyor 2, and the sucked bare chip C is mounted at a predetermined position on the printed circuit board 20 (step S14).
- the position of the first suction bare chip C1 (die) can be accurately specified even if the reference mark Rm is misaligned. it can. Accordingly, it is possible to provide the component mounting apparatus 100 that can accurately take out the bare chip C from the wafer W by the pickup sequence along the wafer map WM regardless of whether or not the positional deviation of the reference mark Rm occurs.
- a die pick-up apparatus includes a wafer that is diced into a plurality of dies, an imaging device that captures an image of a wafer in which a mark indicating a reference position is attached to an arbitrary die, and the wafer
- a storage unit that stores in advance a set positional relationship that is a positional relationship between the known reference position of the wafer and the mark of the wafer; and image processing of the captured image of the wafer;
- An extraction processing unit that extracts a feature portion and derives the reference position based on the geometric feature portion, an actual measurement positional relationship between the reference position and the mark specified from the image of the wafer, and the storage unit
- an abnormality detection unit that detects an abnormality in the position of the mark by comparing the set positional relationship stored in FIG.
- the shape feature of the wafer is extracted by the extraction processing unit.
- the geometric feature is a unique shape derived from the shape of the wafer and includes any wafer.
- the reference position derived from the shape feature can be grasped in advance and is not changed. Therefore, the setting position relationship between the position where the mark indicating the reference position is to be added and the reference position is stored in advance in the storage unit, so that the setting position where the mark should exist on the wafer is specified. . Therefore, it is possible to detect an abnormal position of the mark by comparing the measured positional relationship of the mark specified from the wafer image with the set positional relationship.
- the shape feature is a notch indicating a crystal axis direction of the wafer.
- the shape feature is an orientation flat indicating a crystal axis direction of the wafer.
- the notch or the orientation flat is a portion which is attached to any wafer as a crystal axis direction of the wafer and where the shape clearly appears. Therefore, it is desirable to treat these as the geometric features.
- the reference position can be, for example, the center position of the notch derived from the shape of the notch, or the center position of the straight line portion derived from both end positions of the straight portion of the orientation flat.
- the wafer has a circular shape, and the shape feature is an arc shape around the periphery of the wafer.
- the reference position can be the center position of the wafer derived from the arc shape.
- the arc shape of the periphery of the wafer can be a geometric feature by specifying the apex of the arc, for example. Further, by recognizing an arc and specifying a plurality of points on the arc, the center of the circular wafer can be specified. Therefore, according to the die pick-up apparatus, the reference position can be set without depending on notches, orientation flats, and the like.
- a correction unit that performs processing for generating rotation angle correction data is further provided, and the reference position is calibrated by the processing of the correction unit.
- the die pick-up apparatus further includes a head for picking up the die, a pick-up control unit for controlling the operation of the head, and the storage unit is a wafer map showing evaluation of each die included in the wafer. Is preferably stored, and the pickup control unit preferably determines a die to be picked up first by the head on the basis of the die provided with the mark.
- the head can be made to accurately pick up the die according to the wafer map.
- the position of the die can be accurately specified even if the reference mark is misaligned. Therefore, it is possible to provide a die pickup device that can accurately take out a target die.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Dicing (AREA)
Abstract
Description
以下、本発明の実施形態を、図面に基づいて詳細に説明する。本発明に係るダイピックアップ装置は、例えばダイボンダ、ダイシングされたダイをテープに収容するテーピング装置、或いは前記ダイを基板に実装する部品実装装置などの各種装置に適用することができる。ここでは、当該ダイピックアップ装置が、部品実装装置に適用される例について説明する。
記憶部17に記憶される各種データの一つとして、ウェハマップがある。図4(A)は、典型的なウェハWの上面視の平面図、図4(B)は、そのウェハWについてのウェハマップWMの一例を示す図である。図4(A)に示すように、ウェハWにはダイシングによって独立化された複数のベアチップCが存在する。ベアチップCは、ウェハシート上においてXY方向にマトリクス配列された状態にある。これらベアチップCの各々は、XY座標系に基づくアドレスによって位置が管理される。
上記の不具合の解消のため、本実施形態では、ベアチップCのピックアップ作業に先立って、ウェハWが固有に備える形状的特徴部を抽出する。そして、この形状的特徴部から導出される基準位置と、リファレンスマークRmとの位置関係から、リファレンスマークRmの位置異常を検出する。位置異常が検出された場合には、マップズレが生じた状態でのピックアップを防止するために、例えばアラームを発報させる。
第2実施形態では、ノッチNやオリエンテーションフラットOFに依存せずに、基準位置Pを設定する例を示す。図12は、リファレンスマークRmの位置異常検知の第2実施形態を説明するための図である。図12に示すように、一般にウェハWは円形の形状を有する。第2実施形態では、ウェハの周縁の円弧形状自体を、形状的特徴部と扱う。このためウェハWは、ノッチN、オリエンテーションフラットOF、或いは他の結晶軸方向を示す他の表示部を有するいずれのウェハであっても良い。
続いて、図14のフローチャートに基づいて、部品実装装置100の動作を説明する。図略の入力装置から制御部12に部品実装開始の指示が与えられると、制御部12はウェハWの搬入作業を実行させる(ステップS1)。具体的には制御部12は、軸制御部13を制御して駆動モータ53を動作させ、ウェハ保持テーブル5をウェハ収納部10の近傍のウェハ受け取り位置へ移動させる。ウェハ収納部10の所定のウェハWがウェハ保持テーブル5に載置されると、制御部12は、そのウェハ保持テーブル5を部品取出作業位置へ向けて移動させる。
Claims (7)
- 複数のダイにダイシングされたウェハであって、任意のダイにリファレンス位置を示すマークが付与されたウェハの画像を撮影する撮像装置と、
前記ウェハ上の既知の基準位置と、前記ウェハの前記マークとの位置関係である設定位置関係を予め記憶する記憶部と、
撮影された前記ウェハの画像を画像処理して、前記マークと前記ウェハの形状的特徴部とを抽出し、前記形状的特徴部に基づいて前記基準位置を導出する抽出処理部と、
前記ウェハの画像から特定される前記基準位置と前記マークとの実測位置関係と、前記記憶部が記憶する前記設定位置関係とを比較することにより、前記マークの位置異常を検出する異常検知部と、
を備えるダイピックアップ装置。 - 請求項1に記載のダイピックアップ装置において、
前記形状的特徴部は、前記ウェハの結晶軸方向を示すノッチである、ダイピックアップ装置。 - 請求項1に記載のダイピックアップ装置において、
前記形状的特徴部は、前記ウェハの結晶軸方向を示すオリエンテーションフラットである、ダイピックアップ装置。 - 請求項1に記載のダイピックアップ装置において、
前記ウェハが円形の形状を有し、
前記形状的特徴部は、前記ウェハの周縁の円弧形状である、ダイピックアップ装置。 - 請求項4に記載のダイピックアップ装置において、
前記基準位置は、前記円弧形状から導出される前記ウェハの中心位置である、ダイピックアップ装置。 - 請求項1~5のいずれか1項に記載のダイピックアップ装置において、
前記ウェハが搭載される保持テーブルと、
前記保持テーブルに搭載された前記ウェハの、所定の基準線に対するズレを示す回転角を求め、前記ズレが存在している場合に回転角補正データを生成する処理を行う補正部と、をさらに備え、
前記補正部の処理により、前記基準位置が校正される、ダイピックアップ装置。 - 請求項1~5のいずれか1項に記載のダイピックアップ装置において、
前記ダイをピックアップするヘッドと、
前記ヘッドの動作を制御するピックアップ制御部と、をさらに備え、
前記記憶部には、前記ウェハが備えるダイの各々の評価を示すウェハマップがさらに記憶され、
前記ピックアップ制御部は、前記マークが付与されたダイを基準として、前記ヘッドに最初にピックアップさせるダイを決定する、ダイピックアップ装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020187013994A KR102056656B1 (ko) | 2016-01-28 | 2016-01-28 | 다이 픽업 장치 |
PCT/JP2016/052549 WO2017130361A1 (ja) | 2016-01-28 | 2016-01-28 | ダイピックアップ装置 |
JP2017563481A JP6522797B2 (ja) | 2016-01-28 | 2016-01-28 | ダイピックアップ装置 |
CN201680062745.8A CN108352308B (zh) | 2016-01-28 | 2016-01-28 | 晶片拾取装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2016/052549 WO2017130361A1 (ja) | 2016-01-28 | 2016-01-28 | ダイピックアップ装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2017130361A1 true WO2017130361A1 (ja) | 2017-08-03 |
Family
ID=59397619
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2016/052549 WO2017130361A1 (ja) | 2016-01-28 | 2016-01-28 | ダイピックアップ装置 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP6522797B2 (ja) |
KR (1) | KR102056656B1 (ja) |
CN (1) | CN108352308B (ja) |
WO (1) | WO2017130361A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019145634A (ja) * | 2018-02-20 | 2019-08-29 | ワイエイシイガーター株式会社 | 剥離装置 |
JP2020163518A (ja) * | 2019-03-29 | 2020-10-08 | ファナック株式会社 | 搬送装置及び受渡システム |
WO2023228322A1 (ja) * | 2022-05-25 | 2023-11-30 | ヤマハ発動機株式会社 | ダイピックアップ方法および装置 |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109449096B (zh) * | 2018-11-08 | 2021-12-03 | 科为升视觉技术(苏州)有限公司 | 识别检测晶元芯片的方法 |
KR102629290B1 (ko) * | 2018-12-13 | 2024-01-29 | 삼성디스플레이 주식회사 | 표시 장치 제조 방법 |
CN110390325B (zh) * | 2019-07-30 | 2021-07-02 | 深圳市静尚云科技有限公司 | 一种网络集中式ocr识别系统及方法 |
JP7285162B2 (ja) * | 2019-08-05 | 2023-06-01 | ファスフォードテクノロジ株式会社 | ダイボンディング装置および半導体装置の製造方法 |
JP7404009B2 (ja) * | 2019-09-19 | 2023-12-25 | キオクシア株式会社 | 加工情報管理システム及び加工情報管理方法 |
CN114359240A (zh) * | 2022-01-07 | 2022-04-15 | 河北博威集成电路有限公司 | 芯片分选防错位方法、装置、终端及存储介质 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0312937A (ja) * | 1989-06-12 | 1991-01-21 | Nec Corp | ペレットの位置合せ方法 |
JP2009016455A (ja) * | 2007-07-02 | 2009-01-22 | Nec Corp | 基板位置検出装置及び基板位置検出方法 |
JP2010067988A (ja) * | 2009-11-12 | 2010-03-25 | Canon Inc | 露光装置、位置検出方法、及びデバイス製造方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000232138A (ja) * | 1999-02-09 | 2000-08-22 | Hitachi Ltd | 半導体装置とそのマーク形成装置,その欠陥検査装置 |
JP2006112933A (ja) * | 2004-10-15 | 2006-04-27 | Hitachi High-Tech Electronics Engineering Co Ltd | アライメントマーク検査方法およびプログラム |
JP5059518B2 (ja) * | 2007-08-10 | 2012-10-24 | Juki株式会社 | 電子部品実装方法及び装置 |
KR101183101B1 (ko) | 2011-05-06 | 2012-09-21 | 주식회사 프로텍 | 플립칩용 다이 본딩 방법 |
JP5941715B2 (ja) * | 2012-03-19 | 2016-06-29 | ファスフォードテクノロジ株式会社 | ダイピックアップ装置及びダイピックアップ方法 |
TWI545663B (zh) | 2014-05-07 | 2016-08-11 | 新川股份有限公司 | 接合裝置以及接合方法 |
-
2016
- 2016-01-28 CN CN201680062745.8A patent/CN108352308B/zh active Active
- 2016-01-28 KR KR1020187013994A patent/KR102056656B1/ko active IP Right Grant
- 2016-01-28 WO PCT/JP2016/052549 patent/WO2017130361A1/ja active Application Filing
- 2016-01-28 JP JP2017563481A patent/JP6522797B2/ja active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0312937A (ja) * | 1989-06-12 | 1991-01-21 | Nec Corp | ペレットの位置合せ方法 |
JP2009016455A (ja) * | 2007-07-02 | 2009-01-22 | Nec Corp | 基板位置検出装置及び基板位置検出方法 |
JP2010067988A (ja) * | 2009-11-12 | 2010-03-25 | Canon Inc | 露光装置、位置検出方法、及びデバイス製造方法 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019145634A (ja) * | 2018-02-20 | 2019-08-29 | ワイエイシイガーター株式会社 | 剥離装置 |
JP7195051B2 (ja) | 2018-02-20 | 2022-12-23 | ワイエイシイガーター株式会社 | 剥離装置 |
JP2020163518A (ja) * | 2019-03-29 | 2020-10-08 | ファナック株式会社 | 搬送装置及び受渡システム |
JP7022097B2 (ja) | 2019-03-29 | 2022-02-17 | ファナック株式会社 | 搬送装置及び受渡システム |
US11325261B2 (en) | 2019-03-29 | 2022-05-10 | Fanuc Corporation | Transfer device and delivery system |
WO2023228322A1 (ja) * | 2022-05-25 | 2023-11-30 | ヤマハ発動機株式会社 | ダイピックアップ方法および装置 |
Also Published As
Publication number | Publication date |
---|---|
JP6522797B2 (ja) | 2019-05-29 |
CN108352308B (zh) | 2022-05-10 |
KR102056656B1 (ko) | 2019-12-17 |
CN108352308A (zh) | 2018-07-31 |
JPWO2017130361A1 (ja) | 2018-07-19 |
KR20180071320A (ko) | 2018-06-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2017130361A1 (ja) | ダイピックアップ装置 | |
CN111656504B (zh) | 裸片拾取方法及装置 | |
JP2016219474A (ja) | 部品取出し装置および部品取出し方法ならびに部品実装装置 | |
JP2008060249A (ja) | 部品実装方法および表面実装機 | |
JP2016219472A (ja) | 部品取出し装置および部品取出し方法ならびに部品実装装置 | |
JP4855347B2 (ja) | 部品移載装置 | |
JP6727768B2 (ja) | 基板作業装置 | |
EP2059112B1 (en) | Electronic component taking out apparatus, surface mounting apparatus and method for taking out electronic component | |
JP2005072046A (ja) | 電子部品実装装置 | |
JP4122170B2 (ja) | 部品実装方法及び部品実装装置 | |
WO2018134873A1 (ja) | 被実装物作業装置 | |
JP5787397B2 (ja) | 電子部品実装装置および電子部品実装方法 | |
JP2016219473A (ja) | 部品取出し装置および部品取出し方法ならびに部品実装装置 | |
JP2007287838A (ja) | 部品移載装置、実装機および部品検査機用部品移載装置 | |
JP6086671B2 (ja) | ダイ部品供給装置 | |
JP4308736B2 (ja) | 電子部品供給方法、同装置および表面実装機 | |
JP4712766B2 (ja) | 部品移載装置 | |
JP2011023616A (ja) | 部品実装方法および部品実装装置 | |
US10879096B2 (en) | Die component supply device | |
JP6884494B2 (ja) | 部品搬送装置、部品搬送方法および部品実装装置 | |
JP5622886B2 (ja) | 部品実装方法 | |
JP2009010176A5 (ja) | ||
JP6556200B2 (ja) | 電子部品実装装置、基板の製造方法 | |
JP6435241B2 (ja) | 電子部品実装装置、基板の製造方法 | |
CN117337620A (zh) | 元件移载装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 16887948 Country of ref document: EP Kind code of ref document: A1 |
|
ENP | Entry into the national phase |
Ref document number: 2017563481 Country of ref document: JP Kind code of ref document: A |
|
ENP | Entry into the national phase |
Ref document number: 20187013994 Country of ref document: KR Kind code of ref document: A |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 16887948 Country of ref document: EP Kind code of ref document: A1 |