WO2017128836A1 - 一种氧化物半导体薄膜晶体管的制备方法 - Google Patents
一种氧化物半导体薄膜晶体管的制备方法 Download PDFInfo
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- WO2017128836A1 WO2017128836A1 PCT/CN2016/107509 CN2016107509W WO2017128836A1 WO 2017128836 A1 WO2017128836 A1 WO 2017128836A1 CN 2016107509 W CN2016107509 W CN 2016107509W WO 2017128836 A1 WO2017128836 A1 WO 2017128836A1
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- thin film
- oxide semiconductor
- film transistor
- semiconductor thin
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- 238000002360 preparation method Methods 0.000 title claims abstract description 27
- 239000010409 thin film Substances 0.000 title claims abstract description 25
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 238000000034 method Methods 0.000 claims abstract description 21
- 238000005406 washing Methods 0.000 claims abstract description 11
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 34
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 30
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 20
- 229910052757 nitrogen Inorganic materials 0.000 claims description 15
- 239000008367 deionised water Substances 0.000 claims description 13
- 229910021641 deionized water Inorganic materials 0.000 claims description 13
- 238000005121 nitriding Methods 0.000 claims description 13
- 239000010408 film Substances 0.000 claims description 12
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 10
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 10
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 10
- 229910000040 hydrogen fluoride Inorganic materials 0.000 claims description 10
- 239000011259 mixed solution Substances 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 239000000243 solution Substances 0.000 claims description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
- 238000004140 cleaning Methods 0.000 claims description 5
- 238000001816 cooling Methods 0.000 claims description 5
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 5
- 239000011787 zinc oxide Substances 0.000 claims description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052746 lanthanum Inorganic materials 0.000 claims description 4
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 claims description 4
- 229910052718 tin Inorganic materials 0.000 claims description 4
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 3
- 235000011114 ammonium hydroxide Nutrition 0.000 claims description 3
- JEGUKCSWCFPDGT-UHFFFAOYSA-N h2o hydrate Chemical compound O.O JEGUKCSWCFPDGT-UHFFFAOYSA-N 0.000 claims description 3
- 229910052684 Cerium Inorganic materials 0.000 claims description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 2
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 2
- ZLMJMSJWJFRBEC-UHFFFAOYSA-N Potassium Chemical compound [K] ZLMJMSJWJFRBEC-UHFFFAOYSA-N 0.000 claims description 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 2
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 claims description 2
- 229910052785 arsenic Inorganic materials 0.000 claims description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 2
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052733 gallium Inorganic materials 0.000 claims description 2
- 150000002500 ions Chemical class 0.000 claims description 2
- 229910052747 lanthanoid Inorganic materials 0.000 claims description 2
- 239000011133 lead Substances 0.000 claims description 2
- 229910052749 magnesium Inorganic materials 0.000 claims description 2
- 239000011777 magnesium Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 claims description 2
- 239000002184 metal Substances 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052698 phosphorus Inorganic materials 0.000 claims description 2
- 239000011574 phosphorus Substances 0.000 claims description 2
- 239000011591 potassium Substances 0.000 claims description 2
- 229910052700 potassium Inorganic materials 0.000 claims description 2
- 229910052761 rare earth metal Inorganic materials 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 239000010936 titanium Substances 0.000 claims description 2
- 229910052720 vanadium Inorganic materials 0.000 claims description 2
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052726 zirconium Inorganic materials 0.000 claims description 2
- 150000002602 lanthanoids Chemical class 0.000 claims 1
- 230000001629 suppression Effects 0.000 abstract description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- 239000007864 aqueous solution Substances 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- -1 lanthanide rare earth Chemical class 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
Definitions
- the present invention relates to the technical field of transistors, and in particular, to a method for fabricating an oxide semiconductor thin film transistor.
- liquid crystal display devices using silicon materials have been rapidly developed due to their small size, light weight and high quality, and have become mainstream information display terminals.
- amorphous silicon has the disadvantages of low field effect mobility, strong photosensitivity, and opaque materials.
- the large-area fabrication process of polysilicon TFTs is complicated and low-temperature processes are difficult to achieve.
- polycrystalline silicon is not suitable for substrates that are not resistant to high temperatures because it cannot be prepared at low temperatures. Therefore, metal oxide semiconductors are used as active layer materials for thin film transistors, and their high mobility, low deposition temperature, and transparent optical characteristics are regarded as next-generation display backplane technologies.
- An object of the present invention is to provide a method for preparing an oxide semiconductor thin film transistor having a simple preparation process, high mobility, and good transparency.
- a method of fabricating an oxide semiconductor thin film transistor comprising: a substrate, a gate dielectric layer, a channel layer, a source electrode, and a drain electrode, the preparation method comprising the steps of:
- Substrate cleaning The substrate is immersed in 18 ⁇ 25% aqueous hydrogen fluoride solution for 1 ⁇ 2min, then rinsed with deionized water. After washing, add mixed solution of water, hydrogen peroxide and ammonia water, cook for 10 ⁇ 15min, temperature control Rinse with deionized water at 75 ° C ⁇ 85 ° C, add to a mixed solution of water, hydrogen peroxide and hydrochloric acid, cook for 10 ⁇ 15min, the temperature is controlled at 75 ° C ⁇ 85 ° C, rinse with water and then with nitrogen dry;
- a zinc oxide film is prepared on a gate dielectric layer by radio frequency magnetron sputtering
- a source electrode and a drain electrode are formed on both sides of the channel layer prepared in the step (3) by a vacuum film, and the vacuum degree during the vacuum filming process is less than 5 ⁇ 10 -3 Pa.
- the substrate is a silicon substrate.
- the gate dielectric layer is silicon nitride.
- the source electrode and the drain electrode are metal aluminum thin films.
- the ion water washing process is several times, straight
- the pH of the ionized water after rinsing is 7-8, and the rinsing process is ended.
- the channel layer is further doped with gallium, tin, silicon, aluminum, magnesium, lanthanum, cerium, lanthanum, nickel, zirconium, tin, phosphorus, vanadium, arsenic, titanium, lead, potassium or lanthanide rare earth. Any one of the elements or any combination of two or more.
- the invention has the beneficial effects that the process of the invention is reasonable, simple and reasonable, and the prepared oxide semiconductor thin film transistor has good suppression ability for carriers, improves the reliability of the device and the circuit, and simplifies the design of the threshold voltage compensation circuit. Moreover, it is advantageous to form an amorphous film at a low temperature, which is advantageous for ensuring uniformity of device preparation and improving stability of a device manufactured by a low temperature process.
- a method of fabricating an oxide semiconductor thin film transistor comprising: a substrate, a gate dielectric layer, a channel layer, a source electrode, and a drain electrode, the preparation method comprising the steps of:
- Substrate cleaning The silicon substrate is immersed in an 18% aqueous solution of hydrogen fluoride for 1 min, then rinsed with deionized water. After washing, a mixed solution of water, hydrogen peroxide and ammonia is added, and the mixture is cooked for 10 minutes, and the temperature is controlled at 75 ° C. After ionic water washing, add to a mixed solution of water, hydrogen peroxide and hydrochloric acid, cook for 10 minutes, control the temperature at 75 ° C, rinse with water and then dry with nitrogen;
- a zinc oxide film is prepared on a gate dielectric layer by radio frequency magnetron sputtering
- a source electrode and a drain electrode were formed on both sides of the channel layer prepared in the step (3) by a vacuum film, and the degree of vacuum during the vacuum filming process was 5 ⁇ 10 -3 Pa.
- a method of fabricating an oxide semiconductor thin film transistor comprising: a substrate, a gate dielectric layer, a channel layer, a source electrode, and a drain electrode, the preparation method comprising the steps of:
- Substrate cleaning The silicon substrate is immersed in a 20% aqueous solution of hydrogen fluoride for 1.5 min, then rinsed with deionized water. After washing, a mixed solution of water, hydrogen peroxide and ammonia is added, and the mixture is cooked for 12 minutes, and the temperature is controlled at 80 ° C. Rinse with deionized water, add to a mixed solution of water, hydrogen peroxide and hydrochloric acid, cook for 12 minutes, control the temperature at 80 ° C, rinse with water and then dry with nitrogen;
- a zinc oxide film is prepared on a gate dielectric layer by radio frequency magnetron sputtering
- a source electrode and a drain electrode were formed on both sides of the channel layer prepared in the step (3) by a vacuum film, and the degree of vacuum during the vacuum filming process was 5 ⁇ 10 -3 Pa.
- a method of fabricating an oxide semiconductor thin film transistor comprising: a substrate, a gate dielectric layer, a channel layer, a source electrode, and a drain electrode, the preparation method comprising the steps of:
- Substrate cleaning The silicon substrate is immersed in a 25% aqueous solution of hydrogen fluoride for 2 minutes, then rinsed with deionized water. After washing, it is added to a mixed solution of water, hydrogen peroxide and ammonia water, and cooked for 15 minutes. The temperature is controlled at 85 ° C. After ionic water washing, add to a mixed solution of water, hydrogen peroxide and hydrochloric acid, cook for 15 minutes, control the temperature at 85 ° C, rinse with water and then dry with nitrogen;
- a zinc oxide film is prepared on a gate dielectric layer by radio frequency magnetron sputtering
- a source electrode and a drain electrode were formed on both sides of the channel layer prepared in the step (3) by a vacuum film, and the degree of vacuum during the vacuum filming process was 5 ⁇ 10 -3 Pa.
- the process of the invention is reasonable, simple and reasonable, and the prepared oxide semiconductor thin film crystal
- the body tube has good suppression ability for carriers, improves the reliability of the device and the circuit, and simplifies the complexity of the design of the threshold voltage compensation circuit, and is favorable for forming an amorphous film at a low temperature, which is advantageous for ensuring device preparation. Consistency, improving the stability of devices fabricated by low temperature processes.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
- Manufacturing & Machinery (AREA)
- Formation Of Insulating Films (AREA)
Abstract
一种氧化物半导体薄膜晶体管的制备方法，所述氧化物半导体薄膜晶体管包括基板、栅介质层、沟道层、源电极和漏电极，其制备方法包括以下步骤：⑴基板清洗；⑵栅介质层制备；⑶沟道层的制备；⑷源电极和漏电极的制备。本发明工艺合理，简单合理，同时制备的氧化物半导体薄膜晶体管对载流子具有良好抑制能力，提高器件和电路的可靠性，并简化了阈值电压补偿电路设计的复杂性，而且，有利于在低温下形成非晶态的薄膜，有利于保证器件制备的一致性、改善通过低温工艺制造的器件的稳定性。
Description
本发明涉及晶体管的技术领域，具体涉及一种氧化物半导体薄膜晶体管的制备方法。
随着信息时代的到来，显示器件正加速向平板化、节能化的方向发展，其中以薄膜晶体管为开关元件的有源阵列驱动显示器件成为众多平板显示技术中的佼佼者。而在过去很长的时间里，一直采用的都是和CMOS工艺兼容的硅系材料。
在近十几年时间，以硅材料(非晶硅和多晶硅)TFT为驱动单元的液晶显示器件以其体积小、重量轻、品质高等优点获得了迅速发展，并成为主流的信息显示终端。然而，非晶硅存在场效应迁移率低、光敏性强以及材料不透明等缺点，而多晶硅TFT大面积制作工艺复杂、低温工艺难以实现。而且多晶硅由于不能低温制备而不适用于不耐高温的衬底。因此以金属氧化物半导体作为薄膜晶体管的有源层材料，由于其高迁移率，低沉积温度以及透明的光学特性被视为下一代的显示背板技术。
发明内容
本发明的目的是提供一种制备工艺简单、高迁移率、透明性好的氧化物半导体薄膜晶体管的制备方法。
本发明是通过以下技术方案来实现的：
一种氧化物半导体薄膜晶体管的制备方法，所述氧化物半导体薄膜晶体管包括基板、栅介质层、沟道层、源电极和漏电极，其制备方法包括以下步骤：
⑴基板清洗：将基板用18～25％的氟化氢水溶液浸泡1～2min，然后用去离子水冲洗，冲洗完后加入过水、氧化氢和氨水的混合溶液中，蒸煮10～15min，温度控制在75℃～85℃，用去离子水冲洗后加入到水、过氧化氢和盐酸的混合溶液中，蒸煮10～15min，温度控制在75℃～85℃，用去离水冲洗后再用氮气吹干；
⑵栅介质层制备：将氮化炉温度上升至1300℃～1400℃，然后通氮气排杂，排杂的时间为15～20min，再通入纯氮气，然后将步骤⑴所得基板推入氮化炉中，氮化3～4h，冷却后将氮化后的所得物取出，用20～25％的氟化氢溶液清洗，再用去离子水冲洗后烘干，备用；
⑶沟道层的制备：利用射频磁控溅射法在栅介质层上制备氧化锌薄膜；
⑷源电极和漏电极的制备：通过真空渡膜的方法在步骤⑶制备的沟道层两侧形成源电极和漏电极，所述真空渡膜过程中真空度小于5×10-3Pa。
进一步地，所述基板为硅基板。
进一步地，所述栅介质层为氮化硅。
进一步地，所述源电极和漏电极为金属铝薄膜。
进一步地，所述步骤⑴和⑵中，离子水冲洗过程为若干次，直
至冲洗后的离子水PH值为7～8，结束冲洗过程。
进一步地，所述沟道层中还掺杂有镓、锡、硅、铝、镁、钽、铪、镱、镍、锆、锡、磷、钒、砷、钛、铅、钾或镧系稀土元素中的任意一种或两种以上的任意组合。
本发明的有益效果是：本发明工艺合理，简单合理，同时制备的氧化物半导体薄膜晶体管对载流子具有良好抑制能力，提高器件和电路的可靠性，并简化了阈值电压补偿电路设计的复杂性，而且，有利于在低温下形成非晶态的薄膜，有利于保证器件制备的一致性、改善通过低温工艺制造的器件的稳定性。
下面结合实施例对本发明做进一步地说明。
实施例1
一种氧化物半导体薄膜晶体管的制备方法，所述氧化物半导体薄膜晶体管包括基板、栅介质层、沟道层、源电极和漏电极，其制备方法包括以下步骤：
⑴基板清洗：将硅基板用18％的氟化氢水溶液浸泡1min，然后用去离子水冲洗，冲洗完后加入过水、氧化氢和氨水的混合溶液中，蒸煮10min，温度控制在75℃，用去离子水冲洗后加入到水、过氧化氢和盐酸的混合溶液中，蒸煮10min，温度控制在75℃，用去离水冲洗后再用氮气吹干；
⑵栅介质层制备：将氮化炉温度上升至1300℃，然后通氮气排杂，排杂的时间为15min，再通入纯氮气，然后将步骤⑴所得基板
推入氮化炉中，氮化3h，冷却后将氮化后的所得物取出，用20％的氟化氢溶液清洗，再用去离子水冲洗后烘干，备用；
⑶沟道层的制备：利用射频磁控溅射法在栅介质层上制备氧化锌薄膜；
⑷源电极和漏电极的制备：通过真空渡膜的方法在步骤⑶制备的沟道层两侧形成源电极和漏电极，所述真空渡膜过程中真空度为5×10-3Pa。
实施例2
一种氧化物半导体薄膜晶体管的制备方法，所述氧化物半导体薄膜晶体管包括基板、栅介质层、沟道层、源电极和漏电极，其制备方法包括以下步骤：
⑴基板清洗：将硅基板用20％的氟化氢水溶液浸泡1.5min，然后用去离子水冲洗，冲洗完后加入过水、氧化氢和氨水的混合溶液中，蒸煮12min，温度控制在80℃，用去离子水冲洗后加入到水、过氧化氢和盐酸的混合溶液中，蒸煮12min，温度控制在80℃，用去离水冲洗后再用氮气吹干；
⑵栅介质层制备：将氮化炉温度上升至1350℃，然后通氮气排杂，排杂的时间为18min，再通入纯氮气，然后将步骤⑴所得基板推入氮化炉中，氮化3.5h，冷却后将氮化后的所得物取出，用22％的氟化氢溶液清洗，再用去离子水冲洗后烘干，备用；
⑶沟道层的制备：利用射频磁控溅射法在栅介质层上制备氧化锌薄膜；
⑷源电极和漏电极的制备：通过真空渡膜的方法在步骤⑶制备的沟道层两侧形成源电极和漏电极，所述真空渡膜过程中真空度为5×10-3Pa。
实施例3
一种氧化物半导体薄膜晶体管的制备方法，所述氧化物半导体薄膜晶体管包括基板、栅介质层、沟道层、源电极和漏电极，其制备方法包括以下步骤：
⑴基板清洗：将硅基板用25％的氟化氢水溶液浸泡2min，然后用去离子水冲洗，冲洗完后加入过水、氧化氢和氨水的混合溶液中，蒸煮15min，温度控制在85℃，用去离子水冲洗后加入到水、过氧化氢和盐酸的混合溶液中，蒸煮15min，温度控制在85℃，用去离水冲洗后再用氮气吹干；
⑵栅介质层制备：将氮化炉温度上升至1400℃，然后通氮气排杂，排杂的时间为20min，再通入纯氮气，然后将步骤⑴所得基板推入氮化炉中，氮化4h，冷却后将氮化后的所得物取出，用25％的氟化氢溶液清洗，再用去离子水冲洗后烘干，备用；
⑶沟道层的制备：利用射频磁控溅射法在栅介质层上制备氧化锌薄膜；
⑷源电极和漏电极的制备：通过真空渡膜的方法在步骤⑶制备的沟道层两侧形成源电极和漏电极，所述真空渡膜过程中真空度为5×10-3Pa。
本发明工艺合理，简单合理，同时制备的氧化物半导体薄膜晶
体管对载流子具有良好抑制能力，提高器件和电路的可靠性，并简化了阈值电压补偿电路设计的复杂性，而且，有利于在低温下形成非晶态的薄膜，有利于保证器件制备的一致性、改善通过低温工艺制造的器件的稳定性。
Claims (6)
- 一种氧化物半导体薄膜晶体管的制备方法，其特征在于：所述氧化物半导体薄膜晶体管包括基板、栅介质层、沟道层、源电极和漏电极，其制备方法包括以下步骤：⑴基板清洗：将基板用18～25％的氟化氢水溶液浸泡1～2min，然后用去离子水冲洗，冲洗完后加入过水、氧化氢和氨水的混合溶液中，蒸煮10～15min，温度控制在75℃～85℃，用去离子水冲洗后加入到水、过氧化氢和盐酸的混合溶液中，蒸煮10～15min，温度控制在75℃～85℃，用去离水冲洗后再用氮气吹干；⑵栅介质层制备：将氮化炉温度上升至1300℃～1400℃，然后通氮气排杂，排杂的时间为15～20min，再通入纯氮气，然后将步骤⑴所得基板推入氮化炉中，氮化3～4h，冷却后将氮化后的所得物取出，用20～25％的氟化氢溶液清洗，再用去离子水冲洗后烘干，备用；⑶沟道层的制备：利用射频磁控溅射法在栅介质层上制备氧化锌薄膜；⑷源电极和漏电极的制备：通过真空渡膜的方法在步骤⑶制备的沟道层两侧形成源电极和漏电极，所述真空渡膜过程中真空度小于5×10-3Pa。
- 根据权利要求1所述一种氧化物半导体薄膜晶体管的制备方法，其特征在于：所述基板为硅基板。
- 根据权利要求1所述一种氧化物半导体薄膜晶体管的制备方法，其特征在于：所述栅介质层为氮化硅。
- 根据权利要求1所述一种氧化物半导体薄膜晶体管的制备方法，其特征在于：所述源电极和漏电极为金属铝薄膜。
- 根据权利要求1所述一种氧化物半导体薄膜晶体管的制备方法，其特征在于：所述步骤⑴和⑵中，离子水冲洗过程为若干次，直至冲洗后的离子水PH值为7～8，结束冲洗过程。
- 根据权利要求1所述一种氧化物半导体薄膜晶体管的制备方法，其特征在于：所述沟道层中还掺杂有镓、锡、硅、铝、镁、钽、铪、镱、镍、锆、锡、磷、钒、砷、钛、铅、钾或镧系稀土元素中的任意一种或两种以上的任意组合。
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| CN102275925A (zh) * | 2011-06-09 | 2011-12-14 | 东北大学 | 一种晶体硅切割废料氮化反应烧结碳化硅的方法 |
| CN104022160A (zh) * | 2014-06-20 | 2014-09-03 | 华北水利水电大学 | 高价态过渡金属掺杂的氧化锌基半导体材料及薄膜晶体管 |
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| CN104022160A (zh) * | 2014-06-20 | 2014-09-03 | 华北水利水电大学 | 高价态过渡金属掺杂的氧化锌基半导体材料及薄膜晶体管 |
| CN105742189A (zh) * | 2016-01-27 | 2016-07-06 | 苏州翠南电子科技有限公司 | 一种氧化物半导体薄膜晶体管的制备方法 |
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