WO2017101864A1 - 图像传感器、控制方法和电子装置 - Google Patents

图像传感器、控制方法和电子装置 Download PDF

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Publication number
WO2017101864A1
WO2017101864A1 PCT/CN2016/110445 CN2016110445W WO2017101864A1 WO 2017101864 A1 WO2017101864 A1 WO 2017101864A1 CN 2016110445 W CN2016110445 W CN 2016110445W WO 2017101864 A1 WO2017101864 A1 WO 2017101864A1
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Prior art keywords
photosensitive
image sensor
photosensitive pixels
switches
switch
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PCT/CN2016/110445
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English (en)
French (fr)
Inventor
李龙佳
Original Assignee
广东欧珀移动通信有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Priority claimed from CN201510963293.8A external-priority patent/CN105578074B/zh
Priority claimed from CN201510964086.4A external-priority patent/CN105554419B/zh
Priority claimed from CN201510960708.6A external-priority patent/CN105611198B/zh
Priority claimed from CN201510963291.9A external-priority patent/CN105516695B/zh
Application filed by 广东欧珀移动通信有限公司 filed Critical 广东欧珀移动通信有限公司
Priority to EP16874921.6A priority Critical patent/EP3313069B1/en
Priority to KR1020187006361A priority patent/KR102046635B1/ko
Priority to JP2018512601A priority patent/JP6461429B2/ja
Priority to US15/568,941 priority patent/US10313612B2/en
Priority to SG11201800816VA priority patent/SG11201800816VA/en
Publication of WO2017101864A1 publication Critical patent/WO2017101864A1/zh
Priority to IL257177A priority patent/IL257177B/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70Circuitry for compensating brightness variation in the scene
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50Control of the SSIS exposure
    • H04N25/57Control of the dynamic range
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/10Cameras or camera modules comprising electronic image sensors; Control thereof for generating image signals from different wavelengths
    • H04N23/12Cameras or camera modules comprising electronic image sensors; Control thereof for generating image signals from different wavelengths with one sensor only
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70Circuitry for compensating brightness variation in the scene
    • H04N23/741Circuitry for compensating brightness variation in the scene by increasing the dynamic range of the image compared to the dynamic range of the electronic image sensors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/10Circuitry of solid-state image sensors [SSIS]; Control thereof for transforming different wavelengths into image signals
    • H04N25/11Arrangement of colour filter arrays [CFA]; Filter mosaics
    • H04N25/13Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements
    • H04N25/134Arrangement of colour filter arrays [CFA]; Filter mosaics characterised by the spectral characteristics of the filter elements based on three different wavelength filter elements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
    • H04N25/46Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by combining or binning pixels
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50Control of the SSIS exposure
    • H04N25/53Control of the integration time
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/702SSIS architectures characterised by non-identical, non-equidistant or non-planar pixel layout
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75Circuitry for providing, modifying or processing image signals from the pixel array
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/778Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/265Mixing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/60Control of cameras or camera modules
    • H04N23/63Control of cameras or camera modules by using electronic viewfinders

Definitions

  • the present invention relates to imaging technology, and more particularly to an image sensor, a control method, and an electronic device.
  • the present invention aims to solve at least one of the technical problems in the related art to some extent. To this end, the present invention is required to provide an image sensor, a control method, and an electronic device.
  • An image sensor includes: a photosensitive unit array; an array of filter units on the photosensitive unit array, each of the filter units covering a corresponding one of the photosensitive units, and the photosensitive unit includes a plurality of photosensitive units a pixel; and a plurality of conversion units, each of the conversion units including at least two source followers, at least one of the source followers being coupled to the plurality of photosensitive pixels.
  • the array of filter elements comprises a Bayer array.
  • each of the photosensitive cells comprises 2*2 of the photosensitive pixels.
  • each of the conversion units includes two of the source followers, wherein one of the source followers is connected to two of the photosensitive pixels of the previous row, and the other of the source followers and the next row Two of the photosensitive pixels are connected.
  • the image sensor further includes a plurality of analog to digital conversion units, each of the analog to digital conversion units being coupled to two of the source followers.
  • the image sensor further includes:
  • each of said clock switches being coupled to one of said photosensitive pixels
  • a plurality of readout switches each of said readout switches being coupled to one of said source followers.
  • each of the conversion units includes two of the source followers, one of the source followers being coupled to three of the photosensitive pixels, and the other of the source followers and the remaining one The photosensitive pixel connection.
  • the image sensor further includes a plurality of analog to digital conversion units, each of the analog to digital conversion units being coupled to one of the source followers.
  • the image sensor further includes:
  • each of said clock switches being coupled to one of said photosensitive pixels
  • one of the source followers connected to the three of the photosensitive pixels being connected to one of the readout switches, and one of the source followers connected to the remaining one of the photosensitive pixels Read the switch connection.
  • each of the conversion units includes three of the source followers, one of the source followers being coupled to a column of two of the photosensitive pixels, and the other two of the source followers and remaining Two of the photosensitive pixels are respectively connected
  • the image sensor further includes a plurality of analog to digital conversion units, and one of the source followers connected to one of the two of the photosensitive pixels is connected to one of the analog to digital conversion units, and the other two Two of the source followers respectively connected to the two of the photosensitive pixels are connected to one of the analog to digital conversion units.
  • the image sensor further includes:
  • each of said clock switches being coupled to one of said photosensitive pixels
  • one of the source followers connected to one of the two of the photosensitive pixels is connected to one of the readout switches, and two of the source followers respectively connected to the remaining two of the photosensitive pixels Connected to one of the readout switches.
  • each of the conversion units includes three of the source followers, one of the source followers being connected to one of the two photosensitive pixels, and the other two of the source followers and remaining The two photosensitive pixels are respectively connected.
  • the image sensor further includes a plurality of analog to digital conversion units, each of the analog to digital conversion units being coupled to the three source followers.
  • the image sensor further includes:
  • each clock switch being connected to one of the photosensitive pixels
  • one of the two photosensitive pixels connected to one of the source followers is connected to one of the reset switches; and the remaining two of the photosensitive pixels are respectively connected to one of the reset switches;
  • a plurality of readout switches connected to one of the source followers connecting one row of the two photosensitive pixels and one of the readout switches, and two of the source followers respectively connected to the remaining two of the photosensitive pixels Connected to one of the readout switches.
  • the control method of the embodiment of the present invention is for controlling an image sensor
  • the image sensor includes a photosensitive unit array, a filter unit array, and a plurality of conversion units
  • the photosensitive unit array is disposed on the photosensitive unit array
  • each of the The filter unit covers a corresponding one of the photosensitive units
  • the photosensitive unit includes a plurality of photosensitive pixels
  • each of the conversion units includes at least two source followers, at least one of the source followers and a plurality of the photosensitive pixels
  • the image sensor further includes a clock switch for controlling the photosensitive pixel to start exposure, a reset switch for controlling resetting of the photosensitive pixel, and a readout switch for controlling reading of the photosensitive pixel
  • the control method includes the following steps:
  • the two frames of images are combined to obtain a high dynamic range image.
  • the step of controlling the clock switch, the reset switch, and the photosensitive switch to read out two frames of images includes:
  • the read switch timing is controlled to read the output of each source follower.
  • the step of controlling the clock switch, the reset switch, and the readout switch to read out two frames of images includes the steps of:
  • the analog signal output by the source follower is converted into a digital signal.
  • An electronic device includes the above image sensor.
  • the electronic device comprises a cell phone or a tablet.
  • the electronic device further includes a central processing unit and a display device coupled to the image sensor, the central processor configured to control the display device to display an image output by the image sensor.
  • An electronic device includes a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed inside a space enclosed by the housing, the processor and the memory setting On the circuit board; the power circuit for powering various circuits or devices of the mobile terminal; the memory for storing executable program code; the processor reading the memory stored in the memory Executable program code to execute a program corresponding to the executable program code for performing the control method according to any one of claims 16 to 18.
  • the image sensor, the control method and the electronic device of the invention are based on the same filter unit corresponding to a plurality of photosensitive pixels, and at least one source follower is connected to the plurality of photosensitive pixels, and more light can be obtained compared to the output of a single photosensitive pixel.
  • the charge is improved by hardware to improve the sensitivity and signal-to-noise ratio.
  • the high dynamic range image can be synthesized by controlling the output and readout of the photosensitive pixel exposure.
  • FIG. 1 is a schematic diagram of an image sensor in accordance with an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of a filter unit array in accordance with an embodiment of the present invention.
  • FIG. 3 is a circuit schematic of an image sensor in accordance with some embodiments of the present invention.
  • FIG. 4 is a circuit schematic of an image sensor in accordance with some embodiments of the present invention.
  • FIG. 5 is a circuit schematic of an image sensor in accordance with some embodiments of the present invention.
  • FIG. 6 is a circuit schematic of an image sensor in accordance with some embodiments of the present invention.
  • FIG. 7 is a schematic structural diagram of an image sensor according to some embodiments of the present invention.
  • FIG. 8 is a schematic flow chart of a control method according to an embodiment of the present invention.
  • FIG. 9 is a flow diagram of a control method in accordance with some embodiments of the present invention.
  • FIG. 10 is a functional block diagram of an electronic device in accordance with some embodiments of the present invention.
  • FIG. 11 is a functional block diagram of an electronic device in accordance with some embodiments of the present invention.
  • an image sensor 100 includes a filter unit array 10, a photosensitive cell array 20, and a plurality of conversion units 30.
  • the filter unit array 10 includes a plurality of filter units 11 disposed on the photosensitive unit array 20, and the photosensitive unit array 20 includes a plurality of photosensitive units 21, each of which includes a plurality of photosensitive pixels 22, each The filter unit 11 covers a corresponding one of the photosensitive cells 21, that is, each of the filter units 11 covers a plurality of photosensitive pixels 22.
  • Each of the conversion units 30 includes at least two source followers 31, and at least one source follower 31 is connected to the plurality of photosensitive pixels 22.
  • the source follower 31 is for converting the photo-generated charges generated by the photosensitive pixels 22 into analog signals.
  • the photo-generated charges generated by the plurality of photosensitive pixels 22 corresponding to the same filter unit 11 will be based on the number of source followers 31 and the connection mode.
  • Different output multiple sets of analog signals, compared to the output of a single photosensitive pixel 22, can obtain more photo-generated charges, improve the sensitivity and signal-to-noise ratio through hardware improvement, and second, if the output of multiple groups is controlled by the photosensitive pixels
  • the output and readout enable the synthesis of high dynamic range images.
  • image sensor 100 includes a CMOS (Complementary Metal Oxide Semiconductor) image sensor.
  • CMOS Complementary Metal Oxide Semiconductor
  • the filter unit array 10 includes a Bayer array. Where the same character represents a filter of the same color
  • the element 11 for example, Gr, Gb, R, B
  • the number after the character indicates the row number of the photosensitive pixel 22 corresponding to the filtering unit 11 of the same color
  • the filter unit 11 of the different color allows only the light of the corresponding wavelength to pass.
  • the plurality of photosensitive pixels 22 corresponding to each of the filter units 11 are located in different rows of the photosensitive cells 21.
  • each photosensitive unit 21 includes 2* two photosensitive pixels 22, that is, each filter unit 11 covers a total of four photosensitive pixels 22 corresponding to two rows and two columns.
  • each conversion unit 30 includes two source followers 31, one of which is connected to the first row of two photosensitive pixels 22, and the other source follower 31 and the next row.
  • the two photosensitive pixels 22 are connected.
  • the photo-generated charges generated by the two photosensitive pixels 22 in the first row are accumulated and converted into the first analog signal A1 by the source follower 31, and the photo-generated charges generated by the two photosensitive pixels 22 located in the second row are accumulated.
  • the source follower 31 converts to the second analog signal A2.
  • the image sensor 100 further includes a plurality of analog to digital conversion units 40, wherein each of the analog to digital conversion units 40 is connected to two source followers 31.
  • the analog to digital conversion unit 40 is for converting the analog signal output from the source follower 31 into a digital signal.
  • the first analog signal A1 and the second analog signal A2 are respectively converted into the first digital signal D1 and the second digital signal D2 by an analog-to-digital conversion unit 40.
  • the image sensor 100 further includes a plurality of clock switches 50, a plurality of reset switches 60, and a plurality of readout switches 70.
  • the clock switch 50 is used to control the photosensitive pixel 22 to start exposure
  • the reset switch 60 is used to control the resetting of the photosensitive pixel 22
  • the readout switch 70 is used to control the reading of the photosensitive pixel 22.
  • the photosensitive unit 21 includes: photosensitive pixels PD1-PD4, clock switches TG1-TG4, source followers SF1 and SF2, and reset switches RST1 and RST2. , the switches SEL1 and SEL2 are read.
  • the photosensitive pixels PD1-PD4 are arranged in a 2*2 matrix, and the first photosensitive pixel PD1, the second photosensitive pixel PD2, the third photosensitive pixel PD3, and the fourth photosensitive pixel PD4 are respectively adjacent to the same filter unit 11
  • the photosensitive pixels that is, four adjacent photosensitive pixels receive light of the same color, in short, four photosensitive pixels constitute one large pixel.
  • the first photosensitive pixel PD1 and the second photosensitive pixel PD2 are located in the same row, and the third photosensitive pixel PD3 and the fourth photosensitive pixel PD4 are located in the same row.
  • Each photosensitive pixel is connected to a clock switch, that is, the first photosensitive pixel PD1 is connected to the first clock switch TG1, the second photosensitive pixel PD2 is connected to the second clock switch TG2, and the third photosensitive pixel PD3 and the third clock switch TG3 are connected. Connected, the fourth photosensitive pixel PD4 and the fourth clock switch TG4 are connected.
  • the first photosensitive pixel PD1 is connected to the first end of the source follower SF1 through the first clock switch TG1 and the second photosensitive pixel PD2 through the second clock switch TG2, and the first photosensitive pixel PD1 passes the first A clock switch TG1 and a second photosensitive pixel PD2 are connected to the first end of the reset switch RST1 through the second clock switch TG2.
  • the second end of the reset switch RST1 and the second end of the source follower SF1 are respectively connected to a preset power source such as Vdd, and the third end of the source follower SF1 is connected to the first end of the readout switch SEL1.
  • connection manner between the third photosensitive pixel PD3, the fourth photosensitive pixel PD4 and its corresponding clock switches TG3, TG4, the reset switch RST2, the source follower SF2 and the readout switch SEL2 The connection manner between the photosensitive pixels PD1 and PD2 of one row and their corresponding clock switches TG1 and TG2, the reset switch RST1, the source follower SF1 and the readout switch SEL1 are similar, and will not be described herein.
  • the second ends of the readout switch SEL1 and the readout switch SEL2 are commonly connected to the input terminal of an analog to digital conversion unit 40.
  • the image sensor 100 further includes a control module, a control end of the first clock switch TG1, a control end of the second clock switch TG2, a control end of the third clock switch TG3, and a control end of the fourth clock switch TG4.
  • the control module controls the switches of the four clock switches. When the clock switch is turned on, the corresponding photosensitive pixels start to be exposed.
  • the photosensitive pixels need to be reset, that is, the control terminals of the reset switch RST1 and the reset switch RST2 are also connected to the control module for before or after the exposure is started.
  • the corresponding photosensitive pixels are reset after the data is exposed.
  • the photosensitive pixel PD receives the light transmitted by the filter unit to generate a charge, and when the clock switch TG is turned on, the charge generated by the corresponding photosensitive pixel is output, and then converted into an analog signal by the source follower SF.
  • the analog-to-digital unit is converted to a digital signal output that provides a data foundation for image processing.
  • the control module controls the plurality of photosensitive pixels 22 corresponding to the same filter unit 11 to simultaneously expose according to the line, and controls the exposure time, that is, realizes exposure control.
  • Corresponding photosensitive pixels that is, the first photosensitive pixel PD1 and the second photosensitive pixel PD2 share a source follower SF1, and the charge generated by the first photosensitive pixel PD1 and the second photosensitive pixel PD2 is collected, and the first source SF1 will be the first.
  • the photosensitive pixels that is, the third photosensitive pixel PD3 and the fourth photosensitive pixel PD4 share a source follower SF2, the charge generated by the third photosensitive pixel PD3 and the fourth photosensitive pixel PD4 is collected, and the third photosensitive pixel is received by the source follower SF2
  • the collected charge of PD3 and the fourth photosensitive pixel PD4 is converted into an analog signal and further passed
  • the analog-to-digital conversion unit 40 converts to a digital signal output
  • each source follower 31 can function as a summary coupling of the charges outputted by the two photosensitive pixels 22 connected thereto. It can be understood that the source follower SF1 or the source follower at this time The amount of charge or converted analog signal collected by the SF2 is the sum of the charges generated by the respective two photosensitive pixels 22, which is about twice the charge generated by the single photosensitive pixel 22.
  • the output values of the analog-to-digital conversion unit 40 are the average values of the outputs of SF1 and SF2, that is, the charges generated by the four photosensitive pixels 22 corresponding to the same filter unit 11 are compared.
  • the increase in the number of individual photosensitive pixels 22 increases the sensitivity (about twice) of the image sensor 100.
  • each conversion unit 30 includes two source followers 31, one of which is connected to three photosensitive pixels 22 in the photosensitive unit 21, and the other source follower 31 is The remaining one of the photosensitive pixels 22 is connected.
  • the two photo-sensing pixels 22 in the first row and the photo-sensing pixels 22 in the second row are cumulatively generated by the three photo-sensing pixels 22, and then converted into the first analog signal A1 by the source follower 31.
  • the photogenerated charges generated by the other photosensitive pixels 22 of the two rows are converted into the second analog signal A2 by the source follower 31.
  • the image sensor 100 further includes a plurality of analog to digital conversion units 40, wherein each of the analog to digital conversion units 40 is connected to one source follower 31. That is to say, each photosensitive unit 21 is connected to two analog-digital conversion units 40.
  • the analog to digital conversion unit 40 is for converting the analog signal output from the source follower 31 into a digital signal. Specifically, in the present embodiment, the first analog signal A1 and the second analog signal A2 are respectively converted into the first digital signal D1 and the second digital signal D2 by one analog-to-digital conversion unit 40.
  • the image sensor 100 further includes a plurality of clock switches 50, a plurality of reset switches 60, and a plurality of readout switches 70.
  • the clock switch 50 is used to control the photosensitive pixel 22 to start exposure
  • the reset switch 60 is used to control the resetting of the photosensitive pixel 22
  • the readout switch 70 is used to control the reading of the photosensitive pixel 22.
  • the photosensitive unit 21 includes: photosensitive pixels PD1-PD4, clock switches TG1-TG4, source followers SF1 and SF2, and reset switches RST1 and RST2. , the switches SEL1 and SEL2 are read.
  • the photosensitive pixels PD1-PD4 are arranged in a 2*2 matrix, and the first photosensitive pixel PD1, the second photosensitive pixel PD2, the third photosensitive pixel PD3, and the fourth photosensitive pixel PD4 are respectively adjacent to the same filter unit 11
  • the photosensitive pixels that is, four adjacent photosensitive pixels receive light of the same color, in short, four photosensitive pixels constitute one large pixel.
  • the first photosensitive pixel PD1 and the second photosensitive pixel PD2 are located in the same row, and the third photosensitive pixel PD3 and the fourth photosensitive pixel PD4 are located in the same row.
  • Each photosensitive pixel is connected to a clock switch, that is, the first photosensitive pixel PD1 is connected to the first clock switch TG1, the second photosensitive pixel PD2 is connected to the second clock switch TG2, and the third photosensitive pixel PD3 and the third clock switch TG3 are connected. Connected, the fourth photosensitive pixel PD4 and the fourth clock switch TG4 are connected.
  • first photosensitive pixel PD1 passes through the first clock switch TG1 and the second photosensitive pixel PD2 through the second time.
  • the clock switch TG2 and the third photosensitive pixel PD3 are connected to the first end of the source follower SF1 through the third clock switch TG3.
  • the first photosensitive pixel PD1 passes through the first clock switch TG1 and the second photosensitive pixel PD2 through the second clock switch TG2.
  • the third photosensitive pixel PD3 is connected to the first end of the reset switch RST1 through the third clock switch TG3, and the second end of the reset switch RST1 and the second end of the source follower SF1 are respectively connected to a preset power source such as Vdd, the source.
  • the third end of the follower SF1 is connected to the first end of the sense switch SEL1.
  • the fourth photosensitive pixel PD4 is respectively connected to the first end of the source follower SF2 and the reset switch RST2 through the fourth clock switch TG4, and the second ends of the source follower SF2 and the reset switch RST2 are respectively connected to the preset power source,
  • the third end of the source follower SF2 is coupled to the first end of the sense switch SEL2.
  • the second ends of the sense switch SEL1 and the read switch SEL2 are respectively connected to the input terminals of one analog-to-digital conversion unit 40.
  • the image sensor 100 further includes a control module, a control end of the first clock switch TG1, a control end of the second clock switch TG2, a control end of the third clock switch TG3, and a control end of the fourth clock switch TG4.
  • the control module controls the switches of the four clock switches. When the clock switch is turned on, the corresponding photosensitive pixels start to be exposed.
  • the photosensitive pixels need to be reset, that is, the control terminals of the reset switch RST1 and the reset switch RST2 are also connected to the control module for before or after the exposure is started.
  • the corresponding photosensitive pixels are reset after the data is exposed.
  • the photosensitive pixel PD receives the light transmitted by the filter unit to generate a charge, and when the clock switch TG is turned on, the charge generated by the corresponding photosensitive pixel is output, and then converted into an analog signal by the source follower SF.
  • the analog-to-digital unit is converted to a digital signal output that provides a data foundation for image processing.
  • the control module controls the plurality of photosensitive pixels 22 corresponding to the same filter unit 11 to simultaneously expose according to the line, and controls the exposure time, that is, realizes the exposure control, and controls the output time-sharing reading of the photosensitive pixels, thereby acquiring the synthesized high dynamic range image. Material.
  • the three photosensitive pixels (such as the photosensitive pixels corresponding to the filter units Gr1, Gr2, and Gr4), that is, the first photosensitive pixel PD1, the second photosensitive pixel PD2, and the third photosensitive pixel PD3 share a source follower SF1, the first photosensitive
  • the charge generated by the pixel PD1, the second photosensitive pixel PD2, and the third photosensitive pixel PD3 is collected, and the charge collected by the first photosensitive pixel PD1, the second photosensitive pixel PD2, and the third photosensitive pixel PD3 is converted into an analog signal by the source follower SF1.
  • the photosensitive pixel (such as the photosensitive pixel corresponding to the filter unit Gr3), that is, the fourth photosensitive pixel PD4, the output of the fourth photosensitive pixel PD4 is converted into an analog signal by the source follower SF2, and further converted into an analog signal by the analog-to-digital conversion unit 40.
  • Digital signal output Set the output of the analog-to-digital conversion unit connected to it to ADC2.
  • the output of the source follower SF1 is approximately three times that of the source follower SF2, that is, the four photosensitive pixels 22 corresponding to the same filter unit 11 can simultaneously output a high ADC value and a low ADC. value.
  • each conversion unit 30 includes three source followers 31, one of which is connected to one column of two photosensitive pixels 22 in the photosensitive unit 21, and two other source followers. 31 is connected to the remaining two photosensitive pixels 22, respectively.
  • the photo-generated charges generated by the two photosensitive pixels 22 in the first column are respectively outputted by one source follower 31 and merged into a first analog signal A1, and the photo-generated charges generated by the two photosensitive pixels 22 in the second column are accumulated.
  • the source follower 31 converts to the second analog signal A2.
  • the image sensor 100 further includes a plurality of analog-to-digital conversion units 40, wherein one source follower 31 connected to one column of two photosensitive pixels 22 is connected to one analog-to-digital conversion unit 40, and the other two and the remaining two are photosensitive.
  • the two source followers 31 to which the pixels 22 are respectively connected are connected in common to one analog to digital conversion unit 40. That is, each photosensitive unit 21 is connected to two analog-to-digital conversion units 40.
  • the analog to digital conversion unit 40 is for converting the analog signal output from the source follower 31 into a digital signal.
  • the first analog signal A1 and the second analog signal A2 are respectively converted into the first digital signal D1 and the second digital signal D2 by one analog-to-digital conversion unit 40.
  • the image sensor 100 further includes a plurality of clock switches 50, a plurality of reset switches 60, and a plurality of readout switches 70.
  • the clock switch 50 is used to control the photosensitive pixel 22 to start exposure
  • the reset switch 60 is used to control the resetting of the photosensitive pixel 22
  • the readout switch 70 is used to control the reading of the photosensitive pixel 22.
  • the photosensitive unit 21 includes: photosensitive pixels PD1-PD4, clock switches TG1-TG4, source followers SF1, SF2 and SF3, and reset switch RST1. , RST2 and RST3, read out switches SEL1 and SEL2.
  • the photosensitive pixels PD1-PD4 are arranged in a 2*2 matrix, and the first photosensitive pixel PD1, the second photosensitive pixel PD2, the third photosensitive pixel PD3, and the fourth photosensitive pixel PD4 are respectively adjacent to the same filter unit 11
  • the photosensitive pixels that is, four adjacent photosensitive pixels receive light of the same color, in short, four photosensitive pixels constitute one large pixel.
  • the first photosensitive pixel PD1 and the second photosensitive pixel PD2 are located in the same row, and the third photosensitive pixel PD3 and the fourth photosensitive pixel PD4 are located in the same row.
  • Each photosensitive pixel is connected to a clock switch, that is, the first photosensitive image
  • the prime PD1 is connected to the first clock switch TG1
  • the second photosensitive pixel PD2 is connected to the second clock switch TG2
  • the third photosensitive pixel PD3 is connected to the third clock switch TG3
  • the fourth photosensitive pixel PD4 is connected to the fourth clock switch TG4.
  • the second photosensitive pixel PD2 is connected to the first end of the source follower SF2 through the second clock switch TG4 through the second clock switch TG2 and the fourth photosensitive pixel PD4, and the second photosensitive pixel PD2 passes through the second clock switch TG2.
  • the fourth photosensitive pixel PD4 is commonly connected to the first end of the reset switch RST2 through the fourth clock switch TG4, and the second end of the reset switch RST2 and the second end of the source follower SF2 are respectively connected to a preset power source such as Vdd, and the source follows
  • the third end of the SF2 is coupled to the first end of the sense switch SEL2.
  • the first photosensitive pixel PD1 is connected to the first end of the source follower SF1 and the source follower SF3 through the first clock switch TG1 and the third photosensitive pixel PD3 through the third clock switch TG3, and the first photosensitive pixel PD1 passes the first A clock switch TG1 and a third photosensitive pixel PD3 are respectively connected to the first ends of the reset switch RST1 and the reset switch RST3 through the third clock switch TG3, the source follower SF1, the source follower SF3, the reset switch RST1, and the reset
  • the second end of the switch RST3 is respectively connected to a preset power source, and the third ends of the source follower SF1 and the source follower SF3 are respectively connected to the first end of the readout switch SEL1.
  • the second ends of the sense switch SEL1 and the read switch SEL2 are respectively connected to the input terminals of one analog-to-digital conversion unit 40.
  • the image sensor 100 further includes a control module, a control end of the first clock switch TG1, a control end of the second clock switch TG2, a control end of the third clock switch TG3, and a control end of the fourth clock switch TG4.
  • the control module controls the switches of the four clock switches. When the clock switch is turned on, the corresponding photosensitive pixels start to be exposed.
  • the photosensitive pixels need to be reset, that is, the control terminals of the reset switch RST1, the reset switch RST2 and the reset switch RST3 are also connected with the control module for performing exposure. Reset the corresponding pixels before starting or after reading the exposure data.
  • the photosensitive pixel PD receives the light transmitted by the filter unit to generate a charge, and when the clock switch TG is turned on, the charge generated by the corresponding photosensitive pixel is output, and then converted into an analog signal by the source follower SF.
  • the analog-to-digital unit is converted to a digital signal output that provides a data foundation for image processing.
  • the control module controls the plurality of photosensitive pixels 22 corresponding to the same filter unit 11 to simultaneously expose according to the line, and controls the exposure time, that is, realizes the exposure control, and controls the output time-sharing reading of the photosensitive pixels, thereby acquiring the synthesized high dynamic range image. Material.
  • Each of the photosensitive pixels (such as the photosensitive pixels corresponding to the filter units Gr1 and Gr3), that is, the first photosensitive pixel PD1 and the third photosensitive pixel PD3, are respectively subjected to charge conversion by the source follower SF1 and the source follower SF3, and then pass through one
  • the analog-to-digital conversion unit 40 converts to a digital signal output, and sets an analog-to-digital conversion unit output connected thereto The value is ADC1; in addition, one photosensitive pixel corresponding to each filter unit 11 of the 2i+1th row in the photosensitive cell array 20 (such as the photosensitive pixel corresponding to the filter unit Gr2) and each filter of the 2i+2 row A photosensitive element of a corresponding column of the light unit 11 (such as a photosensitive pixel corresponding to the filter unit Gr
  • the output value is SF2, that is, the four photosensitive pixels 22 corresponding to the same filter unit 11 can simultaneously output a high ADC value and a low ADC value.
  • each conversion unit 30 includes three source followers 31, one of which is connected to one of the two photosensitive pixels 22 in the photosensitive unit 21, and the other two source followers 31 is connected to the remaining two photosensitive pixels 22, respectively.
  • the photo-generated charges generated by the two photosensitive pixels 22 in the first row are accumulated and converted into the first analog signal A1 by the source follower 31, and the photo-generated charges generated by the two photosensitive pixels 22 located in the second row are respectively passed through a source.
  • the follower 31 outputs and merges into a second analog signal A2.
  • the image sensor 100 further includes a plurality of analog-to-digital conversion units 40 in which three source followers 31 in each photosensitive unit are commonly connected to one analog-to-digital conversion unit 40. That is, each photosensitive unit 21 is connected to an analog to digital conversion unit 40.
  • the analog to digital conversion unit 40 is for converting the analog signal output from the source follower 31 into a digital signal. Specifically, in the present embodiment, the first analog signal A1 and the second analog signal A2 are respectively converted into the first digital signal D1 and the second digital signal D2 by the analog-to-digital conversion unit 40.
  • the image sensor 100 further includes a plurality of clock switches 50, a plurality of reset switches 60, and a plurality of readout switches 70.
  • the clock switch 50 is used to control the photosensitive pixel 22 to start exposure
  • the reset switch 60 is used to control the resetting of the photosensitive pixel 22
  • the readout switch 70 is used to control the reading of the photosensitive pixel 22.
  • the photosensitive unit 21 includes: photosensitive pixels PD1-PD4, clock switches TG1-TG4, source followers SF1, SF2 and SF3, and reset switch RST1. , RST2 and RST3, read out switches SEL1 and SEL2.
  • the photosensitive pixels PD1-PD4 are arranged in a 2*2 matrix, and the first photosensitive pixel PD1 and the second photosensitive pixel PD2 are arranged.
  • the third photosensitive pixel PD3 and the fourth photosensitive pixel PD4 are respectively adjacent photosensitive pixels corresponding to the same filter unit 11, that is, four adjacent photosensitive pixels receive light of the same color, in short, four photosensitive The pixels form a large pixel.
  • the first photosensitive pixel PD1 and the second photosensitive pixel PD2 are located in the same row, and the third photosensitive pixel PD3 and the fourth photosensitive pixel PD4 are located in the same row.
  • Each photosensitive pixel is connected to a clock switch, that is, the first photosensitive pixel PD1 is connected to the first clock switch TG1, the second photosensitive pixel PD2 is connected to the second clock switch TG2, and the third photosensitive pixel PD3 and the third clock switch TG3 are connected. Connected, the fourth photosensitive pixel PD4 and the fourth clock switch TG4 are connected.
  • first photosensitive pixel PD1 is connected to the first end of the source follower SF1 through the first clock switch TG1 and the second photosensitive pixel PD2 through the second clock switch TG2, and the first photosensitive pixel PD1 passes through the first clock switch TG1.
  • the second photosensitive pixel PD2 is commonly connected to the first end of the reset switch RST1 through the second clock switch TG2, and the second end of the reset switch RST1 and the second end of the source follower SF1 are respectively connected to a preset power source such as Vdd, and the source follows
  • the third end of the SF1 is coupled to the first end of the sense switch SEL1.
  • the third photosensitive pixel PD3 is connected to the first end of the source follower SF2 and the source follower SF3 through the third clock switch TG4 through the third clock switch TG3 and the fourth photosensitive pixel PD4, respectively, and the third photosensitive pixel PD3 passes the first
  • the three clock switch TG3 and the fourth photosensitive pixel PD4 are respectively connected to the first ends of the reset switch RST2 and the reset switch RST3 through the fourth clock switch TG4, the source follower SF2, the source follower SF3, the reset switch RST2, and the reset
  • the second end of the switch RST3 is respectively connected to a preset power source, and the third ends of the source follower SF2 and the source follower SF3 are respectively connected to the first end of the readout switch SEL2.
  • the second ends of the readout switch SEL1 and the readout switch SEL2 are commonly connected to the input terminal of an analog to digital conversion unit 40.
  • the image sensor 100 further includes a control module, a control end of the first clock switch TG1, a control end of the second clock switch TG2, a control end of the third clock switch TG3, and a control end of the fourth clock switch TG4.
  • the control module controls the switches of the four clock switches. When the clock switch is turned on, the corresponding photosensitive pixels start to be exposed.
  • the photosensitive pixels need to be reset, that is, the control terminals of the reset switch RST1, the reset switch RST2 and the reset switch RST3 are also connected with the control module for performing exposure. Reset the corresponding pixels before starting or after reading the exposure data.
  • the photosensitive pixel PD receives the light transmitted by the filter unit to generate a charge, and when the clock switch TG is turned on, the charge generated by the corresponding photosensitive pixel is output, and then converted into an analog signal by the source follower SF.
  • the analog-to-digital unit is converted to a digital signal output that provides a data foundation for image processing.
  • the control module controls the plurality of photosensitive pixels 22 corresponding to the same filter unit 11 to simultaneously expose according to the line, and controls the exposure time, that is, realizes the exposure control, and controls the output time-sharing reading of the photosensitive pixels, thereby acquiring the synthesized high dynamic range image. Material.
  • the corresponding photosensitive pixels that is, the first photosensitive pixel PD1 and the second photosensitive pixel PD2
  • the generated charge is collected by the source follower SF1 for charge conversion, and converted into a digital signal output by an analog-to-digital conversion unit 40.
  • the two photosensitive pixels (such as the photosensitive pixels corresponding to the filter units Gr3, Gr4), that is, the third photosensitive pixel PD3 and the fourth photosensitive pixel PD4 are charge-converted by the source follower SF2 and the source follower SF3, respectively, and further passed
  • the analog-to-digital conversion unit 40 converts to a digital signal output, and sets the output of the analog-to-digital conversion unit connected thereto to ADC2.
  • a high dynamic range image can be obtained, that is, based on the hardware structure of the image sensor 100, by providing two high and low analog and digital conversion unit outputs, conditions for high dynamic range image synthesis are provided.
  • the image sensor 100 further includes a micromirror array 80 disposed on the filter unit array 10.
  • Each of the micro mirrors 81 corresponds to a photosensitive pixel 22, including formation, size, and position.
  • the micromirror 81 can collect light to the photosensitive portion of the photosensitive pixel 22, and enhance the received light intensity of the photosensitive pixel 22, thereby improving the image quality.
  • control method includes the following steps:
  • S10 controlling a clock switch, a reset switch, and a readout switch to read out two frames of images
  • the synthesis of high dynamic range images can be performed.
  • step S10 further includes:
  • S16 Control the readout switch timing to read the output of each source follower to read out two frames of images.
  • the material for synthesizing the high dynamic range image can be obtained by controlling the timing of exposure and reading.
  • step S10 further includes:
  • the analog signal output from the source follower is converted to a digital signal.
  • the image processing module typically a digital signal processing chip, can directly process the output of the image sensor.
  • the electronic device 1000 includes the image sensor 100 of the above aspect.
  • the electronic device 1000 may include a mobile phone or a tablet.
  • the electronic device 1000 further includes a central processing unit 200 connected to the image sensor 100 and a display device 300 for controlling the display device 300 to display an image output by the image sensor 100.
  • the image captured by the electronic device 1000 can be displayed on the display device 300 for viewing by the user.
  • the display device 300 includes an LED display or the like.
  • the electronic device 1000 further includes a central processing unit 200 and an external memory 400 connected to the image sensor 100 for controlling the external memory 400 to store images output by the image sensor 100.
  • the external memory 400 includes an SD (Secure Digital) card, a CF (Compact Flash) card, and the like.
  • the electronic device 1000 can improve the photographing sensitivity and reduce the signal-to-noise ratio based on the hardware structure of the image sensor 100 by using the image sensor 100. Secondly, the high dynamic range image synthesizing function can be realized, and the photographing experience can be improved.
  • an embodiment of the present invention further provides an electronic device including a housing, a processor, a memory, a circuit board, and a power supply circuit, wherein the circuit board is disposed inside the space enclosed by the housing, and is processed. And a memory disposed on the circuit board; the power circuit is for powering various circuits or devices of the electronic device; the memory is for storing executable program code; and the processor reads the executable program stored in the memory by reading The code runs a program corresponding to the executable program code for performing the control method of the above aspect.
  • Embodiments of the present invention also provide a computer readable storage medium having instructions stored therein, when the processor of the electronic device executes the instructions, the electronic device performs the control of the embodiment of the present invention as shown method.
  • a "computer-readable medium” can be any apparatus that can contain, store, communicate, propagate, or transport a program for use in an instruction execution system, apparatus, or device, or in conjunction with the instruction execution system, apparatus, or device.
  • computer readable media include the following: electrical connections (electronic devices) having one or more wires, portable computer disk cartridges (magnetic devices), random access memory (RAM), Read only memory (ROM), erasable editable read only memory (EPROM or flash memory), fiber optic devices, and portable compact disk read only memory (CDROM).
  • the computer readable medium may even be a paper or other suitable medium on which the program can be printed, as it may be optically scanned, for example by paper or other medium, followed by editing, interpretation or, if appropriate, other suitable The method is processed to obtain the program electronically and then stored in computer memory.
  • portions of the invention may be implemented in hardware, software, firmware or a combination thereof.
  • multiple steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system.
  • a suitable instruction execution system For example, if implemented in hardware, as in another embodiment, it can be implemented by any one or combination of the following techniques well known in the art: having logic gates for implementing logic functions on data signals. Discrete logic circuits, application specific integrated circuits with suitable combinational logic gates, programmable gate arrays (PGAs), field programmable gate arrays (FPGAs), etc.

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Abstract

本发明公开了一种图像传感器,该图像传感器包括感光单元阵列、滤光单元阵列和多个转换单元。滤光单元阵列设置于感光单元阵列上,每个滤光单元覆盖对应一个感光单元,感光单元包括多个感光像素。转换单元包括至少两个源跟随器,至少一个源跟随器与多个感光像素连接。本发明还公开一种控制方法和电子装置。本发明实施方式的图像传感器,基于同一滤光单元对应多个感光像素,且至少一个源跟随器与多个感光像素连接,相较于单个感光像素输出,可以获得更多的光生电荷,通过硬件改进一来提高了灵敏度和信噪比,二来,通过控制感光像素曝光的输出与读出可进行高动态范围图像的合成。

Description

图像传感器、控制方法和电子装置
相关申请的交叉引用
本申请基于申请号为201510964086.4、201510963291.9、201510963293.8和201510960708.6,申请日为2015年12月18日的中国专利申请提出,并要求该中国专利申请的优先权,该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本发明涉及成像技术,尤其涉及一种图像传感器、控制方法和电子装置。
背景技术
随着手机的普及,用手机拍照成为越来越多人的喜好。但是随着人们对拍照要求的提高,优秀的暗态拍照效果成为消费者的迫切需求,进而要求传感器有较高的灵敏度和较好的信噪比,但是,目前的图像传感器的灵敏度、信噪比有待进一步提高。
发明内容
本发明旨在至少在一定程度上解决相关技术中的技术问题之一。为此,本发明需要提供一种图像传感器、控制方法和电子装置。
本发明实施方式的图像传感器,包括:感光单元阵列;设置所述感光单元阵列上的滤光单元阵列,每个所述滤光单元覆盖对应一个所述感光单元,所述感光单元包括多个感光像素;和多个转换单元,每个所述转换单元包括至少两个源跟随器,至少一个所述源跟随器与多个所述感光像素连接。
在某些实施方式中,所述滤光单元阵列包括拜耳阵列。
在某些实施方式中,每个所述感光单元包括2*2的所述感光像素。
在某些实施方式中,每个所述转换单元包括两个所述源跟随器,其中一个所述源跟随器与上一行两个所述感光像素连接,另一个所述源跟随器与下一行两个所述感光像素连接。
在某些实施方式中,所述图像传感器还包括多个模数转换单元,每个所述模数转换单元与两个所述源跟随器连接。
在某些实施方式中,所述图像传感器还包括:
多个时钟开关,每个所述时钟开关与一个所述感光像素连接;
多个重置开关,上一行两个所述感光像素与一个所述重置开关连接,下一行两个所述感光像素与一个所述重置开关连接;
多个读出开关,每个所述读出开关与一个所述源跟随器连接。
在某些实施方式中,每个所述转换单元包括两个所述源跟随器,其中一个所述源跟随器与三个所述感光像素连接,另一个所述源跟随器与剩下一个所述感光像素连接。
在某些实施方式中,所述图像传感器还包括多个模数转换单元,每个所述模数转换单元分别与一个所述源跟随器连接。
在某些实施方式中,所述图像传感器还包括:
多个时钟开关,每个所述时钟开关与一个所述感光像素连接;
多个重置开关,与一个所述源跟随器连接的三个所述感光像素与一个所述重置开关连接,剩下一个所述感光像素与一个所述重置开关连接;
多个读出开关,与三个所述感光像素连接的一个所述源跟随器与一个所述读出开关连接,与剩下一个所述感光像素连接的一个所述源跟随器与一个所述读出开关连接。
在某些实施方式中,每个所述转换单元包括三个所述源跟随器,其中一个所述源跟随器与一列两个所述感光像素连接,另两个所述源跟随器与剩下两个所述感光像素分别连接
在某些实施方式中,所述图像传感器还包括多个模数转换单元,与一列两个所述感光像素连接的一个所述源跟随器与一个所述模数转换单元连接,另两个与剩下两个所述感光像素分别连接的两个所述源跟随器与一个所述模数转换单元连接。
在某些实施方式中,所述图像传感器还包括:
多个时钟开关,每个所述时钟开关与一个所述感光像素连接;
多个重置开关,与一个所述源跟随器连接的一列两个所述感光像素与一个所述重置开关连接;剩下两个所述感光像素分别与一个所述重置开关连接;
多个读出开关,与一列两个所述感光像素连接的一个所述源跟随器与一个所述读出开关连接,与剩下两个所述感光像素分别连接的两个所述源跟随器与一个所述读出开关连接。
在某些实施方式中,每个所述转换单元包括三个所述源跟随器,其中一个所述源跟随器与一行两个所述感光像素连接,另两个所述源跟随器与剩下两个所述感光像素分别连接。
在某些实施方式中,所述图像传感器还包括多个模数转换单元,每个所述模数转换单元与所述三个源跟随器连接。
在某些实施方式中,所述图像传感器还包括:
多个时钟开关,每个时钟开关与一个所述感光像素连接;
多个重置开关,与一个所述源跟随器连接的一行两个所述感光像素与一个所述重置开关连接;剩下两个所述感光像素分别与一个所述重置开关连接;
多个读出开关,与连接一行两个所述感光像素的一个所述源跟随器与一个所述读出开关连接,与剩下两个所述感光像素分别连接的两个所述源跟随器与一个所述读出开关连接。
本发明实施方式的控制方法,用于控制图像传感器,所述图像传感器包括感光单元阵列、滤光单元阵列和多个转换单元,所述感光单元阵列设置在所述感光单元阵列上,每个所述滤光单元覆盖对应一个所述感光单元,所述感光单元包括多个感光像素,每个所述转换单元包括至少两个源跟随器,至少一个所述源跟随器与多个所述感光像素连接,所述图像传感器还包括用于控制所述感光像素开始曝光的时钟开关、用于控制所述感光像素清零重置的重置开关和用于控制所述感光像素读出的读出开关;所述控制方法包括以下步骤:
控制所述时钟开关、所述重置开关和所述读出开关以读出两帧图像;和
合并所述两帧图像以得到高动态范围的图像。
在某些实施方式中,所述控制所述时钟开关、所述重置开关和所述感光开关以读出两帧图像的步骤包括:
控制所述重置开关以清零重置所述感光像素;
控制所述时钟开关以使得相邻两行所述感光像素同时曝光;和
控制所述读出开关时序读取每个源跟随器的输出。
在某些实施方式中,所述控制所述时钟开关、所述重置开关和所述读出开关以读出两帧图像的步骤包括步骤:
将所述源跟随器输出的模拟信号转换为数字信号。
本发明实施方式的电子装置,包括上述的图像传感器。
在某些实施方式中,所述电子装置包括手机或平板电脑。
在某些实施方式中,所述电子装置还包括与所述图像传感器连接的中央处理器及显示装置,所述中央处理器用于控制所述显示装置显示所述图像传感器输出的图像。
本发明实施方式的电子装置,包括壳体、处理器、存储器、电路板和电源电路,其中,所述电路板安置在所述壳体围成的空间内部,所述处理器和所述存储器设置在所述电路板上;所述电源电路,用于为所述移动终端的各个电路或器件供电;所述存储器用于存储可执行程序代码;所述处理器通过读取所述存储器中存储的可执行程序代码来运行与所述可执行程序代码对应的程序,以用于执行如权利要求16至18中任一项所述的控制方法
本发明的图像传感器、控制方法和电子装置,基于同一滤光单元对应多个感光像素,且至少一个源跟随器与多个感光像素连接,相较于单个感光像素输出,可以获得更多的光生电荷,通过硬件改进一来提高了灵敏度和信噪比,二来,通过控制感光像素曝光的输出与读出可进行高动态范围图像的合成。
本发明附加的方面和优点将在下面的描述中部分给出,部分将从下面的描述中变得明显,或通过本发明的实践了解到。
附图说明
图1是根据本发明实施方式的图像传感器的示意图;
图2是根据本发明实施方式的滤光单元阵列的示意图;
图3是根据本发明某些实施方式的图像传感器的电路示意图;
图4是根据本发明某些实施方式的图像传感器的电路示意图;
图5是根据本发明某些实施方式的图像传感器的电路示意图;
图6是根据本发明某些实施方式的图像传感器的电路示意图;
图7是根据本发明某些实施方式的图像传感器的结构示意图;
图8是根据本发明实施方式的控制方法的流程示意图;
图9是根据本发明某些实施方式的控制方法的流程示意图;
图10是根据本发明某些实施方式的电子装置的功能模块示意图;
图11是根据本发明某些实施方式的电子装置的功能模块示意图。
具体实施方式
下面详细描述本发明的实施例,所述实施例的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施例是示例性的,旨在用于解释本发明,而不能理解为对本发明的限制。
请参阅图1,本发明实施方式的图像传感器100包括滤光单元阵列10、感光单元阵列20和多个转换单元30。
滤光单元阵列10包括多个滤光单元11,滤光单元阵列10设置于感光单元阵列20上,感光单元阵列20包括多个感光单元21,每个感光单元包括多个感光像素22,每个滤光单元11覆盖对应一个感光单元21,也即是每个滤光单元11覆盖对应多个感光像素22。每个转换单元30包括至少两个源跟随器31,至少一个源跟随器31与多个感光像素22连接。源跟随器31用于将感光像素22产生的光生电荷转换为模拟信号。
可以理解,由于至少一个源跟随器31与多个感光像素22连接,因此,同一滤光单元11所对应的多个感光像素22产生的光生电荷将会根据源跟随器31的数量与连接方式的不同输出多组模拟信号,相较于单个感光像素22输出,可获得更多的光生电荷,通过硬件改进一来提高了灵敏度和信噪比,二来,若输出的多组通过控制感光像素曝光的输出与读出可进行高动态范围图像的合成。
在某些实施方式中,图像传感器100包括CMOS(Complementary Metal Oxide Semiconductor),互补金属氧化物半导体)图像传感器。
请参阅图2,滤光单元阵列10包括拜耳阵列。其中,相同字符表示相同颜色的滤光单 元11(例如Gr,Gb,R,B),字符后的数字表示相同颜色的滤波单元11对应的感光像素22的排号,不同颜色的滤光单元11仅允许对应波长的光透过。
在某些实施方式中,每个滤光单元11所对应的多个感光像素22位于感光单元21的不同行。
例如,在一些示例中,每个感光单元21包括2*两个感光像素22,也即是说每个滤光单元11覆盖对应2行2列共计四个感光像素22。
请参阅图3,在某些实施方式中,每个转换单元30包括两个源跟随器31,其中一个源跟随器31与上一行两个感光像素22连接,另一个源跟随器31与下一行两个感光像素22连接。
如此,位于第一行中的两个感光像素22产生的光生电荷累加后经过源跟随器31转换为第一模拟信号A1,位于第二行中的两个感光像素22产生的光生电荷累加后经过源跟随器31转换为第二模拟信号A2。
进一步地,图像传感器100还包括多个模数转换单元40,其中,每个模数转换单元40与两个源跟随器31连接。模数转换单元40用于将源跟随器31输出的模拟信号转换为数字信号。具体地,在本实施方式中,第一模拟信号A1和第二模拟信号A2通过一个模数转换单元40分别转换为第一数字信号D1和第二数字信号D2。
进一步地,图像传感器100还包括多个时钟开关50、多个重置开关60和多个读出开关70。其中,时钟开关50用于控制感光像素22开始曝光,重置开关60用于控制感光像素22清零重置,读出开关70用于控制感光像素22读出。
以图像传感器100一个感光单元21的等效电路为例进行说明,其中,该感光单元21包括:感光像素PD1-PD4,时钟开关TG1-TG4,源跟随器SF1和SF2,重置开关RST1和RST2,读出开关SEL1和SEL2。
具体地,感光像素PD1-PD4以2*2矩阵排列,第一感光像素PD1、第二感光像素PD2、第三感光像素PD3和第四感光像素PD4为分别相邻的对应同一滤光单元11的感光像素,也就是四个分别相邻的感光像素接收相同颜色的光,简单地说,即四个感光像素构成一个大的像素(pixel)。且第一感光像素PD1和第二感光像素PD2位于同一行,第三感光像素PD3和第四感光像素PD4位于同一行。每个感光像素与一个时钟开关连接,也即是第一感光像素PD1和第一时钟开关TG1连接,第二感光像素PD2和第二时钟开关TG2连接,第三感光像素PD3和第三时钟开关TG3连接,第四感光像素PD4和第四时钟开关TG4连接。
进一步地,对于第一行,第一感光像素PD1通过第一时钟开关TG1、第二感光像素PD2通过第二时钟开关TG2共同与源跟随器SF1的第一端连接,第一感光像素PD1通过第一时钟开关TG1、第二感光像素PD2通过第二时钟开关TG2共同与重置开关RST1的第一端连 接,重置开关RST1的第二端和源跟随器SF1的第二端分别连接预设电源例如Vdd,源跟随器SF1的第三端与读出开关SEL1的第一端连接。
进一步地,对于第二行,第三感光像素PD3、第四感光像素PD4和其对应的时钟开关TG3、TG4,重置开关RST2、源跟随器SF2和读出开关SEL2之间的连接方式与第一行的感光像素PD1、PD2和其对应的时钟开关TG1、TG2,重置开关RST1、源跟随器SF1和读出开关SEL1之间的连接方式相类似,在此不再赘述。
进一步地,读出开关SEL1和读出开关SEL2的第二端共同与一个模数转换单元40的输入端连接。
为了实现曝光的控制,图像传感器100还包括控制模块,第一时钟开关TG1的控制端、第二时钟开关TG2的控制端、第三时钟开关TG3的控制端和第四时钟开关TG4的控制端均与控制模块连接,控制模块控制四个时钟开关的开关,在时钟开关开启时,对应的感光像素开始曝光。
需要说明的是,每次进行曝光前,需对感光像素进行重置,也即是重置开关RST1和重置开关RST2的控制端也与控制模块连接,用于在进行曝光开始前或读取曝光数据后对相应感光像素进行重置。
曝光过程中,感光像素PD,例如光电二极管,接收滤光单元透过的光而生成电荷,时钟开关TG开启则对应的感光像素生成的电荷输出,进而通过源跟随器SF转换为模拟信号,通过模数单元转换为数字信号输出,为图像处理提供数据基础。
控制模块控制同一滤光单元11所对应的多个感光像素22按照行同时曝光,并控制曝光时间,即实现曝光控制。
作为一个示例,感光单元阵列20内第2i+1(i=0,1,2,3,4…)行的每个滤光单元11对应的两个感光像素(比如滤光单元Gr1,Gr2所对应的感光像素),即第一感光像素PD1和第二感光像素PD2,共用一个源跟随器SF1,第一感光像素PD1和第二感光像素PD2产生的电荷汇集,由源跟随器SF1将第一感光像素PD1和第二感光像素PD2汇集后的电荷转换为模拟信号,并进一步通过模数转换单元40转换为数字信号输出,设此时模数转换单元40输出值为ADC1;另外,感光单元阵列20内邻近第2i+1行的第2i+2(i=0,1,2,3,4…)行的每个滤光单元11的两个感光像素(比如滤光单元Gr3,Gr4所对应的感光像素),即第三感光像素PD3和第四感光像素PD4共用一个源跟随器SF2,第三感光像素PD3和第四感光像素PD4产生的电荷汇集,由源跟随器SF2将第三感光像素PD3和第四感光像素PD4汇集后的电荷转换为模拟信号,并进一步通过模数转换单元40转换为数字信号输出,设此时模数转换单元40输出值为ADC2。
在进行拍照时,控制模块控制相邻两行的感光像素22同时曝光,例如,第2i+1与2i+2 行同时曝光,其中,i=0,1,2,3.....,并控制曝光时间,避免共用同一源跟随器的两个感光像素22的输出饱和。在本发明的实施例中,每个源跟随器31可以对与其共同连接的两个感光像素22输出的电荷起到汇总耦合的作用,可以理解的是,此时源跟随器SF1或源跟随器SF2汇集的电荷量或转换的模拟信号为相应两个感光像素22产生的电荷的和,约为单个感光像素22产生电荷的两倍。控制读出开关SEL1和SEL2同时开启,则通过模数转换单元40的输出值为SF1和SF2输出的均值,也即是说,对应同一滤光单元11的四个感光像素22产生的电荷相较于单个的感光像素22增多,提高了图像传感器100的灵敏度(大约为两倍)。
请参阅图4,在某些实施方式中,每个转换单元30包括两个源跟随器31,其中一个源跟随器31与感光单元21中三个感光像素22连接,另一个源跟随器31与中剩下一个感光像素22连接。
例如,位于第一行中的两个感光像素22和位于第二行的一个感光像素22共三个感光像素22产生的光生电荷累加后经过源跟随器31转换为第一模拟信号A1,位于第二行的另一个感光像素22产生的光生电荷经过源跟随器31转换为第二模拟信号A2。
进一步地,图像传感器100还包括多个模数转换单元40,其中,每个模数转换单元40与一个源跟随器31连接。也即是说,每个感光单元21与两个模数转换单元40连接。模数转换单元40用于将源跟随器31输出的模拟信号转换为数字信号。具体地,在本实施方式中,第一模拟信号A1和第二模拟信号A2分别通过一个模数转换单元40转换为第一数字信号D1和第二数字信号D2。
进一步地,图像传感器100还包括多个时钟开关50、多个重置开关60和多个读出开关70。其中,时钟开关50用于控制感光像素22开始曝光,重置开关60用于控制感光像素22清零重置,读出开关70用于控制感光像素22读出。
以图像传感器100一个感光单元21的等效电路为例进行说明,其中,该感光单元21包括:感光像素PD1-PD4,时钟开关TG1-TG4,源跟随器SF1和SF2,重置开关RST1和RST2,读出开关SEL1和SEL2。
具体地,感光像素PD1-PD4以2*2矩阵排列,第一感光像素PD1、第二感光像素PD2、第三感光像素PD3和第四感光像素PD4为分别相邻的对应同一滤光单元11的感光像素,也就是四个分别相邻的感光像素接收相同颜色的光,简单地说,即四个感光像素构成一个大的像素(pixel)。且第一感光像素PD1和第二感光像素PD2位于同一行,第三感光像素PD3和第四感光像素PD4位于同一行。每个感光像素与一个时钟开关连接,也即是第一感光像素PD1和第一时钟开关TG1连接,第二感光像素PD2和第二时钟开关TG2连接,第三感光像素PD3和第三时钟开关TG3连接,第四感光像素PD4和第四时钟开关TG4连接。
进一步地,第一感光像素PD1通过第一时钟开关TG1、第二感光像素PD2通过第二时 钟开关TG2、第三感光像素PD3通过第三时钟开关TG3共同与源跟随器SF1的第一端连接,第一感光像素PD1通过第一时钟开关TG1、第二感光像素PD2通过第二时钟开关TG2、第三感光像素PD3通过第三时钟开关TG3共同与重置开关RST1的第一端连接,重置开关RST1的第二端和源跟随器SF1的第二端分别连接预设电源例如Vdd,源跟随器SF1的第三端与读出开关SEL1的第一端连接。
进一步地,第四感光像素PD4通过第四时钟开关TG4分别与源跟随器SF2和重置开关RST2的第一端连接,源跟随器SF2和重置开关RST2的第二端分别连接预设电源,源跟随器SF2的第三端与读出开关SEL2的第一端连接。
进一步地,读出开关SEL1和读出开关SEL2的第二端分别与一个模数转换单元40的输入端连接。
为了实现曝光的控制,图像传感器100还包括控制模块,第一时钟开关TG1的控制端、第二时钟开关TG2的控制端、第三时钟开关TG3的控制端和第四时钟开关TG4的控制端均与控制模块连接,控制模块控制四个时钟开关的开关,在时钟开关开启时,对应的感光像素开始曝光。
需要说明的是,每次进行曝光前,需对感光像素进行重置,也即是重置开关RST1和重置开关RST2的控制端也与控制模块连接,用于在进行曝光开始前或读取曝光数据后对相应感光像素进行重置。
曝光过程中,感光像素PD,例如光电二极管,接收滤光单元透过的光而生成电荷,时钟开关TG开启则对应的感光像素生成的电荷输出,进而通过源跟随器SF转换为模拟信号,通过模数单元转换为数字信号输出,为图像处理提供数据基础。
控制模块控制同一滤光单元11所对应的多个感光像素22按照行同时曝光,并控制曝光时间,即实现曝光控制,并控制感光像素的输出分时读取,从而获取进行合成高动态范围图像的素材。
作为一个示例,感光单元阵列20内第2i+1(i=0,1,2,3,4…)行和临近第2i+1行的第2i+2行的每个滤光单元11对应的三个感光像素(比如滤光单元Gr1、Gr2、Gr4所对应的感光像素),即第一感光像素PD1、第二感光像素PD2和第三感光像素PD3,共用一个源跟随器SF1,第一感光像素PD1、第二感光像素PD2和第三感光像素PD3产生的电荷汇集,由源跟随器SF1将第一感光像素PD1、第二感光像素PD2和第三感光像素PD3汇集后的电荷转换为模拟信号,并进一步通过模数转换单元40转换为数字信号输出,设与其连接的模数转换单元输出值为ADC1;另外,感光单元阵列20内邻近第2i+2行的每个滤光单元11的一个感光像素(比如滤光单元Gr3所对应的感光像素),即第四感光像素PD4,由源跟随器SF2将第四感光像素PD4的输出转换为模拟信号,并进一步通过模数转换单元40转换为数字信号输出, 设与其连接的模数转换单元输出值为ADC2。
在进行拍照时,控制模块控制相邻两行的感光像素22同时曝光,例如,第2i+1与2i+2行同时曝光,其中,i=0,1,2,3.....,并控制曝光时间,避免共用同一源跟随器的多个感光像素22的输出饱和。在本发明的实施例中,源跟随器SF1的输出约为源跟随器SF2的三倍,也即是对应同一滤光单元11的四个感光像素22可同时输出一个高ADC值和一个低ADC值。控制读出开关SEL1和SEL2分时开启,分别读取通过两个模数转换单元40的输出值为SF1(SF1=3SF2)和SF2,进而通过图像处理器进行合成处理,可获取高动态范围图像,也即是说,基于图像传感器100的硬件结构,通过对一高一低两个不同的模数转换单元输出,为高动态范围图像合成提供了条件。
请参阅图5,在某些实施方式中,每个转换单元30包括三个源跟随器31,其中一个源跟随器31与感光单元21中一列两个感光像素22连接,另两个源跟随器31与中剩下的两个感光像素22分别连接。
例如,位于第一列中的两个感光像素22产生的光生电荷分别经过一个源跟随器31输出后合并为第一模拟信号A1,位于第二列的两个感光像素22产生的光生电荷累加后经过源跟随器31转换为第二模拟信号A2。
进一步地,图像传感器100还包括多个模数转换单元40,其中,与一列两个感光像素22连接的一个源跟随器31与一个模数转换单元40连接,另两个与剩下两个感光像素22分别连接的两个源跟随器31共同与一个模数转换单元40连接。也即是每个感光单元21与两个模数转换单元40连接。模数转换单元40用于将源跟随器31输出的模拟信号转换为数字信号。具体地,在本实施方式中,第一模拟信号A1和第二模拟信号A2分别通过一个模数转换单元40转换为第一数字信号D1和第二数字信号D2。
进一步地,图像传感器100还包括多个时钟开关50、多个重置开关60和多个读出开关70。其中,时钟开关50用于控制感光像素22开始曝光,重置开关60用于控制感光像素22清零重置,读出开关70用于控制感光像素22读出。
以图像传感器100一个感光单元21的等效电路为例进行说明,其中,该感光单元21包括:感光像素PD1-PD4,时钟开关TG1-TG4,源跟随器SF1、SF2和SF3,重置开关RST1、RST2和RST3,读出开关SEL1和SEL2。
具体地,感光像素PD1-PD4以2*2矩阵排列,第一感光像素PD1、第二感光像素PD2、第三感光像素PD3和第四感光像素PD4为分别相邻的对应同一滤光单元11的感光像素,也就是四个分别相邻的感光像素接收相同颜色的光,简单地说,即四个感光像素构成一个大的像素(pixel)。且第一感光像素PD1和第二感光像素PD2位于同一行,第三感光像素PD3和第四感光像素PD4位于同一行。每个感光像素与一个时钟开关连接,也即是第一感光像 素PD1和第一时钟开关TG1连接,第二感光像素PD2和第二时钟开关TG2连接,第三感光像素PD3和第三时钟开关TG3连接,第四感光像素PD4和第四时钟开关TG4连接。
进一步地,第二感光像素PD2通过第二时钟开关TG2、第四感光像素PD4通过第四时钟开关TG4共同与源跟随器SF2的第一端连接,第二感光像素PD2通过第二时钟开关TG2、第四感光像素PD4通过第四时钟开关TG4共同与重置开关RST2的第一端连接,重置开关RST2的第二端和源跟随器SF2的第二端分别连接预设电源例如Vdd,源跟随器SF2的第三端与读出开关SEL2的第一端连接。
进一步地,第一感光像素PD1通过第一时钟开关TG1、第三感光像素PD3通过第三时钟开关TG3分别与源跟随器SF1、源跟随器SF3的第一端连接,第一感光像素PD1通过第一时钟开关TG1、第三感光像素PD3通过第三时钟开关TG3分别与重置开关RST1和重置开关RST3的第一端连接,源跟随器SF1、源跟随器SF3、重置开关RST1和重置开关RST3的第二端分别连接预设电源,源跟随器SF1和源跟随器SF3的第三端分别与读出开关SEL1的第一端连接。
进一步地,读出开关SEL1和读出开关SEL2的第二端分别与一个模数转换单元40的输入端连接。
为了实现曝光的控制,图像传感器100还包括控制模块,第一时钟开关TG1的控制端、第二时钟开关TG2的控制端、第三时钟开关TG3的控制端和第四时钟开关TG4的控制端均与控制模块连接,控制模块控制四个时钟开关的开关,在时钟开关开启时,对应的感光像素开始曝光。
需要说明的是,每次进行曝光前,需对感光像素进行重置,也即是重置开关RST1、重置开关RST2和重置开关RST3的控制端也与控制模块连接,用于在进行曝光开始前或读取曝光数据后对相应感光像素进行重置。
曝光过程中,感光像素PD,例如光电二极管,接收滤光单元透过的光而生成电荷,时钟开关TG开启则对应的感光像素生成的电荷输出,进而通过源跟随器SF转换为模拟信号,通过模数单元转换为数字信号输出,为图像处理提供数据基础。
控制模块控制同一滤光单元11所对应的多个感光像素22按照行同时曝光,并控制曝光时间,即实现曝光控制,并控制感光像素的输出分时读取,从而获取进行合成高动态范围图像的素材。
作为一个示例,感光单元阵列20内第2i+1(i=0,1,2,3,4…)行和临近第2i+1行的第2i+2行的每个滤光单元11对应的各一个感光像素(比如滤光单元Gr1、Gr3所对应的感光像素),即第一感光像素PD1和第三感光像素PD3,分别通过源跟随器SF1和源跟随器SF3进行电荷转换,再通过一模数转换单元40转换为数字信号输出,设与其连接的模数转换单元输出 值为ADC1;另外,感光单元阵列20内第2i+1行的每个滤光单元11对应的一个感光像素(比如滤光单元Gr2所对应的感光像素)和第2i+2行的每个滤光单元11的相应一列的一个感光元素(比如滤光单元Gr4所对应的感光像素),即第二感光像素PD2和第四感光像素PD4,产生的电荷汇集后通过源跟随器SF2将汇集后的电荷转换为模拟信号,并进一步通过一模数转换单元40转换为数字信号输出,设与其连接的模数转换单元输出值为ADC2。
在进行拍照时,控制模块控制相邻两行的感光像素22同时曝光,例如,第2i+1与2i+2行同时曝光,其中,i=0,1,2,3.....,并控制曝光时间,避免共用同一源跟随器的多个感光像素22的输出饱和。在本发明的实施例中,源跟随器SF2的输出约为源跟随器SF1和源跟随器SF3的二倍,即SF2=2SF1=2SF3,其中,ADC1的输出值为SF1和SF3的均值,ADC2的输出值为SF2,也即是对应同一滤光单元11的四个感光像素22可同时输出一个高ADC值和一个低ADC值。控制读出开关SEL1和SEL2分时开启,分别读取通过两个模数转换单元40的输出值为ADC1(AVGSF1+SF3)和ADC2(SF2=2SF1=2SF2),进而通过图像处理器进行合成处理,可获取高动态范围图像,也即是说,基于图像传感器100的硬件结构,通过对一高一低两个不同的模数转换单元输出,为高动态范围图像合成提供了条件。
请参阅图6,在某些实施方式中,每个转换单元30包括三个源跟随器31,其中一个源跟随器31与感光单元21中一行两个感光像素22连接,另两个源跟随器31与中剩下的两个感光像素22分别连接。
例如,位于第一行中的两个感光像素22产生的光生电荷累加后经过源跟随器31转换为第一模拟信号A1,位于第二行的两个感光像素22产生的光生电荷分别经过一个源跟随器31输出后合并为第二模拟信号A2。
进一步地,图像传感器100还包括多个模数转换单元40,其中,每个感光单元中的三个源跟随器31共同与一个模数转换单元40连接。也即是每个感光单元21与一个模数转换单元40连接。模数转换单元40用于将源跟随器31输出的模拟信号转换为数字信号。具体地,在本实施方式中,第一模拟信号A1和第二模拟信号A2通过模数转换单元40分别转换为第一数字信号D1和第二数字信号D2。
进一步地,图像传感器100还包括多个时钟开关50、多个重置开关60和多个读出开关70。其中,时钟开关50用于控制感光像素22开始曝光,重置开关60用于控制感光像素22清零重置,读出开关70用于控制感光像素22读出。
以图像传感器100一个感光单元21的等效电路为例进行说明,其中,该感光单元21包括:感光像素PD1-PD4,时钟开关TG1-TG4,源跟随器SF1、SF2和SF3,重置开关RST1、RST2和RST3,读出开关SEL1和SEL2。
具体地,感光像素PD1-PD4以2*2矩阵排列,第一感光像素PD1、第二感光像素PD2、 第三感光像素PD3和第四感光像素PD4为分别相邻的对应同一滤光单元11的感光像素,也就是四个分别相邻的感光像素接收相同颜色的光,简单地说,即四个感光像素构成一个大的像素(pixel)。且第一感光像素PD1和第二感光像素PD2位于同一行,第三感光像素PD3和第四感光像素PD4位于同一行。每个感光像素与一个时钟开关连接,也即是第一感光像素PD1和第一时钟开关TG1连接,第二感光像素PD2和第二时钟开关TG2连接,第三感光像素PD3和第三时钟开关TG3连接,第四感光像素PD4和第四时钟开关TG4连接。
进一步地,第一感光像素PD1通过第一时钟开关TG1、第二感光像素PD2通过第二时钟开关TG2共同与源跟随器SF1的第一端连接,第一感光像素PD1通过第一时钟开关TG1、第二感光像素PD2通过第二时钟开关TG2共同与重置开关RST1的第一端连接,重置开关RST1的第二端和源跟随器SF1的第二端分别连接预设电源例如Vdd,源跟随器SF1的第三端与读出开关SEL1的第一端连接。
进一步地,第三感光像素PD3通过第三时钟开关TG3、第四感光像素PD4通过第四时钟开关TG4分别与源跟随器SF2、源跟随器SF3的第一端连接,第三感光像素PD3通过第三时钟开关TG3、第四感光像素PD4通过第四时钟开关TG4分别与重置开关RST2和重置开关RST3的第一端连接,源跟随器SF2、源跟随器SF3、重置开关RST2和重置开关RST3的第二端分别连接预设电源,源跟随器SF2和源跟随器SF3的第三端分别与读出开关SEL2的第一端连接。
进一步地,读出开关SEL1和读出开关SEL2的第二端共同与一个模数转换单元40的输入端连接。
为了实现曝光的控制,图像传感器100还包括控制模块,第一时钟开关TG1的控制端、第二时钟开关TG2的控制端、第三时钟开关TG3的控制端和第四时钟开关TG4的控制端均与控制模块连接,控制模块控制四个时钟开关的开关,在时钟开关开启时,对应的感光像素开始曝光。
需要说明的是,每次进行曝光前,需对感光像素进行重置,也即是重置开关RST1、重置开关RST2和重置开关RST3的控制端也与控制模块连接,用于在进行曝光开始前或读取曝光数据后对相应感光像素进行重置。
曝光过程中,感光像素PD,例如光电二极管,接收滤光单元透过的光而生成电荷,时钟开关TG开启则对应的感光像素生成的电荷输出,进而通过源跟随器SF转换为模拟信号,通过模数单元转换为数字信号输出,为图像处理提供数据基础。
控制模块控制同一滤光单元11所对应的多个感光像素22按照行同时曝光,并控制曝光时间,即实现曝光控制,并控制感光像素的输出分时读取,从而获取进行合成高动态范围图像的素材。
作为一个示例,感光单元阵列20内第2i+1(i=0,1,2,3,4…)行的每个滤光单元11对应的两个感光像素(比如滤光单元Gr1、Gr2所对应的感光像素),即第一感光像素PD1和第二感光像素PD2,产生的电荷汇集后由源跟随器SF1进行电荷转换,并通过一模数转换单元40转换为数字信号输出,设此时模数转换单元输出值为ADC1;另外,感光单元阵列20内邻近第2i+1行的的第2i+2(i=0,1,2,3,4…)行的每个滤光单元11的两个感光像素(比如滤光单元Gr3、Gr4所对应的感光像素),即第三感光像素PD3和第四感光像素PD4分别通过源跟随器SF2和源跟随器SF3进行电荷转换,并进一步通过模数转换单元40转换为数字信号输出,设与其连接的模数转换单元输出值为ADC2。
在进行拍照时,控制模块控制相邻两行的感光像素22同时曝光,例如,第2i+1与2i+2行同时曝光,其中,i=0,1,2,3.....,并控制曝光时间,避免共用同一源跟随器的多个感光像素22的输出饱和。在本发明的实施例中,源跟随器SF1的输出约为源跟随器SF2和源跟随器SF3的二倍,即SF1=2SF2=2SF3,其中,ADC1的输出值为SF1,ADC2的输出值为SF2和SF3的均值,也即是对应同一滤光单元11的四个感光像素22可同时输出一个高ADC值和一个低ADC值。控制读出开关SEL1和SEL2分时开启,分别读取到的模数转换单元40的输出值为ADC1(SF1=2SF2=2SF3)和ADC2(AVGSF2+SF3),进而通过图像处理器进行合成处理,可获取高动态范围图像,也即是说,基于图像传感器100的硬件结构,通过对一高一低两个不同的模数转换单元输出,为高动态范围图像合成提供了条件
请参阅图7,图像传感器100还包括设置在滤光单元阵列10上的微镜阵列80,微镜阵列80中的每个微镜81与一个感光像素22对应,包括形成、大小、位置对应。微镜81能将光聚集到感光像素22的感光部分,提升感光像素22的受光强度,从而改善成像画质。
基于上述方面实施方式的图像传感器,下面参照附图描述根据本发明实施方式的控制方法。
请参阅图8,控制方法包括以下步骤:
S10:控制时钟开关、重置开关和读出开关以读出两帧图像;和
S20:合并两帧图像以得到高动态范围的图像。
如上述对图像传感器实施方式的解释说明,基于图像传感器100的硬件构造,可以进行高动态范围图像的合成。
本发明实施方式的成像方法,假定原有每个感光像素的输出为S,噪声为N,合并像素包括M个感光像素,则合并像素的像素值为n*m*S,而合并像素的噪声为
Figure PCTCN2016110445-appb-000001
在n=2,m=2的情况下,合成像素的噪声即为n*m*N/2左右。因此合并图像的亮度在低亮度环境下得到提升,而且性噪比提高。
请参阅图9,在某些实施方式中,步骤S10进一步包括:
S12:控制重置开关以清零重置感光像素;
S14:控制时钟开关以使得相邻两行感光像素同时曝光;和
S16:控制读出开关时序读取每个源跟随器的输出以读出两帧图像。
如此,可以通过控制曝光和读取的时序获取用于合成高动态范围图像的素材。
在某些实施方式中,步骤S10进一步包括:
将源跟随器输出的模拟信号转换为数字信号。
如此,一般为数字信号处理芯片的图像处理模块可以直接处理图像传感器的输出。
基于上述方面实施方式的图像传感器,下面参照附图描述根据本发明实施方式的电子装置。
请参阅图10,电子装置1000包括上述方面的图像传感器100。具体地,电子装置1000可以包括手机或平板电脑。
在某些实施方式中,电子装置1000还包括与图像传感器100连接的中央处理器200及显示装置300,中央处理器200用于控制显示装置300显示图像传感器100输出的图像。如此,电子装置1000拍摄的图像可以显示于显示装置300以供用户查看。显示装置300包括LED显示器等。
在某些实施方式中,电子装置1000还包括与图像传感器100连接的中央处理器200及外存储器400,中央处理器200用于控制外存储器400存储图像传感器100输出的图像。
如此,生成的图像可以被存储,方便以后查看、使用或转移。外存储器400包括SD(Secure Digital)卡及CF(Compact Flash)卡等。
该电子装置1000,通过采用所述的图像传感器100,基于图像传感器100的硬件结构一来可以提高拍照灵敏度、降低信噪比,二来可以实现高动态范围图像合成功能,提升拍照体验。
请参阅图11,本发明实施方式还提供了一种电子装置,该电子装置包括壳体、处理器、存储器、电路板和电源电路,其中,电路板安置在壳体围成的空间内部,处理器和存储器设置在电路板上;电源电路用于为电子装置的各个电路或器件供电;所述存储器用于存储可执行程序代码;所述处理器通过读取所述存储器中存储的可执行程序代码来运行与所述可执行程序代码对应的程序,以用于执行上述方面的控制方法。
本发明实施方式还提供了一种计算机可读存储介质,具有存储于其中的指令,当电子装置的处理器执行所述指令时,所述电子装置执行如图所示的本发明实施方式的控制方法。
需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这 种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
在流程图中表示或在此以其他方式描述的逻辑和/或步骤,例如,可以被认为是用于实现逻辑功能的可执行指令的定序列表,可以具体实现在任何计算机可读介质中,以供指令执行系统、装置或设备(如基于计算机的系统、包括处理器的系统或其他可以从指令执行系统、装置或设备取指令并执行指令的系统)使用,或结合这些指令执行系统、装置或设备而使用。就本说明书而言,"计算机可读介质"可以是任何可以包含、存储、通信、传播或传输程序以供指令执行系统、装置或设备或结合这些指令执行系统、装置或设备而使用的装置。计算机可读介质的更具体的示例(非穷尽性列表)包括以下:具有一个或多个布线的电连接部(电子装置),便携式计算机盘盒(磁装置),随机存取存储器(RAM),只读存储器(ROM),可擦除可编辑只读存储器(EPROM或闪速存储器),光纤装置,以及便携式光盘只读存储器(CDROM)。另外,计算机可读介质甚至可以是可在其上打印所述程序的纸或其他合适的介质,因为可以例如通过对纸或其他介质进行光学扫描,接着进行编辑、解译或必要时以其他合适方式进行处理来以电子方式获得所述程序,然后将其存储在计算机存储器中。
应当理解,本发明的各部分可以用硬件、软件、固件或它们的组合来实现。在上述实施方式中,多个步骤或方法可以用存储在存储器中且由合适的指令执行系统执行的软件或固件来实现。例如,如果用硬件来实现,和在另一实施方式中一样,可用本领域公知的下列技术中的任一项或他们的组合来实现:具有用于对数据信号实现逻辑功能的逻辑门电路的离散逻辑电路,具有合适的组合逻辑门电路的专用集成电路,可编程门阵列(PGA),现场可编程门阵列(FPGA)等。
需要说明的是,在本说明书的描述中,参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包含于本发明的至少一个实施例或示例中。在本说明书中,对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且,描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外,在不相互矛盾的情况下,本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。
在本说明书的描述中,参考术语“一个实施例”、“一些实施例”、“示例”、“具体示例”、或“一些示例”等的描述意指结合该实施例或示例描述的具体特征、结构、材料或者特点包 含于本发明的至少一个实施例或示例中。在本说明书中,对上述术语的示意性表述不必须针对的是相同的实施例或示例。而且,描述的具体特征、结构、材料或者特点可以在任一个或多个实施例或示例中以合适的方式结合。此外,在不相互矛盾的情况下,本领域的技术人员可以将本说明书中描述的不同实施例或示例以及不同实施例或示例的特征进行结合和组合。
尽管上面已经示出和描述了本发明的实施例,可以理解的是,上述实施例是示例性的,不能理解为对本发明的限制,本领域的普通技术人员在本发明的范围内可以对上述实施例进行变化、修改、替换和变型。

Claims (22)

  1. 一种图像传感器,其特征在于,包括:
    感光单元阵列;
    设置在所述感光单元阵列上的滤光单元阵列,每个所述滤光单元覆盖对应一个所述感光单元,所述感光单元包括多个感光像素;和
    多个转换单元,每个所述转换单元包括至少两个源跟随器,至少一个所述源跟随器与多个所述感光像素连接。
  2. 如权利要求1所述的图像传感器,其特征在于,所述滤光单元阵列包括拜耳阵列。
  3. 如权利要求1所述的图像传感器,其特征在于,每个所述感光单元包括2*2的所述感光像素。
  4. 如权利要求3所述的图像传感器,其特征在于,每个所述转换单元包括两个所述源跟随器,其中一个所述源跟随器与上一行两个所述感光像素连接,另一个所述源跟随器与下一行两个所述感光像素连接。
  5. 如权利要求4所述的图像传感器,其特征在于,所述图像传感器还包括多个模数转换单元,每个所述模数转换单元与两个所述源跟随器连接。
  6. 如权利要求4所述的图像传感器,其特征在于,所述图像传感器还包括:
    多个时钟开关,每个所述时钟开关与一个所述感光像素连接;
    多个重置开关,上一行两个所述感光像素与一个所述重置开关连接,下一行两个所述感光像素与一个所述重置开关连接;
    多个读出开关,每个所述读出开关与一个所述源跟随器连接。
  7. 如权利要求3所述的图像传感器,其特征在于,每个所述转换单元包括两个所述源跟随器,其中一个所述源跟随器与三个所述感光像素连接,另一个所述源跟随器与剩下一个所述感光像素连接。
  8. 如权利要求7所述的图像传感器,其特征在于,所述图像传感器还包括多个模数转换单元,每个所述模数转换单元分别与一个所述源跟随器连接。
  9. 如权利要求7所述的图像传感器,其特征在于,所述图像传感器还包括:
    多个时钟开关,每个所述时钟开关与一个所述感光像素连接;
    多个重置开关,与一个所述源跟随器连接的三个所述感光像素与一个所述重置开关连接,剩下一个所述感光像素与一个所述重置开关连接;
    多个读出开关,与三个所述感光像素连接的一个所述源跟随器与一个所述读出开关连接,与剩下一个所述感光像素连接的一个所述源跟随器与一个所述读出开关连接。
  10. 如权利要求3所述的图像传感器,其特征在于,每个所述转换单元包括三个所述源跟随器,其中一个所述源跟随器与一列两个所述感光像素连接,另两个所述源跟随器与剩下两个所述感光像素分别连接。
  11. 如权利要求10所述的图像传感器,其特征在于,所述图像传感器还包括多个模数转换单元,与一列两个所述感光像素连接的一个所述源跟随器与一个所述模数转换单元连接,另两个与剩下两个所述感光像素分别连接的两个所述源跟随器与一个所述模数转换单元连接。
  12. 如权利要求10所述的图像传感器,其特征在于,所述图像传感器还包括:
    多个时钟开关,每个所述时钟开关与一个所述感光像素连接;
    多个重置开关,与一个所述源跟随器连接的一列两个所述感光像素与一个所述重置开关连接;剩下两个所述感光像素分别与一个所述重置开关连接;
    多个读出开关,与一列两个所述感光像素连接的一个所述源跟随器与一个所述读出开关连接,与剩下两个所述感光像素分别连接的两个所述源跟随器与一个所述读出开关连接。
  13. 如权利要求3所述的图像传感器,其特征在于,每个所述转换单元包括三个所述源跟随器,其中一个所述源跟随器与一行两个所述感光像素连接,另两个所述源跟随器与剩下两个所述感光像素分别连接。
  14. 如权利要求13所述的图像传感器,其特征在于,所述图像传感器还包括多个模数转换单元,每个所述模数转换单元与所述三个源跟随器连接。
  15. 如权利要求13所述的图像传感器,其特征在于,所述图像传感器还包括:
    多个时钟开关,每个时钟开关与一个所述感光像素连接;
    多个重置开关,与一个所述源跟随器连接的一行两个所述感光像素与一个所述重置开关连接;剩下两个所述感光像素分别与一个所述重置开关连接;
    多个读出开关,与连接一行两个所述感光像素的一个所述源跟随器与一个所述读出开关连接,与剩下两个所述感光像素分别连接的两个所述源跟随器与一个所述读出开关连接。
  16. 一种控制方法,用于控制图像传感器,其特征在于,所述图像传感器包括感光单元阵列、滤光单元阵列和多个转换单元,所述感光单元阵列设置在所述感光单元阵列上,每个所述滤光单元覆盖对应一个所述感光单元,所述感光单元包括多个感光像素,每个所述转换单元包括至少两个源跟随器,至少一个所述源跟随器与多个所述感光像素连接,所述图像传感器还包括用于控制所述感光像素开始曝光的时钟开关、用于控制所述感光像素清零重置的重置开关和用于控制所述感光像素读出的读出开关;所述控制方法包括以下步骤:
    控制所述时钟开关、所述重置开关和所述读出开关以读出两帧图像;和
    合并所述两帧图像以得到高动态范围的图像。
  17. 如权利要求16所述的控制方法,其特征在于,所述控制所述时钟开关、所述重置开关和所述感光开关以读出两帧图像的步骤包括:
    控制所述重置开关以清零重置所述感光像素;
    控制所述时钟开关以使得相邻两行所述感光像素同时曝光;和
    控制所述读出开关时序读取每个源跟随器的输出。
  18. 如权利要求17所述的控制方法,其特征在于,所述控制所述时钟开关、所述重置开关和所述读出开关以读出两帧图像的步骤包括步骤:
    将所述源跟随器输出的模拟信号转换为数字信号。
  19. 一种电子装置,其特征在于,包括如权利要求1-15任意一项所述的图像传感器。
  20. 如权利要求19所述的电子装置,其特征在于,所述电子装置包括手机或平板电脑。
  21. 如权利要求19所述的电子装置,其特征在于,所述电子装置还包括与所述图像传感器连接的中央处理器及显示装置,所述中央处理器用于控制所述显示装置显示所述图像传感器输出的图像。
  22. 一种电子装置,包括壳体、处理器、存储器、电路板和电源电路,其特征在于,所述电路板安置在所述壳体围成的空间内部,所述处理器和所述存储器设置在所述电路板上;所述电源电路,用于为所述电子装置的各个电路或器件供电;所述存储器用于存储可执行程序代码;所述处理器通过读取所述存储器中存储的可执行程序代码来运行与所述可执行程序代码对应的程序,以用于执行如权利要求16至18中任一项所述的控制方法。
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