WO2017016527A2 - 一种生长在Si衬底上的GaAs薄膜及其制备方法 - Google Patents

一种生长在Si衬底上的GaAs薄膜及其制备方法 Download PDF

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WO2017016527A2
WO2017016527A2 PCT/CN2016/095921 CN2016095921W WO2017016527A2 WO 2017016527 A2 WO2017016527 A2 WO 2017016527A2 CN 2016095921 W CN2016095921 W CN 2016095921W WO 2017016527 A2 WO2017016527 A2 WO 2017016527A2
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substrate
buffer layer
gaas
growth
thin film
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WO2017016527A3 (zh
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李国强
高芳亮
温雷
张曙光
李景灵
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华南理工大学
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    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
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Definitions

  • the present invention relates to a GaAs thin film grown on a Si substrate, and more particularly to a GaAs thin film grown on a Si substrate and a method of fabricating the same.
  • Epitaxial III-V semiconductor materials are very attractive on Si due to the advantages of mature technology, low cost, high mechanical strength and easy size. If the epitaxial growth of high-quality GaAs materials on Si can be realized, the production cost of important semiconductor devices such as GaAs solar cells and photoelectron detectors can be greatly reduced, and the combination of microelectronics and photoelectrons can be realized, which has broad application prospects. However, there are some problems with epitaxial GaAs films on Si substrates.
  • the lattice constant of Si is smaller than that of GaAs, and there is a lattice mismatch between them of more than 4%, which causes a large number of misfit dislocations in GaAs to grow, which deteriorates device performance.
  • surface characteristics of the Si substrate defects such as twin crystals and reverse domains are also likely to occur, especially when there is a large mismatch stress between the epitaxial material and the substrate. The formation of these defects causes a large number of pyramid-shaped or gully-type protrusions on the surface of the epitaxial film, which seriously affects the surface flatness of the GaAs semiconductor device.
  • a common method of stress relief is to insert several layers of a buffer layer having a thicker composition and a thicker thickness between the substrate and the epitaxial film.
  • the growth step of the gradual structure buffer layer is often cumbersome, and it is difficult to precisely control the composition, thickness, and crystal quality of each layer of the material, thereby affecting the quality of the finally obtained GaAs film. Therefore, in order to obtain a low defect density, high quality GaAs film, it is necessary to optimize the buffer layer growth process.
  • Another object of the present invention is to provide a method of producing the above GaAs thin film grown on a Si substrate.
  • a method for preparing a GaAs film grown on a Si substrate comprising the steps of:
  • the substrate temperature is lowered to 350 to 500 ° C, and the growth is carried out under the conditions of a reaction chamber pressure of 3.0 ⁇ 10 -5 to 2.5 ⁇ 10 -8 Pa, a V/III value of 20 to 30, and a growth rate of 0.1 to 0.5 ML/s.
  • a reaction chamber pressure 3.0 ⁇ 10 -5 to 2.5 ⁇ 10 -8 Pa
  • a V/III value of 20 to 30, and a growth rate of 0.1 to 0.5 ML/s.
  • the reaction chamber pressure is 3.0 ⁇ 10 -5 ⁇ 2.5 ⁇ 10 -8 Pa;
  • the substrate temperature is lowered to 350 to 500 ° C, and the growth is carried out under the conditions of a reaction chamber pressure of 3.0 ⁇ 10 -5 to 2.5 ⁇ 10 -8 Pa, a V/III value of 20 to 30, and a growth rate of 0.1 to 0.5 ML/s.
  • a reaction chamber pressure 3.0 ⁇ 10 -5 to 2.5 ⁇ 10 -8 Pa, a V/III value of 20 to 30, and a growth rate of 0.1 to 0.5 ML/s.
  • 20 nm GaAs buffer layer 20 nm GaAs buffer layer;
  • the substrate temperature is lowered to 350 to 500 ° C, and the growth is carried out under the conditions of a reaction chamber pressure of 3.0 ⁇ 10 -5 to 2.5 ⁇ 10 -8 Pa, a V/III value of 20 to 30, and a growth rate of 0.1 to 0.5 ML/s.
  • a reaction chamber pressure 3.0 ⁇ 10 -5 to 2.5 ⁇ 10 -8 Pa
  • a V/III value of 20 to 30, and a growth rate of 0.1 to 0.5 ML/s.
  • the pressure in the reaction chamber is 3.0 ⁇ 10 -5 ⁇ 2.5 ⁇ 10 -8 Pa;
  • the substrate temperature is raised to 500 to 580 ° C, and the thickness of the reaction chamber is 4.0 ⁇ 10 -5 to 2.7 ⁇ 10 -8 Pa, V/III value is 40 to 60, and growth rate is 0.6 to 1 ML/s. It is a GaAs epitaxial film of 100 nm to 1000 nm.
  • Step (1) of the Si (111) substrate cleaning specifically:
  • Step (2) of the Si (111) substrate pretreatment specifically:
  • the Si (111) substrate After the Si (111) substrate is cleaned, it is sent to the injection chamber for pre-degassing for 15 to 30 minutes; then sent to the transfer chamber at 300-400 ° C for degassing for 0.5 to 2 hours, and then degassed and sent to the growth chamber.
  • Step (3) of the Si (111) substrate deoxidation film specifically:
  • the substrate temperature is raised to 950 to 1050 ° C, and baked at a high temperature for 45 to 60 minutes to remove the oxide film layer on the surface of the substrate.
  • a GaAs thin film grown on a Si substrate comprising a Si (111) substrate stacked from bottom to top, a first In x Ga 1-x As buffer layer, a GaAs buffer layer, and a second In x Ga 1-x As buffer layer And GaAs epitaxial film;
  • the first In x Ga 1-x As buffer layer is grown and annealed at 500 ⁇ 540 °C first In x Ga 1-x As buffer layer 350 ⁇ 500 °C, where 0.05 ⁇ x ⁇ 0.10;
  • the GaAs buffer layer is a GaAs buffer layer grown at 350-500 ° C and annealed at 500-540 ° C;
  • the second In x Ga 1-x As buffer layer is an annealed In x Ga 1-x As buffer layer grown at 350 to 500 ° C and at 500 to 540 ° C, and has 0.01 ⁇ x ⁇ 0.05.
  • the first In x Ga 1-x As buffer layer has a thickness of 2 to 20 nm.
  • the GaAs buffer layer has a thickness of 2 to 20 nm.
  • the second In x Ga 1-x As buffer layer has a thickness of 2 to 20 nm.
  • the GaAs epitaxial film has a thickness of 100 nm to 1000 nm.
  • the present invention has the following advantages and benefits:
  • the present invention passes a low temperature In x Ga 1-x As (0.05 ⁇ x ⁇ 0.10) buffer layer, a low temperature GaAs buffer layer, a low temperature In x Ga 1-x As (0.01 ⁇ x ⁇ 0.05) buffer layer stress compensation buffer layer Structural technology, each layer of low temperature buffer layer is annealed in situ after growth, which can effectively change the surface remodeling process of Group III atoms in Si(111), inhibit the formation of twin crystals in GaAs film, and improve the surface of epitaxial film. Flatness.
  • the In x Ga 1-x As (0.05 ⁇ x ⁇ 0.10)/GaAs/In x Ga 1-x As (0.01 ⁇ x ⁇ 0.05) stress compensation buffer layer structure used in the present invention can effectively release GaAs growth
  • the stress received in the process suppresses the formation of misfit dislocations and improves the crystal quality of the GaAs epitaxial film.
  • the method of the invention is simple and easy, and the obtained product has the advantages of simple buffer layer structure, flat surface of GaAs epitaxial film and high crystal quality, and is convenient for popularization and application.
  • FIG. 1 is a schematic view showing the structure of a GaAs thin film grown on a Si substrate according to an embodiment of the present invention.
  • FIG. 2 is a view showing a scanning electron microscope surface topography of a GaAs thin film grown on a Si substrate according to an embodiment of the present invention.
  • FIG 3 is a view showing a cross-sectional morphology of a transmission electron microscope of a GaAs thin film grown on a Si substrate according to an embodiment of the present invention.
  • Si (111) substrate cleaning specifically:
  • the Si substrate is blown dry with high purity nitrogen;
  • Si (111) substrate pretreatment specifically:
  • the Si (111) substrate After the Si (111) substrate is cleaned, it is sent to the injection chamber for pre-degassing for 15 minutes; then sent to the transfer chamber at 300 ° C for degassing for 0.5 hours, after degassing, it is sent to the growth chamber.
  • Si(111) substrate deoxidation film specifically:
  • the substrate temperature was raised to 950 ° C, and baked at a high temperature for 45 minutes to remove the oxide film layer on the surface of the substrate.
  • the substrate temperature was raised to 500 ° C for 10 min, and the reaction chamber pressure was 3.0 ⁇ 10 -5 Pa.
  • the substrate temperature was lowered to 350 ° C, and a 2 nm GaAs buffer layer was grown under the conditions of a reaction chamber pressure of 3.0 ⁇ 10 -5 Pa, a V/III value of 20, and a growth rate of 0.1 ML/s.
  • the substrate temperature was raised to 500 ° C for 10 min, and the reaction chamber pressure was 3.0 ⁇ 10 -5 Pa.
  • the substrate temperature was raised to 500 ° C for 10 min, and the pressure in the reaction chamber was 3.0 ⁇ 10 -5 Pa.
  • the substrate temperature was raised to 500 ° C, and a GaAs epitaxial film having a thickness of 100 nm was grown under the conditions of a reaction chamber vacuum of 4.0 ⁇ 10 -5 Pa, a V/III value of 40, and a growth rate of 0.6 ML / s.
  • a GaAs thin film grown on a Si substrate includes a Si (111) substrate 11 laminated from bottom to top, and a first In x Ga 1-x As buffer layer (0.05 ⁇ x ⁇ 0.10) 12 A GaAs buffer layer 13, a second In x Ga 1-x As buffer layer (0.01 ⁇ x ⁇ 0.05) 14 and a GaAs epitaxial film 15.
  • FIG. 2 is a scanning electron microscope surface top view of the GaAs epitaxial film prepared in the present embodiment, and it can be seen that no pyramid-shaped protrusions appear on the surface, and the surface is very flat.
  • the GaAs epitaxial film grown by the present invention has a higher crystal quality than the GaAs obtained by the conventional method, and the half-width of the (111) plane X-ray rocking curve is 200 arc seconds.
  • the buffer layer thanks to the addition of the buffer layer, the GaAs surface hardly sees pyramidal protrusions due to twin crystals, the surface is very flat, and the mean square surface roughness is 1.8 nm.
  • FIG. 3 is a view showing a cross-sectional morphology of a GaAs epitaxial film prepared in the present embodiment, in which no threading dislocation is observed, indicating that the dislocation density is greatly reduced and the crystal quality is improved.
  • the GaAs epitaxial layer can be prepared by molecular beam epitaxy or metal organic vapor deposition.
  • the first and second In x Ga 1-x As buffer layers are controlled to have a thickness of 2 to 20 nm, a growth temperature of 300 to 450 ° C, and a V/III value of 20 to 30 to pass the In x Ga 1-x As.
  • the buffer layer reduces the stress caused by the lattice mismatch, so that the prepared GaAs thin film has high quality and smooth surface morphology.
  • Si (111) substrate cleaning specifically:
  • the Si substrate is blown dry with high purity nitrogen;
  • Si (111) substrate pretreatment specifically:
  • the Si (111) substrate After the Si (111) substrate is cleaned, it is sent to the injection chamber for pre-degassing for 30 minutes; it is sent to the transfer chamber at 400 ° C for 2 hours, and then degassed and sent to the growth chamber.
  • Si(111) substrate deoxidation film specifically:
  • the substrate temperature was raised to 1,050 ° C, and baked at a high temperature for 60 minutes to remove the oxide film layer on the surface of the substrate.
  • the substrate temperature was raised to 500 to 540 ° C for 20 min, and the reaction chamber pressure was 2.5 ⁇ 10 -8 Pa.
  • the substrate temperature was lowered to 500 ° C, and a 20 nm GaAs buffer layer was grown under the conditions of a reaction chamber pressure of 2.5 ⁇ 10 -8 Pa, a V/III value of 30, and a growth rate of 0.5 ML/s.
  • the substrate temperature was raised to 540 ° C for 20 min, and the reaction chamber pressure was 2.5 ⁇ 10 -8 Pa.
  • the substrate temperature was raised to 540 ° C for 20 min, and the pressure in the reaction chamber was 2.5 ⁇ 10 -8 Pa.
  • the substrate temperature was raised to 580 ° C, and a GaAs epitaxial film having a thickness of 1000 nm was grown under the conditions of a reaction chamber vacuum of 2.7 ⁇ 10 -8 Pa, a V/III value of 60, and a growth rate of 1 ML/s.
  • the GaAs film grown on the Si substrate prepared in this embodiment is similar to that in Embodiment 1, and will not be described herein.

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Abstract

本发明公开了一种生长在Si衬底上的GaAs薄膜的制备方法,包括以下步骤:(1)Si(111)衬底清洗;(2)Si(111)衬底预处理;(3)Si(111)衬底脱氧化膜;(4)第一InxGa1-xAs缓冲层的生长;(5)第一InxGa1-xAs缓冲层的原位退火;(6)GaAs缓冲层的生长;(7)GaAs缓冲层的原位退火;(8)第二InxGa1-xAs缓冲层的生长;(9)第二InxGa1-xAs缓冲层的原位退火;(10)GaAs外延薄膜的生长。本发明还公开了生长在Si衬底上的GaAs薄膜。本发明得到的GaAs薄膜晶体质量好,表面平整,对半导体器件的制备,尤其是太阳电池领域,有着积极的促进意义。

Description

一种生长在Si衬底上的GaAs薄膜及其制备方法 技术领域
本发明涉及生长在Si衬底上的GaAs薄膜,特别涉及一种生长在Si衬底上的GaAs薄膜及其制备方法。
背景技术
由于Si具有工艺成熟、价格便宜、机械强度高及易于大尺寸化等优点,在Si上外延III-V族半导体材料,尤其是GaAs,十分有吸引力。如果能够实现Si上高质量GaAs材料的外延生长,将能够大幅降低GaAs太阳能电池、光电子探测器等重要半导体器件的生产成本,并能够实现微电子与光电子的相互结合,具有广阔的应用前景。但是,在Si衬底上外延GaAs薄膜也存在着一些问题。一方面,Si的晶格常数比GaAs的要小,它们间具有超过4%的晶格失配,这会造成在生长时,GaAs中产生大量的失配位错,恶化器件性能。另一方面,Si衬底的表面特性,双晶、反向畴等缺陷也较为容易出现,尤其是当外延材料与衬底间存在较大的失配应力时。这些缺陷的形成会造成外延薄膜表面形成大量金字塔型或者沟壑型突起,严重影响到GaAs半导体器件的表面平整度。
为了抑制由于晶格失配所产生的位错及双晶对材料性能的影响,最直接的办法就是消除外延薄膜与衬底间的应力。消除应力的常用方法是在衬底与外延薄膜间插入几层组分渐变、厚度较厚的缓冲层。但是这种渐变结构缓冲层的生长步骤往往较为繁琐,且很难精确控制每一层材料的成分、厚度、以及晶体质量,从而影响最终获得的GaAs薄膜质量。因此,为了得到低缺陷密度、高质量的GaAs薄膜,就需要对缓冲层生长工艺进行优化。
发明内容
为了克服现有技术的上述缺点与不足,本发明的目的在于提供一种生长在Si衬底上的GaAs薄膜,晶体质量较好、表面平整。
本发明的另一目的在于提供上述生长在Si衬底上的GaAs薄膜的制备方法。
本发明的目的通过以下技术方案实现:
一种生长在Si衬底上的GaAs薄膜的制备方法,包括以下步骤:
(1)Si(111)衬底清洗;
(2)Si(111)衬底预处理;
(3)Si(111)衬底脱氧化膜;
(4)第一InxGa1-xAs缓冲层的生长:
将衬底温度降至350~500℃,在反应室压力3.0×10-5~2.5×10-8Pa、V/III值20~30、生长速度0.1~0.5ML/s的条件下生长2~20nm的InxGa1-xAs缓冲层,其中0.05<x<0.10;
(5)第一InxGa1-xAs缓冲层的原位退火:
将衬底温度升至500~540℃退火10~20min,反应室压力为3.0×10-5~2.5×10-8Pa;
(6)GaAs缓冲层的生长:
将衬底温度降至350~500℃,在反应室压力3.0×10-5~2.5×10-8Pa、V/III值20~30、生长速度0.1~0.5ML/s的条件下生长2~20nm GaAs缓冲层;
(7)GaAs缓冲层的原位退火;
将衬底温度升至500~540℃退火10~20min,反应室压力3.0×10-5~2.5×10-8Pa;
(8)第二InxGa1-xAs缓冲层的生长:
将衬底温度降至350~500℃,在反应室压力3.0×10-5~2.5×10-8Pa、V/III值20~30、生长速度0.1~0.5ML/s的条件下生长2~20nm InxGa1-xAs缓冲层;其中0.01<x<0.05;
(9)第二InxGa1-xAs缓冲层的原位退火:
将衬底温度升至500~540℃退火10~20min,在反应室压力3.0×10-5~2.5×10-8Pa;
(10)GaAs外延薄膜的生长:
将衬底温度升至500~580℃,在反应室真空度为4.0×10-5~2.7×10-8Pa、V/III值40~60、生长速度0.6~1ML/s条件下,生长厚度为100nm~1000nm的GaAs外延薄膜。
步骤(1)所述Si(111)衬底清洗,具体为:
经过丙酮、去离子水洗涤,去除衬底表面有机物;将Si衬底置于HF:H2O=1:10溶液中超声1~10分钟,之后经去离子水清洗去除表面氧化物和有机物;清洗后的Si衬底用高纯氮气吹干。
步骤(2)所述Si(111)衬底预处理,具体为:
Si(111)衬底清洗完毕后,送入进样室预除气15~30分钟;再送入传递室300~400℃除气0.5~2小时,完成除气后送入生长室。
步骤(3)所述Si(111)衬底脱氧化膜,具体为:
Si(111)衬底进入生长室后,将衬底温度升至950~1050℃,高温烘烤45~60分钟,除去衬底表面的氧化膜层。
生长在Si衬底上的GaAs薄膜,包括由下至上层叠的Si(111)衬底、第一InxGa1-xAs缓冲层、GaAs缓冲层、第二InxGa1-xAs缓冲层和GaAs外延薄膜;
所述第一InxGa1-xAs缓冲层为在350~500℃生长并在500~540℃退火的第一InxGa1-xAs缓冲层,其中0.05<x<0.10;
所述GaAs缓冲层为在350~500℃生长并在500~540℃退火的GaAs缓冲层;
所述第二InxGa1-xAs缓冲层为在350~500℃生长并在500~540℃的退火InxGa1-xAs缓冲层,其0.01<x<0.05。
所述第一InxGa1-xAs缓冲层的厚度为2~20nm。
所述GaAs缓冲层的厚度为2~20nm。
所述第二InxGa1-xAs缓冲层的厚度为2~20nm。
所述GaAs外延薄膜的厚度为100nm~1000nm。
与现有技术相比,本发明具有以下优点和有益效果:
(1)本发明通过低温InxGa1-xAs(0.05<x<0.10)缓冲层、低温GaAs缓冲层、低温InxGa1-xAs(0.01<x<0.05)缓冲层应力补偿缓冲层结构技术,每层低温缓冲层在生长结束后,都经过原位退火处理,可有效改变III族原子在Si(111)的表面重构过程,抑制GaAs薄膜中双晶的形成,提高外延膜表面的平整度。
(2)本发明所采用的InxGa1-xAs(0.05<x<0.10)/GaAs/InxGa1-xAs(0.01<x<0.05)应力补偿缓冲层结构,能够有效释放GaAs生长过程中受到的应力,抑制失配位错的形成,提高GaAs外延膜的晶体质量。
(3)本发明的方法简便易行,得到的产品具有缓冲层结构简单、GaAs外延薄膜表面平整和晶体质量高等优点,便于推广应用。
附图说明
图1为本发明的实施例的生长在Si衬底上的GaAs薄膜的结构示意图。
图2为本发明的实施例的生长在Si衬底上的GaAs薄膜的扫描电镜表面形貌观察图。
图3为本发明的实施例的生长在Si衬底上的GaAs薄膜的透射电镜截面形貌观察图。
具体实施方式
下面结合实施例,对本发明作进一步地详细说明,但本发明的实施方式不限于此。
实施例1
本实施例的生长在Si衬底上的GaAs薄膜的制备方法,包括以下步骤:
(1)Si(111)衬底清洗,具体为:
经过丙酮、去离子水洗涤,去除衬底表面有机物;将Si衬底置于HF:H2O=1:10溶液中超声1分钟,之后经去离子水清洗去除表面氧化物和有机物;清洗后的Si衬底用高纯氮气吹干;
(2)Si(111)衬底预处理,具体为:
Si(111)衬底清洗完毕后,送入进样室预除气15分钟;再送入传递室300℃除气0.5小时,完成除气后送入生长室
(3)Si(111)衬底脱氧化膜,具体为:
Si(111)衬底进入生长室后,将衬底温度升至950℃,高温烘烤45分钟,除去衬底表面的氧化膜层。
(4)第一InxGa1-xAs缓冲层的生长:
将衬底温度降至350℃,在反应室压力3.0×10-5Pa、V/III值20、生长速度0.1ML/s的条件下生长2nm的InxGa1-xAs缓冲层,其中x=0.05。
(5)第一InxGa1-xAs缓冲层的原位退火:
将衬底温度升至500℃退火10min,反应室压力为3.0×10-5Pa。
(6)GaAs缓冲层的生长:
将衬底温度降至350℃,在反应室压力3.0×10-5Pa、V/III值20、生长速度0.1ML/s的条件下生长2nm GaAs缓冲层。
(7)GaAs缓冲层的原位退火;
将衬底温度升至500℃退火10min,反应室压力3.0×10-5Pa。
(8)第二InxGa1-xAs缓冲层的生长:
将衬底温度降至350℃,在反应室压力3.0×10-5Pa、V/III值20、生长速度0.1ML/s的条件下生长2nm InxGa1-xAs缓冲层;其中x=0.01。
(9)第二InxGa1-xAs缓冲层的原位退火:
将衬底温度升至500℃退火10min,在反应室压力3.0×10-5Pa。
(10)GaAs外延薄膜的生长:
将衬底温度升至500℃,在反应室真空度为4.0×10-5Pa、V/III值40、生长速度0.6ML/s条件下,生长厚度为100nm的GaAs外延薄膜。
如图1所示,生长在Si衬底上的GaAs薄膜,包括由下至上层叠的Si(111)衬底11、第一InxGa1-xAs缓冲层(0.05<x<0.10)12、GaAs缓冲层13、第二InxGa1-xAs缓冲层(0.01<x<0.05)14和GaAs外延薄膜15。
图2为本实施例制备的GaAs外延薄膜的扫描电镜表面形貌观察图,可以看到其表面未出现金字塔型突起,表面十分平整。从图2中可以看出。应用本发明生长出的GaAs外延薄膜,相较于用传统方法得到的GaAs,晶体质量高,其(111)面X-射线摇摆曲线的半峰宽为200弧秒。并且得益于缓冲层的加入,GaAs表面几乎看不到由于双晶所造成的金字塔形突起,表面十分平整,均方表面粗糙度为1.8nm。
图3为本实施例制备的GaAs外延膜的透射电镜截面形貌观察图,在图中未观察到穿透位错,说明位错密度被大幅降低,晶体质量得到了提高。
本发明中GaAs薄膜材料结构中的第一InxGa1-xAs(0.05<x<0.10)缓冲层、GaAs缓冲层、第二InxGa1-xAs(0.01<x<0.05)缓冲层及GaAs外延层都可以采用分子束外延生长或者金属有机气相沉积技术制备。第一、第二InxGa1-xAs缓冲层的厚度控制在2~20nm,生长温度控制在300~450℃,V/III值为20~30,才通过该InxGa1-xAs缓冲层降低由于晶格失配造成的应力,使得所制备的GaAs薄膜晶体质量高、表面形貌平整。
实施例2
本实施例的生长在Si衬底上的GaAs薄膜的制备方法,包括以下步骤:
(1)Si(111)衬底清洗,具体为:
经过丙酮、去离子水洗涤,去除衬底表面有机物;将Si衬底置于HF:H2O=1:10溶液中超声10分钟,之后经去离子水清洗去除表面氧化物和有机物;清洗后的Si衬底用高纯氮气吹干;
(2)Si(111)衬底预处理,具体为:
Si(111)衬底清洗完毕后,送入进样室预除气30分钟;再送入传递室400℃除气2小时,完成除气后送入生长室
(3)Si(111)衬底脱氧化膜,具体为:
Si(111)衬底进入生长室后,将衬底温度升至1050℃,高温烘烤60分钟,除去衬底表面的氧化膜层。
(4)第一InxGa1-xAs缓冲层的生长:
将衬底温度降至500℃,在反应室压力2.5×10-8Pa、V/III值30、生长速度0.5ML/s的条件下生长20nm的InxGa1-xAs缓冲层,其中x=0.10。
(5)第一InxGa1-xAs缓冲层的原位退火:
将衬底温度升至500~540℃退火20min,反应室压力为2.5×10-8Pa。
(6)GaAs缓冲层的生长:
将衬底温度降至500℃,在反应室压力2.5×10-8Pa、V/III值30、生长速度0.5ML/s的条件下生长20nm GaAs缓冲层。
(7)GaAs缓冲层的原位退火;
将衬底温度升至540℃退火20min,反应室压力2.5×10-8Pa。
(8)第二InxGa1-xAs缓冲层的生长:
将衬底温度降至350~500℃,在反应室压力2.5×10-8Pa、V/III值30、生长速度0.5ML/s的条件下生长20nm InxGa1-xAs缓冲层;其中x=0.05。
(9)第二InxGa1-xAs缓冲层的原位退火:
将衬底温度升至540℃退火20min,在反应室压力2.5×10-8Pa。
(10)GaAs外延薄膜的生长:
将衬底温度升至580℃,在反应室真空度为2.7×10-8Pa、V/III值60、生长速度1ML/s条件下,生长厚度为1000nm的GaAs外延薄膜。
本实施例制备得到生长在Si衬底上的GaAs薄膜与实施例1类似,在此不再赘述。
上述实施例为本发明较佳的实施方式,但本发明的实施方式并不受所述实施例的限制,其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、替代、组合、简化,均应为等效的置换方式,都包含在本发明的保护范围之内。

Claims (9)

  1. 一种生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,包括以下步骤:
    (1)Si(111)衬底清洗;
    (2)Si(111)衬底预处理;
    (3)Si(111)衬底脱氧化膜;
    (4)第一InxGa1-xAs缓冲层的生长:
    将衬底温度降至350~500℃,在反应室压力3.0×10-5~2.5×10-8Pa、V/III值20~30、生长速度0.1~0.5ML/s的条件下生长2~20nm的InxGa1-xAs缓冲层,其中0.05<x<0.10;
    (5)第一InxGa1-xAs缓冲层的原位退火:
    将衬底温度升至500~540℃退火10~20min,反应室压力为3.0×10-5~2.5×10-8Pa;
    (6)GaAs缓冲层的生长:
    将衬底温度降至350~500℃,在反应室压力3.0×10-5~2.5×10-8Pa、V/III值20~30、生长速度0.1~0.5ML/s的条件下生长2~20nm GaAs缓冲层;
    (7)GaAs缓冲层的原位退火;
    将衬底温度升至500~540℃退火10~20min,反应室压力3.0×10-5~2.5×10-8Pa;
    (8)第二InxGa1-xAs缓冲层的生长:
    将衬底温度降至350~500℃,在反应室压力3.0×10-5~2.5×10-8Pa、V/III值20~30、生长速度0.1~0.5ML/s的条件下生长2~20nm InxGa1-xAs缓冲层;其中0.01<x<0.05;
    (9)第二InxGa1-xAs缓冲层的原位退火:
    将衬底温度升至500~540℃退火10~20min,在反应室压力3.0×10-5~2.5×10-8Pa;
    (10)GaAs外延薄膜的生长:
    将衬底温度升至500~580℃,在反应室真空度为4.0×10-5~2.7×10-8Pa、V/III值40~60、生长速度0.6~1ML/s条件下,生长厚度为100nm~1000nm的GaAs外延薄膜。
  2. 根据权利要求1所述的生长在Si衬底上的GaAs薄膜的制备方法,其 特征在于,步骤(1)所述Si(111)衬底清洗,具体为:
    经过丙酮、去离子水洗涤,去除衬底表面有机物;将Si衬底置于HF:H2O=1:10溶液中超声1~10分钟,之后经去离子水清洗去除表面氧化物和有机物;清洗后的Si衬底用高纯氮气吹干。
  3. 根据权利要求1所述的生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,步骤(2)所述Si(111)衬底预处理,具体为:
    Si(111)衬底清洗完毕后,送入进样室预除气15~30分钟;再送入传递室300~400℃除气0.5~2小时,完成除气后送入生长室。
  4. 根据权利要求1所述的生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,步骤(3)所述Si(111)衬底脱氧化膜,具体为:
    Si(111)衬底进入生长室后,将衬底温度升至950~1050℃,高温烘烤45~60分钟,除去衬底表面的氧化膜层。
  5. 生长在Si衬底上的GaAs薄膜,其特征在于,包括由下至上层叠的Si(111)衬底、第一InxGa1-xAs缓冲层、GaAs缓冲层、第二InxGa1-xAs缓冲层和GaAs外延薄膜;
    所述第一InxGa1-xAs缓冲层为在350~500℃生长并在500~540℃退火的第一InxGa1-xAs缓冲层,其中0.05<x<0.10;
    所述GaAs缓冲层为在350~500℃生长并在500~540℃退火的GaAs缓冲层;
    所述第二InxGa1-xAs缓冲层为在350~500℃生长并在500~540℃退火的InxGa1-xAs缓冲层,其中0.01<x<0.05。
  6. 根据权利要求5所述的生长在Si衬底上的GaAs薄膜,其特征在于,所述第一InxGa1-xAs缓冲层的厚度为2~20nm。
  7. 根据权利要求5所述的生长在Si衬底上的GaAs薄膜,其特征在于,所述GaAs缓冲层的厚度为2~20nm。
  8. 根据权利要求5所述的生长在Si衬底上的GaAs薄膜,其特征在于,所述第二InxGa1-xAs缓冲层的厚度为2~20nm。
  9. 根据权利要求5所述的生长在Si衬底上的GaAs薄膜,其特征在于,所述GaAs外延薄膜的厚度为100nm~1000nm。
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