CN104835718A - 生长在Si衬底上的GaAs薄膜及其制备方法 - Google Patents
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Abstract
本发明公开了一种生长在Si衬底上的GaAs薄膜的制备方法,包括以下步骤:(1)Si衬底清洗;(2)Si衬底预处理;(4)缓冲层的生长:在350~500℃的生长温度下,在经步骤(3)处理后的Si衬底表面生长2~20nm的InxGa1-xAs缓冲层,0.08<x<0.12;(5)GaAs薄膜的生长:在500~580℃的生长温度下生长GaAs薄膜。本发明还公开了生长在Si衬底上的GaAs薄膜,包括依次层叠的Si衬底、InxGa1-xAs缓冲层以及GaAs薄膜。本发明的制备方法简单,大为简化了缓冲层结构以及外延生长工艺,获得表面形貌好、残余应力低的GaAs外延薄膜。
Description
技术领域
本发明涉及GaAs薄膜及其制备方法,特别涉及一种生长在Si衬底上的GaAs薄膜及其制备方法。
背景技术
由于Si具有工艺成熟、价格便宜及易于大尺寸化等优点,在硅上外延III-V族半导体材料,尤其是GaAs,十分有吸引力。目前,科研工作者已经成功在Si衬底上外延生长出GaAs基激光器,高效太阳能电池及其他具有特殊光电性能的光电器件。通常情况下,GaAs半导体器件是在Si(100)面上进行外延生长制备的。但是,在Si(100)上外延生长GaAs存在两方面的问题。一方面,由于Si(100)具有的单原子台阶的表面,造成了直接在Si(100)衬底上外延的GaAs薄膜中存在大量的反向畴缺陷。另一方面,由于Si(100)具有大的表面能,GaAs在Si(100)上按照的SK模式生长,造成了GaAs外延膜表面凹凸不平。相比于Si(100),Si(111)更适合高质量的GaAs半导体器件的生长。一方面,Si(111)具有双原子台阶的表面,能够抑制反向畴的形成。另一方面,Si(111)面的表面能要低于Si(100)面,更容易获得表面平整的GaAs半导体器件。
但是,在Si(111)衬底上外延GaAs薄膜也存在着一些问题。一方面,Si与GaAs间具有超过4%的晶格失配,这会造成GaAs中产生大量的失配位错,恶化器件性能。为了降低GaAs生长时所受到的应力,并抑制位错的产生,最佳途径是通过插入缓冲层释放应力,再生长GaAs外延薄膜。通常情况下,在Si上外延GaAs时所用到的缓冲层结构复杂,往往需要多层的渐变缓冲结构,这极大的影响了半导体器件的制备工艺。如果能够通过简单的缓冲层工艺,以达到释放应力的目的,将能极大程度上简化现有的Si上制备GaAs基半导体器件的工艺,大大降低其生产周期,节约制造成本。
另一方面,由于{111}为面心立方化合物中的孪晶面以及Ga在Si(111)面上的特殊重构,会造成在Si(111)上外延的GaAs薄膜中产生大量的双晶,在薄膜表面形成大量金字塔型突起,严重影响到GaAs半导体器件的表面平整度。
发明内容
为了克服现有技术的上述缺点与不足,本发明的目的在于提供一种生长在Si衬底上的GaAs薄膜的制备方法,抑制GaAs薄膜中失配位错及双晶的形成,提高GaAs外延膜的晶体质量。
本发明的另一目的在于提供生长在Si衬底上的GaAs薄膜。
本发明的目的通过以下技术方案实现:
生长在Si衬底上的GaAs薄膜的制备方法,包括以下步骤:
(1)Si衬底清洗;
(2)Si衬底预处理;
(3)Si衬底脱氧化膜;
(4)缓冲层的生长:在300~450℃的生长温度下,在经步骤(3)处理后的Si衬底表面生长2~20nm的InxGa1-xAs缓冲层,0.08<x<0.12;
(5)GaAs薄膜的生长:在500~580℃的生长温度下生长GaAs薄膜。
步骤(4)所述缓冲层的生长,具体为:
将衬底温度升至350~450℃,在反应室压力3.0×10-5~2.5×10-8Pa、Ⅴ/Ⅲ值20~30、生长速度0.1~0.5ML/s的条件下生长2~20nm的InxGa1-xAs缓冲层。
步骤(5)所述GaAs外延薄膜的生长,具体为:
将Si衬底温度升至500~580℃,在反应室真空度为4.0×10-5~2.7×10-8Pa、Ⅴ/Ⅲ值40~60、生长速度0.6~1ML/s条件下,生长GaAs外延薄膜。
步骤(1)所述Si衬底清洗,具体为:
经过丙酮、去离子水洗涤,去除衬底表面有机物;将Si衬底置于HF:H2O=1:10溶液中超声1~10分钟,之后经去离子水清洗去除表面氧化物和有机物;清洗后的Si衬底用高纯氮气吹干。
步骤(2)所述Si衬底预处理,具体为:
Si衬底清洗完毕后,送入分子束外延进样室预除气15~30分钟;再送入传递室300~400℃除气0.5~2小时,完成除气后送入生长室。
步骤(3)所述Si衬底脱氧化膜,具体为:
Si衬底进入生长室后,将衬底温度升至950~1050℃,烘烤15~30分钟,除去衬底表面的氧化膜层。
生长在Si衬底上的GaAs薄膜,包括依次层叠的Si衬底、InxGa1-xAs缓冲层以及GaAs薄膜,所述InxGa1-xAs缓冲层的厚度为2~20nm;其中0.08<x<0.12。
本发明的生长在Si衬底上的GaAs薄膜,以预沉积In原子再沉积GaAs后退火处理得到InxGa1-xAs(0.08<x<0.12)缓冲层,采用分子束外延外延生长得到了质量高的GaAs材料,并大为简化了缓冲层结构以及外延生长工艺,同时达到了可严格控制外延层的厚度、组分的要求,获得了表面形貌好、残余应力低的GaAs外延薄膜。
与现有技术相比,本发明具有以下优点和有益效果:
(1)本发明通过采用InxGa1-xAs(0.08<x<0.12)缓冲层,有效改变III族原子在Si(111)的表面重构过程,抑制GaAs薄膜中双晶的形成,提高外延膜表面的平整度。
(2)本发明所采用的InxGa1-xAs(0.08<x<0.12)缓冲层,能够有效降低GaAs生长过程中受到的应力,抑制失配位错的形成,提高GaAs外延膜的晶体质量。
(3)本发明使用了单层InxGa1-xAs(0.08<x<0.12)缓冲层,与多层缓冲层相比,该方法大为简化了缓冲层结构以及外延生长工艺,到达可良好释放外延层中应力并抑制缺陷形成的要求,从而能获得表面形貌好、高弛豫度、晶体质量高的GaAs外延薄膜。
(4)本发明技术手段简便易行,具有缓冲层结构简单、外延生长过程简便、GaAs外延薄质量高等优点,便于推广应用。
附图说明
图1为本发明的实施例的GaAs薄膜的结构示意图。
图2为本发明的实施例的GaAs薄膜的扫描电镜表面形貌图。
图3为本发明的实施例的GaAs薄膜的透射电镜截面形貌图。
具体实施方式
下面结合实施例,对本发明作进一步地详细说明,但本发明的实施方式不限于此。
实施例1
本实施例的生长在Si衬底上的GaAs薄膜的制备方法,包括以下步骤:
(1)Si衬底清洗:经过丙酮、去离子水洗涤,去除衬底表面有机物;将Si衬底置于HF:H2O=1:10溶液中超声1分钟,之后经去离子水清洗去除表面氧化物和有机物;清洗后的Si衬底用高纯氮气吹干;
(2)Si衬底预处理:Si衬底清洗完毕后,送入分子束外延进样室预除气15分钟;再送入传递室300℃除气2小时,完成除气后送入生长室;
(3)Si衬底脱氧化膜:Si衬底进入生长室后,将衬底温度升至950~1050℃,高温烘烤15~30分钟,除去衬底表面的氧化膜层;
(4)缓冲层的生长:将衬底温度升至350℃,在反应室压力3.0×10-7Pa、Ⅴ/Ⅲ值20、生长速度0.1ML/s的条件下生长2nm的InxGa1-xAs缓冲层,x=0.08;
(5)GaAs外延薄膜的生长:在500℃的生长温度下生长GaAs外延薄膜:将Si衬底温度升至500℃,在反应室真空度为4.0×10-7Pa、Ⅴ/Ⅲ值40、生长速度0.6ML/s条件下,生长GaAs外延薄膜。
图1为本实施例制备的GaAs薄膜的结构示意图,包括依次层叠的Si衬底11、InxGa1-xAs缓冲层12、GaAs外延薄膜13。
图2为本实施例制备的GaAs薄膜的扫描电镜表面形貌图,由图可知,较于用传统方法得到的GaAs,其晶体质量高,(111)面X-射线摇摆曲线的半峰宽为210弧秒,表面比较平整,没有出现金字塔型突起,其均方表面粗糙度为2.4nm。
图3为本实施例制备的GaAs薄膜的透射电镜截面图,由图可知,透射电子显微镜截面图中未观测到GaAs薄膜中存在穿透位错。
上述测试结果说明应用本发明生长的GaAs外延薄膜中的双晶率明显降低,使其表面变得平整,并且GaAs外延膜中的应力得到有效释放,晶体质量与通过其他方法在Si(111)衬底上生长的GaAs薄膜相比处于较高水平,穿透位错密度被极大的降低了。
实施例2
本实施例的生长在Si衬底上的GaAs薄膜的制备方法,包括以下步骤:
(1)Si衬底清洗:经过丙酮、去离子水洗涤,去除衬底表面有机物;将Si衬底置于HF:H2O=1:10溶液中超声10分钟,之后经去离子水清洗去除表面氧化物和有机物;清洗后的Si衬底用高纯氮气吹干;
(2)Si衬底预处理:Si衬底清洗完毕后,送入分子束外延进样室预除气30分钟;再送入传递室400℃除气0.5小时,完成除气后送入生长室;
(3)Si衬底脱氧化膜:Si衬底进入生长室后,将衬底温度升至1050℃,高温烘烤30分钟,除去衬底表面的氧化膜层;
(4)缓冲层的生长:将衬底温度升至450℃,在反应室压力2.5×10-8Pa、Ⅴ/Ⅲ值30、生长速度0.5ML/s的条件下生长20nm的InxGa1-xAs缓冲层,x=0.12;
(5)GaAs外延薄膜的生长:在580℃的生长温度下生长GaAs外延薄膜:将Si衬底温度升至580℃,在反应室真空度为2.7×10-8Pa、Ⅴ/Ⅲ值60、生长速度1ML/s条件下,生长GaAs外延薄膜。
本实施例的测试结果与实施例1类似,在此不再赘述。
上述实施例为本发明较佳的实施方式,但本发明的实施方式并不受所述实施例的限制,其他的任何未背离本发明的精神实质与原理下所作的改变、修饰、替代、组合、简化,均应为等效的置换方式,都包含在本发明的保护范围之内。
Claims (7)
1.生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,包括以下步骤:
(1)Si衬底清洗;
(2)Si衬底预处理;
(3)Si衬底脱氧化膜;
(4)缓冲层的生长:在300~450℃的生长温度下,在经步骤(3)处理后的Si衬底表面生长2~20nm的InxGa1-xAs缓冲层,0.08<x<0.12;
(5)GaAs薄膜的生长:在500~580℃的生长温度下生长GaAs薄膜。
2.根据权利要求1所述的生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,步骤(4)所述缓冲层的生长,具体为:
将衬底温度升至350~450℃,在反应室压力3.0×10-5~2.5×10-8Pa、Ⅴ/Ⅲ值20~30、生长速度0.1~0.5ML/s的条件下生长2~20nm的InxGa1-xAs缓冲层。
3.根据权利要求1所述的生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,步骤(5)所述GaAs外延薄膜的生长,具体为:
将Si衬底温度升至500~580℃,在反应室真空度为4.0×10-5~2.7×10-8Pa、Ⅴ/Ⅲ值40~60、生长速度0.6~1ML/s条件下,生长GaAs外延薄膜。
4.根据权利要求1所述的生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,步骤(1)所述Si衬底清洗,具体为:
经过丙酮、去离子水洗涤,去除衬底表面有机物;将Si衬底置于HF:H2O=1:10溶液中超声1~10分钟,之后经去离子水清洗去除表面氧化物和有机物;清洗后的Si衬底用高纯氮气吹干。
5.根据权利要求1所述的生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,步骤(2)所述Si衬底预处理,具体为:
Si衬底清洗完毕后,送入分子束外延进样室预除气15~30分钟;再送入传递室300~400℃除气0.5~2小时,完成除气后送入生长室。
6.根据权利要求1所述的生长在Si衬底上的GaAs薄膜的制备方法,其特征在于,步骤(3)所述Si衬底脱氧化膜,具体为:
Si衬底进入生长室后,将衬底温度升至950~1050℃,烘烤15~30分钟,除去衬底表面的氧化膜层。
7.生长在Si衬底上的GaAs薄膜,其特征在于,包括依次层叠的Si衬底、InxGa1-xAs缓冲层以及GaAs薄膜,所述InxGa1-xAs缓冲层的厚度为2~20nm;其中0.08<x<0.12。
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