WO2016134558A1 - 一种刻蚀方法及基板 - Google Patents

一种刻蚀方法及基板 Download PDF

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WO2016134558A1
WO2016134558A1 PCT/CN2015/073986 CN2015073986W WO2016134558A1 WO 2016134558 A1 WO2016134558 A1 WO 2016134558A1 CN 2015073986 W CN2015073986 W CN 2015073986W WO 2016134558 A1 WO2016134558 A1 WO 2016134558A1
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etching
substrate
etched
gas
insulating layer
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PCT/CN2015/073986
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English (en)
French (fr)
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叶江波
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深圳市华星光电技术有限公司
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Priority to US14/778,109 priority Critical patent/US10109499B2/en
Publication of WO2016134558A1 publication Critical patent/WO2016134558A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30608—Anisotropic liquid etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67075—Apparatus for fluid treatment for etching for wet etching
    • H01L21/67086—Apparatus for fluid treatment for etching for wet etching with the semiconductor substrates being dipped in baths or vessels
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions

Definitions

  • the present invention relates to the field of semiconductor technology, and in particular to an etching method and a substrate.
  • LCD monitors have the advantages of high image quality, small size, light weight, low voltage drive and low power consumption. They are now widely used in various IT digital products, such as automotive guidance systems, engineering workstations, monitors, and portable devices.
  • Information terminals electronic terminals, e-books, notebook computers, and large direct-view flat-panel TVs.
  • the fabrication process of liquid crystal substrates can be divided into three stages: array engineering, box-forming engineering and module engineering.
  • array engineering is to form a TFT circuit on a glass substrate, which can be further divided into steps of cleaning, film formation, photolithography, etching, and inspection.
  • the etching process widely used in the existing LTPS process is ICP etching.
  • the ICP etching process has very complicated chemical processes and physical processes during the etching process.
  • the chemical process mainly includes two parts: one is that the etching gas is glow-discharged by inductive coupling, generating active radicals, metastable particles, atoms, and mutual chemical interaction between the particles; the second is etching The interaction of these active particles produced by the gas glow spot with the surface of the substrate.
  • the physical process is mainly the bombardment of ions on the surface of the substrate.
  • ICP etching has the advantages of anisotropy, high etching rate and controllable process. However, due to the high power density of ICP etching, ICP etching in the actual production process will cause loss of GI-SiOx, thereby affecting the uniformity of the substrate.
  • an embodiment of the present invention first provides an etching method, and the method includes:
  • a wet etching step of placing a substrate to be etched with a photoresist layer in an etching solution for gold in the substrate to be etched The genus layer is etched to obtain a first substrate;
  • the first insulating layer in the first substrate is etched by a reactive ion etching process, and the photoresist layer is removed after etching to obtain a substrate in which the second insulating layer is not etched.
  • the substrate in the wet etching step, after etching the metal layer in the substrate to be etched, the substrate is further subjected to rinsing and/or drying treatment.
  • the etching solution is also agitated in the wet etching step.
  • the etching solution in the wet etching step, is also subjected to a degassing treatment.
  • the etching solution comprises sulfuric acid, nitric acid and/or acetic acid.
  • the ratio of sulfuric acid, nitric acid and acetic acid in the etching solution is 1.8%:67%:17%.
  • the etching gas used is a mixed gas, and in the reactive ion etching step, by adjusting the engraving
  • the ratio of various gas components in the etch gas adjusts the etching selectivity
  • the etching gas comprises chlorine gas and sulfur fluoride.
  • the etching rate is also adjusted by adjusting the flow rate of the etching gas.
  • the present invention also provides a substrate prepared by the etching method according to any one of the above.
  • the etching method provided by the invention effectively avoids the existing etching method caused by the ICP etching process on the second insulating layer (ie, the silicon oxide insulating layer) by adopting the wet etching process and the RIE etching process.
  • Over-etching which ensures the uniformity and reliability of the substrate obtained after etching, so that the parameters such as electron mobility, resistance and capacitance of the substrate are close to or equal to the specification value, thereby ensuring the yield of the substrate. .
  • the wet etching apparatus and the RIE etching apparatus employed in the present invention have a lower price than the ICP etching apparatus used in the conventional etching method. Therefore, etching the substrate by the method also helps to reduce the production cost of the substrate and improve the production efficiency of the substrate.
  • FIG. 1 is a schematic structural view of an ICP etching apparatus
  • FIG. 2 is an effect diagram of etching a substrate by using an ICP etching apparatus
  • 3a to 3d are box plot diagrams showing electron mobility in the vertical direction, horizontal electron mobility, resistance and capacitance as a function of over-etching;
  • FIG. 4 is a flow chart of an etching method in accordance with one embodiment of the present invention.
  • FIG. 5 is an effect view of etching a substrate according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural view of an RIE etching apparatus according to an embodiment of the present invention.
  • FIG. 1 shows a schematic structural view of a conventional ICP etching apparatus.
  • a first electrode 102 and a second electrode 104 including an inductor coil are disposed in the reaction chamber 101 of the ICP etching apparatus.
  • the first electrode 102 and the second electrode 104 are respectively connected to the first RF source U1, the second RF source U2, and a corresponding matching network.
  • the etching gas enters the reaction chamber 101 through the gas inlet 106.
  • the second electrode 104 causes the etching gas to be glow-discharged by inductive coupling to generate a high-density plasma gas.
  • the plasma gas etches the substrate 103 under the action of the first electrode 102.
  • the chemical process mainly includes two parts: one is that the etching gas is glow-discharged by inductive coupling, which generates active radicals, metastable particles, atoms, and mutual chemical interaction between the active particles; The interaction of these active particles produced by the etch gas glow discharge with the surface of the substrate.
  • the physical process is mainly the bombardment of ions on the surface of the substrate.
  • FIG. 2 shows an effect view of etching a substrate by an ICP etching process.
  • the substrate to be etched provided in this embodiment includes a photoresist layer 201, a metal layer 202, a first insulating layer 203, and a second insulating layer 204.
  • the first insulating layer is a silicon nitride material with weak bond energy
  • the second insulating layer is a silicon oxide material with strong bond energy.
  • the etching gas is The oxygen in the sulfur fluoride gas and oxygen composition causes the edge of the photoresist layer to recede toward the center, thereby exposing the corresponding metal layer.
  • the metal layer 202 not blocked by the photoresist layer is etched away in the plasma bombardment direction, and the first insulating layer 203 (ie, the silicon nitride material layer) not blocked by the photoresist layer 201 is also in the plasma bombardment direction. Etched off a portion.
  • the metal layer 202 forms a desired trapezoidal structure under the action of a new etching gas (composed of chlorine gas and oxygen gas).
  • a new etching gas composed of chlorine gas and oxygen gas.
  • the second insulating layer (ie, the silicon oxide insulating layer) blocked by 201 is also etched away in the plasma bombardment direction, thereby causing over-etching of the silicon oxide insulating layer.
  • the vertical direction electron mobility, the horizontal direction electron mobility, the resistance and the capacitance of the substrate, and the box-line diagram of the over-etching change can be seen as an over-etching of the silicon oxide insulating layer.
  • the vertical electron mobility, the horizontal electron mobility, the electric resistance, and the capacitance of the obtained substrate are all deviated from the normal values, so that the performance of the substrate is lowered.
  • FIG. 4 and FIG. 5 respectively show a flow chart and an effect diagram of the method.
  • the etching method provided in this embodiment firstly puts a substrate to be etched coated with a photoresist layer into an etching solution in step S401, and etches the metal layer in the substrate by using an etching solution.
  • the purpose of step S401 is to decompose the metal layer to be etched in the substrate to be etched, and convert it into a soluble compound, thereby achieving the purpose of removing excess metal.
  • This etching technique mainly relies on the chemical reaction of the etching solution with the metal layer material of the substrate, so that the etching rate can be selected by the etching solution, the ratio and the temperature control to achieve a suitable etching rate and good. The choice is better than that.
  • the substrate to be etched provided in this embodiment also includes the photoresist layer 201, the metal layer 202, the first insulating layer 203, and the second insulating layer.
  • the first insulating layer 203 is a silicon nitride material
  • the second insulating layer 204 is a silicon oxide material
  • the metal in the metal layer is molybdenum.
  • the constituent materials of the first insulating layer, the second insulating layer, and the metal layer may also be other reasonable materials, and the present invention is not limited thereto.
  • an alumina acid solution is used as an etching solution, and the aluminate solution is a mixture of nitric acid, sulfuric acid, acetic acid, and a composite additive.
  • the content of nitric acid in the aluminate solution may be 1.5% to 2.0%, the content of sulfuric acid may be 65% to 70%, and the content of acetic acid may be 15% to 20%.
  • the contents of nitric acid, sulfuric acid, and acetic acid in the aluminate solution are 1.8%, 67%, and 17%, respectively.
  • the ratio of the aluminate solution may also be other reasonable values according to different needs.
  • etching liquid for different metal layer materials, for example, only one or two of nitric acid, sulfuric acid and acetic acid.
  • the solution is not limited thereto.
  • the engraving provided in this embodiment
  • the etching method also monitors whether or not the etching of the metal layer is completed in step S402. If the etching of the metal layer is completed, the etched substrate is rinsed in step S403; otherwise, the metal layer is etched.
  • the substrate is rinsed using an organic stripping solution.
  • the substrate may be rinsed by other reasonable means, such as rinsing the substrate with an aqueous stripping solution containing an organic substance, and the present invention is not limited thereto.
  • the chemical reaction between the metal layer and the etching solution is an exothermic reaction, which also causes the temperature in the etching solution to be close to the metal layer to be significantly higher than the temperature in other places during the wet etching process.
  • the unevenness of the temperature distribution of the etching solution may result in the inability to accurately control the reaction temperature of the wet etching, thereby causing insufficient etching or etching of the metal layer.
  • the etching method provided in this embodiment eliminates the uniformity of the temperature distribution of the etching solution by the method of stirring and etching the solution during the wet etching of the metal layer. Adverse effects on reaction control due to uneven temperature distribution of the etching solution.
  • some metals react with the etching solution to generate a gas, thereby forming bubbles in the etching solution.
  • the bubbles in the etching solution may cause some of the metal layers to be isolated from the etching solution, so that the chemical reaction between the etching solution and the metal layer is stopped.
  • the etching method provided in this embodiment also defoams and degassing the etching solution during the etching process, thereby removing bubbles in the etching solution, so that the etching solution and the metal are removed.
  • the corresponding faces of the layers are in full contact.
  • the present embodiment uses ultrasonic waves to defoam and degas the etching solution.
  • the etching solution may be degassed in other reasonable manners, and the present invention is not limited thereto.
  • FIG. 5 is a schematic view showing a substrate (ie, a first substrate) obtained by wet etching in the present embodiment.
  • a substrate ie, a first substrate obtained by wet etching in the present embodiment.
  • the metal layer in the first substrate is formed into a desired trapezoidal structure, which is achieved. The etching of the metal layer is required, and the first insulating layer and the second insulating layer are well preserved.
  • the etching method provided in this embodiment uses the reactive ion etching (Reactive Ion Etching, RIE for short) process to the first of the substrates in step S405. Insulation Etching, thereby achieving the purpose of removing the first insulating layer that is not blocked by the photoresist layer.
  • RIE reactive Ion Etching
  • the RIE process is an etching process in which physical and chemical interactions coexist
  • FIG. 6 shows a schematic structural view of the RIE apparatus.
  • the RIE apparatus includes a reaction chamber 601, an electrode 602, a plate 604, a radio frequency source U3, and a matching network 605.
  • the etching gas enters the reaction chamber 601 from the gas inlet 606 on the reaction chamber 601.
  • the magnetic field energized by the RF source U3 causes the etching gas in the reaction chamber 601 to glow and the etching gas is broken down to generate a plasma.
  • the plasma contains ions, free radicals, and free electrons that can chemically react with the surface of the etched sample.
  • the ions are directed by the electric field to the substrate 603 placed on the electrode 602, and the surface of the substrate 603 is physically bombarded.
  • the gas generated by the etching is discharged from the reaction chamber 601 by the gas outlet 607.
  • the RIE etching equipment reduces the RF source, which makes the density of the plasma in the reaction chamber of the RIE etching equipment much lower than the density of the plasma in the reaction chamber of the ICP etching equipment.
  • the type of plasma generated by the etch gas glow discharge is also much less. This results in the etching of the first insulating layer and the second insulating layer of the substrate by the RIE etching process, and the generated plasma can only engrave the first insulating layer material (such as silicon nitride) with a smaller bond energy. It is etched away, and it is impossible to etch away the second insulating layer material (for example, silicon oxide) having a large bond.
  • the first insulating layer material such as silicon nitride
  • the etching selectivity is adjusted by adjusting the ratio of the various gases in the etching gas and the flow rate.
  • the selection ratio is an important parameter of the RIE etching process, and refers to the ratio of the etching rate of the material to be etched to the etching rate of other materials that are not desired to be etched.
  • the lines produced have become more and more fine.
  • the thinner the resist coating i.e., the photoresist layer
  • it is mainly to produce a suitable chemically active substance when the gas is discharged.
  • the selection ratio is adjusted by adjusting the concentration of various gas components in the etching gas.
  • a new catalytic gas e.g., oxygen
  • the present invention is not limited thereto.
  • the etching rate of the reactive ions has a significant relationship with the flow rate of the etching gas. As the flow rate of the etching gas increases, the etching rate first rises, and after reaching the maximum value, the etching rate decreases slightly at a larger gas flow rate. Because at low flow rates, the etch rate is primarily limited by insufficient supply of active material, while at high flow rates it is primarily affected by the removal of active material. Therefore, the etching method provided in this embodiment also controls the etching rate by controlling the flow rate of the etching gas.
  • the etching gas used includes chlorine gas and sulfur fluoride gas.
  • other reasonable gases for example, a gas obtained by mixing sulfur fluoride and oxygen
  • the present invention is not limited thereto.
  • This embodiment also provides a substrate prepared by the etching method as described above, wherein the second insulating layer of the substrate is not etched.
  • the etching method provided in this embodiment effectively avoids the etching of the second insulating layer by the ICP etching process by using the RIE etching process.
  • the phenomenon of over-etching ensures the uniformity and reliability of the substrate obtained after etching, so that the parameters such as electrical mobility, resistance and capacitance of the substrate are close to the specification values, thereby ensuring the finished product of the substrate. rate.
  • the wet etching apparatus and the RIE etching apparatus used in the present embodiment have lower prices than the ICP etching apparatus used in the conventional etching method, so that etching the substrate by the method can also be helpful. In order to reduce the production cost of the substrate, the production efficiency of the substrate is improved.

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Abstract

一种刻蚀方法及基板，其中刻蚀方法包括：将涂有光阻层（201）的待刻蚀基板放入刻蚀溶液中，对待刻蚀基板中的金属层（202）进行刻蚀，得到第一基板；利用反应离子刻蚀工艺对第一基板中的第一绝缘层（203）进行刻蚀，刻蚀后去除光阻层（201），得到第二绝缘层（204）未被刻蚀的基板。该方法有效避免了因采用ICP刻蚀工艺而对基板造成的过刻蚀，保证了刻蚀后所得到的基板的均匀性和可靠性。

Description

一种刻蚀方法及基板
相关技术的交叉引用
本申请要求享有2015年02月27日提交的名称为：“一种刻蚀方法及基板”的中国专利申请CN201510089744.X的优先权，其全部内容通过引用并入本文中。
技术领域
本发明涉及半导体技术领域，具体地说，涉及一种刻蚀方法及基板。
背景技术
液晶显示器具有高画质、体积小、重量轻、低电压驱动以及低功率消耗等优点，其现已被广泛地应用于各种IT数码产品中，例如汽车导向系统、工程工作站、监视器、便携式信息终端、电子终端、电子书刊、笔记本计算机以及大型直视式平板电视机等。
作为液晶显示器最为重要的组成部分之一，液晶基板的制作过程可以分为阵列工程、成盒工程和模块工程三个阶段。其中，阵列工程的目的是在玻璃基板上形成TFT回路，该工程又可以分为洗净、成膜、光刻、刻蚀以及检查等步骤。
现有的LTPS工艺中所广泛采用的刻蚀工艺为ICP刻蚀。ICP刻蚀工艺在刻蚀过程中存在十分复杂的化学过程和物理过程。其中化学过程主要包括两部分：其一是刻蚀气体通过电感耦合的方式辉光放电，产生活性游离基、亚稳态粒子、原子，以及这些粒子之间的相互化学作用；其二是刻蚀气体辉光放点所产生的这些活性粒子与基板表面的相互作用。物理过程主要是离子对基板表面的轰击。
ICP刻蚀具有各向异性、刻蚀速率高、工艺可控等优点。然而由于ICP刻蚀的功率密度较大，实际生产过程中ICP刻蚀会造成GI-SiOx的损耗，从而影响基板的均匀性。
发明内容
本发明所要解决的技术问题是为了克服现有的基板刻蚀方法因采用ICP刻蚀工艺而造成的金属氧化硅绝缘层过刻蚀现象。为了解决上述问题，本发明的实施例首先提供了一种刻蚀方法，所述方法包括：
湿刻蚀步骤，将涂有光阻层的待刻蚀基板放入刻蚀溶液中，对所述待刻蚀基板中的金 属层进行刻蚀，得到第一基板；
反应离子刻蚀步骤，利用反应离子刻蚀工艺对所述第一基板中的第一绝缘层进行刻蚀，刻蚀后去除所述光阻层，得到第二绝缘层未被刻蚀的基板。
根据本发明的一个实施例，在所述湿刻蚀步骤中，在对所述待刻蚀基板中的金属层进行刻蚀后，还对基板进行漂洗和/或干燥处理。
根据本发明的一个实施例，在所述湿刻蚀步骤中，还对所述刻蚀溶液进行搅拌。
根据本发明的一个实施例，在所述湿刻蚀步骤中，还对所述刻蚀溶液进行脱气处理。
根据本发明的一个实施例，所述刻蚀溶液包括硫酸、硝酸和/或醋酸。
根据本发明的一个实施例，所述刻蚀溶液中，硫酸、硝酸和醋酸的比例为1.8％∶67％∶17％。
根据本发明的一个实施例，对所述第一基板中的第一绝缘层进行刻蚀时，所利用的刻蚀气体为混合气体，在所述反应离子刻蚀步骤中，通过调整所述刻蚀气体中各种气体成分的比例来调整刻蚀的选择比。
根据本发明的一个实施例，所述刻蚀气体包括氯气和氟化硫。
根据本发明的一个实施例，在所述反应离子刻蚀步骤中，还通过调整刻蚀气体的流量来调整刻蚀速率。
本发明还提供了一种基板，所述基板采用如上任一项所述的刻蚀方法制备得到。
本发明提供的刻蚀方法通过采用湿蚀刻工艺与RIE刻蚀工艺的方式，有效避免了现有刻蚀方法因采用ICP刻蚀工艺而对第二绝缘层(即金属氧化硅绝缘层)造成的过刻蚀，这也就保证了刻蚀后所得到的基板的均匀性和可靠性，使得基板的电子迁移率、电阻和电容等参数都接近于或等于规格值，从而保证了基板的成品率。
此外，相较于现有刻蚀方法所采用的ICP刻蚀设备，本发明采用的湿刻蚀设备和RIE刻蚀设备具有更低的价格。所以利用本方法对基板进行刻蚀还有助于降低基板的生产成本，提高基板的生产效率。
本发明的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要的附图做简单的介绍：
图1是ICP刻蚀设备的结构示意图；
图2是利用ICP刻蚀设备对基板进行刻蚀的效果图；
图3a～图3d分别是垂直方向电子迁移率、水平方向电子迁移率、电阻和电容随过刻蚀量变化的箱线图；
图4是根据本发明一个实施例的刻蚀方法的流程图；
图5是根据本发明一个实施例的对基板进行刻蚀的效果图；
图6是根据本发明一个实施例的RIE刻蚀设备的结构示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。
同时，在以下说明中，出于解释的目的而阐述了许多具体细节，以提供对本发明实施例的彻底理解。然而，对本领域的技术人员来说显而易见的是，本发明可以不用这里的具体细节或者所描述的特定方式来实施。
图1示出了现有的ICP刻蚀设备的结构示意图。如图1所示，ICP刻蚀设备的反应腔101中设置有第一电极102和含有有电感线圈的第二电极104。第一电极102和第二电极104分别与第一射频源U1、第二射频源U2以及相应的匹配网络连接。
在对放置在第一电极102上的基板103进行刻蚀时，刻蚀气体通过进气口106进入反应腔101。第二电极104通过电感耦合的方式使得刻蚀气体辉光放电，产生高密度的等离子气体。等离子气体在第一电极102的作用下对基板103进行刻蚀。
ICP刻蚀过程中存在十分复杂的化学过程和物理过程。其中化学过程主要包括两部分：其一是刻蚀气体通过电感耦合的方式辉光放电，产生活性游离基、亚稳态粒子、原子，以及这些活性粒子之间的相互化学作用；其二是由刻蚀气体辉光放电所产生的这些活性粒子与基板表面的相互作用。物理过程主要是离子对基板表面的轰击。
图2示出了利用ICP刻蚀工艺对基板进行刻蚀的效果图。
本实施例所提供的待刻蚀的基板包括光阻层201、金属层202、第一绝缘层203和第二绝缘层204。其中，第一绝缘层为键能较弱的氮化硅材料，第二绝缘层为键能较强的氧化硅材料。
从图2中可以看出，在对涂有光阻层201的基板进行主刻蚀的过程中，刻蚀气体(由 氟化硫气体和氧气组成)中的氧气使得光阻层边缘向中心后退，从而使得相应的金属层裸露出来。此时未被光阻层遮挡的金属层202沿等离子轰击方向被刻蚀掉，同时，未被光阻层201遮挡的第一绝缘层203(即氮化硅材料层)沿等离子轰击方向也被刻蚀掉一部分。
随后在对主刻蚀刻蚀得到的基板进行辅刻蚀的过程中，金属层202在新的刻蚀气体(由氯气和氧气组成)的作用下形成了所需要的梯形结构。但是，由于ICP刻蚀工艺中反应腔内的等离子密度很高，在辅蚀刻的过程中，不仅未被光阻层201遮挡的剩余第一绝缘层203被刻蚀掉，同时未被光阻层201遮挡的第二绝缘层(即氧化硅绝缘层)沿等离子轰击方向也被刻蚀掉一部分，从而造成氧化硅绝缘层的过刻蚀。
然而，如图3a～图3d分别示出的基板的垂直方向电子迁移率、水平方向电子迁移率、电阻和电容随过刻蚀变化的箱线图可以看出，氧化硅绝缘层的过刻蚀会使得所得到的基板的垂直方向电子迁移率、水平方向电子迁移率、电阻和电容都偏离于正常值，从而使得基板的性能降低。
针对现有刻蚀方法因采用ICP刻蚀工艺而引起的上述问题，本实施例提供了一种新的刻蚀方法，图4和图5分别示出了该方法的流程图和效果图。
如图4所示，本实施例所提供的刻蚀方法首先在步骤S401中将涂有光阻层的待刻蚀基板放入刻蚀溶液中，利用刻蚀溶液来刻蚀基板中的金属层。步骤S401的目的是对待刻蚀基板中需要刻蚀掉的金属层进行分解，并转化为可溶的化合物，从而达到去除多余金属的目的。这种刻蚀技术主要是借助刻蚀液与基板的金属层材料的化学反应，因此在刻蚀时也就可以通过刻蚀液的选取、配比以及温度控制来达到合适的刻蚀速率和良好的选择比。
从图5中可以看出，与图2所示的待刻蚀基板类似，本实施例所提供的待刻蚀基板同样包括光阻层201、金属层202、第一绝缘层203和第二绝缘层204。其中，第一绝缘层203为氮化硅材料，第二绝缘层204为氧化硅材料，金属层中的金属为钼。当然，在本发明的其他实施例中，第一绝缘层、第二绝缘层以及金属层的组成材料也可以为其他合理材料，本发明不限于此。
为了达到分解基板中需要刻蚀的金属层的目的，这就要求刻蚀溶液需要能够与金属层反应，但却不能与第一绝缘层的氮化硅材料和第二绝缘层的氧化硅材料反应。因此，本实施例中采用铝酸溶液作为刻蚀溶液，该铝酸溶液由硝酸、硫酸、醋酸以及复合添加剂混合而成。其中，铝酸溶液中硝酸的含量可以为1.5％～2.0％，硫酸的含量可以为65％～70％，醋酸的含量可以为15％～20％。本实施例中，为了达到更高的刻蚀速率和选择比，优选地，铝酸溶液中硝酸、硫酸和醋酸的含量分别为为1.8％、67％、17％。当然，在实际生产过程中，根据不同的而需要，铝酸溶液的比例也可以为其他合理值。
需要说明的是，在本发明的其他实施例中，对于不同的金属层材料，也可以采用其他合理的溶液作为刻蚀液，例如仅由硝酸、硫酸和醋酸中的一项或两项所构成的溶液，本发明不限于此。
为了能够及时、准确地判断出反应结束时间，从而避免对金属层造成过刻蚀，将待刻蚀基板放入刻蚀液来对金属层进行刻蚀的过程中，本实施例所提供的刻蚀方法还在步骤S402中监测是否完成对金属层的刻蚀。如果完成对金属层的刻蚀，则在步骤S403中对刻蚀后的基板进行漂洗；否则继续对金属层进行刻蚀。
本实施例中，采用有机系剥离液来对基板进行漂洗。当然，在本发明的其他实施例中，还可以采用其他合理方式来对基板进行漂洗，例如采用含有有机物的水系剥离液来对基板进行漂洗等，本发明不限于此。
刻蚀溶液的浓度越高或反应温度越高，那么对金属层的刻蚀速率也就越快。而金属层与刻蚀溶液的化学反应是一个放热反应，这也就会造成在进行湿刻蚀的过程中，刻蚀溶液中靠近金属层位置处的温度要明显高于其他位置的温度。而刻蚀溶液温度分布的不均匀性会导致无法准确控制湿刻蚀的反应温度，从而造成金属层的过刻蚀或刻蚀不够的现象。
为了解决这一问题，本实施例所提供的刻蚀方法在对金属层进行湿刻蚀的过程中，还通过搅刻蚀拌溶液的方式来确保刻蚀溶液温度分布的均匀性，从而消除了因刻蚀溶液温度分布不均匀而给反应控制所造成的不利影响。
此外，一些金属与刻蚀溶液的反应还会产生气体，从而在刻蚀溶液中形成气泡。而刻蚀溶液中的气泡则可能造成部分金属层与刻蚀溶液相隔绝，从而使得刻蚀溶液与金属层的化学反应停止。
为了解决这一问题，本实施例所提供的刻蚀方法在刻蚀的过程中还会对刻蚀溶液进行去泡、脱气处理，从而去除刻蚀溶液中的气泡，使得刻蚀溶液与金属层相应面充分接触。具体地，本实施例利用超声波来对刻蚀溶液进行去泡、脱气处理。当然，在本发明的其他实施例中，也可以采用其他合理方式来对刻蚀溶液进行脱气处理，本发明不限于此。
在步骤S404中，对漂洗完后的基板进行干燥，从而得到第一基板。图5示出了本实施例中经过湿刻蚀所得到的基板(即第一基板)的示意图。从图中可以看出，本实施例所提供的刻蚀方法对涂有光阻层的待刻蚀基板进行湿刻蚀后，所得到的第一基板中金属层形成了所需要的梯形结构，达到了对金属层的刻蚀要求，而第一绝缘层和第二绝缘层则完好地保存了下来。
如图4所示，完成对金属层的刻蚀后，本实施例所提供的刻蚀方法在步骤S405中利用反应离子刻蚀(Reactive Ion Etching，简称为RIE)工艺来对基板中的第一绝缘层进行 刻蚀，从而达到去除未被光阻层遮挡的第一绝缘层的目的。在可利用RIE刻蚀工艺对基板进行刻蚀的过程中，还在步骤S406中监测第一绝缘层是否刻蚀完成。如果第一绝缘层刻蚀完成，则在步骤S407中去除光阻层，从而得到所需要的基板；否则继续对基板的第一绝缘层进行刻蚀。
RIE工艺是一种物理作用和化学作用共存的刻蚀工艺，图6示出了RIE设备的结构示意图。如图6所示，RIE设备包括反应腔601、电极602、极板604、射频源U3和匹配网络605。在刻蚀的过程中，刻蚀气体由反应腔601上的进气口606进入反应腔601。由射频源U3供能的磁场使得反应腔601内的刻蚀气体辉光放电，刻蚀气体被击穿从而产生等离子体。该等离子体中包含离子、游离基和自由电子，这些粒子可与刻蚀样品表面发生化学反应。同时离子在电场的作用下射向放置在电极602上的基板603，并对基板603表面进行物理轰击。刻蚀产生的气体由出气口607排出反应腔601.
相较于ICP刻蚀设备，RIE刻蚀设备减少了一个射频源，这也就使得RIE刻蚀设备的反应腔内等离子的密度要比ICP刻蚀设备的反应腔内等离子的密度低很多，刻蚀气体辉光放电所产生的等离子种类也要少很多。这也就导致采用RIE刻蚀工艺对基板的第一绝缘层和第二绝缘层进行刻蚀时，所产生的等离子只能将键能较小的第一绝缘层材料(例如氮化硅)刻蚀掉，而无法将键能较大的第二绝缘层材料(例如氧化硅)刻蚀掉。
本实施例中，通过调整刻蚀气体中各种气体的比例以及流量来调整刻蚀选择比。选择比是RIE刻蚀工艺的重要参数，是指被刻蚀材料的刻蚀速率与其他不希望被刻蚀的材料的刻蚀速率的比值。近年来，随着光刻技术的飞速发展，所制作的线条也越来越细。为了获得较高的图像分辨率，抗蚀剂涂层(即光阻层)越薄越好，这也就使得对选择比的要求越来越高。要获取满意的选择比，主要在于气体放电时应能产生合适的化学活性物质。所以本实施例中通过调整调整刻蚀气体中各种气体成分的浓度来调整选择比。当然，在本发明的其他实施例中，也可以采用其他合理方式来获取满意的选择比，例如引入新的催化气体(例如氧气)等，本发明不限于此。
此外，反应离子的刻蚀速率与刻蚀气体的流量有着明显关系。随着刻蚀气体流量的增加，刻蚀速率先是上升，达到最大值后，在较大的气体流量下刻蚀速率反而略有下降。因为在低流量情况下，刻蚀速率主要受到活性物质供应不足的限制，而在高流量情况下则主要受活性物质被抽走的影响。所以本实施例所提供的刻蚀方法还通过控制刻蚀气体的流量来控制刻蚀速率。
需要说明的是，在本发明的其他实施例中，也可以采用其他合理的方式来控制刻蚀速率，例如通过调整射频功率等，本发明不限于此。
本实施例中，所采用的刻蚀气体包括氯气和氟化硫气体。当然，在本发明的其他实施例中，也可以采用其他合理的气体(例如由氟化硫和氧气混合而成的气体等)来作为刻蚀气体，本发明不限于此。
本实施例还提供了一种采用如上所述刻蚀方法制备得到的基板，该基板的第二绝缘层未被刻蚀。如图5所示的RIE刻蚀结果示意图可以看出，本实施例所提供的刻蚀方法通过采用RIE刻蚀工艺，有效避免了因采用ICP刻蚀工艺而对第二绝缘层造成的刻蚀(即过刻蚀)现象，也就保证了刻蚀后所得到的基板的均匀性和可靠性，使得基板的电器迁移率、电阻和电容等参数都接近于规格值，从而保证了基板的成品率。
此外，相较于现有刻蚀方法所采用的ICP刻蚀设备，本实施例采用的湿刻蚀设备和RIE刻蚀设备具有更低的价格，所以利用本方法对基板进行刻蚀还有助于降低基板的生产成本，提高基板的生产效率。
应该理解的是，本发明所公开的实施例不限于这里所公开的特定结构、处理步骤或材料，而应当延伸到相关领域的普通技术人员所理解的这些特征的等同替代。还应当理解的是，在此使用的术语仅用于描述特定实施例的目的，而并不意味着限制。
说明书中提到的“一个实施例”或“实施例”意指结合实施例描述的特定特征、结构或特性包括在本发明的至少一个实施例中。因此，说明书通篇各个地方出现的短语“一个实施例”或“实施例”并不一定均指同一个实施例。
为了方便，在此使用的多个项目、结构单元、组成单元和/或材料可出现在共同列表中。然而，这些列表应解释为该列表中的每个元素分别识别为单独唯一的成员。因此，在没有反面说明的情况下，该列表中没有一个成员可仅基于它们出现在共同列表中便被解释为相同列表的任何其它成员的实际等同物。另外，在此还可以连同针对各元件的替代一起来参照本发明的各种实施例和示例。应当理解的是，这些实施例、示例和替代并不解释为彼此的等同物，而被认为是本发明的单独自主的代表。
此外，所描述的特征、结构或特性可以任何其他合适的方式结合到一个或多个实施例中。在上面的描述中，提供一些具体的细节，例如长度、宽度、形状等，以提供对本发明的实施例的全面理解。然而，相关领域的技术人员将明白，本发明无需上述一个或多个具体的细节便可实现，或者也可采用其它方法、组件、材料等实现。在其它示例中，周知的结构、材料或操作并未详细示出或描述以免模糊本发明的各个方面。
虽然上述示例用于说明本发明在一个或多个应用中的原理，但对于本领域的技术人员来说，在不背离本发明的原理和思想的情况下，明显可以在形式上、用法及实施的细节上作各种修改而不用付出创造性劳动。因此，本发明由所附的权利要求书来限定。

Claims (18)

  1. 一种刻蚀方法，其中，所述方法包括：
    湿刻蚀步骤，将涂有光阻层的待刻蚀基板放入刻蚀溶液中，对所述待刻蚀基板中的金属层进行刻蚀，得到第一基板；
    反应离子刻蚀步骤，利用反应离子刻蚀工艺对所述第一基板中的第一绝缘层进行刻蚀，刻蚀后去除所述光阻层，得到第二绝缘层未被刻蚀的基板。
  2. 如权利要求1所述的方法，其中，在所述湿刻蚀步骤中，在对所述待刻蚀基板中的金属层进行刻蚀后，还对基板进行漂洗和/或干燥处理。
  3. 如权利要求1所述的方法，其中，在所述湿刻蚀步骤中，还对所述刻蚀溶液进行搅拌。
  4. 如权利要求1所述的方法，其中，在所述湿刻蚀步骤中，还对所述刻蚀溶液进行脱气处理。
  5. 如权利要求1所述的方法，其中，所述刻蚀溶液包括硫酸、硝酸和/或醋酸。
  6. 如权利要求5所述的方法，其中，所述刻蚀溶液中，硫酸、硝酸和醋酸的比例为1.8％：67％：17％。
  7. 如权利要求1所述的方法，其中，对所述第一基板中的第一绝缘层进行刻蚀时，所利用的刻蚀气体为混合气体，在所述反应离子刻蚀步骤中，通过调整所述刻蚀气体中各种气体成分的比例来调整刻蚀的选择比。
  8. 如权利要求7所述的方法，其中，所述刻蚀气体包括氯气和氟化硫。
  9. 如权利要求1所述的方法，其中，在所述反应离子刻蚀步骤中，还通过调整刻蚀气体的流量来调整刻蚀速率。
  10. 一种基板，其中，制备所述基板所采用的刻蚀方法包括：
    湿刻蚀步骤，将涂有光阻层的待刻蚀基板放入刻蚀溶液中，对所述待刻蚀基板中的金属层进行刻蚀，得到第一基板；
    反应离子刻蚀步骤，利用反应离子刻蚀工艺对所述第一基板中的第一绝缘层进行刻蚀，刻蚀后去除所述光阻层，得到第二绝缘层未被刻蚀的基板。
  11. 如权利要求10所述的基板，其中，在所述湿刻蚀步骤中，在对所述待刻蚀基板中的金属层进行刻蚀后，还对基板进行漂洗和/或干燥处理。
  12. 如权利要求10所述的基板，其中，在所述湿刻蚀步骤中，还对所述刻蚀溶液进 行搅拌。
  13. 如权利要求10所述的基板，其中，在所述湿刻蚀步骤中，还对所述刻蚀溶液进行脱气处理。
  14. 如权利要求10所述的基板，其中，所述刻蚀溶液包括硫酸、硝酸和/或醋酸。
  15. 如权利要求14所述的基板，其中，所述刻蚀溶液中，硫酸、硝酸和醋酸的比例为1.8％：67％：17％。
  16. 如权利要求10所述的基板，其中，对所述第一基板中的第一绝缘层进行刻蚀时，所利用的刻蚀气体为混合气体，在所述反应离子刻蚀步骤中，通过调整所述刻蚀气体中各种气体成分的比例来调整刻蚀的选择比。
  17. 如权利要求16所述的基板，其中，所述刻蚀气体包括氯气和氟化硫。
  18. 如权利要求10所述的基板，其中，在所述反应离子刻蚀步骤中，还通过调整刻蚀气体的流量来调整刻蚀速率。
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