WO2016009577A1 - Procédé de formation de couche semi-conductrice de nitrure et procédé de fabrication de dispositif à semi-conducteur - Google Patents

Procédé de formation de couche semi-conductrice de nitrure et procédé de fabrication de dispositif à semi-conducteur Download PDF

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WO2016009577A1
WO2016009577A1 PCT/JP2015/001479 JP2015001479W WO2016009577A1 WO 2016009577 A1 WO2016009577 A1 WO 2016009577A1 JP 2015001479 W JP2015001479 W JP 2015001479W WO 2016009577 A1 WO2016009577 A1 WO 2016009577A1
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nitride semiconductor
layer
substrate
gan
buffer layer
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Japanese (ja)
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佳明 醍醐
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キヤノンアネルバ株式会社
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Priority to KR1020157024926A priority Critical patent/KR101687595B1/ko
Priority to JP2015548510A priority patent/JP6001194B2/ja
Publication of WO2016009577A1 publication Critical patent/WO2016009577A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
    • C30B23/02—Epitaxial-layer growth
    • C30B23/08—Epitaxial-layer growth by condensing ionised vapours
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/38—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser

Definitions

  • the present invention relates to a method for forming a nitride semiconductor layer for epitaxial growth of a nitride semiconductor layer and a method for manufacturing a semiconductor device.
  • the nitride semiconductor is a compound semiconductor material composed of group IIIb elements aluminum (Al), gallium (Ga), indium (In) and group V element nitrogen (N), and includes aluminum nitride (AlN), It is composed of gallium nitride (GaN), indium nitride (InN), and mixed crystals thereof (AlGaN, InGaN, InAlN, AlGaInN).
  • light-emitting devices such as GaN-based light emitting diodes (LED: Light Emitting Diode) and laser diodes (LD: Laser Diode) are already widely used.
  • high electron mobility transistors (HEMT) will be used. High-frequency and power devices using High Electron Mobility Transistor) are also expected to become popular.
  • a nitride semiconductor is formed by a metal organic chemical vapor deposition (MOCVD) method.
  • MOCVD metal organic chemical vapor deposition
  • the MOCVD method has the advantage that precise film thickness and composition can be controlled and the film forming speed is high, but the running cost is high, particles are likely to be generated, and the reproducibility of the film quality is poor. There are also disadvantages.
  • a technique for forming a nitride semiconductor film by sputtering is also being developed.
  • the sputtering method has merits such as easy running costs, low particle generation, and good film quality reproducibility. For this reason, it is expected that at least one layer of the above-described device made of a nitride semiconductor is formed by a sputtering method.
  • a device based on a GaN layer has a wide range of application fields, it is required to establish a technique for obtaining a high-quality GaN layer with good reproducibility by a sputtering method.
  • a sputtering target capable of obtaining a GaN layer by a sputtering method a metal Ga target not containing N atoms, a nitride GaN target in which Ga atoms and N atoms are bonded at a ratio of 1: 1, metal Ga and There is a nitride GaNx target composed of a mixture with nitride GaN.
  • Patent Documents 1 to 5 Such techniques for forming a GaN layer using a target are disclosed in, for example, Patent Documents 1 to 5.
  • Patent Document 1 discloses a technique for forming a GaN layer by sputtering a metal Ga target, which is a low melting point metal having a melting point of 29.8 C, with at least a surface layer being liquefied.
  • a buffer layer made of AlN is used as the base of the GaN layer.
  • Patent Document 2 discloses a technique for forming a GaN layer by a sputtering method so as not to melt a metal Ga target which is a low melting point metal having a melting point of 29.8C.
  • a buffer layer made of AlN is used as the base of the GaN layer.
  • Patent Document 3 discloses a technique for forming a GaN layer by sputtering using a nitride GaN target.
  • a buffer layer made of GaN (hereinafter referred to as a low-temperature GaN buffer layer) formed at a low temperature using a nitride GaN target is used as a buffer layer formed as a base of the GaN layer. It is described that after forming a low-temperature GaN buffer layer, the low-temperature GaN buffer layer is crystallized by heating the substrate to a temperature range of 1000 ° C. to 1100 ° C.
  • Patent Document 4 discloses a technique for forming a GaN layer by sputtering using a nitride GaNx target having a Ga / (Ga + N) molar ratio of 55% or more and 80% or less.
  • N 2 gas is used as a process gas for forming a GaN layer.
  • Patent Document 5 discloses a technique for forming a GaN layer by sputtering using one or both of metal Ga and nitride GaN as targets.
  • Ar is used as a sputtering gas
  • the target is sputtered using the Ar gas
  • sputtered particles are supplied onto the substrate, and a step of supplying radicals containing N from a radical gun to the substrate.
  • a technique for forming a GaN layer by repeating alternately is disclosed.
  • JP 2008-153603 A Japanese Patent No. 4974635 JP 2012-222243 A JP 2012-144424 A JP 2013-125851 A
  • Patent Documents 1 to 5 it is possible to form a GaN layer by sputtering.
  • the above prior art does not disclose any technique for obtaining a flat GaN layer with good reproducibility.
  • An object of the present invention is to provide a method for forming a nitride semiconductor layer capable of epitaxially growing a flat nitride semiconductor layer with good reproducibility.
  • a reactive gas containing nitrogen using a step of epitaxially growing a buffer layer made of AlN or AlGaN on a substrate, and a nitride target containing Ga and GaN on the buffer layer. And a step of epitaxially growing a nitride semiconductor layer containing at least GaN by a sputtering method with a flow rate of less than 20% of the total flow rate of the process gas. .
  • a flat nitride semiconductor layer can be obtained with good reproducibility by sputtering.
  • FIG. 1 is a schematic configuration diagram showing an example of a film forming apparatus used in the nitride semiconductor layer forming method according to the first embodiment of the present invention.
  • FIG. 2 is a schematic configuration diagram showing an example of a first sputtering chamber used for forming a buffer layer in the nitride semiconductor layer forming method according to the first embodiment of the present invention.
  • FIG. 3 is a schematic configuration diagram showing an example of a second sputtering chamber used for forming the nitride semiconductor layer in the nitride semiconductor layer forming method according to the first embodiment of the present invention.
  • FIG. 4 is a schematic diagram showing + c polarity and ⁇ c polarity in a nitride semiconductor.
  • FIG. 5 shows an example of the film thickness dependence of the a-axis lattice constant at the interface with the GaN layer of the buffer layer made of AlN formed by the nitride semiconductor layer forming method according to the first embodiment of the present invention. It is a graph which shows.
  • FIG. 6 is a cross-sectional TEM image showing a cross-sectional structure of the GaN layer formed by the nitride semiconductor layer forming method according to the first embodiment of the present invention.
  • FIG. 7 is a cross-sectional TEM image showing a cross-sectional structure of a GaN layer formed by the nitride semiconductor layer forming method according to Comparative Example 1 of the present invention.
  • FIG. 6 is a cross-sectional TEM image showing a cross-sectional structure of the GaN layer formed by the nitride semiconductor layer forming method according to Comparative Example 1 of the present invention.
  • FIG. 8 is a cross-sectional TEM image showing a cross-sectional structure of a GaN layer formed by the nitride semiconductor layer forming method according to Comparative Example 2 of the present invention. It is a schematic sectional drawing which shows the semiconductor device by 2nd Embodiment of this invention, and its manufacturing method.
  • the process gas means a mixed gas of a reactive gas containing nitrogen and a rare gas.
  • the reactive gas containing nitrogen means N 2 gas, NH 3 gas, or a mixed gas thereof.
  • FIG. 1 is a schematic configuration diagram showing an example of a nitride semiconductor layer deposition apparatus according to the present embodiment.
  • FIG. 2 is a schematic configuration diagram showing an example of a first sputtering chamber in the film forming apparatus of FIG.
  • FIG. 3 is a schematic configuration diagram showing an example of a second sputtering chamber in the film forming apparatus of FIG.
  • FIG. 4 is a schematic diagram illustrating + c polarity and ⁇ c polarity in a nitride semiconductor.
  • FIG. 5 is a graph showing an example of the film thickness dependence of the a-axis lattice constant at the interface with the GaN layer of the buffer layer made of AlN formed by the nitride semiconductor layer forming method according to the present embodiment. is there.
  • a film forming apparatus 100 used in the nitride semiconductor layer forming method according to the present embodiment includes a load lock chamber 101, a transfer chamber 102, a pretreatment chamber 103, a first sputtering chamber 104, Two sputtering chambers 105 are provided. Between the transfer chamber 102 and the load lock chamber 101, the pretreatment chamber 103, the first sputtering chamber 104, and the second sputtering chamber 105, gate valves 107, 108, 109 for opening and closing the processing chambers. , 110 are provided. In the transfer chamber 102, a transfer robot 106 for transferring a substrate to be processed to each process chamber is provided.
  • FIG. 2 is a schematic diagram showing a configuration example of a sputtering apparatus that constitutes the first sputtering chamber 104.
  • the first sputtering chamber 104 is a processing chamber for forming a buffer layer made of AlN or AlGaN as a base of the nitride semiconductor layer.
  • the sputtering apparatus as the first sputtering chamber 104 has a vacuum vessel 201 which is a processing chamber.
  • the vacuum vessel 201 is provided with an exhaust mechanism 214 for evacuating the inside of the vacuum vessel 201 and a gas introduction mechanism 213 for introducing a process gas into the vacuum vessel 201.
  • a substrate mounting mechanism 211 for holding the substrate 212 to be processed, a heater 209 for heating the substrate 212, and a reflector 210 for increasing the heating efficiency of the heater 209 are provided.
  • a chamber shield 202 is disposed around the substrate mounting mechanism 211.
  • a sputtering cathode 203 that holds the target 204 is disposed so as to face the substrate 212.
  • the sputtering cathode 203 is a magnetron cathode including a magnet 206.
  • a target shield 205 is disposed around the target 204.
  • a sputtering power source 207 is connected to the sputtering cathode 203.
  • the sputtering power supply 207 is a high-frequency power supply in this embodiment, and is connected to the sputtering cathode 203 via a matching box (not shown).
  • the sputtering power source 207 may be a high-frequency power source and a DC power source connected in parallel (not shown). In this case, the high-frequency power source is connected to the sputtering cathode 203 via a matching box (not shown), and the DC power source is connected to the sputtering cathode 203 via a low-pass filter.
  • the sputtering apparatus illustrated in FIG. 2 is a stationary facing sputtering apparatus, but an offset sputtering apparatus may be used instead of the stationary facing sputtering apparatus. Even when an offset sputtering apparatus is used, the buffer layer described in this embodiment can be formed in the same manner. Note that in the offset sputtering apparatus, the normal direction of the substrate 212 and the normal direction of the target 204 may be parallel, and the normal direction of the substrate 212 and the normal direction of the target 204 are predetermined. An oblique offset type sputtering apparatus that intersects at an angle of may be used.
  • FIG. 3 is a schematic diagram showing a configuration example of a sputtering apparatus that constitutes the second sputtering chamber 105.
  • the second sputtering chamber 105 is a processing chamber for forming a nitride semiconductor layer on the buffer layer.
  • the sputtering apparatus as the second sputtering chamber 105 includes a vacuum container 301 that is a processing chamber.
  • the vacuum vessel 301 is provided with an exhaust mechanism 312 for evacuating the inside of the vacuum vessel 301 and a gas introduction mechanism 311 for introducing a process gas into the vacuum vessel 301.
  • a heating stage 305 for holding and heating the substrate 313 to be processed is provided in the vacuum container 301.
  • the heating stage 305 is provided with a heating stage rotating mechanism 306 for rotating the heating stage 305.
  • a chamber shield 302 is disposed around the heating stage 305.
  • a plurality of sputtering cathodes 308 that hold the target 307 are disposed so as to face the substrate 313.
  • the sputtering cathode 308 is a magnetron cathode including a magnet 309.
  • a rotary shutter 303 that can be rotated by a shutter rotation mechanism 304 is disposed in front of the target 307.
  • a sputtering power source 310 is connected to the sputtering cathode 308.
  • the sputtering power supply 310 is a high-frequency power supply in this embodiment, and is connected to the sputtering cathode 308 via a matching box (not shown). Further, the sputtering power source 310 may be a high-frequency power source and a DC power source connected in parallel (not shown).
  • the high-frequency power source is connected to the sputtering cathode 308 via a matching box (not shown), and the DC power source is connected to the sputtering cathode 308 via a low-pass filter (not shown).
  • a DC power source or a pulsed DC power source can be used as the sputtering power source 310.
  • the sputtering apparatus illustrated in FIG. 3 is an offset type sputtering apparatus, but a stationary facing type sputtering apparatus may be used instead of the offset type sputtering apparatus. Even when a stationary facing type sputtering apparatus is used, the nitride semiconductor layer described in this embodiment can be formed in the same manner.
  • the normal direction of the target 307 and the normal direction of the substrate 313 are parallel, but the normal direction of the target 307 and the normal direction of the substrate 313 are not necessarily parallel. It is not necessary that the normal direction of the target 307 and the normal direction of the substrate 313 intersect at a predetermined angle.
  • the method for forming a nitride semiconductor layer according to the present embodiment includes a step of epitaxially growing a buffer layer on a substrate and a step of forming a nitride semiconductor layer on the buffer layer.
  • the nitride semiconductor to be deposited is GaN will be mainly described here, the nitride semiconductor is not necessarily GaN as long as it contains Ga. As described later, InGaN, AlGaN AlGaInN may also be used. Further, the case where the buffer layer as the base of the nitride semiconductor layer is made of AlN will be mainly described, but the buffer layer may be made of AlGaN.
  • a nitride semiconductor layer to be deposited here a substrate having an epitaxial relationship with a GaN layer (for example, a c-plane sapphire substrate) is introduced into the load lock chamber 101 and loaded using an exhaust mechanism (not shown).
  • the lock chamber 101 is evacuated to a vacuum.
  • the c-plane sapphire substrate can also be applied as a substrate for depositing InGaN, AlGaN, or AlGaInN.
  • the gate valves 107 and 108 are appropriately operated, and the substrate in the load lock chamber 101 is transferred to the pretreatment chamber 103 by the transfer robot 106 in the transfer chamber 102.
  • a predetermined pretreatment is performed on the substrate transferred to the pretreatment chamber 103.
  • necessary ones such as plasma treatment and preheating can be appropriately selected.
  • This pretreatment is not essential in the present invention.
  • preheating in the pretreatment chamber shortens the time required for heating the substrate in the next process, or the water adsorbed on the substrate and the substrate transport tray is desorbed, so that the buffer is formed in the next process. This is a preferable mode because the quality of the layer is improved and the reproducibility of the process is easily improved.
  • the gate valves 108 and 109 are appropriately operated, and the substrate in the pretreatment chamber 103 (hereinafter, the substrate after the pretreatment is performed) is transferred by the transfer robot 106 in the transfer chamber 102. , Expressed as a substrate 212), is transferred to the first sputtering chamber 104.
  • the substrate 212 introduced into the first sputtering chamber 104 is held away from the surface P of the heater 209 by the substrate mounting mechanism 211.
  • a + c polarity buffer layer is easily formed.
  • the + c polarity buffer layer is formed, a flat GaN layer is easily formed thereon. For this reason, it is a preferable mode to hold the substrate 212 in a state of being separated from the surface P of the heater 209.
  • a buffer layer in which ⁇ c polarity or ⁇ c polarity is mixed is easily formed.
  • a buffer layer in which ⁇ c polarity or ⁇ c polarity is mixed is not preferable because a GaN layer formed thereon is difficult to be flat.
  • the growth modes of nitride semiconductor thin films such as AlN include growth with + c polarity as shown in FIG. 4 (a) and growth with ⁇ c polarity as shown in FIG. 4 (b). .
  • a nitride semiconductor having + c polarity is more likely to obtain a flat epitaxial film than a nitride semiconductor having ⁇ c polarity or ⁇ c polarity mixed.
  • the + c polarity buffer layer is more likely to be flat on the GaN layer formed thereon than the buffer layer having ⁇ c polarity or ⁇ c polarity mixed.
  • + c polarity refers to AlN, GaN, and InN and is a term that means Al polarity, Ga polarity, and In polarity, respectively.
  • ⁇ c polarity is a term meaning N polarity.
  • the substrate 212 introduced into the first sputtering chamber 104 is heated to a substrate temperature of 300 ° C. or higher by radiant heat from the heater 209. This is preferable because the buffer layer is easily formed with + c polarity and a flat GaN layer is easily formed thereon.
  • the substrate temperature is 300 ° C. or lower, the crystallinity of the buffer layer is deteriorated and a buffer layer in which ⁇ c polarity or ⁇ c polarity is mixed is easily formed.
  • the upper limit of the substrate temperature when forming the buffer layer is not particularly limited, but if the temperature is higher than 1200 ° C., there is a possibility that the film formation itself of the buffer layer made of AlN cannot be performed. 1200 degrees C or less is desirable.
  • the relationship between the temperature of the heater and the temperature of the substrate with the thermocouple is examined in advance, and when the nitride semiconductor is actually formed, the heater temperature is set to a predetermined temperature.
  • the substrate temperature assumed from the above relationship is the substrate temperature.
  • a mixed gas of a rare gas and a reactive gas is introduced from the gas introduction mechanism 213.
  • Ar gas is preferably used as the rare gas
  • N 2 gas is preferably used as the reactive gas.
  • the reactive gas flow rate and the rare gas flow rate are controlled by a mass flow controller (not shown) provided in the gas introduction mechanism 213.
  • the reactive gas flow rate / (reactive gas flow rate + rare gas flow rate) is preferably less than 50%, and more preferably less than 30%. This is preferable because the buffer layer is easily formed with + c polarity and a flat GaN layer is easily formed thereon.
  • the reactive gas flow rate / reactive gas flow rate + rare gas flow rate
  • a buffer layer in which ⁇ c polarity or ⁇ c polarity is mixed is easily obtained.
  • sputtering power source 207 power is applied from the sputtering power source 207 to the sputtering cathode 203 to generate plasma on the surface of the target 204 to perform a sputtering process.
  • a + c polarity epitaxial film made of AlN can be directly grown on the surface of the substrate 212.
  • the buffer layer made of AlN according to the present invention is controlled so that the polarity is + c polarity, and the a-axis lattice constant at the interface with the GaN layer is not less than the bulk lattice constant (about 0.311 nm). It is desirable to be controlled in this way. By doing so, since the lattice mismatch rate at the interface between the GaN layer and the AlN layer that is subsequently formed on the buffer layer is reduced, the occurrence probability of a three-dimensional island made of GaN can be reduced. As a result, the GaN The layer is easy to grow laterally. Thus, it is desirable that the GaN layer grows in the lateral direction because a flat GaN layer tends to be formed.
  • the lattice mismatch rate at the GaN / AlN interface increases, and therefore, a three-dimensional island made of GaN is likely to occur. This is not preferable because lateral growth of the GaN layer is suppressed and a flat GaN layer is difficult to obtain.
  • the upper limit of the lattice constant of the a axis at the interface with the GaN layer of the buffer layer made of AlN is not particularly limited, but if it becomes extremely larger than the bulk lattice constant, tensile stress is generated in the buffer layer. That is, it tends to cause cracks. Therefore, the upper limit of the a-axis lattice constant of the buffer layer made of AlN at the interface with the GaN layer is desirably set to a lattice constant at which such cracks are unlikely to occur, for example, 0.314 nm or less.
  • the mechanism by which the three-dimensional islands are generated by increasing the lattice mismatch rate is qualitatively explained by the well-known VW (Volmer-Weber) type or SK (Stranski-Krastanov) type growth model. can do.
  • the mechanism by which the GaN layer easily grows laterally by reducing the lattice mismatch rate can be qualitatively explained by the well-known FM (Frank-van der Merwe) growth model. .
  • an AlN layer is taken as an example of the buffer layer.
  • C, Si, Ge, Mg, Cr, Mn, or the like may be an AlN layer added in a small amount at less than 5 at%.
  • the above-mentioned C, Si, Ge, Mg, Cr, Mn, etc. may be added in a trace amount of less than 5 at% to the buffer layer made of AlN, so these gases are mixed in the reactive gas and the rare gas.
  • a buffer layer made of AlN may be formed in an atmosphere containing a gas containing an element.
  • an AlGaN layer can be directly epitaxially grown using an Al—Ga target in which Ga is contained in an Al target and used as a buffer layer.
  • an Al—Ga alloy having a low melting point is formed. Therefore, Al and Ga are prevented from melting in the first sputtering chamber 104. It is desirable to adjust the composition ratio.
  • the thickness may be larger than the thickness of about 10 to 500 nm used.
  • the lattice strain generated at the substrate interface can be relaxed on the surface side of the buffer layer.
  • FIG. 5 is a graph showing an example of the film thickness dependence of the a-axis lattice constant at the interface with the GaN layer of the AlN film formed by the nitride semiconductor layer forming method according to the present embodiment.
  • the dotted line is the a-axis lattice constant (0.311 nm) of bulk AlN.
  • the a-axis lattice constant of the AlN film increases with the relaxation of the compressive strain due to the increase in the thickness of the AlN film. For example, by increasing the thickness of AlN to 1 ⁇ m, the a-axis lattice constant can be increased to about 0.312 nm.
  • AlN with a small amount of C, Si, Ge, Mg, Cr, Mn, etc. added at a level of less than 5 at%, a fine defect structure is created inside the buffer layer, and a lattice is formed on the surface side of the buffer layer.
  • a method for reducing the strain In this method, an AlN layer having a thinner film thickness than the buffer layer made of AlN not containing the above elements and having a lattice constant a at the interface with the GaN layer equal to or greater than the bulk lattice constant may be obtained. is there.
  • the lattice constant of the a axis at the interface between the buffer layer made of AlN and the GaN layer varies greatly depending on the ratio of the reactive gas flow rate to the rare gas flow rate, the pressure during film formation, etc. It is desirable to optimize after careful examination.
  • the method of forming the buffer layer by the sputtering method is described, but the polarity is controlled to be + c polarity and the lattice constant of the a axis at the interface with the GaN layer is a bulk lattice. It is not limited to this as long as it is controlled to be equal to or greater than a constant.
  • a buffer layer made of AlN can be formed using an MOCVD chamber, a molecular beam epitaxy chamber, or the like instead of the first sputtering chamber 104.
  • a buffer layer made of AlN is used.
  • a technique for obtaining an AlN layer of + c polarity and an a-axis lattice constant at the interface with the GaN layer are used.
  • a technique for controlling the bulk constant to be greater than the bulk lattice constant According to the inventors' original experiment, even if a buffer layer made of AlN is formed by the methods disclosed in Patent Document 1 and Patent Document 2, it is difficult to obtain a + c polarity AlN layer. It is also difficult to control the a-axis lattice constant at the interface with the GaN layer so as to be equal to or greater than the bulk lattice constant. For this reason, it is difficult to planarize the GaN layer thereon.
  • the buffer layer formed as the base of the GaN layer is a low-temperature GaN buffer layer formed using a nitride GaN target. It is crystallized by heating to a temperature range of from 1 to 1100 ° C.
  • Patent Document 3 when the low-temperature GaN buffer layer is crystallized by heat treatment, a part of the low-temperature buffer layer sublimes or an agglomeration phenomenon accompanying crystallization occurs, and the buffer layer The flatness of the glass tends to be impaired. Since such a buffer layer behaves as a three-dimensional island itself, lateral growth of the GaN layer hardly occurs. This is not preferable because it is difficult to obtain a flat GaN layer.
  • Patent Document 4 and Patent Document 5 do not describe forming a buffer layer before forming a GaN layer. If the buffer layer is not formed before the GaN layer is formed, a flat GaN layer cannot be obtained, which is not preferable.
  • the X-ray diffraction method is used as a simple method.
  • a GaN layer is formed with a thickness of several ⁇ m on the buffer layer, it is calculated from the lattice plane spacing of the symmetric plane and the lattice plane spacing of the asymmetric plane, and the angle between the symmetric plane and the asymmetric plane.
  • the a-axis lattice constant can be calculated. It is also possible to obtain the a-axis lattice constant of the buffer layer at the interface between the GaN layer and the buffer layer by electron diffraction or the like.
  • a buffer layer made of AlN after forming a buffer layer made of AlN, it may be taken out from the apparatus without laminating the GaN layer, and the a-axis lattice constant may be obtained by an X-ray diffraction method in an in-plane arrangement. If this method is used, the a-axis lattice constant at the outermost surface of the buffer layer made of AlN can be obtained. Since the a-axis lattice constant of the buffer layer at the interface with the GaN layer when the GaN layer is stacked and the a-axis lattice constant of the buffer layer when the GaN layer is not stacked are not significantly different, It can be used most simply.
  • a substrate on which a buffer layer made of AlN is formed in the first sputtering chamber 104 (hereinafter, the substrate on which the buffer layer is formed is referred to as a substrate 313) is subjected to second sputtering by the transfer robot 106 in the transfer chamber 102. It is transferred to the chamber 105.
  • the substrate 313 is preferably transferred from the first sputtering chamber 104 to the second sputtering chamber 105 without being exposed to the atmosphere. Since the transfer chamber 102 is always kept at a high vacuum, oxidation of the surface of the buffer layer can be reduced. If the substrate is exposed to the atmosphere after the buffer layer is formed, an oxide layer is formed on the surface of the buffer layer, which hinders subsequent epitaxial growth of the GaN layer, which is not desirable.
  • the substrate 313 transferred to the second sputtering chamber 105 is directly placed on the heating stage 305 and set to a substrate temperature of 500 ° C. or higher.
  • the substrate temperature when the GaN film is epitaxially grown in the second sputtering chamber 105 is desirably 500 ° C. or higher, and preferably 700 ° C. or higher.
  • sputtered particles physically adsorbed on the substrate are likely to migrate on the substrate, and the lateral growth of the GaN layer is promoted. That is, setting the substrate temperature to 500 ° C. or higher is a preferable form for promoting lateral growth and obtaining a flat GaN layer.
  • the substrate temperature is lower than 500 ° C.
  • sputtering particles physically adsorbed on the substrate are difficult to migrate on the substrate.
  • the lateral growth of the GaN layer is hardly promoted, and it becomes difficult to obtain a flat GaN layer.
  • the upper limit of the substrate temperature when epitaxially growing the GaN layer is not particularly limited, but if the temperature is higher than 1000 ° C., there is a possibility that the film formation itself of the GaN layer cannot be performed. Is desirable.
  • the substrate 313 transported to the second sputtering chamber 105 can be placed apart from the heating stage 305 in the same manner as the first sputtering chamber 104. However, it is a more preferable form that the substrate 313 is directly placed on the heating stage 305 from the viewpoint of easily realizing a higher substrate temperature. It is more preferable to provide an electrostatic adsorption (ESC) mechanism in the heating stage 305 and adsorb it to the heating stage 305 after transporting the substrate because a higher substrate temperature is easily realized.
  • ESC electrostatic adsorption
  • the reason why the substrate 313 is not necessarily placed separately from the heating stage 305 in the second sputtering chamber 105 is that the underlying buffer layer is directly epitaxially grown with + c polarity.
  • the GaN layer deposited on the buffer layer is likely to take over the polarity of the buffer layer, it tends to be + c polarity reflecting the + c polarity of the buffer layer, and as a result, the substrate is not placed separately. However, it is easy to obtain a flat GaN layer.
  • a mixed gas of a rare gas and a reactive gas is introduced into the second sputtering chamber 105 from the gas introduction mechanism 311.
  • Ar gas is preferably used as the rare gas
  • N 2 gas is preferably used as the reactive gas.
  • the reactive gas flow rate and the rare gas flow rate are controlled by a mass flow controller (not shown) provided in the gas introduction mechanism 311 so that the reactive gas flow rate / (reactive gas flow rate + rare gas flow rate) is less than 20%. It is desirable that it is less than 10%.
  • the reactive gas flow rate is 20% or more of the total process gas flow rate
  • sputtered particles migrating on the substrate are likely to react with the active nitrogen in the plasma and cannot be sufficiently migrated. . If migration is not possible in this way, the lateral growth of the GaN layer is suppressed, and it is difficult to obtain a flat GaN layer, which is not preferable.
  • the reactive gas flow rate is less than 20%, the probability that sputtered particles migrating on the substrate (particularly metallic Ga described later) react with active nitrogen in the plasma is reduced, and the lateral direction of the GaN layer is reduced. Growth is promoted. As a result, a flat GaN layer can be easily obtained. Therefore, setting the reactive gas flow rate to less than 20% is a preferred mode.
  • the nitride GaNx target which is a metal nitride target used in the present invention, easily causes nitrogen deficiency during the sputtering process, and the target composition is likely to change over time.
  • the reproducibility of the process decreases, and it becomes difficult to obtain a flat GaN layer with good reproducibility.
  • the lower limit is not limited, but as described above.
  • the nitride GaNx target used in the present invention tends to cause nitrogen deficiency during the sputtering process. Therefore, it is necessary to increase the reactive gas flow rate so as to compensate for the nitrogen deficiency. For example, it is desirable to set the reactive gas flow rate / (reactive gas flow rate + rare gas flow rate) to 0.1% or more. .
  • An epitaxial film made of GaN can be grown on the surface of the substrate 313 by using a nitride GaNx target, which will be described later, as the target 307 and performing a sputtering process using plasma containing reactive gas.
  • a nitride GaNx target having a Ga / (Ga + N) molar ratio in the range of 53.0 to 59.5% is used as the target 307 used when forming the GaN layer in the second sputtering chamber 105.
  • a nitride GaNx target having a Ga / (Ga + N) molar ratio in the range of 53.0 to 59.5% is used.
  • nitride-like GaNx and metal-like Ga can be supplied on the substrate in a balanced manner as sputtered particles.
  • Nitride-like GaNx does not contribute much to the migration on the substrate, and is considered to form high-density initial nuclei.
  • the metallic Ga migrates on the substrate and is taken into initial nuclei formed by the nitride-like GaNx, thereby facilitating the lateral growth.
  • the lateral growth continues from the initial nuclei formed at a high density, a flat GaN layer can be easily obtained.
  • the molar ratio of Ga / (Ga + N) within the above range, it is difficult to deposit molten metal Ga on the target surface, and there is an effect that a stable process can be easily reproduced.
  • the molar ratio of Ga / (Ga + N) is less than 53.0%, the amount of metallic Ga that migrates on the substrate is small, and the lateral growth of the GaN layer is difficult to be promoted. As a result, it is difficult to obtain a flat GaN layer, which is not preferable.
  • the molar ratio of Ga / (Ga + N) is larger than 59.5%, molten metal Ga is likely to be deposited on the target surface. When such metal Ga deposition is caused, abnormal discharge is likely to occur, and reproducibility is likely to be lowered. Further, the deposition of metal Ga is not preferable because the target composition changes in the target thickness direction and a flat GaN layer cannot be obtained with good reproducibility.
  • the substrate 313 on which the nitride semiconductor layer made of GaN is formed in the second sputtering chamber 105 is transferred to the load lock chamber 101 via the transfer chamber 102 by the transfer robot 106 in the transfer chamber 102. Thereafter, the substrate 313 is taken out of the load lock chamber 101, and a series of film forming processes is completed.
  • Patent Document 1 and Patent Document 2 describe that by using a metal Ga target, a relatively high quality GaN layer can be formed by a sputtering method.
  • the a-axis lattice constant at the interface between the buffer layer made of AlN and the GaN layer is equal to or greater than the bulk lattice constant, and the polarity is + c polarity.
  • the a-axis lattice constant is greater than or equal to the bulk lattice constant and the polarity is + c polarity, when the metal Ga target described in Patent Document 1 and Patent Document 2 is used, Since the initial nuclear density is not increased, it is difficult to planarize the GaN layer.
  • Patent Document 1 and Patent Document 2 a method of forming a GaN film using a metal Ga target.
  • the a-axis lattice constant at the interface between the buffer layer made of AlN and the GaN layer is greater than or equal to the bulk lattice constant, and the polarity is + c polarity.
  • the a-axis lattice constant is greater than or equal to the bulk lattice constant and the polarity is + c polarity, when the nitride GaN target described in Patent Document 3 is used, nitrides as sputtered particles are used. Since migration in GaNx is not promoted, it is difficult to planarize the GaN layer.
  • Patent Document 3 a method for forming a GaN film using a nitride GaN target.
  • a nitride GaNx target having a Ga / (Ga + N) molar ratio of 55% or more and 80% or less is used.
  • the Ga / (Ga + N) molar ratio is 59. If it exceeds 5%, molten Ga metal tends to precipitate on the target surface. Such precipitation of metal Ga is not preferable because the target composition changes in the target thickness direction and a flat GaN layer cannot be obtained with good reproducibility.
  • one or both of metal Ga and nitride GaN are targeted, and a rare gas such as Ar is used as a sputtering gas.
  • a rare gas such as Ar
  • the nitride GaN is selectively sputtered and the composition of the target surface changes with time. For this reason, the reproducibility of the process is lowered, and as a result, it becomes difficult to obtain a flat GaN layer with good reproducibility.
  • growth in the stacking direction is likely to occur until the two-dimensional islands are merged, and it is difficult to planarize the GaN layer as in the techniques of Patent Document 1 and Patent Document 2. It is not preferable.
  • a buffer layer made of AlN is epitaxially grown directly on a substrate, and then a nitride GaNx target is formed with a reactive gas flow rate / It is desirable to epitaxially grow a GaN layer on the buffer layer by sputtering in a state where (reactive gas flow rate + rare gas flow rate) is set to be less than 20%.
  • the a-axis lattice constant at the interface between the buffer layer and the GaN layer is controlled to be equal to or larger than the bulk lattice constant.
  • the buffer layer be controlled to + c polarity.
  • the planarization of the GaN layer formed thereon is further promoted as compared with the buffer layer in which ⁇ c polarity or ⁇ c polarity is mixed.
  • the substrate is placed apart from a heater, and the substrate is heated to a temperature of 300 ° C. or higher and 1200 ° C. or lower, It is desirable to form a buffer layer.
  • the buffer layer is easily formed with the + c polarity, and effectively acts on the planarization of the GaN layer.
  • the buffer layer be 1 ⁇ m or more.
  • the a-axis lattice constant at the interface with the GaN layer is likely to be greater than or equal to the bulk lattice constant, which effectively acts on the planarization of the GaN layer.
  • a nitride GaNx target having a Ga / (Ga + N) molar ratio in the range of 53.0% to 59.5% is used. desirable.
  • nitride-like GaNx and metallic Ga can be supplied onto the substrate in a balanced manner as sputtered particles, and planarization of the GaN layer is promoted.
  • the GaN layer As a seventh configuration, in addition to the first to sixth configurations, it is desirable to form the GaN layer at a temperature of 500 ° C. or higher and 1000 ° C. or lower. By doing so, the sputtered particles (particularly metallic Ga) physically adsorbed on the substrate easily migrate on the substrate, and the flattening of the GaN layer is promoted.
  • a nitride GaNx target having a Ga / (Ga + N) molar ratio in the range of 53.0% to 59.5% is described as a target used for forming a GaN layer.
  • AlGaN, AlGaInN, InGaN, or the like may be formed by adding Al or In to the nitride GaNx target having such a molar ratio.
  • the a-axis lattice constant at the interface with the GaN layer is controlled to be greater than or equal to the bulk lattice constant, and the polarity becomes + c polarity.
  • a flat GaN layer can be obtained with good reproducibility by sputtering.
  • FIG. 9 is a schematic cross-sectional view showing an example of a semiconductor device manufactured using the nitride semiconductor layer forming method according to the first embodiment.
  • the semiconductor device illustrated in FIG. 9 is an example of a light-emitting diode (LED) using a nitride semiconductor material.
  • a buffer layer 402 is formed on the substrate 400.
  • a nitride semiconductor intermediate layer 404 is formed on the buffer layer 402.
  • An n-type nitride semiconductor layer 406 is formed on the nitride semiconductor intermediate layer 404.
  • a nitride semiconductor active layer 408 is formed on the n-type nitride semiconductor layer 406.
  • a p-type nitride semiconductor layer 410 is formed on the nitride semiconductor active layer 408.
  • a transparent electrode layer 412 is formed on the p-type nitride semiconductor layer 410.
  • a part of the transparent electrode layer 412, the p-type nitride semiconductor layer 410, the nitride semiconductor active layer 408, and the n-type nitride semiconductor layer 406 is partially removed from the n-type nitride semiconductor layer 406.
  • An n-type electrode 414 is formed on the upper surface of the n-type nitride semiconductor layer 406 exposed by the above.
  • a p-type electrode 416 is formed on the transparent electrode layer 412.
  • a protective film 418 is formed on the side surface and the upper surface of the semiconductor stacked structure thus configured, except for at least a part of the n-type electrode 414 and the p-type electrode 416.
  • an ⁇ -Al 2 O 3 substrate can be applied.
  • AlN or AlGaN can be applied.
  • As a material constituting the nitride semiconductor intermediate layer 404, the n-type nitride semiconductor layer 406, the nitride semiconductor active layer 408, and the p-type nitride semiconductor active layer 410, GaN, AlGaN, AlGaInN, or InGaN can be applied. .
  • the n-type nitride semiconductor layer 406 is formed by adding a donor impurity such as silicon (Si) or germanium (Ge) to these nitride semiconductor materials.
  • the p-type nitride semiconductor layer 410 is formed by adding an acceptor impurity such as magnesium (Mg) or zinc (Zn) to these nitride semiconductor materials.
  • the nitride semiconductor active layer 408 is not particularly limited. For example, an active layer having a multiple quantum well (MQW) structure formed of these nitride semiconductor materials can be used.
  • MQW multiple quantum well
  • the buffer layer 402, the nitride semiconductor intermediate layer 404, the n-type nitride semiconductor layer 406, the nitride semiconductor active layer 408, the p-type nitride semiconductor layer 410, and the transparent electrode layer 412 are formed on the substrate 400 by, for example, sputtering. Are sequentially deposited.
  • the nitride semiconductor layer deposition method according to the first embodiment can be applied to the steps from the buffer layer 402 to the deposition of the p-type nitride semiconductor layer 410.
  • a buffer layer formed in the sputtering chamber 104 corresponds to the buffer layer 402.
  • the nitride semiconductor layer formed in the sputtering chamber 105 corresponds to at least a part of the nitride semiconductor intermediate layer 404, the n-type nitride semiconductor layer 406, the nitride semiconductor active layer 408, and the p-type nitride semiconductor layer 410. To do.
  • the above-described nitride semiconductor multilayer structure can be formed while maintaining the flatness of the nitride semiconductor layers.
  • An annealing process for activating acceptor impurities in the p-type nitride semiconductor layer 410 after forming the buffer layer 402 to the p-type nitride semiconductor layer 410 and before forming the transparent electrode layer 412. May be provided.
  • partial regions of the transparent electrode layer 412, the p-type nitride semiconductor layer 410, the nitride semiconductor active layer 408, and the n-type nitride semiconductor layer 406 are formed into an n-type nitride semiconductor layer 406 by photolithography and dry etching. Remove halfway through.
  • a protective film 418 is formed on the side and top surfaces of the nitride semiconductor multilayer structure formed in this way.
  • an opening reaching the n-type nitride semiconductor layer 406 is formed in the protective film 418 by photolithography and dry etching, and then the n-type electrode 414 connected to the n-type nitride semiconductor layer 406 is formed by a lift-off method or the like.
  • a p-type electrode 416 connected to the transparent electrode layer 412 is formed by a lift-off method or the like.
  • the semiconductor device using the nitride semiconductor layer deposition method according to the first embodiment, it is possible to form a stacked structure of nitride semiconductor layers having excellent flatness and crystallinity. A high-performance light-emitting diode with high luminous efficiency can be realized.
  • each of the film forming apparatuses shown in FIGS. 1 to 3 is merely an example, and can be appropriately modified or modified without departing from the gist of the present invention.
  • three or more sputtering chambers may be provided, and at least one of them may be changed to another film forming apparatus (for example, a CVD apparatus).
  • the process conditions shown in the first embodiment are obtained in a typical experimental apparatus used by the present inventors. It is desirable that the specific process conditions be optimized as appropriate according to the film forming apparatus to be used so as to realize the properties peculiar to the buffer layer and the nitride semiconductor layer described in the above embodiment.
  • the light emitting diode is shown as an example of the semiconductor device to which the nitride semiconductor layer deposition method according to the first embodiment is applied.
  • the nitride semiconductor layer according to the first embodiment is formed.
  • the device to which the film method can be applied is not limited to this.
  • the present invention can be applied to various semiconductor devices using a nitride semiconductor such as a semiconductor laser, an optical semiconductor amplifier, a semiconductor light receiving element, HEMT, and MESFET.
  • a c-plane sapphire substrate was introduced into the load lock chamber 101 of the sputtering apparatus shown in FIG. 1, and the load lock chamber 101 was evacuated to a vacuum using an exhaust mechanism (not shown).
  • the substrate was transferred to the pretreatment chamber 103 using the transfer robot 106 in the transfer chamber 102, and preheating was performed so that the substrate temperature became 800 ° C. or higher.
  • the substrate was transferred to the first sputtering chamber 104 using the transfer robot 106 in the transfer chamber 102, and a buffer layer made of AlN was directly epitaxially grown on the substrate by sputtering.
  • a stationary facing type sputtering chamber as shown in FIG. 2 was used as the first sputtering chamber 104 for epitaxially growing a buffer layer made of AlN.
  • the film formation conditions for the buffer layer were as follows.
  • a buffer layer made of AlN having + c polarity and an a-axis lattice constant at the interface with the GaN layer (the surface of the AlN layer) equal to or greater than the bulk lattice constant was obtained. Obtained.
  • the N 2 flow rate / (N 2 flow rate + Ar flow rate) was set to 50% or more, an AlN film in which ⁇ c polarity was mixed was obtained.
  • the thickness of the buffer layer was less than 500 nm, a buffer layer made of AlN having an a-axis lattice constant less than the bulk lattice constant at the interface with the GaN layer (the surface of the AlN layer) was obtained.
  • the substrate was transferred to the second sputtering chamber 105 using the transfer robot 106 in the transfer chamber 102, and the GaN layer was epitaxially grown on the buffer layer made of AlN by the sputtering method.
  • the second sputtering chamber 105 for epitaxially growing the GaN layer an offset type sputtering chamber as shown in FIG. 3 was used, and the film formation conditions for the GaN layer were as follows.
  • FIG. 6 is a cross-sectional TEM (transmission electron microscope) image showing the cross-sectional structure of the GaN layer formed under the above conditions.
  • a flat GaN layer could be obtained by epitaxially growing the GaN layer under the above conditions. When such a GaN layer is formed, it can be visually observed as a mirror.
  • FIG. 6 shows a GaN layer having a film thickness of 400 nm, and a convex structure is partially observed. However, by increasing the film thickness or optimizing the film formation conditions, The convex structure can be reduced.
  • the flatness of the GaN layer was impaired, resulting in a dull surface.
  • the flatness of the GaN layer was impaired and the surface became dull.
  • the N 2 flow rate / (N 2 flow rate + Ar flow rate) was set to 20% or more, the flatness of the GaN layer was impaired, resulting in a dull surface.
  • Comparative Example 1 As Comparative Example 1 of the present invention, the flatness and reproducibility of the GaN layer when the techniques described in Patent Document 1 and Patent Document 2 are used will be described.
  • a liquid metal Ga target or a solid metal Ga target was used to form the GaN layer.
  • Ar flow rate: 80 sccm and N 2 flow rate: 20 sccm were used as process gases when forming the GaN layer.
  • the first sputtering chamber 104 and the second sputtering chamber 105 were each a sputtering apparatus having a structure in which the top and bottom of FIGS. 2 and 3 are inverted. Other conditions were the same as in the above example.
  • FIG. 7 is a cross-sectional TEM image showing the cross-sectional structure of the GaN layer formed under the above conditions.
  • the a-axis lattice constant at the interface with the GaN layer of the AlN buffer layer formed under the above conditions was the same as in the above example.
  • the morphology of the GaN layer formed on this buffer layer is as shown in FIG. 7, and it was found that the flatness was worse than that in the above example.
  • FIG. 7 shows a GaN layer having a film thickness of about 450 nm, but the flatness was not improved even when the film thickness was increased.
  • the polarity and the lattice constant of the buffer layer made of AlN were changed, the morphology as shown in FIG. 7 was not greatly improved.
  • FIG. 7 is a cross-sectional TEM image of a GaN layer formed using a solid metal Ga target, but the same was true when a liquid Ga target was used. Furthermore, when the same evaluation was repeated, when a liquid Ga target was used, the target changed over time, and good reproducibility could not be obtained.
  • Comparative Example 2 As Comparative Example 2 of the present invention, the flatness and reproducibility of the GaN layer when using the technique described in Patent Document 3 will be described. That is, after forming a low-temperature GaN buffer layer using a nitride GaN target, the buffer layer is crystallized by heating the substrate to a temperature range of 1000 ° C. to 1100 ° C., and then using the nitride GaN target, a sputtering method The flatness and reproducibility of the GaN layer when the GaN layer is formed will be described.
  • a low-temperature GaN buffer layer is formed at room temperature using a nitride GaN target in the first sputtering chamber 104, and then the substrate is heat-treated at 1000 ° C. in the pretreatment chamber 103. Crystallized. Thereafter, in the second sputtering chamber 105, a GaN layer was formed on the crystallized buffer layer using a nitride GaN target. Other conditions were the same as in the above example.
  • FIG. 8 is a cross-sectional TEM image showing the cross-sectional structure of the GaN layer formed under the above conditions. As shown in FIG. 8, it can be seen that the GaN layer formed under the above conditions has poor flatness as compared with the GaN layer formed under the above conditions. Further, FIG. 8 shows a GaN layer having a thickness of about 180 nm, but the flatness was not improved even when the thickness was increased. Furthermore, when the reproducibility was evaluated, only a GaN layer with poor flatness similar to that shown in FIG. 8 was obtained.
  • the buffer layer according to the present invention that is, the buffer layer made of AlN having + c polarity and the a-axis lattice constant at the interface with the GaN layer is equal to or larger than the bulk lattice constant. Results similar to those of 8 were obtained.
  • Comparative Example 3 As Comparative Example 3 of the present invention, the flatness and reproducibility of the GaN layer when the technique described in Patent Document 4 is used will be described. In particular, the flatness and reproducibility of a GaN film when a GaN film is formed by sputtering using a nitride GaNx target having a Ga / (Ga + N) molar ratio of more than 59.5% and not more than 80%. explain. In this comparative example, except for using a nitride GaNx target having a Ga / (Ga + N) molar ratio of 80%, the film forming apparatus and the film forming conditions for the buffer layer and the GaN layer were the same as the above examples. .
  • Comparative Example 4 As Comparative Example 4 of the present invention, the flatness and reproducibility of the GaN layer when the technique described in Patent Document 5 is used will be described. That is, using either one or both of metal Ga and nitride GaN as a target, using Ar as a sputtering gas, sputtering the target, and supplying sputtered particles onto the substrate; a radical gun; The flatness of the GaN layer when the GaN layer is formed by alternately repeating the step of supplying radicals containing N to the substrate will be described.
  • a nitride GaN target is used as a target for forming the GaN layer, and the nitride GaN target is sputtered using Ar gas.
  • a GaN layer was formed by a sputtering apparatus in which a nitride GaN target was disposed on one sputtering cathode 308 of the sputtering apparatus shown in FIG. 3 and the other sputtering cathode 308 was replaced with a radical gun.
  • a separation container for separating from the space in front of the radical gun is provided in the space in front of the target to suppress the reaction between the reactive gas and the target.
  • the step of providing such a separation container to suppress the reaction between the reactive gas and the target, the step of supplying sputtered particles to the substrate, and the step of supplying radicals containing N from the radical gun to the substrate Were repeated alternately.
  • Other buffer layer and GaN layer deposition conditions were the same as in the above example.
  • DESCRIPTION OF SYMBOLS 100 Film-forming apparatus 101 ... Load lock chamber 102 ... Transfer chamber 103 ... Pretreatment chamber 104 ... First sputtering chamber 105 ... Second sputtering chamber 106 ... Transfer robot 201, 301 ... Vacuum vessel 203, 308 ... Sputtering cathode 204 307, target 207, 310 ... sputtering power supply 209 ... heater 211 ... substrate mounting mechanism 212, 313 ... substrate 305 ... heating stage

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Abstract

La présente invention a : une étape destinée à la croissance épitaxiale d'une couche tampon sur un substrat, ladite couche tampon étant constituée d'AlN ou d'AlGaN ; et une étape destinée à la croissance épitaxiale, sur la couche tampon, d'une couche semi-conductrice de nitrure contenant au moins GaN au moyen d'un procédé de pulvérisation cathodique utilisant une cible de nitrure contenant Ga et GaN, et dont le débit d'un gaz réactif contenant de l'azote est réglé de manière à être inférieur à 20 % du débit de l'ensemble du gaz de traitement.
PCT/JP2015/001479 2014-07-18 2015-03-17 Procédé de formation de couche semi-conductrice de nitrure et procédé de fabrication de dispositif à semi-conducteur WO2016009577A1 (fr)

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Cited By (10)

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JP2017131978A (ja) * 2016-01-26 2017-08-03 ヤマト科学株式会社 封じ込めシステム
JP2019524982A (ja) * 2016-05-26 2019-09-05 ジョルゲンソン，ロビー Ｉｉｉａ族窒化物成長システムおよび方法
WO2020075599A1 (fr) * 2018-10-09 2020-04-16 東京エレクトロン株式会社 Procédé de production d'un film semi-conducteur de nitrure
WO2021200836A1 (fr) * 2020-03-30 2021-10-07 東ソー株式会社 Film stratifié, structure comprenant un film stratifié, élément semi-conducteur, dispositif électronique et procédé de production de film stratifié
WO2022070922A1 (fr) * 2020-09-29 2022-04-07 芝浦メカトロニクス株式会社 Dispositif de dépôt de film et procédé de dépôt de film
WO2022176422A1 (fr) * 2021-02-19 2022-08-25 株式会社ジャパンディスプレイ Procédé de production d'un film de nitrure de gallium
US11802049B2 (en) 2015-03-30 2023-10-31 Tosoh Corporation Gallium nitride-based sintered compact and method for manufacturing same
WO2023218840A1 (fr) * 2022-05-10 2023-11-16 株式会社ジャパンディスプレイ Dispositif de formation de film et procédé de formation de film pour film de nitrure de gallium
WO2024085243A1 (fr) * 2022-10-20 2024-04-25 京セラ株式会社 Substrat semi-conducteur, substrat de gabarit, procédé et dispositif de production d'un substrat de gabarit
WO2024209900A1 (fr) * 2023-04-04 2024-10-10 株式会社ジャパンディスプレイ Dispositif de formation de film, et procédé de formation de film de nitrure de gallium

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102690550B1 (ko) * 2021-07-13 2024-07-31 (재)한국나노기술원 질화갈륨계 반도체 구조물 및 이의 제조 방법

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001035805A (ja) * 1999-07-19 2001-02-09 Sony Corp Ｉｉｉ族ナイトライド化合物半導体薄膜およびその形成方法、並びに半導体素子およびその製造方法
JP2002176197A (ja) * 2000-05-22 2002-06-21 Ngk Insulators Ltd フォトニックデバイス用基板およびその製造方法
WO2011136016A1 (fr) * 2010-04-30 2011-11-03 キヤノンアネルバ株式会社 Procédé de formation d'un film épitaxial, dispositif de traitement sous vide, procédé de production d'un élément électroluminescent semiconducteur, élément électroluminescent semiconducteur, dispositif lumineux
JP2014091852A (ja) * 2012-11-02 2014-05-19 Tosoh Corp 窒化ガリウムターゲット

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6495894B2 (en) * 2000-05-22 2002-12-17 Ngk Insulators, Ltd. Photonic device, a substrate for fabricating a photonic device, a method for fabricating the photonic device and a method for manufacturing the photonic device-fabricating substrate
JP4974635B2 (ja) 2006-10-06 2012-07-11 昭和電工株式会社 Ｉｉｉ族窒化物化合物半導体積層構造体の成膜方法
JP2008153603A (ja) 2006-12-20 2008-07-03 Showa Denko Kk Ｉｉｉ族窒化物化合物半導体発光素子の製造方法、及びｉｉｉ族窒化物化合物半導体発光素子、並びにランプ
JP5935315B2 (ja) 2010-12-20 2016-06-15 東ソー株式会社 窒化ガリウム焼結体または窒化ガリウム成形体ならびにそれらの製造方法
JP2012144805A (ja) * 2010-12-21 2012-08-02 Tosoh Corp 窒化ガリウム成形物及びその製造方法
CN103329248B (zh) * 2010-12-27 2015-12-16 佳能安内华股份有限公司 外延膜形成方法、溅射设备、半导体发光元件的制造方法、半导体发光元件和照明装置
JP5718709B2 (ja) 2011-04-12 2015-05-13 株式会社アルバック 半導体層形成装置、半導体層製造方法
JP2013125851A (ja) 2011-12-14 2013-06-24 Ulvac Japan Ltd 成膜装置及び成膜方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001035805A (ja) * 1999-07-19 2001-02-09 Sony Corp Ｉｉｉ族ナイトライド化合物半導体薄膜およびその形成方法、並びに半導体素子およびその製造方法
JP2002176197A (ja) * 2000-05-22 2002-06-21 Ngk Insulators Ltd フォトニックデバイス用基板およびその製造方法
WO2011136016A1 (fr) * 2010-04-30 2011-11-03 キヤノンアネルバ株式会社 Procédé de formation d'un film épitaxial, dispositif de traitement sous vide, procédé de production d'un élément électroluminescent semiconducteur, élément électroluminescent semiconducteur, dispositif lumineux
JP2014091852A (ja) * 2012-11-02 2014-05-19 Tosoh Corp 窒化ガリウムターゲット

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11802049B2 (en) 2015-03-30 2023-10-31 Tosoh Corporation Gallium nitride-based sintered compact and method for manufacturing same
JP2017131978A (ja) * 2016-01-26 2017-08-03 ヤマト科学株式会社 封じ込めシステム
JP2019524982A (ja) * 2016-05-26 2019-09-05 ジョルゲンソン，ロビー Ｉｉｉａ族窒化物成長システムおよび方法
JP2022105014A (ja) * 2016-05-26 2022-07-12 ジョルゲンソン，ロビー Ｉｉｉａ族窒化物成長システムおよび方法
US11651959B2 (en) 2016-05-26 2023-05-16 Robbie J. Jorgenson Method and system for group IIIA nitride growth
WO2020075599A1 (fr) * 2018-10-09 2020-04-16 東京エレクトロン株式会社 Procédé de production d'un film semi-conducteur de nitrure
JPWO2020075599A1 (ja) * 2018-10-09 2021-09-02 東京エレクトロン株式会社 窒化物半導体膜の形成方法
JP7029715B2 (ja) 2018-10-09 2022-03-04 東京エレクトロン株式会社 窒化物半導体膜の形成方法
WO2021200836A1 (fr) * 2020-03-30 2021-10-07 東ソー株式会社 Film stratifié, structure comprenant un film stratifié, élément semi-conducteur, dispositif électronique et procédé de production de film stratifié
CN115335548A (zh) * 2020-03-30 2022-11-11 东曹株式会社 层叠膜、包含前述层叠膜的结构体、半导体元件和电子设备以及前述层叠膜的制造方法
WO2022070922A1 (fr) * 2020-09-29 2022-04-07 芝浦メカトロニクス株式会社 Dispositif de dépôt de film et procédé de dépôt de film
WO2022176422A1 (fr) * 2021-02-19 2022-08-25 株式会社ジャパンディスプレイ Procédé de production d'un film de nitrure de gallium
WO2023218840A1 (fr) * 2022-05-10 2023-11-16 株式会社ジャパンディスプレイ Dispositif de formation de film et procédé de formation de film pour film de nitrure de gallium
WO2024085243A1 (fr) * 2022-10-20 2024-04-25 京セラ株式会社 Substrat semi-conducteur, substrat de gabarit, procédé et dispositif de production d'un substrat de gabarit
WO2024084664A1 (fr) * 2022-10-20 2024-04-25 京セラ株式会社 Substrat semi-conducteur, substrat gabarit, et procédé et dispositif de production d'un substrat gabarit
WO2024209900A1 (fr) * 2023-04-04 2024-10-10 株式会社ジャパンディスプレイ Dispositif de formation de film, et procédé de formation de film de nitrure de gallium

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JP6001194B2 (ja) 2016-10-05
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