WO2015100827A1 - 定义多晶硅生长方向的方法 - Google Patents

定义多晶硅生长方向的方法 Download PDF

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WO2015100827A1
WO2015100827A1 PCT/CN2014/071291 CN2014071291W WO2015100827A1 WO 2015100827 A1 WO2015100827 A1 WO 2015100827A1 CN 2014071291 W CN2014071291 W CN 2014071291W WO 2015100827 A1 WO2015100827 A1 WO 2015100827A1
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polysilicon
growth direction
buffer layer
defining
amorphous silicon
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余威
李冠政
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to a polycrystalline definition
  • low-temperature polysilicon is widely used because it can be fabricated at low temperatures, has high electron mobility, and can be fabricated into C-MOS (Complementary Metal Oxide Semiconductor) circuits. To achieve high resolution, low energy consumption.
  • C-MOS Complementary Metal Oxide Semiconductor
  • LTPS Low Temperature Poly-Silicon
  • the use of polysilicon liquid crystal materials has many advantages, such as thin film circuits can be made thinner and smaller, and lower power consumption.
  • ELA produces low-temperature polysilicon by growing a buffer layer on the glass, then growing amorphous silicon, pre-cleaning with HF after high-temperature dehydrogenation, and scanning the amorphous silicon with ELA laser.
  • the amorphous silicon is recrystallized by high temperature to form polycrystalline silicon. .
  • the grain size of low-temperature polysilicon has an important influence on the electrical properties of polycrystalline silicon.
  • amorphous silicon becomes completely fused after being subjected to high temperature (nearly completely) Meits state, and then recrystallized to form polysilicon Struktur Recrystallization will crystallize according to low energy to high energy direction, low temperature to high temperature direction; so the starting point and direction of crystallization are messy, resulting in small grain size, intergranular grain boundary (Grain boundary) is too much, which will affect the electron migration of polysilicon.
  • the present invention provides a method of defining a growth direction of polysilicon, which includes:
  • Step 1 forming a buffer layer on the substrate
  • Step 2 forming a regular graphene array on the buffer layer
  • Step 3 Forming an amorphous silicon film on the buffer layer on which the graphene array is formed; Step 4. Forming the amorphous silicon film into polycrystalline silicon by excimer laser annealing.
  • step 2 includes:
  • Step 2J forming a patterned mask layer on the buffer layer according to the graphene array to be formed;
  • Step 2 2, forming the graphene array by chemical vapor deposition
  • Step 2.3 Remove the mask layer.
  • the amorphous silicon film is subjected to high temperature dehydrogenation treatment.
  • the material of the buffer layer is silicon nitride or silicon dioxide.
  • the substrate is glass.
  • the distribution of the graphene array on the surface of the buffer layer is previously set according to the growth direction of the polysilicon formed in the step 4 to be defined.
  • the buffer layer and the amorphous silicon film are respectively formed by a chemical vapor deposition method.
  • an insulating layer is further formed between the substrate and the buffer layer.
  • the material of the insulating layer is aluminum nitride, boron nitride, aluminum oxide or magnesium oxide.
  • the insulating layer is formed by magnetron sputtering or chemical vapor deposition.
  • the present invention also provides a method of defining a growth direction of polysilicon, comprising:
  • Step 1 forming a buffer layer on the substrate
  • Step 2 forming a regular graphene array on the buffer layer
  • Step 3 forming an amorphous silicon film on the buffer layer on which the graphene array is formed; step 4, forming amorphous silicon film by excimer laser annealing; Wherein, step 2 includes:
  • Step 2.1 forming a patterned mask layer on the buffer layer according to the graphene array to be formed
  • Step 2.2 forming the graphene array by chemical vapor deposition
  • Step 2.3 removing the mask layer
  • the amorphous silicon film is subjected to high temperature dehydrogenation treatment
  • the material of the buffer layer is silicon nitride or silicon dioxide; wherein the distribution of the graphene array on the surface of the buffer layer is preset according to the growth direction of the polysilicon formed in the step 4 to be defined.
  • the buffer layer and the amorphous silicon film are respectively formed by a chemical vapor deposition method.
  • An insulating layer is further formed between the substrate and the buffer layer.
  • the material of the insulating layer is aluminum nitride, boron nitride, aluminum oxide or magnesium oxide.
  • the insulating layer is formed by magnetron sputtering or chemical vapor deposition.
  • the method of the present invention for defining the direction of growth of polysilicon can control the growth direction when polysilicon is formed, thereby increasing the size of the polycrystalline silicon crystal.
  • FIG. 1 is a flow chart of a method for defining a growth direction of polysilicon according to the present invention
  • FIG. 2 is a cross section of a graphene array formed by a method for defining a growth direction of polycrystalline silicon according to the present invention, i3 ⁇ 4J
  • FIG. 3 is a cross-sectional view showing an amorphous silicon film during an excimer laser annealing process in accordance with a method for defining a growth direction of polycrystalline silicon according to the present invention
  • Figure 4 is a cross-sectional view showing the direction of growth of polycrystalline silicon in an amorphous silicon film in accordance with the method of defining the direction of growth of polysilicon in accordance with the present invention. Concrete real way
  • the method for defining a polycrystalline silicon growth direction of the present invention mainly comprises: Step 1. Form a buffer layer 20 on the substrate 10; the substrate 10 may be glass or other suitable transparent material.
  • Step 2 Form a regular graphene array 30 on the buffer layer 20; the material of the buffer layer 20 may be silicon nitride or silicon dioxide, or other suitable materials.
  • FIG. 2 is a cross-sectional view showing a method for forming a graphene array according to the present invention
  • a buffer layer 20 is grown on the substrate 10, and then a regular graphene array 30 is formed on the buffer layer 20, the buffer layer.
  • 20 can be formed by chemical vapor deposition, or by other suitable processes.
  • This step 2 can include:
  • Step 2 1. forming a patterned mask layer on the buffer layer 20 according to the graphene array 30 to be formed;
  • Step 2.2 forming the graphene array 30 by chemical vapor deposition
  • Step 2 remove the mask layer.
  • the graphene array 30 can also be formed by other processes.
  • step 3 is performed to form an amorphous silicon film 40 on the buffer layer 20 on which the graphene array 30 is formed;
  • Step 4 The amorphous silicon film 40 is formed into polycrystalline silicon by excimer laser annealing.
  • amorphous silicon film 40 in an excimer laser annealing process in accordance with the method for defining the direction of growth of polycrystalline silicon according to the present invention.
  • the amorphous silicon film 40 can be formed by a chemical vapor deposition method or can be produced by other suitable processes.
  • the amorphous silicon film 40 can be subjected to high temperature dehydrogenation treatment before excimer laser annealing in step 4.
  • FIG. 4 there is shown a cross-sectional view of controlling the growth direction of polycrystalline silicon in an amorphous silicon film in accordance with the method of defining the direction of growth of polysilicon in accordance with the present invention.
  • the amorphous silicon film 40 absorbs the energy of the laser and the temperature rises, and the temperature is generated on the amorphous silicon film 40.
  • the amorphous silicon region corresponding to the graphene array 30 has a low thermal conductivity relative to the graphene-free region due to the excellent thermal conductivity of the graphene, and forms a low temperature region as shown in FIG. 3; That is, the low temperature region is used as a starting point to start to grow toward the surrounding high temperature region, thereby achieving the purpose of controlling the growth direction of the polysilicon, thereby increasing the size of the polycrystalline silicon crystal.
  • the distribution of the graphene array 30 on the surface of the buffer layer 20 can be previously set in accordance with the growth direction of the formed polysilicon to be defined before the polycrystalline silicon is grown.
  • the graphene array 30 may be disposed to be uniformly distributed on the surface of the buffer layer 20 in the same shape. In other words, it can be changed by changing conditions such as the shape and position of the graphene array 30.
  • an insulating layer may be formed between the substrate 10 and the buffer layer 20.
  • the material of the insulating layer may be aluminum nitride, boron nitride, aluminum oxide or magnesium oxide, or other suitable materials.
  • the insulating layer can be formed by magnetron sputtering or chemical vapor deposition or other suitable process.
  • the method of the present invention for defining the direction of growth of polysilicon can be applied to the preparation of thin film transistors, array substrates, flat panel display devices and the like.
  • the method for defining the growth direction of polysilicon of the present invention can control the growth direction of polysilicon formation, thereby increasing the polysilicon grain size.

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Abstract

定义多晶硅生长方向的方法，包括：步骤1、在基板上形成缓冲层；步骤2、在该缓冲层上形成规律的石墨烯阵列；步骤3、在形成有该石墨烯阵列的该缓冲层上形成非晶硅薄膜；步骤4、经由准分子镭射退火使该非晶硅薄膜形成多晶硅。所述方法能够控制多晶硅形成时的生长方向，进而可以提高多晶硅晶粒大小。

Description

本发明涉及液晶显示技术领域， 尤其涉及一种定义多晶
方'法。
随着平板显示的发展， 高分辨率， 低能耗的面板需求不断被提出。 不 同于非晶硅电子迁移率低， 低温多晶硅因可在低温下制作， 具有高的电子 迁移率及可制作- C-MOS ( Complementary Metal Oxide Semiconductor, 互 补金属氧化物半导体） 电路而被广泛研究用以达到面板高分辨率， 低能耗 的需求。
低温多晶硅（Low Temperature Poly- Silicon, LTPS )是多晶硅技术的 一个分支。 对平板显示器来说， 采用多晶硅液晶材料有许多优点， 如薄膜 电路可以做得更薄更小、 功耗更低等。
在多晶硅技术发展的初期， 为了将玻璃基板从非晶硅结构 （a- Si )转 变为多晶硅结构， 就必须借助一道镭射退火（ Laser Anneal ) 的高温氧化工 序， 此时玻璃基板的温度将超过摄氏 1000 度。 与传统的高温多晶硅相 比， 低温多晶硅虽然也需要激光照射工序， 但它采用的是准分子激光作为 热源， 激光经过透射系统后， 会产生能量均勾分布的激光束并被投射于非 晶硅结构的玻璃基板上， 当非晶硅结构的玻璃基板吸收准分子激光的能量 后， 就会转变成为多晶硅结构。 由于整个处理过程是在摄氏 500-600度以 下完成， 普通的玻璃基板也可承受， 这就大大降低了制造成本。 而除了制 造成本降低外， 低温多晶硅技术的优点还体现在： 电子迁移速率更快； 薄 膜电路面积更小； 更高的分辨率； 结构筒单、 稳定性更高。
目前制作低温多晶硅的方法包括固相结晶 （SPC ) ， 金属诱导结晶 ( MIC )和准分子镭射退火（ELA ) 几种， 其中准分子镭射退火（ELA ) 是 目前使用最为广泛的方法。
ELA制作低温多晶硅的方法是在玻璃上生长一缓冲层， 然后生长非晶 硅， 高温去氢后经过 HF预清洗， 再利用 ELA的镭射扫描非晶硅， 非晶硅 受到高温熔化重结晶形成多晶硅。
低温多晶硅晶粒的大小 （Grain size ) 对多晶硅的电学性能有重要影 响， 在 ELA制程中， 非晶硅受到高温后变成完全熔融 （nearly completely meits )状态， 然后重结晶形成多晶硅„ 重结晶时会按照低能量向高能量方 向结晶， 低温向高温方向结晶； 所以结晶的起点和方向是凌乱的， 导致晶 粒偏小， 晶粒间晶界 ( Grain boundary )偏多， 就会影响多晶硅的电子迁移
发明内容
因此， 本发明的目的在于提供一种定义多晶硅生长方向的方法， 能够 控制多晶硅形成时的生长方向。
为实现上述目的， 本发明提供了一种定义多晶硅生长方向的方法， 其 包括：
步骤 1、 在基板上形成緩冲层；
步骤 2、 在该緩冲层上形成规律的石墨烯阵列；
步骤 3、 在形成有该石墨烯阵列的该缓冲层上形成非晶硅薄膜； 步骤 4、 经由准分子镭射退火使该非晶硅薄膜形成多晶硅。
其中， 该步骤 2包括：
步骤 2J、 根据欲形成的石墨烯阵列在该緩冲层上形成图案化的掩膜 层；
步骤 2„2、 通过化学气相沉积法形成该石墨烯阵列；
步骤 2.3、 除去掩膜层。
其中， 该步骤 4 中进行准分子镭射退火前， 对该非晶硅薄膜进行高温 去氢处理。
其中， 该缓沖层的材料为氮化硅或二氧化硅。
其中， 该基板为玻璃。
其中， 根据所欲定义的该步骤 4 中所形成的多晶硅的生长方向来预先 设置所述石墨烯阵列在该緩冲层表面的分布。
其中， 该缓冲层和非晶硅薄膜分别经由化学气相沉积法形成。
其中， 在该基板和该緩冲层之间还形成有绝缘层。
其中， 该绝缘层的材料为氮化铝， 氮化硼， 氧化铝或氧化镁。
其中， 该绝缘层通过磁控溅射或化学气相沉积法形成。
本发明还提供一种定义多晶硅生长方向的方法， 包括：
步骤 1、 在基板上形成缓冲层；
步骤 2、 在该緩沖层上形成规律的石墨烯阵列；
步骤 3、 在形成有该石墨烯阵列的该緩冲层上形成非晶硅薄膜； 步糠 4、 经由准分子镭射退火使该非晶硅薄膜形成多晶硅； 其中， 该步骤 2包括：
步骤 2.1、 根据欲形成的石墨烯阵列在该缓冲层上形成图案化的掩膜 层；
步骤 2.2、 通过化学气相沉积法形成该石墨烯阵列；
步骤 2.3、 除去掩膜层；
其中， 该步骤 4 中进行准分子镭射退火前， 对该非晶硅薄膜进行高温 去氢处理；
其中， 该缓冲层的材料为氮化硅或二氧化硅； 其中， 根据所欲定义的该步骤 4 中所形成的多晶硅的生长方向来预先 设置所述石墨烯阵列在该緩沖层表面的分布。
该緩冲层和非晶硅薄膜分别经由化学气相沉积法形成。
在该基板和该缓冲层之间还形成有绝缘层。
该绝缘层的材料为氮化铝， 氮化硼， 氧化铝或氧化镁。
该绝缘层通过磁控溅射或化学气相沉积法形成。
本发明定义多晶硅生长方向的方法能够控制多晶硅形成时的生长方 向， 进而可以提高多晶硅晶粒大小。 附图说明
下面结合附图， 通过对本发明的具体实施方式详细描述， 将使本发明 的技术方案及其他有益效果显而易见。
附图中，
图 1为本发明定义多晶硅生长方向的方法的流程图；
图 2 为按照本发明定义多晶硅生长方向的方法形成石墨烯阵列的截面 i¾J
图 3 为按照本发明定义多晶硅生长方向的方法进行准分子镭射退火制 程时非晶硅薄膜的截面图；
图 4为按照本发明定义多晶硅生长方向的方法在非晶硅薄膜中控制多 晶硅生长方向的截面图。 具体实族方式
参见图 1， 其为本发明定义多晶硅生长方向的方法的流程图。 结合图 2 至图 4 所示的按照本发明定义多晶硅生长方向的方法生长多晶硅的一较 佳实施例， 本发明的定义多晶硅生长方向的方法主要包括： 步骤 1、 在基板 10上形成缓冲层 20; 该基板 10可以为玻璃或者其它 适合的透明材十。
步骤 2、 在该緩冲层 20上形成规律的石墨烯阵列 30; 该緩冲层 20的 材料可以为氮化硅或二氧化硅， 或者其它适合的材料。
参见图 2， 其为按照本发明定义多晶硅生长方向的方法形成石墨烯阵 列的截面图， 基板 10上生长一缓冲层 20, 然后在緩冲层 20上形成规律的 石墨烯阵列 30, 该缓冲层 20 可以分别经由化学气相沉积法形成， 也可以 通过其它适合的制程来制作。
该步骤 2可以包括：
步骤 2, 1、 根据欲形成的石墨烯阵列 30在该缓冲层 20上形成图案化 的掩膜层；
步糠 2.2、 通过化学气相沉积法形成该石墨烯阵列 30;
步骤 2„3、 除去掩膜层。
石墨烯阵列 30也可以通过其它制程方式来形成。
然后， 进行步骤 3、 在形成有该石墨烯阵列 30的该缓沖层 20上形成 非晶硅薄膜 40; 以及
步骤 4、 经由准分子镭射退火使该非晶硅薄膜 40形成多晶硅。
参见图 3， 其为按照本发明定义多晶硅生长方向的方法进行准分子镭 射退火制程时非晶硅薄膜的截面图。 非晶硅薄膜 40 可以经由化学气相沉 积法形成， 也可以通过其它适合的制程来制作。 步骤 4 中进行准分子镭射 退火前， 可以对该非晶硅薄膜 40进行高温去氢处理。
参见图 4， 其为按照本发明定义多晶硅生长方向的方法在非晶硅薄膜 中控制多晶硅生长方向的截面图。
因石墨烯具有优良的导热性， 且能耐高温， 所以在利用激光扫描进行 准分子镭射退火的过程中， 非晶硅薄膜 40 吸收激光的能量后温度升高， 在非晶硅薄膜 40上产生温度差异， 石墨烯阵列 30对应的非晶硅区域因石 墨烯的优良导热作用， 温度相对无石墨烯的区域会偏低， 形成如图 3 所示 的低温区； 如图 4所示， 多晶硅形成时即会以低温区为起点开始向四周高 温区域生长变大， 从而实现控制多晶硅生长方向的目的， 进而可以提高多 晶娃晶粒大小。
使用本发明的方法， 在生长多晶硅前， 可以根据所欲定义的所形成的 多晶硅的生长方向来预先设置石墨烯阵列 30在该緩冲层 20表面的分布。 例如， 石墨烯阵列 30 可以设置为以相同的形状在緩冲层 20 表面均匀分 布。 换句话说， 可以通过改变石墨烯阵列 30 的形状和位置等条件来改变 多晶硅形成时的生长方向。
而且， 在该基板 10和该缓冲层 20之间还可以形成有绝缘层。 该绝缘 层的材料可以为氮化铝， 氮化硼， 氧化铝或氧化镁， 或者其它适合的材 料。 该绝缘层可以通过磁控溅射或化学气相沉积法或其它适合的制程形 成。 而且， 本发明的定义多晶硅生长方向的方法可以应用于薄膜晶体管， 阵列基板， 平板显示装置等的制备。
综上所述， 本发明定义多晶硅生长方向的方法能够控制多晶硅形成时 的生长方向， 进而可以提高多晶硅晶粒大小。
以上所述， 对于本领域的普通技术人员来说， 可以根据本发明的技术 方案和技术构思作出其他各种相应的改变和变形， 而所有这些改变和变形 都应属于本发明后附的权利要求的保护范围。

Claims

权 利 要 求 一种定义多晶硅生长方向的方法， 包括：
步骤 1、 在基板上形成緩冲层；
步骤 2、 在该緩沖层上形成规律的石墨烯阵列；
步骤 3、 在形成有该石墨烯阵列的该缓冲层上形成非晶硅薄膜； 步骤 4、 经由准分子镭射退火使该非晶硅薄膜形成多晶硅。
2、 如权利要求 1所述的定义多晶硅生长方向的方法， 其中， 该步骤 . 2 包括：
步骤 2J、 根据欲形成的石墨烯阵列在该緩冲层上形成图案化的掩膜 层；
步骤 2„2、 通过化学气相沉积法形成该石墨烯阵列；
步骤 2.3、 除去掩膜层。
3、 如权利要求 1所述的定义多晶硅生长方向的方法， 其中， 该步骤 4 中进行准分子镭射退火前， 对该非晶硅薄膜进行高温去氢处理。
4、 如权利要求 所述的定义多晶硅生长方向的方法， 其中， 该缓沖 层的材料为氮化硅或二氧化硅。
5、 如权利要求 1 所述的定义多晶硅生长方向的方法， 其中， 该基板
6、 如权利要求 1 所述的定义多晶硅生长方向的方法， 其中， 根据所 欲定义的该步骤 4 中所形成的多晶硅的生长方向来预先设置所述石墨婦阵 列在该緩冲层表面的分布。
7、 如权利要求 1 所述的定义多晶硅生长方向的方法， 其中
层和非晶硅薄膜分别经由化学气相沉积法形成。
8、 如权利要求 1 所述的定义多晶硅生长方向的方法， 其中
板和该緩冲层之间还形成有绝缘层。
9、 如权利要求 8 所述的定义多晶硅生长方向的方法， 其中
层的材料为氮化铝， 氮化硼， 氧化铝或氧化镁。
10、 如权利要求 8所述的定义多晶硅生长方向的方法， 其中
层通过.磁控溅射或化学气相沉积法形成。
11、 一种定义多晶硅生长方向的方法， 包括：
步骤 1、 在基板上形成緩冲层；
步骤 2、 在该緩冲层上形成规律的石墨烯阵列； 步骤 3、 在形成有该石墨烯阵列的该缓冲层上形成非晶硅薄膜； 步骤 4、 经由准分子镭射退火使该非晶硅薄膜形成多晶硅；
其中， 该步骤 2包括：
步骤 2J、 根据欲形成的石墨烯阵列在该緩冲层上形成图案化的掩膜 层；
步骤 22、 通过化学气相沉积法形成该石墨婦阵列；
步骤 2.3、 除去掩膜层；
其中， 该步骤 4 中进行准分子镭射退火前， 对该非晶硅薄膜进行高温 去氢处理；
其中， 该緩冲层的材料为氮化硅或二氧化硅；
其中， 该基板为玻璃；
其中， 根据所欲定义的该步骤 4 中所形成的多晶硅的生长方向来预先 设置所述石墨烯阵列在该缓冲层表面的分布。
12 , 如权利要求 11 所述的定义多晶硅生长方向的方法， 其中， 该缓 冲层和非晶硅薄膜分别经由化学气相沉积法形成。
】3、 如权利要求 11 所述的定义多晶硅生长方向的方法， 其中， 在该 基板和该缓冲层之间还形成有绝缘层。
14 , 如权利要求 13 所述的定义多晶硅生长方向的方法， 其中， 该绝 缘层的材料为氮化铝， 氮化硼， 氧化铝或氧化镁。
15 , 如权利要求 13 所述的定义多晶硅生长方向的方法， 其中， 该绝 缘层通过磁控溅射或化学气相沉积法形成。
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