WO2015012327A1 - Treated surface copper foil, copper foil with carrier, substrate, resin substrate, printed circuit board, copper clad laminate, and printed circuit board manufacturing method - Google Patents

Treated surface copper foil, copper foil with carrier, substrate, resin substrate, printed circuit board, copper clad laminate, and printed circuit board manufacturing method Download PDF

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Publication number
WO2015012327A1
WO2015012327A1 PCT/JP2014/069489 JP2014069489W WO2015012327A1 WO 2015012327 A1 WO2015012327 A1 WO 2015012327A1 JP 2014069489 W JP2014069489 W JP 2014069489W WO 2015012327 A1 WO2015012327 A1 WO 2015012327A1
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WO
WIPO (PCT)
Prior art keywords
copper foil
carrier
layer
treated
resin
Prior art date
Application number
PCT/JP2014/069489
Other languages
French (fr)
Japanese (ja)
Inventor
雅史 石井
美里 本多
宣明 宮本
Original Assignee
Jx日鉱日石金属株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2013160827A external-priority patent/JP6166614B2/en
Priority claimed from JP2013160828A external-priority patent/JP5470493B1/en
Application filed by Jx日鉱日石金属株式会社 filed Critical Jx日鉱日石金属株式会社
Priority to EP14829592.6A priority Critical patent/EP3026145A4/en
Priority to US14/907,478 priority patent/US9955583B2/en
Priority to CN201480041802.5A priority patent/CN105408525B/en
Priority to KR1020167004433A priority patent/KR101851882B1/en
Publication of WO2015012327A1 publication Critical patent/WO2015012327A1/en
Priority to US15/910,499 priority patent/US20180279482A1/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • H05K3/025—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates by transfer of thin metal foil formed on a temporary carrier, e.g. peel-apart copper
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/04—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material
    • B32B15/08—Layered products comprising a layer of metal comprising metal as the main or only constituent of a layer, which is next to another layer of the same or of a different material of synthetic resin
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00—Layered products comprising a layer of metal
    • B32B15/20—Layered products comprising a layer of metal comprising aluminium or copper
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B3/00—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form
    • B32B3/26—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form characterised by a particular shape of the outline of the cross-section of a continuous layer; characterised by a layer with cavities or internal voids ; characterised by an apertured layer
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/06—Wires; Strips; Foils
    • C25D7/0614—Strips or foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
    • H05K3/384—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal by plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/389—Improvement of the adhesion between the insulating substrate and the metal by the use of a coupling agent, e.g. silane
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00—Electrical equipment
    • B32B2457/08—PCBs, i.e. printed circuit boards
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1646—Characteristics of the product obtained
    • C23C18/165—Multilayered product
    • C23C18/1653—Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31—Coating with metals
    • C23C18/38—Coating with copper
    • C23C18/40—Coating with copper using reducing agents
    • C23C18/405—Formaldehyde
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00—Electroforming
    • C25D1/04—Wires; Strips; Foils
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/38—Electroplating: Baths therefor from solutions of copper
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/56—Electroplating: Baths therefor from solutions of alloys
    • C25D3/562—Electroplating: Baths therefor from solutions of alloys containing more than 50% by weight of iron or nickel or cobalt
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00—Electroplating: Baths therefor
    • C25D3/02—Electroplating: Baths therefor from solutions
    • C25D3/56—Electroplating: Baths therefor from solutions of alloys
    • C25D3/58—Electroplating: Baths therefor from solutions of alloys containing more than 50% by weight of copper
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/18—Electroplating using modulated, pulsed or reversing current
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/34—Pretreatment of metallic surfaces to be electroplated
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48—After-treatment of electroplated surfaces
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60—Electroplating characterised by the structure or texture of the layers
    • C25D5/605—Surface topography of the layers, e.g. rough, dendritic or nodular layers
    • C25D5/611—Smooth layers
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00—Electroplating characterised by the article coated
    • C25D7/06—Wires; Strips; Foils
    • C25D7/0614—Strips or foils
    • C25D7/0671—Selective plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0307—Providing micro- or nanometer scale roughness on a metal surface, e.g. by plating of nodules or dendrites
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/072—Electroless plating, e.g. finish plating or initial plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0726—Electroforming, i.e. electroplating on a metallic carrier thereby forming a self-supporting structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1152—Replicating the surface structure of a sacrificial layer, e.g. for roughening
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates

Definitions

  • the present invention relates to a surface-treated copper foil, a copper foil with a carrier, a base material, a resin base material, a printed wiring board, a copper-clad laminate, and a printed wiring board manufacturing method.
  • the subtractive method is the mainstream for circuit formation methods for semiconductor package substrates and printed wiring boards.
  • miniaturization of circuits of semiconductor package substrates and printed wiring boards used therein has progressed, and it has become difficult to form microcircuits by a subtractive method.
  • circuit formation method (1) prepreg and build-up is performed by pattern copper plating using ultra-thin copper foil as a power feeding layer and finally removing the ultra-thin copper layer by flash etching.
  • Circuit formation method (2) copper foil surface profile that forms reliable fine wiring by curing the film with a vacuum press etc., roughening the surface and forming appropriate irregularities on the substrate surface
  • a circuit forming method (3) that forms a reliable fine wiring by transferring to a substrate surface and forming appropriate irregularities on the substrate surface has attracted attention. These methods are generally called the SAP method (semi-additive method).
  • Patent Document 1 An SAP method using a copper foil surface profile is described in Patent Document 1, for example.
  • the following is mentioned as an example of the typical SAP method using the profile of such copper foil surface. That is, the entire surface of the copper foil laminated on the resin is etched, the etched substrate surface is perforated, the desmear treatment is applied to the entire surface or part of the perforated portion and the substrate, and the dry film is applied to the etched surface of the perforated portion. Then, the portion of the dry film that does not form a circuit is exposed and developed, the unnecessary portion of the dry film is removed with a chemical solution, and the electroless copper plating is applied to the etching substrate surface to which the copper foil surface profile not covered with the dry film is transferred. Electro copper plating is performed, and finally the electroless copper plating layer is removed by flash etching to form fine wiring.
  • the profile of the substrate surface is small and smooth, but in this case, the adhesion of the electroless copper plating film is weakened, and the reliability required for the semiconductor package substrate or printed wiring board is reduced. There is a risk of damage.
  • the profile of the base material surface is large. However, in this case, the fine wiring formability may be impaired.
  • the present invention is a surface-treated copper foil that can provide a profile shape of the substrate surface after removing the copper foil, which maintains fine wiring formability and realizes good adhesion of the electroless copper plating film, Another object of the present invention is to provide a resin substrate having a profile shape on the surface.
  • the present inventors have conducted intensive research and found that a surface-treated copper foil in which the surface roughness (maximum surface height) Sz of the surface-treated layer was controlled within a predetermined range was used. After bonding the surface-treated copper foil on the base material forming the copper foil after removing the copper foil to maintain fine wiring formability and realize good adhesion of the electroless copper plating film It has been found that the profile shape of the substrate surface can be provided.
  • the present invention has been completed based on the above knowledge, and in one aspect, is a surface-treated copper foil in which a surface-treated layer is formed on a copper foil, and the surface roughness Sz of the surface-treated layer surface is 2 to 6 ⁇ m. This is a surface-treated copper foil.
  • the surface-treated copper foil of the present invention is a surface-treated copper foil in which a surface-treated layer is formed on a copper foil, and the ratio B between the three-dimensional surface area B and the two-dimensional surface area A of the surface-treated layer surface. / A is 1.05 to 1.8.
  • the surface-treated copper foil of the present invention when the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the copper foil of the resin base material
  • the surface roughness Sz of the removal side surface is 1 to 5 ⁇ m.
  • the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the foil removal side surface is 1.01 to 1.5.
  • the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed.
  • the black area ratio on the foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface of the resin substrate is 0.03 to 1.0 ⁇ m.
  • the surface-treated copper foil of the present invention is a surface-treated copper foil in which a surface-treated layer is formed on the copper foil, and the ratio of the three-dimensional surface area B and the two-dimensional surface area A of the surface-treated layer surface.
  • the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed.
  • the surface roughness Sz on the foil removal side surface is 1 to 5 ⁇ m.
  • the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the foil removal side surface is 1.01 to 1.5.
  • the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed.
  • the black area ratio on the foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface of the resin substrate is 0.03 to 1.0 ⁇ m.
  • the surface-treated copper foil of the present invention when the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the copper foil of the resin substrate
  • the surface-treated copper foil has a surface roughness Sz of 1 to 5 ⁇ m on the removal side surface.
  • the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the foil removal side surface is 1.01 to 1.5.
  • the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed.
  • the black area ratio on the foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface of the resin substrate is 0.03 to 1.0 ⁇ m.
  • the surface-treated copper foil when the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the surface of the copper base material on the copper foil removal side is tertiary.
  • the surface-treated copper foil has a ratio B / A between the original surface area B and the two-dimensional surface area A of 1.01 to 1.5.
  • the surface-treated copper foil when the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the surface of the copper foil removal side surface of the resin base material is removed.
  • the black area ratio is 10 to 50%, and the average diameter value of the holes on the copper foil removal side surface of the resin base material is 0.03 to 1.0 ⁇ m.
  • the surface-treated copper foil when the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the surface of the resin base material on the copper foil removal side surface is black.
  • the surface-treated copper foil has an area ratio of 10 to 50% and an average diameter of holes on the copper foil removal side surface of the resin base material of 0.03 to 1.0 ⁇ m.
  • the surface-treated layer is a roughened layer.
  • the roughening layer is any one selected from the group consisting of copper, nickel, cobalt, phosphorus, tungsten, arsenic, molybdenum, chromium, and zinc. It is a layer made of a single substance or an alloy containing one or more of them.
  • the surface-treated copper foil of the present invention is one type selected from the group consisting of a heat-resistant layer, a rust-proof layer, a chromate-treated layer, and a silane coupling-treated layer on the surface of the roughened layer. It has the above layers.
  • the surface-treated layer is selected from the group consisting of a roughened layer, a heat-resistant layer, a rust-proof layer, a chromate-treated layer, and a silane coupling-treated layer.
  • a roughened layer is selected from the group consisting of a roughened layer, a heat-resistant layer, a rust-proof layer, a chromate-treated layer, and a silane coupling-treated layer.
  • the surface-treated copper foil of the present invention includes a resin layer on the surface-treated layer.
  • a carrier-attached copper foil comprising a carrier, an intermediate layer, and an ultrathin copper layer in this order, wherein the ultrathin copper layer is the surface-treated copper foil of the present invention. It is a foil.
  • the copper foil with a carrier of the present invention includes the ultrathin copper layer on both sides of the carrier.
  • the copper foil with a carrier of the present invention includes a roughening layer on the opposite side of the carrier from the ultrathin copper layer.
  • the surface-treated copper foil of the present invention is bonded to a substrate from the surface-treated layer side and the surface-treated copper foil is removed, and the surface of the copper foil-removed side surface
  • the base material has a roughness Sz of 1 to 5 ⁇ m.
  • the copper foil with a carrier of the present invention is bonded to a substrate from the ultrathin copper layer side, and after removing the carrier from the copper foil with a carrier, the surface-treated copper foil. It is a base material from which the ultrathin copper layer is removed, and a surface roughness Sz on the copper foil removal side surface is 1 to 5 ⁇ m.
  • the surface-treated copper foil of the present invention is bonded to a base material from the surface-treated layer side, and the surface-treated copper foil is removed.
  • the ratio B / A between the original surface area B and the two-dimensional surface area A is 1.01 to 1.5.
  • the copper foil with a carrier of the present invention is bonded to a substrate from the ultrathin copper layer side, and after removing the carrier from the copper foil with a carrier, the surface-treated copper foil.
  • the base material from which the ultrathin copper layer has been removed, and the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the copper foil removal side surface is 1.01 to 1.5.
  • the surface-treated copper foil of the present invention is bonded to the base material from the surface-treated layer side, and the surface-treated copper foil is removed.
  • the base material has an area ratio of 10 to 50% and an average diameter of holes on the copper foil removal side surface of 0.03 to 1.0 ⁇ m.
  • the copper foil with a carrier of the present invention is bonded to a substrate from the ultrathin copper layer side, and after removing the carrier from the copper foil with a carrier, the surface-treated copper foil.
  • the base material from which the ultrathin copper layer has been removed, the black area ratio on the copper foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface is 0.03 to
  • the substrate is 1.0 ⁇ m.
  • Another aspect of the present invention is a copper-clad laminate manufactured using the surface-treated copper foil of the present invention or the copper foil with carrier of the present invention.
  • FIG. 1 Another aspect of the present invention is a printed wiring board manufactured using the surface-treated copper foil of the present invention or the copper foil with a carrier of the present invention.
  • the present invention is an electronic device using the printed wiring board of the present invention.
  • a step of preparing the surface-treated copper foil of the present invention and an insulating substrate Laminating the surface-treated copper foil on the insulating substrate from the surface-treated layer side, Removing the surface-treated copper foil on the insulating substrate; It is a manufacturing method of a printed wiring board including the process of forming a circuit on the surface of an insulating substrate which removed the surface treatment copper foil.
  • a step of preparing the carrier-attached copper foil of the present invention and an insulating substrate Laminating the copper foil with carrier on the insulating substrate from the ultrathin copper layer side, After laminating the copper foil with carrier and the insulating substrate, the step of peeling the carrier of the copper foil with carrier, Removing the ultrathin copper layer on the insulating substrate after peeling off the carrier;
  • the printed wiring board manufacturing method includes a step of forming a circuit on the surface of the insulating substrate from which the ultrathin copper layer is removed.
  • a step of preparing the surface-treated copper foil of the present invention and an insulating substrate The surface-treated copper foil is laminated on an insulating substrate from the surface-treated layer side to form a copper-clad laminate, Thereafter, the printed wiring board manufacturing method includes a step of forming a circuit by any one of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
  • a step of preparing the carrier-attached copper foil of the present invention and an insulating substrate Laminating the copper foil with carrier on the insulating substrate from the ultrathin copper layer side, After laminating the carrier-attached copper foil and the insulating substrate, a copper-clad laminate is formed through a step of peeling the carrier of the carrier-attached copper foil, Thereafter, the printed wiring board manufacturing method includes a step of forming a circuit by any one of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
  • the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface treatment layer is formed, or the circuit in which a circuit is formed on the surface of the ultrathin copper layer.
  • Preparing a copper foil with a carrier Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried; Forming a circuit on the surface of the resin layer; and It is a manufacturing method of a printed wiring board including the process of exposing the circuit buried in the resin layer by removing the surface-treated copper foil or the copper foil with a carrier.
  • the first metal foil having a circuit formed on the surface or the surface-treated copper foil of the present invention having a circuit formed on the surface on the side on which the surface treatment layer is formed.
  • the step of preparing the attached copper foil Forming a resin layer on the surface of the metal foil or the surface-treated copper foil or the surface of the metal foil with carrier or the surface of the copper foil with carrier so that the circuit is buried;
  • the step of peeling the carrier of the second carrier copper foil Removing the ultrathin copper layer remaining after the surface-treated copper foil on the resin layer or the carrier of the copper foil with the second carrier is peeled off, Forming a circuit on the surface of the resin layer from which the surface-treated copper foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and After forming a circuit on the resin layer, by removing the
  • the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface treatment layer is formed, or the circuit in which a circuit is formed on the surface of the ultrathin copper layer.
  • Preparing a copper foil with a carrier Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
  • a step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin copper layer side When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier, Removing the ultrathin metal layer remaining after the metal foil on the resin layer or the carrier of the metal foil with carrier is peeled off, Forming a circuit on the surface of the resin layer from which the metal foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and After forming a copper foil with
  • the first metal foil having a circuit formed on the surface or the surface-treated copper foil of the present invention having a circuit formed on the surface on the side on which the surface treatment layer is formed.
  • the surface-treated copper foil, the metal foil with a carrier having a circuit formed on the surface of the ultrathin metal layer side, or the copper foil with a carrier of the present invention in which a circuit is formed on the surface of the ultrathin copper layer side Preparing copper foil with carrier, Forming a resin layer on the surface of the metal foil or the surface-treated copper foil or the surface of the metal foil with carrier or the surface of the copper foil with carrier so that the circuit is buried;
  • Forming a circuit on the resin layer by any one of the methods After forming a circuit on the resin layer, by removing the metal foil, or by removing the first surface-treated copper foil, or after peeling the carrier of the metal foil with carrier
  • the process of exposing the circuit embedded in the resin layer by removing the ultra-thin copper layer after removing the ultra-thin metal layer or by removing the carrier of the copper foil with the first carrier Is a method of manufacturing a printed wiring board including
  • the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface treatment layer is formed, or the circuit in which a circuit is formed on the surface of the ultrathin copper layer.
  • Preparing a copper foil with a carrier Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
  • the step of peeling the carrier of the metal foil with carrier Either a semi-additive method, a subtractive method, a partial additive method or a modified semi-additive method using a metal foil on the resin layer or an ultra-thin metal layer remaining after the carrier of the metal foil with carrier is peeled off Forming a circuit on the resin layer by a method, After
  • a resin substrate having a surface roughness Sz of 1 to 5 ⁇ m.
  • the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A is 1.01 to 1.5.
  • the surface black area ratio is 10 to 50%, and the average diameter of the surface holes is 0.03 to 1.0 ⁇ m.
  • the resin base material has a ratio B / A of a surface three-dimensional surface area B to a two-dimensional surface area A of 1.01 to 1.5.
  • the resin base material has a black area ratio of 10 to 50% on the surface and an average diameter of holes on the surface of 0.03 to 1.0 ⁇ m.
  • the surface black area ratio is 10 to 50%, and the average diameter of the surface holes is 0.03 to 1.0 ⁇ m.
  • the resin base material of the present invention is for a semi-additive construction method.
  • the present invention is a printed wiring board manufactured using the resin base material of the present invention.
  • the present invention is a copper-clad laminate produced using the resin base material of the present invention.
  • a step of preparing a surface-treated copper foil and a resin base material Laminating the surface-treated copper foil on the resin substrate from the surface-treated layer side, Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate of the present invention, It is a manufacturing method of a printed wiring board including the process of forming a circuit on the surface of the resin substrate which removed the surface treatment copper foil.
  • a surface-treated copper foil is laminated on the resin base material of the present invention from the surface-treated layer side to form a copper-clad laminate, and then a semi-additive method, a subtractive method, a partly method
  • a printed wiring board manufacturing method including a step of forming a circuit by either the additive method or the modified semi-additive method.
  • the carrier, the intermediate layer, and the ultrathin copper layer are laminated in this order, and the carrier-attached copper foil is laminated on the resin base material of the present invention from the ultrathin copper layer side.
  • a copper-clad laminate is formed through a step of peeling the carrier of the carrier-attached copper foil,
  • the printed wiring board manufacturing method includes a step of forming a circuit by any one of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
  • a step of preparing a metal foil having a circuit formed on the surface Forming a resin base material on the surface of the metal foil so that the circuit is buried; Laminating a surface-treated copper foil on the resin substrate from the surface-treated layer side, Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate of the present invention, Forming a circuit on the surface of the resin base material from which the surface-treated copper foil has been removed; and It is a manufacturing method of a printed wiring board including the process of exposing the circuit embedded in the resin base material formed in the metal foil surface by removing the metal foil.
  • the step of forming a circuit on the surface of the ultrathin copper layer side of the first carrier-attached copper foil in which the carrier, the intermediate layer, and the ultrathin copper layer are laminated in this order Forming a resin base material on the ultrathin copper layer side surface of the first carrier-attached copper foil so that the circuit is buried; Prepare a second carrier-attached copper foil in which a carrier, an intermediate layer, and an ultrathin copper layer are laminated in this order.
  • a step of peeling the carrier of the second carrier-attached copper foil after laminating the second carrier-attached copper foil on the resin substrate Removing the ultra-thin copper layer on the resin substrate after peeling the carrier of the copper foil with the second carrier to obtain the resin substrate of the present invention; Forming a circuit on the surface of the resin substrate from which the ultrathin copper layer has been removed, After forming the circuit on the resin base material, the step of peeling the carrier of the first copper foil with carrier, and After peeling the carrier of the first copper foil with carrier, the ultra thin copper layer side surface of the first copper foil with carrier is removed by removing the ultra thin copper layer of the first copper foil with carrier.
  • a method for manufacturing a printed wiring board comprising the step of exposing a circuit embedded in the resin base material formed in step 1).
  • a step of preparing a metal foil having a circuit formed on the surface Forming the resin base material of the present invention on the surface of the metal foil so that the circuit is buried;
  • a surface-treated copper foil is laminated on the resin base material from the surface-treated layer side, and a circuit is formed on the resin layer by any one of a semi-additive method, a subtractive method, a partial additive method, or a modified semi-additive method.
  • Process and It is a manufacturing method of a printed wiring board including the process of exposing the circuit embedded in the resin base material formed in the metal foil surface by removing the metal foil.
  • the step of forming a circuit on the surface of the ultrathin copper layer side of the first carrier-attached copper foil in which the carrier, the intermediate layer, and the ultrathin copper layer are laminated in this order Forming the resin substrate of the present invention on the ultrathin copper layer side surface of the first carrier-attached copper foil so that the circuit is buried; Prepare a second carrier-attached copper foil in which a carrier, an intermediate layer, and an ultrathin copper layer are laminated in this order.
  • a method for manufacturing a printed wiring board comprising the step of exposing a circuit embedded in the resin base material formed in step 1).
  • a step of preparing a metal foil having a circuit formed on the surface Forming a resin base material on the surface of the metal foil so that the circuit is buried; Laminating a carrier, an intermediate layer, a copper foil with a carrier provided with an ultrathin copper layer in this order from the ultrathin copper layer side surface to the resin base material, After peeling the carrier of the copper foil with carrier, the step of removing the ultrathin copper layer on the resin substrate to obtain the resin substrate of the present invention, Forming a circuit on the surface of the resin substrate from which the ultrathin copper layer has been removed, and It is a manufacturing method of a printed wiring board including the process of exposing the circuit embedded in the resin base material formed in the metal foil surface by removing the metal foil.
  • a step of preparing a metal foil having a circuit formed on the surface Forming the resin base material of the present invention on the surface of the metal foil so that the circuit is buried; Forming a circuit on the resin substrate; and It is a manufacturing method of a printed wiring board including the process of exposing the circuit embedded in the resin base material formed in the metal foil surface by removing the metal foil.
  • the step of forming a circuit on the ultrathin copper layer side surface of the carrier-attached copper foil provided with the carrier, the intermediate layer, and the ultrathin copper layer in this order Forming the resin base material of the present invention on the ultrathin copper layer side surface of the carrier-attached copper foil so that the circuit is buried; Forming a circuit on the resin substrate; After forming the circuit on the resin substrate, the step of peeling the carrier of the copper foil with carrier, and After peeling the carrier of the copper foil with carrier, by removing the ultra thin copper layer of the copper foil with carrier, the resin base material formed on the ultra thin copper layer side surface of the copper foil with carrier It is a manufacturing method of a printed wiring board including the process of exposing the circuit which is buried.
  • a surface-treated copper foil that can provide a profile shape of the substrate surface after removing the copper foil, which maintains fine wiring formability and realizes good adhesion of the electroless copper plating film, And the resin base material provided with the profile shape of a surface can be provided.
  • a schematic example of a semi-additive construction method using a copper foil profile is shown.
  • the sample preparation flow for obtaining the data of an Example and a comparative example is shown.
  • (A), (b), (c), (d), and (e) show SEM images ( ⁇ 30000) of the copper foil treated surfaces of Examples A1, A2, A3, A5, and A6, respectively.
  • (F) and (g) show SEM images ( ⁇ 6000) of the copper foil treated surfaces of Comparative Examples A1 and A2, respectively.
  • Resins of Examples A1 (B1), A2 (B2), A3 (B3), A5 (B5), and A6 (B6) are respectively added to (h), (i), (j), (k), and (l).
  • the SEM image (x30000) of a base-material surface is shown.
  • (M) and (n) show SEM images ( ⁇ 6000) of the resin base material surfaces of Comparative Examples A1 (B1) and A2 (B2), respectively.
  • the resin base material according to the present invention is not particularly limited as long as the surface form described later can be formed.
  • a prepreg manufactured by Mitsubishi Gas Chemical Company GHPL-830MBT, etc.
  • a prepreg manufactured by Hitachi Chemical Co., Ltd. (679- FG, etc.)
  • a prepreg manufactured by Sumitomo Bakelite Co., Ltd. EI-6785TS-F, etc.
  • a prepreg GHPL-830MBT manufactured by Mitsubishi Gas Chemical Company was prepared.
  • the substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press.
  • the thickness of the resin base material according to the present invention is not particularly limited. For example, it can be 750 to 850 ⁇ m, 100 to 200 ⁇ m, 30 to 100 ⁇ m, and typically 30 to 200 ⁇ m (in the case of a double-sided board). is there.
  • the surface roughness Sz of the resin substrate surface is preferably 1 to 4 ⁇ m, more preferably 1.5 to 3.5 ⁇ m, and still more preferably 2 to 3 ⁇ m.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface of the resin substrate according to the present invention is preferably controlled to 1.01 to 1.5.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface of the resin substrate is less than 1.01, it is difficult to achieve good adhesion of the electroless copper plating film.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A of the resin substrate surface according to the present invention is preferably 1.03 to 1.4, more preferably 1.05 to 1.35, and still more preferably. 1.1 to 1.3.
  • the black area ratio on the surface of the resin substrate according to the present invention is controlled to be 10 to 50%.
  • the black area ratio the SEM image (30 k times) of the substrate surface was subjected to white / black image processing using Photoshop 7.0 software, and the area ratio (%) of the black area was obtained.
  • the black area ratio (%), a “histogram” of “image” in Photoshop 7.0 was selected, and the ratio at the threshold value 128 was used.
  • the black region indicates that the measurement surface is concave, and the white portion indicates that the measurement surface is convex. If the black area ratio on the substrate surface is less than 15%, it is difficult to achieve good adhesion of the electroless copper plating film. If the black area ratio on the surface of the substrate is more than 50%, the fine wiring formability deteriorates.
  • the profile shape of the surface of the resin base material having a diameter average value of holes on the surface within a predetermined range has good fine wiring formability and good adhesion of the electroless copper plating film It is a necessary condition to realize.
  • the black area ratio alone does not satisfy the profile size and the appropriate distribution on the plane.
  • the average diameter value of the holes on the surface of the resin substrate according to the present invention is controlled to be 0.03 to 1.0 ⁇ m. If the average diameter of the holes on the surface of the resin substrate is less than 0.03 ⁇ m, it is difficult to achieve good adhesion of the electroless copper plating film. If the average diameter value of the holes on the surface of the resin substrate is more than 1.0 ⁇ m, the fine wiring formability deteriorates.
  • the resin base material according to the present invention preferably has a black surface area ratio of 10 to 50% on the base material surface and a diameter average value of the holes of 0.03 to 1.0 ⁇ m. More preferably, the area ratio is 15 to 45% and the average diameter of the holes is 0.1 to 0.8 ⁇ m, the black area ratio is 20 to 40% and the average diameter of the holes is 0.15. Even more preferably it is ⁇ 0.7 ⁇ m.
  • the profile shape of the surface of the resin substrate according to the present invention can be formed by laminating the surface-treated copper foil on the resin substrate and then removing the surface-treated copper foil by etching or the like on the entire surface.
  • the profile shape of the surface of the resin base material which concerns on this invention can be formed by processing the resin base material surface by a predetermined chemical
  • the surface roughness (maximum surface height) Sz of the surface treatment layer surface is controlled to 2 to 6 ⁇ m.
  • a surface-treated copper foil is prepared.
  • the surface roughness Sz of the resin base material surface after the surface-treated copper foil is removed becomes 1 to 5 ⁇ m.
  • the “surface treatment layer surface” means the outermost surface on the surface-treated side.
  • the surface treatment layer after the copper foil is provided with the surface treatment layer The surface.
  • a resin base material is used in which the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the surface-treated layer is controlled to 1.05 to 1.8.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A of the resin substrate surface after the removal of the surface-treated copper foil is 1.01 to 1.5.
  • the surface-treated copper foil the surface roughness Sz with a laser roughness meter is 2 to 6 ⁇ m, and the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A is 1.05 to 1.8.
  • the surface area of the resin base material is 10 to 50% black, and the surface of the resin base material is controlled.
  • the average diameter of the holes can be controlled to 0.03 to 1.0 ⁇ m.
  • the formation density is determined, whereby the surface roughness Sz, the area ratio B / A, the black area ratio, and the average diameter of the holes of the surface-treated copper foil can be controlled.
  • the surface treatment is performed by controlling the current density of the surface treatment high, and then the surface treatment is performed by controlling the current density of the surface treatment low.
  • the surface state of the copper foil after the surface treatment, the form and formation density of the roughened particles are determined, and the surface roughness Sz, the area ratio B / A, the black area ratio, and the average diameter of the holes can be controlled. . It is also effective to repeatedly perform the surface treatment by controlling the current density of the surface treatment high, and then performing the surface treatment by controlling the current density of the surface treatment low.
  • the surface treatment is performed by controlling the current density of the surface treatment high, and then the surface treatment is performed by controlling the current density of the surface treatment low. It is considered that the surface state is controlled by filling the metal particles and the copper foil surface with unevenness and smoothing the surface.
  • the following is applied to the resin base material. It can form by performing a desmear process on the immersion process conditions A or B of No. 1, and performing a neutralization process after that.
  • Desmear treatment liquid 40 g / L KMnO 4 , 20 g / L NaOH ⁇ Processing temperature: Room temperature ⁇ Immersion time: 20 minutes ⁇ Rotating speed of stirring bar: 300 rpm
  • Desmear treatment solution 90 g / L KMnO 4 , 5 g / L HCl ⁇ Processing temperature: 49 °C ⁇ Immersion time: 20 minutes ⁇ Stirrer rotation speed: 300 rpm (Neutralization conditions) ⁇ Neutralization treatment liquid: L-ascorbic acid 80g / L -Treatment temperature: Room temperature-Immersion time: 3 minutes-No stirring
  • the balance of the treatment liquid used in the present invention such as desmear treatment, electrolysis, surface treatment or plating, is water unless otherwise specified.
  • the surface profile of the resin substrate (the surface roughness Sz, the area is the same) by performing shower treatments A and B and neutralization treatment on the resin substrate surface under the following treatment conditions.
  • B / A ratio, black area ratio, hole diameter average value (B / A ratio, black area ratio, hole diameter average value) can be formed.
  • the surface-treated copper foil which concerns on this invention can be used in order to form the surface profile of the said resin base material.
  • the copper foil used in the surface-treated copper foil may be an electrolytic copper foil or a rolled copper foil.
  • the thickness of the copper foil is not particularly limited, but is, for example, 1 ⁇ m or more, 2 ⁇ m or more, 3 ⁇ m or more, 5 ⁇ m or more, for example, 3000 ⁇ m or less, 1500 ⁇ m or less, 800 ⁇ m or less, 300 ⁇ m or less, 150 ⁇ m or less, 100 ⁇ m or less, 70 ⁇ m or less. , 50 ⁇ m or less and 40 ⁇ m or less.
  • the rolled copper foil used in the present invention contains a copper alloy containing one or more elements such as Ag, Sn, In, Ti, Zn, Zr, Fe, P, Ni, Si, Te, Cr, Nb, V, B, and Co. Foil is also included. When the concentration of the above elements increases (for example, 10% by mass or more in total), the conductivity may decrease.
  • the conductivity of the rolled copper foil is preferably 50% IACS or more, more preferably 60% IACS or more, and still more preferably 80% IACS or more.
  • the rolled copper foil includes copper foil produced using tough pitch copper (JIS H3100 C1100) or oxygen-free copper (JIS H3100 C1020).
  • a copper alloy foil is also included.
  • the electrolytic copper foil which can be used for this invention, it can produce with the following electrolyte solution composition and manufacturing conditions.
  • As the amine compound an amine compound having the following chemical formula can be used.
  • R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.
  • alloy plating such as copper-cobalt-nickel alloy plating, copper-nickel-phosphorus alloy plating, copper-nickel-tungsten alloy plating, copper-cobalt-tungsten alloy plating, and more preferably copper alloy plating is used. It can.
  • the copper-cobalt-nickel alloy plating as the roughening treatment is, as a result of electrolytic plating, an amount of adhesion of 15 to 40 mg / dm 2 of copper—100 to 3000 ⁇ g / dm 2 of cobalt—100 to 1500 ⁇ g / dm 2 of nickel. It can be carried out so as to form a ternary alloy layer.
  • the heat resistance may deteriorate and the etching property may deteriorate.
  • the amount of Co deposition exceeds 3000 ⁇ g / dm 2 , it is not preferable when the influence of magnetism must be taken into account, etching spots may occur, and acid resistance and chemical resistance may deteriorate.
  • the Ni adhesion amount is less than 100 ⁇ g / dm 2 , the heat resistance may deteriorate.
  • the Ni adhesion amount exceeds 1500 ⁇ g / dm 2 , the etching residue may increase.
  • a preferable Co adhesion amount is 1000 to 2500 ⁇ g / dm 2
  • a preferable nickel adhesion amount is 500 to 1200 ⁇ g / dm 2
  • the etching stain means that Co remains without being dissolved when etched with copper chloride
  • the etching residue means that Ni remains without being dissolved when alkaline etching is performed with ammonium chloride. It means that.
  • the plating bath and plating conditions for forming such a ternary copper-cobalt-nickel alloy plating are as follows: Plating bath composition: Cu 10-20 g / L, Co 1-10 g / L, Ni 1-10 g / L pH: 1 to 4 Temperature: 30-50 ° C Current density D k : 20 to 30 A / dm 2 Plating time: 1 to 5 seconds Immersion time of the same plating solution after completion of plating: 20 seconds or less (because the particle shape is disturbed when immersed for longer than 20 seconds), preferably 10 seconds or less, more preferably 5 seconds or less Thereafter, if it is normal, it is not particularly quickly removed from the plating solution, but in the present invention, it is necessary to remove from the plating solution within a predetermined time after the completion of the plating.
  • the plating solution immersion time after the completion of the plating is set to 20 seconds or less. If the immersion time exceeds 20 seconds, a part of the roughened particles may be dissolved by the plating solution. It is considered that dissolution of a part of the roughened particles is one of the causes of the disturbance of the particle shape.
  • the particle shape can be made more difficult to disturb, which is effective.
  • alloy plating other than copper-cobalt-nickel alloy plating is less than 20 seconds after immersion of the plating solution after plating (the particle shape is disturbed if immersed for longer than 20 seconds).
  • the immersion time exceeds 20 seconds, a part of the roughened particles may be dissolved by the plating solution. It is considered that dissolution of a part of the roughened particles is one of the causes of the disturbance of the particle shape.
  • Known conditions can be used for the pH, temperature, current density, and plating time of alloy plating other than copper-cobalt-nickel alloy plating. By shortening the plating solution immersion time after the completion of the plating to 10 seconds or less, or 5 seconds or less, the particle shape can be made more difficult to disturb, which is effective. Further, copper plating as the following roughening treatment may be performed as the surface treatment.
  • the surface treatment layer formed by copper plating as the following roughening treatment has a high copper concentration, and becomes a roughening treatment layer (plating layer) mostly composed of copper.
  • a roughening layer (plating layer) having a high copper concentration is characterized by being hardly soluble in the plating solution.
  • Copper plating as the following roughening treatment is performed in the order of copper plating 1 and copper plating 2.
  • Copper plating 1 (Liquid composition 1) Cu concentration: 10-30 g / L H 2 SO 4 concentration: 50 to 150 g / L Tungsten concentration: 0.5-50mg / L Sodium dodecyl sulfate: 0.5-50 mg / L (Electroplating condition 1) Temperature: 30-70 ° C (First stage current condition) Current density: 18 to 70 A / dm 2 Roughening coulomb amount: 1.8 to 1000 A / dm 2, preferably 1.8 to 500 A / dm 2 Plating time: 0.1 to 20 seconds (second stage current condition) Current density: 0.5-13 A / dm 2 Roughening coulomb amount: 0.05 to 1000 A / dm 2, preferably 0.05 to 500 A / dm 2 Plating time: 0.1 to 20 seconds Note that the first and second steps may be repeated.
  • the second stage may be performed once or a plurality of times. Further, after the first stage is performed once or a plurality of times, the second stage may be repeated once or a plurality of times.
  • Copper plating 2 (Liquid composition 2) Cu concentration: 20-80g / L H 2 SO 4 concentration: 50 to 200 g / L (Electroplating condition 2) Temperature: 30-70 ° C (Current condition) Current density: 5 to 50 A / dm 2 Roughening coulomb amount: 50 to 300 A / dm 2 Plating time: 1 to 60 seconds Further, the above-described copper plating may be combined with the above-described alloy plating such as copper-cobalt-nickel alloy plating on the copper foil. It is preferable to perform the alloy plating described above after the copper plating is performed on the copper foil.
  • the surface treatment layer formed on the copper foil may be a roughening treatment layer.
  • the roughening treatment is usually performed on the surface of the copper foil after degreasing for the purpose of improving the peel strength of the copper foil after being laminated on the surface of the copper foil to be bonded to the resin substrate, that is, the surface on the surface treatment side.
  • a process for forming a fist-like electrodeposition Although the electrolytic copper foil has irregularities at the time of manufacture, the irregularities can be further increased by enhancing the convex portions of the electrolytic copper foil by roughening treatment.
  • the roughening treatment can be performed, for example, by forming roughened particles with copper or a copper alloy. The roughening process may be fine.
  • the roughening treatment layer is a layer made of any single element selected from the group consisting of copper, nickel, cobalt, phosphorus, tungsten, arsenic, molybdenum, chromium and zinc, or an alloy containing one or more of them. Also good. Moreover, after forming the roughened particles with copper or a copper alloy, a roughening treatment can be performed in which secondary particles or tertiary particles are further formed of nickel, cobalt, copper, zinc alone or an alloy. Moreover, you may form 1 or more types of layers selected from the group which consists of a heat-resistant layer, a rust prevention layer, a chromate processing layer, and a silane coupling processing layer on the surface of a roughening processing layer.
  • the surface treatment layer formed on the copper foil is one or more layers selected from the group consisting of a roughening treatment layer, a heat-resistant layer, a rust prevention layer, a chromate treatment layer, and a silane coupling treatment layer.
  • a roughening treatment layer a heat-resistant layer
  • a rust prevention layer a chromate treatment layer
  • silane coupling treatment layer a silane coupling treatment layer.
  • the heat-resistant layer and the rust-proof layer known heat-resistant layers and rust-proof layers can be used.
  • the heat-resistant layer and / or the anticorrosive layer is a group of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, platinum group elements, iron, tantalum
  • it may be a metal layer or an alloy layer made of one or more elements selected from the group consisting of iron, tantalum and the like.
  • the heat-resistant layer and / or rust preventive layer is a group of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, platinum group elements, iron, and tantalum.
  • An oxide, nitride, or silicide containing one or more elements selected from the above may be included.
  • the heat-resistant layer and / or the rust preventive layer may be a layer containing a nickel-zinc alloy.
  • the heat-resistant layer and / or the rust preventive layer may be a nickel-zinc alloy layer.
  • the nickel-zinc alloy layer may contain 50 wt% to 99 wt% nickel and 50 wt% to 1 wt% zinc, excluding inevitable impurities.
  • the total adhesion amount of zinc and nickel in the nickel-zinc alloy layer may be 5 to 1000 mg / m 2 , preferably 10 to 500 mg / m 2 , preferably 20 to 100 mg / m 2 .
  • the amount of nickel deposited on the layer containing the nickel-zinc alloy or the nickel-zinc alloy layer is preferably 0.5 mg / m 2 to 500 mg / m 2 , and 1 mg / m 2 to 50 mg / m 2 . More preferably.
  • the heat-resistant layer and / or rust prevention layer is a layer containing a nickel-zinc alloy, the interface between the copper foil and the resin substrate is eroded by the desmear liquid when the inner wall of a through hole or via hole comes into contact with the desmear liquid. It is difficult to improve the adhesion between the copper foil and the resin substrate.
  • the heat-resistant layer and / or the rust preventive layer has a nickel or nickel alloy layer with an adhesion amount of 1 mg / m 2 to 100 mg / m 2 , preferably 5 mg / m 2 to 50 mg / m 2 , and an adhesion amount of 1 mg / m 2.
  • a tin layer of ⁇ 80 mg / m 2 , preferably 5 mg / m 2 ⁇ 40 mg / m 2 may be sequentially laminated.
  • the nickel alloy layer may be nickel-molybdenum, nickel-zinc, nickel-molybdenum-cobalt. You may be comprised by any one of these.
  • the heat-resistant layer and / or rust-preventing layer preferably has a total adhesion amount of nickel or nickel alloy and tin of 2 mg / m 2 to 150 mg / m 2 and 10 mg / m 2 to 70 mg / m 2 . It is more preferable.
  • silane coupling agent for the silane coupling agent used for a silane coupling process, for example, using an amino-type silane coupling agent or an epoxy-type silane coupling agent, a mercapto-type silane coupling agent.
  • Silane coupling agents include vinyltrimethoxysilane, vinylphenyltrimethoxylane, ⁇ -methacryloxypropyltrimethoxysilane, ⁇ -glycidoxypropyltrimethoxysilane, 4-glycidylbutyltrimethoxysilane, and ⁇ -aminopropyl.
  • Triethoxysilane N- ⁇ (aminoethyl) ⁇ -aminopropyltrimethoxysilane, N-3- (4- (3-aminopropoxy) ptoxy) propyl-3-aminopropyltrimethoxysilane, imidazole silane, triazine silane, ⁇ -mercaptopropyltrimethoxysilane or the like may be used.
  • the silane coupling treatment layer may be formed using a silane coupling agent such as epoxy silane, amino silane, methacryloxy silane, mercapto silane, or the like.
  • a silane coupling agent such as epoxy silane, amino silane, methacryloxy silane, mercapto silane, or the like.
  • you may use 2 or more types of such silane coupling agents in mixture.
  • it is preferable to form using an amino-type silane coupling agent or an epoxy-type silane coupling agent.
  • the amino silane coupling agent referred to here is N- (2-aminoethyl) -3-aminopropyltrimethoxysilane, 3- (N-styrylmethyl-2-aminoethylamino) propyltrimethoxysilane, 3- Aminopropyltriethoxysilane, bis (2-hydroxyethyl) -3-aminopropyltriethoxysilane, aminopropyltrimethoxysilane, N-methylaminopropyltrimethoxysilane, N-phenylaminopropyltrimethoxysilane, N- (3 -Acryloxy-2-hydroxypropyl) -3-aminopropyltriethoxysilane, 4-aminobutyltriethoxysilane, (aminoethylaminomethyl) phenethyltrimethoxysilane, N- (2-aminoethyl-3-aminopropyl
  • the silane coupling treatment layer is 0.05 mg / m 2 to 200 mg / m 2 , preferably 0.15 mg / m 2 to 20 mg / m 2 , preferably 0.3 mg / m 2 to 2.0 mg in terms of silicon atoms. / M 2 is desirable. In the case of the above-mentioned range, the adhesiveness between the substrate and the surface-treated copper foil can be further improved.
  • the substrate after the surface-treated copper foil is removed by bonding the surface-treated copper foil to the substrate from the surface-treated layer side by controlling the surface roughness Sz of the surface-treated layer to 2 to 6 ⁇ m.
  • the surface roughness Sz of the copper foil removal side surface is 1 to 5 ⁇ m.
  • the surface-treated copper foil is bonded to the substrate from the surface-treated layer side and the surface-treated copper foil is removed.
  • the surface roughness Sz of the copper foil removal side surface becomes less than 1 ⁇ m, and it becomes difficult to achieve good adhesion of the electroless copper plating film.
  • surface roughness Sz of the surface treatment layer surface of surface treatment copper foil is more than 6 micrometers, the said surface treatment copper foil is bonded together to a base material from the surface treatment layer side, and surface treatment copper foil is removed.
  • the surface roughness Sz of the substrate on the copper foil removal side surface exceeds 5 ⁇ m, and the fine wiring formability deteriorates.
  • the surface roughness Sz of the surface-treated layer of the surface-treated copper foil according to the present invention is preferably 2 to 5.5 ⁇ m, more preferably 2.5 to 5.5 ⁇ m, and still more preferably 3 to 5 ⁇ m.
  • the surface roughness Sz of the substrate surface after removing the surface-treated copper foil according to the present invention is preferably 1 to 4 ⁇ m, more preferably 1.5 to 3.5 ⁇ m, and still more preferably 2 to 3 ⁇ m.
  • the ratio B / A of the three-dimensional surface area B and the two-dimensional surface area A on the surface-treated surface of the surface-treated copper foil is obtained by bonding the surface-treated copper foil to the base material from the surface-treated layer side. It greatly affects the profile shape of the surface of the substrate after the removal of. From such a viewpoint, in the surface-treated copper foil according to the present invention, the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the surface-treated layer surface is controlled to 1.05 to 1.8. Is preferred.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A of the surface on the surface treatment side is, for example, when the surface is roughened, and the surface area B of the roughened particles and the copper foil are copper. It can also be referred to as the ratio B / A to the area A obtained when viewed in plan from the foil surface side.
  • the surface-treated copper foil is surface-treated by controlling the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the surface-treated surface of the surface-treated copper foil to 1.05 to 1.8.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A of the surface after removing the surface-treated copper foil from the layer side and the surface-treated copper foil is 1.01 to 1 .5.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface-treated surface of the surface-treated copper foil is less than 1.05, the surface-treated copper foil is attached to the substrate from the surface-treated layer side.
  • the ratio B / A of the three-dimensional surface area B and the two-dimensional surface area A on the copper foil removal side surface of the substrate after removing the surface-treated copper foil is less than 1.01, and the electroless copper plating film It becomes difficult to achieve good adhesion.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface treatment side surface of the surface-treated copper foil is more than 1.8, the surface-treated copper foil is removed from the surface treatment layer side to the base material.
  • the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the copper foil removal side surface of the substrate after removing the surface-treated copper foil is 1.5 and the fine wiring formability Deteriorates.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface treatment layer surface of the surface-treated copper foil according to the present invention is preferably 1.10 to 1.75, more preferably 1.14 to 1.71. Even more preferably, it is 1.18 to 1.67.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the substrate surface after removing the surface-treated copper foil according to the present invention is preferably 1.03 to 1.4, more preferably 1.05. To 1.35, even more preferably 1.1 to 1.3.
  • the profile shape of the surface of the substrate having the black area ratio in a predetermined range has good fine wiring formability, and Realizes good adhesion of electroless copper plating film.
  • the black area ratio of the surface of the base material on the copper foil removal side is 10 It is preferably controlled to be ⁇ 50%.
  • the black area ratio the SEM image (30 k times) of the substrate surface was subjected to white / black image processing using Photoshop 7.0 software, and the area ratio (%) of the black area was obtained.
  • the black area ratio (%) a “histogram” of “image” in Photoshop 7.0 was selected, and the ratio at the threshold value 128 was used.
  • the black region indicates that the measurement surface is concave, and the white portion indicates that the measurement surface is convex. If the black area ratio on the surface of the substrate is less than 10%, it is difficult to achieve good adhesion of the electroless copper plating film. If the black area ratio on the surface of the substrate is more than 50%, the fine wiring formability deteriorates.
  • the profile shape of the surface of the resin base material having a diameter average value of holes on the surface within a predetermined range has good fine wiring formability and good adhesion of the electroless copper plating film It is a necessary condition to realize.
  • the black area ratio alone does not satisfy the profile size and the appropriate distribution on the plane.
  • the average diameter value of the holes on the surface of the resin substrate according to the present invention is controlled to be 0.03 to 1.0 ⁇ m. If the average diameter of the holes on the surface of the resin substrate is less than 0.03 ⁇ m, it is difficult to achieve good adhesion of the electroless copper plating film. If the average diameter value of the holes on the surface of the resin substrate is more than 1.0 ⁇ m, the fine wiring formability deteriorates.
  • the resin base material according to the present invention preferably has a black surface area ratio of 10 to 50% on the base material surface and a diameter average value of the holes of 0.03 to 1.0 ⁇ m. More preferably, the area ratio is 15 to 45% and the average diameter of the holes is 0.1 to 0.8 ⁇ m, the black area ratio is 20 to 40% and the average diameter of the holes is 0.15. Even more preferably it is ⁇ 0.7 ⁇ m.
  • the formation density is determined, and the surface roughness Sz, the area ratio B / A, the black area ratio, and the average diameter of the holes can be controlled.
  • the surface treatment is performed by controlling the current density of the surface treatment high, and then the surface treatment is performed by controlling the current density of the surface treatment low.
  • the surface state of the copper foil after the surface treatment, the form and formation density of the roughened particles are determined, and the surface roughness Sz, the area ratio B / A, the black area ratio, and the average diameter of the holes can be controlled. . It is also effective to repeatedly perform the surface treatment by controlling the current density of the surface treatment high, and then performing the surface treatment by controlling the current density of the surface treatment low.
  • the surface treatment is performed by controlling the current density of the surface treatment high, and then the surface treatment is performed by controlling the current density of the surface treatment low. It is considered that the surface state is controlled by filling the metal particles and the copper foil surface with unevenness and smoothing the surface.
  • a copper foil with carrier As the surface-treated copper foil according to the present invention, a copper foil with a carrier may be used.
  • the copper foil with a carrier includes a carrier, an intermediate layer laminated on the carrier, and an ultrathin copper layer laminated on the intermediate layer.
  • the copper foil with a carrier may include a carrier, an intermediate layer, and an ultrathin copper layer in this order.
  • the copper foil with a carrier may have a surface treatment layer such as a roughening treatment layer on one or both of the surface on the carrier side and the surface on the ultrathin copper layer side.
  • the carrier-attached copper foil When a roughening treatment layer is provided on the carrier-side surface of the carrier-attached copper foil, when the carrier-attached copper foil is laminated on the support such as a resin substrate from the carrier-side surface side, the carrier and the support such as the resin substrate Has the advantage that it becomes difficult to peel off.
  • a metal foil can be used as a carrier.
  • the metal foil copper foil, copper alloy foil, nickel foil, nickel alloy foil, aluminum foil, aluminum alloy foil, iron foil, iron alloy foil, stainless steel foil, zinc foil, zinc alloy foil and the like can be used.
  • the carrier it is particularly preferable to use a copper foil because it is easy to form a release layer.
  • the carrier is typically provided in the form of rolled copper foil or electrolytic copper foil.
  • the electrolytic copper foil is produced by electrolytic deposition of copper from a copper sulfate plating bath onto a drum of titanium or stainless steel, and the rolled copper foil is produced by repeating plastic working and heat treatment with a rolling roll.
  • the copper foil material is, for example, Sn-containing copper, Ag-containing copper, copper alloy added with Cr, Zr, Mg, etc., and Corson-based added with Ni, Si, etc. Copper alloys such as copper alloys can also be used.
  • the thickness of the carrier that can be used in the present invention is not particularly limited, but may be appropriately adjusted to a thickness suitable for serving as a carrier, for example, 12 ⁇ m or more. However, if it is too thick, the production cost becomes high, so generally it is preferably 35 ⁇ m or less. Accordingly, the thickness of the carrier is typically 12-70 ⁇ m, more typically 18-35 ⁇ m.
  • An intermediate layer is provided on the carrier. Another layer may be provided between the carrier and the intermediate layer.
  • the ultrathin copper layer is hardly peeled off from the carrier before the copper foil with the carrier is laminated on the insulating substrate, while the ultrathin copper layer is separated from the carrier after the lamination step on the insulating substrate.
  • the intermediate layer of the copper foil with a carrier of the present invention is Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, alloys thereof, hydrates thereof, oxides thereof, One or two or more selected from the group consisting of organic substances may be included.
  • the intermediate layer may be a plurality of layers. Further, for example, the intermediate layer is a single metal layer composed of one kind of element selected from the element group composed of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn from the carrier side. Or forming an alloy layer composed of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, A layer made of a hydrate or oxide of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn. It can comprise by forming.
  • the intermediate layer can be constituted by laminating nickel, a nickel-phosphorus alloy or a nickel-cobalt alloy, and chromium in this order on a carrier. Since the adhesive strength between nickel and copper is higher than the adhesive strength between chromium and copper, when the ultrathin copper layer is peeled off, it peels at the interface between the ultrathin copper layer and chromium. Further, the nickel of the intermediate layer is expected to have a barrier effect that prevents the copper component from diffusing from the carrier into the ultrathin copper layer.
  • Adhesion amount of nickel in the intermediate layer is preferably 100 [mu] g / dm 2 or more 40000 ⁇ g / dm 2 or less, more preferably 100 [mu] g / dm 2 or more 4000 ⁇ g / dm 2 or less, more preferably 100 [mu] g / dm 2 or more 2500 g / dm 2 or less, more Preferably, it is 100 ⁇ g / dm 2 or more and less than 1000 ⁇ g / dm 2 , and the amount of chromium deposited on the intermediate layer is preferably 5 ⁇ g / dm 2 or more and 100 ⁇ g / dm 2 or less.
  • a rust preventive layer such as a Ni plating layer on the opposite side of the carrier.
  • An intermediate layer may be provided on both sides of the carrier.
  • the ultrathin copper layer is the surface-treated copper foil of the present invention.
  • the thickness of the ultrathin copper layer is not particularly limited, but is generally thinner than the carrier, for example, 12 ⁇ m or less. Typically 0.5 to 12 ⁇ m, more typically 1.5 to 5 ⁇ m.
  • strike plating with a copper-phosphorus alloy may be performed in order to reduce pinholes in the ultrathin copper layer. Examples of the strike plating include a copper pyrophosphate plating solution.
  • Ultrathin copper layers may be provided on both sides of the carrier.
  • a resin layer may be provided on the surface treatment layer of the surface-treated copper foil of the present invention.
  • the resin layer may be an insulating resin layer.
  • the resin layer may be an adhesive or an insulating resin layer in a semi-cured state (B stage state) for bonding.
  • the semi-cured state (B stage state) is a state in which there is no sticky feeling even if the surface is touched with a finger, the insulating resin layer can be stacked and stored, and a curing reaction occurs when subjected to heat treatment. Including that.
  • the resin layer may contain a thermosetting resin or a thermoplastic resin.
  • the resin layer may include a thermoplastic resin.
  • the type is not particularly limited.
  • the resin layer may be a resin layer containing a block copolymerized polyimide resin layer or a resin layer containing a block copolymerized polyimide resin and a polymaleimide compound.
  • the epoxy resin has two or more epoxy groups in the molecule and can be used without any problem as long as it can be used for electric / electronic materials.
  • the epoxy resin is preferably an epoxy resin epoxidized using a compound having two or more glycidyl groups in the molecule.
  • Bisphenol A type epoxy resin bisphenol F type epoxy resin, bisphenol S type epoxy resin, bisphenol AD type epoxy resin, novolac type epoxy resin, cresol novolac type epoxy resin, alicyclic epoxy resin, brominated epoxy resin, glycidylamine Type epoxy resin, triglycidyl isocyanurate, glycidyl amine compound such as N, N-diglycidyl aniline, glycidyl ester compound such as tetrahydrophthalic acid diglycidyl ester, phosphorus-containing epoxy resin, biphenyl type epoxy resin, biphenyl novolac type epoxy resin, One or two or more selected from the group of trishydroxyphenylmethane type epoxy resin and tetraphenylethane type epoxy resin can be used, or the epoxy Resin hydrogenated products and halogenated products can be used.
  • the resin layer may be made of any known dielectric such as a known resin, resin curing agent, compound, curing accelerator, dielectric (dielectric including an inorganic compound and / or organic compound, dielectric including a metal oxide). May be included), a reaction catalyst, a crosslinking agent, a polymer, a prepreg, a skeleton material, and the like.
  • the resin layer may be, for example, International Publication No. WO2008 / 004399, International Publication No. WO2008 / 053878, International Publication No. WO2009 / 084533, JP-A-11-5828, JP-A-11-140281, Patent 3184485, International Publication. No. WO 97/02728, Japanese Patent No.
  • WO 2008/114858 International Publication Number WO 2009/008471, JP 2011-14727, International Publication Number WO 2009/001850, International Publication Number WO 2009/145179, International Publication Number Nos. WO2011 / 068157 and JP2013-19056 (resins, resin curing agents, compounds, curing accelerators, dielectrics, reaction catalysts, crosslinking agents, polymers, prepregs, skeletal materials, etc.) and / or You may form using the formation method and formation apparatus of a resin layer.
  • These resins are, for example, methyl ethyl ketone (MEK), cyclopentanone, dimethylformamide, dimethylacetamide, N-methylpyrrolidone, toluene, methanol, ethanol, propylene glycol monomethyl ether, dimethylformamide, dimethylacetamide, cyclohexanone, ethyl cellosolve, N-methyl.
  • MEK methyl ethyl ketone
  • cyclopentanone dimethylformamide, dimethylacetamide, N-methylpyrrolidone, toluene
  • methanol ethanol
  • propylene glycol monomethyl ether dimethylformamide, dimethylacetamide, cyclohexanone, ethyl cellosolve
  • N-methyl ethyl ketone
  • -2-Pyrrolidone N, N-dimethylacetamide, N, N-dimethylformamide or the like is dissolved in a solvent to
  • the treatment layer or the silane coupling agent layer is applied by a roll coater method or the like, and then heated and dried as necessary to remove the solvent to obtain a B stage state.
  • a hot air drying furnace may be used for drying, and the drying temperature may be 100 to 250 ° C., preferably 130 to 200 ° C.
  • the resin layer composition may be dissolved using a solvent to obtain a resin liquid having a resin solid content of 3 wt% to 60 wt%, preferably 10 wt% to 40 wt%, more preferably 25 wt% to 40 wt%.
  • the surface-treated copper foil provided with the resin layer (surface-treated copper foil with resin) is superposed on the base material, and the whole is thermocompressed to thermally cure the resin layer.
  • This wiring pattern is used in the form of forming.
  • the copper foil with a carrier which used the said surface-treated copper foil as an ultra-thin copper layer the copper foil with a carrier provided with the resin layer (copper foil with a carrier with a resin) overlapped the resin layer on the base material After that, the entire resin layer is thermocompression-bonded to thermally cure the resin layer, and then the carrier is peeled off to expose the ultrathin copper layer (naturally it is the surface on the intermediate layer side of the ultrathin copper layer) And a predetermined wiring pattern is formed there.
  • the surface-treated copper foil with resin or the copper foil with carrier with resin When the surface-treated copper foil with resin or the copper foil with carrier with resin is used, the number of prepreg materials used in the production of the multilayer printed wiring board can be reduced. In addition, the copper-clad laminate can be manufactured even if the resin layer is made thick enough to ensure interlayer insulation or no prepreg material is used. At this time, the surface smoothness can be further improved by undercoating the surface of the substrate with an insulating resin.
  • the material cost of the prepreg material is saved and the laminating process is simplified, which is economically advantageous.
  • the multilayer printed wiring board manufactured by the thickness of the prepreg material is used.
  • the thickness is reduced, and particularly with respect to the copper foil with a carrier with resin, there is an advantage that an extremely thin multilayer printed wiring board in which the thickness of one layer is 100 ⁇ m or less can be manufactured.
  • the thickness of the resin layer is preferably 0.1 to 120 ⁇ m.
  • the total resin layer thickness of the cured resin layer and the semi-cured resin layer is preferably 0.1 ⁇ m to 120 ⁇ m, more preferably 35 ⁇ m to 120 ⁇ m. In this case, the thickness is preferably 5 to 20 ⁇ m for the cured resin layer and 15 to 115 ⁇ m for the semi-cured resin layer.
  • the total resin layer thickness exceeds 120 ⁇ m, it may be difficult to produce a thin multilayer printed wiring board. If the total resin layer thickness is less than 35 ⁇ m, it is easy to form a thin multilayer printed wiring board, but an insulating layer between inner layer circuits This is because the resin layer may become too thin and the insulation between the circuits of the inner layer tends to become unstable. Moreover, when the cured resin layer thickness is less than 5 ⁇ m, it may be necessary to consider the surface roughness of the roughened copper foil surface. Conversely, if the cured resin layer thickness exceeds 20 ⁇ m, the effect of the cured resin layer may not be particularly improved, and the total insulating layer thickness becomes thick.
  • the cured resin layer may have a thickness of 3 ⁇ m to 30 ⁇ m.
  • the semi-cured resin layer may have a thickness of 7 ⁇ m to 55 ⁇ m.
  • the total thickness of the cured resin layer and the semi-cured resin layer may be 10 ⁇ m to 60 ⁇ m.
  • the thickness of the resin layer is 0.1 ⁇ m to 5 ⁇ m, more preferably 0
  • the thickness is preferably 5 ⁇ m to 5 ⁇ m, more preferably 1 ⁇ m to 5 ⁇ m, in order to reduce the thickness of the multilayer printed wiring board.
  • the thickness of the resin layer is 0.1 ⁇ m to 5 ⁇ m
  • the thickness of the resin layer is preferably 0.1 to 50 ⁇ m, more preferably 0.5 ⁇ m to 25 ⁇ m, and more preferably 1.0 ⁇ m to 15 ⁇ m. preferable.
  • the thickness of the above-mentioned resin layer says the average value of the thickness measured by cross-sectional observation in arbitrary 10 points
  • the thickness of the resin layer is made thicker than 120 ⁇ m, it becomes difficult to form a resin layer having a desired thickness in a single coating process, which is economically disadvantageous because of extra material costs and man-hours. Furthermore, since the formed resin layer is inferior in flexibility, cracks are likely to occur during handling, and excessive resin flow occurs during thermocompression bonding with the inner layer material, making smooth lamination difficult. There is.
  • another product form of the copper foil with a carrier with resin is a resin on the ultrathin copper layer, or on the heat-resistant layer, rust-proof layer, chromate-treated layer, or silane coupling-treated layer. After coating with a layer and making it into a semi-cured state, the carrier can then be peeled off and manufactured in the form of a copper foil with resin in which no carrier is present.
  • a step of preparing a surface-treated copper foil and a resin base material, the surface-treated copper foil is formed from the surface-treated layer side with a resin substrate.
  • Fig. 1 shows a schematic example of a semi-additive method using a copper foil profile.
  • the surface profile of the copper foil is used for forming the surface profile of the resin base material.
  • the copper foil of the present invention is laminated on a resin base material to produce a copper clad laminate.
  • the entire surface of the copper foil of the copper clad laminate is etched.
  • electroless copper plating is applied to the surface of the resin substrate (entire etching substrate) to which the copper foil surface profile has been transferred.
  • a portion of the resin base material (entire etching base material) where the circuit is not formed is covered with a dry film or the like, and electroless (electrolytic) copper plating is applied to the surface of the electroless copper plating layer not covered with the dry film. Then, after removing the dry film, a fine circuit is formed by removing the electroless copper plating layer formed in the portion where the circuit is not formed. Since the fine circuit formed in the present invention is in close contact with the etching surface of the resin base material (entire etching base material) to which the copper foil surface profile of the present invention is transferred, the adhesion force (peel strength) is good. It has become.
  • the resin base material can be one with an inner layer circuit.
  • the semi-additive method means that a thin electroless plating and / or electrolytic plating is performed on a resin base material or a copper foil seed layer, a pattern is formed, and then a conductor pattern is formed using electroplating and etching. Refers to how to do. Copper plating can be used for electroless plating and / or electrolytic plating. As a method for forming the copper plating, a known method can be used.
  • a step of preparing a copper foil with a carrier and a resin base material, the copper foil with a carrier is resin from the ultrathin copper layer side
  • the semi-additive method means that a thin electroless plating is performed on an insulating substrate or a copper foil seed layer, and if necessary, an electroplating is performed thereafter. After that, a pattern is formed, and then electroplating and etching are used. The method of forming a conductor pattern.
  • a step of preparing a copper foil with a carrier and an insulating substrate, the copper foil with a carrier from the ultrathin copper layer side to the insulating substrate The step of laminating, the step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the insulating substrate, the step of removing the ultrathin copper layer on the insulating substrate after peeling the carrier, Forming a circuit on the surface of the insulating substrate from which the ultrathin copper layer has been removed.
  • a surface-treated copper foil is laminated on the resin substrate of the present invention from the surface-treated layer side to form a copper-clad laminate, and then semi-additive Forming a circuit by any one of a method, a subtractive method, a partly additive method, or a modified semi-additive method.
  • a step of preparing the surface-treated copper foil and the insulating substrate of the present invention the surface-treated copper foil is laminated on the insulating substrate from the surface-treated layer side. Forming a copper-clad laminate, and then forming a circuit by any one of a semi-additive method, a subtractive method, a partial additive method, or a modified semi-additive method.
  • the subtractive method refers to a method of selectively removing unnecessary portions of the copper foil on the copper clad laminate by etching or the like to form a conductor pattern.
  • the partial additive method means that a catalyst circuit is formed on a substrate provided with a conductor layer, and if necessary, a substrate provided with holes for through holes or via holes, and etched to form a conductor circuit. Then, after providing a solder resist or a plating resist as necessary, it refers to a method of manufacturing a printed wiring board by thickening through holes, via holes, etc. on the conductor circuit by electroless plating.
  • the modified semi-additive method is a method of laminating a metal foil on a resin base material, protecting a non-circuit forming portion with a plating resist, thickening the copper of the circuit forming portion by electrolytic plating, It refers to a method of forming a circuit on a resin substrate by removing and removing the metal foil other than the circuit forming part by (flash) etching.
  • the step of laminating the copper foil with carrier on the resin base material of the present invention from the ultrathin copper layer side, laminating the copper foil with carrier and the resin base material After that, a copper-clad laminate is formed through a process of peeling the carrier of the copper foil with carrier, and then a circuit is formed by any of the semi-additive method, subtractive method, partly additive method, or modified semi-additive method The process of carrying out is included.
  • a step of preparing the copper foil with carrier and the insulating substrate of the present invention the copper foil with carrier is laminated on the insulating substrate from the ultrathin copper layer side.
  • the method includes a step of forming a circuit by any one of the modified semi-additive methods.
  • a step of preparing a metal foil having a circuit formed on the surface, a resin base material on the surface of the metal foil so that the circuit is buried A step of forming a surface-treated copper foil or a copper foil with a carrier on a resin substrate from the surface-treated layer side or the ultrathin copper layer side, a surface-treated copper foil on a resin substrate or a copper foil with a carrier.
  • the step of removing to obtain the resin base material of the present invention, the step of forming a circuit on the surface of the resin base material from which the surface-treated copper foil or the copper foil with carrier is removed, and the metal foil surface by removing the metal foil And a step of exposing the circuit buried in the resin base material.
  • a step of preparing a metal foil having a circuit formed on the surface, a resin on the surface of the metal foil so that the circuit is buried A step of forming a layer, a step of laminating the surface-treated copper foil of the present invention on the resin layer from the surface-treated layer side, a step of removing the surface-treated copper foil on the resin layer, and removing the surface-treated copper foil Forming a circuit on the surface of the resin layer; and removing the metal foil to expose a circuit embedded in the resin layer formed on the surface of the metal foil.
  • a step of forming a circuit on the ultrathin copper layer side surface of the first copper foil with carrier so that the circuit is buried The process of forming a resin base material on the surface of the ultrathin copper layer of the first copper foil with carrier, the second copper foil with carrier or the surface-treated copper foil is prepared, and the ultrathin copper of the second copper foil with carrier A step of laminating the resin substrate from the layer side or the surface-treated layer side, a step of peeling the carrier of the second carrier-attached copper foil after laminating the second carrier-attached copper foil or the surface-treated copper foil to the resin substrate, The process of obtaining the resin base material of the present invention by removing the ultrathin copper layer or the surface-treated copper foil on the resin base material after peeling the carrier of the copper foil with the second carrier, the ultrathin copper layer or the surface-treated copper The process of forming a circuit on the surface of the resin substrate
  • the copper foil with a carrier of the present invention is a first copper foil with a carrier, and the pole of the first copper foil with a carrier A step of forming a circuit on the surface of the thin copper layer, a step of forming a resin layer on the surface of the ultrathin copper layer of the first copper foil with carrier so that the circuit is buried, a second copper foil with carrier And laminating the second carrier-attached copper foil on the resin layer from the ultrathin copper layer side, laminating the second carrier-attached copper foil on the resin layer, and then attaching the second carrier A step of peeling the carrier of the copper foil, a step of removing the ultrathin copper layer on the resin layer after peeling the carrier of the second copper foil with carrier, a circuit on the surface of the resin layer from which the ultrathin copper layer has been removed Forming a circuit on the resin layer; Removing the carrier of the copper foil with carrier,
  • a step of preparing a metal foil having a circuit formed on the surface, the resin base material of the present invention is formed on the surface of the metal foil so that the circuit is buried Process, surface-treated copper foil or carrier-attached copper foil is laminated on the resin substrate from the surface-treated layer side or ultrathin copper layer side, and any of the semi-additive method, subtractive method, partly additive method or modified semi-additive method
  • a step of preparing a metal foil having a circuit formed on the surface a step of forming a resin layer on the surface of the metal foil so that the circuit is buried
  • the surface-treated copper foil of the present invention is laminated on the resin layer from the surface-treated layer side, and is applied onto the resin layer by any one of the subtractive method, semi-additive method, subtractive method, partly additive method, or modified semi-additive method. Forming a circuit, and removing the metal foil to expose the circuit buried in the resin layer formed on the surface of the metal foil.
  • a step of forming a circuit on the surface of the first copper foil with carrier on the ultrathin copper layer side, the first copper with carrier so that the circuit is buried The step of forming the resin base material of the present invention on the ultrathin copper layer side surface of the foil, preparing the second carrier-attached copper foil or surface-treated copper foil, and preparing the second carrier-attached copper foil on the ultrathin copper layer side or
  • the carrier of the second copper foil with carrier is peeled off, and the semi-additive method
  • the copper foil with a carrier of the present invention is a first copper foil with a carrier, and the ultrathin copper layer side surface of the first copper foil with a carrier is used.
  • a step of forming a circuit a step of forming a resin layer on the ultrathin copper layer side surface of the first carrier-attached copper foil so that the circuit is buried, and preparing a second carrier-attached copper foil,
  • the carrier-added copper foil is laminated on the resin layer from the ultrathin copper layer side and the carrier of the second carrier-attached copper foil is peeled off, and the semi-additive method, subtractive method, partly additive method or modified semi-additive method is used.
  • a step of forming a circuit on the resin layer by any method a step of peeling a carrier of the copper foil with the first carrier after forming a circuit on the resin layer, and the first carrier After peeling the carrier of the attached copper foil, the ultrathin copper layer of the first carrier-attached copper foil was removed, thereby forming the ultrathin copper layer side surface of the first carrier-attached copper foil, A step of exposing a circuit buried in the resin layer.
  • a step of preparing a metal foil having a circuit formed on the surface Forming the resin base material of the present invention on the surface of the metal foil so that the circuit is buried; After preparing a carrier, copper foil with a carrier, an intermediate layer, and an ultrathin copper layer in this order, and laminating the copper foil with carrier from the ultrathin copper layer side of the copper foil with carrier, Peeling the carrier, and then forming a circuit on the resin substrate; and The step of exposing the circuit buried in the resin base material formed on the surface of the metal foil by removing the metal foil is included.
  • a step of preparing a copper foil with a carrier and a resin base material a step of laminating the copper foil with a carrier and a resin base material, After laminating the copper foil with carrier and the resin base material, the step of peeling the carrier of the copper foil with carrier, the ultrathin copper layer exposed by peeling the carrier is etched using a corrosive solution such as acid or plasma Removing all by a method to obtain the resin base material of the present invention, providing a through hole or / and a blind via in the resin exposed by removing the ultrathin copper layer by etching, the through hole or / and A step of performing a desmear process on a region including the blind via, including the resin and the through hole or / and the blind via; A step of providing an electroless plating layer for a region, a step of providing a plating resist on the electroless plating layer, a step
  • the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface-treated layer is formed, or the circuit is on the surface of the ultrathin copper layer side.
  • Preparing the formed copper foil with a carrier of the present invention Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried; Forming a circuit on the surface of the resin layer; and A step of exposing the circuit buried in the resin layer by removing the surface-treated copper foil or the copper foil with carrier is included.
  • a metal foil having a circuit formed on its surface, or a surface-treated copper foil of the present invention having a circuit formed on the surface on which the surface treatment layer is formed The first surface-treated copper foil, or the metal foil with carrier in which the circuit is formed on the surface of the ultrathin metal layer, or the copper foil with carrier of the present invention in which the circuit is formed on the surface of the ultrathin copper layer
  • the metal foil with a carrier includes at least a carrier and an ultrathin metal layer in this order.
  • a metal foil can be used as a carrier of the metal foil with a carrier. Copper foil, copper alloy foil, nickel foil, nickel alloy foil, aluminum foil, aluminum alloy foil, iron foil, iron alloy foil, stainless steel foil, zinc foil, zinc alloy foil can be used as the metal foil.
  • the thickness of the metal foil can be 1 to 10000 ⁇ m, preferably 2 to 5000 ⁇ m, preferably 10 to 1000 ⁇ m, preferably 18 to 500 ⁇ m, preferably 35 to 300 ⁇ m.
  • a resin substrate, an inorganic material, or an organic material plate can be used as the carrier.
  • the thickness of the resin substrate, the inorganic material, or the organic material plate can be the same as the thickness of the metal foil.
  • the ultrathin metal layer may be copper, copper alloy, nickel, nickel alloy, aluminum, aluminum alloy, iron, iron alloy, stainless steel, zinc, zinc alloy. The thickness of the ultrathin metal layer can be in the same range as the ultrathin copper layer of the copper foil with carrier.
  • the ultra-thin metal layer is preferably an ultra-thin copper layer from the viewpoint of conductivity when a circuit is formed.
  • the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface-treated layer is formed, or the circuit is on the surface of the ultrathin copper layer side.
  • Preparing the formed copper foil with a carrier of the present invention Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried; A step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin metal layer side, When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier, Removing the ultrathin metal layer remaining after the metal foil on the resin layer or the carrier of the metal foil with carrier is peeled off, Forming a circuit on the surface of the resin layer from which the metal foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and After forming a circuit on the resin layer, by removing the surface-treated copper foil, or by removing the ultrathin copper layer after peeling the carrier of the copper foil with carrier, the resin layer Exposing the buried circuit.
  • a metal foil having a circuit formed on its surface, or a surface-treated copper foil of the present invention having a circuit formed on the surface on which the surface treatment layer is formed The first surface-treated copper foil, or the metal foil with carrier in which the circuit is formed on the surface of the ultrathin metal layer, or the copper foil with carrier of the present invention in which the circuit is formed on the surface of the ultrathin copper layer
  • Forming a circuit on the resin layer by any one of the methods, After forming a circuit on the resin layer, by removing the metal foil, or by removing the first surface-treated copper foil, or after peeling the carrier of the metal foil with carrier
  • the process of exposing the circuit embedded in the resin layer by removing the ultra-thin copper layer after removing the ultra-thin metal layer or by removing the carrier of the copper foil with the first carrier including.
  • the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface-treated layer is formed, or the circuit is on the surface of the ultrathin copper layer side.
  • Preparing the formed copper foil with a carrier of the present invention Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried; A step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin copper layer side, When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier, Either a semi-additive method, a subtractive method, a partial additive method or a modified semi-additive method using a metal foil on the resin layer or an ultra-thin metal layer remaining after the carrier of the metal foil with carrier is peeled off Forming a circuit on the resin layer by a method, After forming a circuit on the resin layer, by removing the surface-treated copper foil, or by removing the ultrathin copper layer after peeling the carrier of the copper foil with carrier, the resin layer Exposing the buried circuit.
  • a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention, laminating the copper foil with a carrier and an insulating substrate A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and an insulating substrate, etching or plasma using a corrosive solution such as an acid on the exposed ultrathin copper layer by peeling off the carrier
  • a step of removing all by a method such as, a step of providing a through hole or / and a blind via in the resin exposed by removing the ultrathin copper layer by etching, a desmear for a region including the through hole or / and the blind via A region for processing, including the resin and the through-hole or / and blind via
  • a step of preparing a copper foil with a carrier and a resin base material, and laminating the copper foil with a carrier and a resin base material A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and a resin base material, etching using a corrosive solution such as an acid on the ultrathin copper layer exposed by peeling the carrier, Removing all by a method such as plasma to obtain the resin substrate of the present invention, providing an electroless plating layer on the surface of the resin exposed by removing the ultrathin copper layer by etching, the electroless plating Providing a plating resist on the layer, exposing the plating resist, and then removing the plating resist in a region where a circuit is to be formed; A step of providing an electrolytic plating layer in a region where the circuit from which the resist is removed is formed, a step of removing the plating resist, an
  • a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention the copper foil with a carrier and the insulating substrate Laminating the copper foil with carrier and the insulating substrate, then peeling off the carrier of the copper foil with carrier, etching the exposed ultrathin copper layer with a corrosive solution such as an acid.
  • Removing all by a method such as plasma or plasma, providing an electroless plating layer on the surface of the resin exposed by removing the ultrathin copper layer by etching, and providing a plating resist on the electroless plating layer A step of exposing the plating resist, and then removing the plating resist in a region where a circuit is formed, the plating resist.
  • the step of providing an electrolytic plating layer in the region where the removed circuit is formed, the step of removing the plating resist, and flushing the electroless plating layer and the ultrathin copper layer in the region other than the region where the circuit is formed A step of removing by etching or the like.
  • a step of preparing a copper foil with a carrier and a resin base material, and laminating the copper foil with a carrier and a resin base material A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the resin base, a through hole or / and a blind via in the ultrathin copper layer and the resin base exposed by peeling the carrier Providing a surface profile of the resin base material of the present invention by performing a desmear process on the region including the through hole or / and the blind via, and electroless plating layer on the region including the through hole or / and the blind via A step of providing a plating resist on the surface of the ultrathin copper layer exposed by peeling off the carrier After providing said plating resist to form a circuit by electroplating, removing the plating resist, comprising the step of removing the ultra-thin copper layer exposed by removing the plating resist by flash etch
  • a step of preparing the copper foil with carrier and the insulating substrate according to the present invention, the copper foil with carrier and the insulating substrate are prepared.
  • a step of laminating, a step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and an insulating substrate, a through hole or / and a blind via in the ultrathin copper layer and the insulating substrate exposed by peeling the carrier A step of performing a desmear process on the region including the through hole or / and the blind via, a step of providing an electroless plating layer on the region including the through hole or / and the blind via, and an electrode exposed by peeling off the carrier Step of providing a plating resist on the surface of the thin copper layer, after providing the plating resist , Including the step of forming a circuit by electroplating, removing the plating resist, a step of removing by flash etching ultrathin copper layer exposed by removing the plating resist.
  • a step of preparing a copper foil with a carrier and a resin base, the copper foil with a carrier and the resin base A step of laminating, a step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and a resin base material, a step of providing a plating resist on the exposed ultrathin copper layer by peeling off the carrier, Exposing the plating resist, and then removing the plating resist in the region where the circuit is formed; providing an electrolytic plating layer in the region where the circuit where the plating resist is removed; and the plating resist Removing the electroless plating layer and the ultrathin copper layer in a region other than the region where the circuit is formed by flash etching or the like. It comprises obtaining the surface profile of the resin substrate of the present invention.
  • the step of preparing the copper foil with carrier and the insulating substrate according to the present invention, the copper foil with carrier and the insulation A step of laminating the substrate, a step of laminating the carrier-attached copper foil and an insulating substrate, a step of peeling the carrier of the copper foil with carrier, a step of providing a plating resist on the exposed ultrathin copper layer by peeling off the carrier, Exposing the plating resist and then removing the plating resist in a region where a circuit is formed; providing an electrolytic plating layer in a region where the circuit where the plating resist is removed; Step of removing resist, flash etching of electroless plating layer and ultrathin copper layer in regions other than the region where the circuit is formed, etc. Comprising the step of further removing.
  • a step of preparing a copper foil with a carrier and a resin base material a step of laminating the copper foil with a carrier and a resin base material
  • Forming an etching resist on the surface of the ultrathin copper layer exposed by peeling off the carrier Forming a circuit pattern by exposing the photoresist to a circuit pattern, removing the ultrathin copper layer and the catalyst core by a method such as etching or plasma using a corrosive solution such as an acid to form a circuit, A step of removing the etching resist, a solder resist or a plating resist on the surface of the resin substrate exposed by removing the ultrathin copper layer and the catalyst core by a method such as etching using an acid or other corrosive solution or plasma. And a step of providing an electroless plating layer in a region where the solder resist or the plating resist is not provided.
  • a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention laminating the copper foil with a carrier and an insulating substrate
  • a step of performing a desmear process on the region including the through hole or / and the blind via, a step of applying a catalyst nucleus to the region including the through hole or / and the blind via, and an ultrathin copper exposed by peeling off the carrier Providing an etching resist on the layer surface, exposing the etching resist; Forming a circuit pattern; removing the ultrathin copper layer and the catalyst core by a method such as etching or plasma using a corrosive solution such as an acid to form a circuit; removing the etching resist; A step of providing a solder resist or a plating resist on the surface of the insulating substrate exposed by removing the ultrathin copper layer and the catalyst core by a method such as etching using an etching solution such as acid or plasma, and the solder resist or plating. A step of providing an electroless plating layer in a region where no resist is provided.
  • a step of preparing a copper foil with a carrier and a resin base material a step of laminating the copper foil with a carrier and a resin base material
  • the step of providing includes a step of forming a circuit by removing by a method such as etching or plasma using a corrosive solution, and a step of removing the etching resist.
  • a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention laminating the copper foil with a carrier and an insulating substrate
  • a step of preparing a copper foil with a carrier and a resin base material, and laminating the copper foil with a carrier and the resin base material A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the resin base material, a through hole or / and a blind in the ultrathin copper layer and the resin base material exposed by peeling the carrier
  • a step of providing vias a step of obtaining a surface profile of the resin base material of the present invention by performing desmear treatment on the region including the through hole or / and the blind via, and electroless plating on the region including the through hole or / and the blind via.
  • a step of providing a layer, a step of forming a mask on the surface of the electroless plating layer, and the electroless where the mask is not formed A step of providing an electrolytic plating layer on the surface of the plating layer, a step of providing an etching resist on the surface of the electrolytic plating layer or / and the ultrathin copper layer, a step of exposing the etching resist to form a circuit pattern, The method includes forming the circuit by removing the ultrathin copper layer and the electroless plating layer by a method such as etching or plasma using a corrosive solution such as an acid, and removing the etching resist.
  • a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention the copper foil with a carrier and the insulating substrate Laminating the carrier-attached copper foil and the insulating substrate, then peeling the carrier of the carrier-attached copper foil, peeling the carrier and exposing the ultrathin copper layer and the insulating substrate through holes or / and blinds
  • a step of providing an etching resist on the surface of the electrolytic plating layer or / and the ultrathin copper layer, a step of exposing the etching resist to form a circuit pattern, the ultrathin copper layer and the electroless plating includes a step of forming a circuit by removing the layer by a method such as etching or plasma using a corrosive solution such as an acid, and a step of removing the etching resist.
  • ⁇ Through holes and / or blind vias and subsequent desmear steps may not be performed.
  • Step 1 First, a copper foil with a carrier (first layer) having an ultrathin copper layer with a roughened layer formed on the surface is prepared.
  • Step 2 Next, a resist is applied on the roughened layer of the ultrathin copper layer, exposed and developed, and the resist is etched into a predetermined shape.
  • Step 3 Next, after circuit plating is formed, the resist is removed to form circuit plating having a predetermined shape.
  • Step 4 Next, an embedding resin is provided on the ultrathin copper layer so as to cover the circuit plating (so that the circuit plating is buried), a resin layer is laminated, and then another copper foil with a carrier (second layer) ) Is bonded from the ultrathin copper layer side.
  • Process 5 Next, a carrier is peeled off from the copper foil with a carrier of the 2nd layer. Note that a copper foil having no carrier may be used for the second layer.
  • Step 6 Next, laser drilling is performed at predetermined positions of the second ultrathin copper layer or copper foil and resin layer to expose the circuit plating and form blind vias.
  • Step 7 Next, copper is embedded in the blind via to form a via fill.
  • Step 8 Next, circuit plating is formed on the via fill as in steps 2 and 3 above.
  • Process 9 Next, a carrier is peeled off from the copper foil with a carrier of the 1st layer.
  • Step 10 Next, ultra-thin copper layers (copper foil when a copper foil is provided as the second layer) on both surfaces are removed by flash etching, and the surface of the circuit plating in the resin layer is exposed.
  • Step 11 Next, bumps are formed on the circuit plating in the resin layer, and copper pillars are formed on the solder.
  • the printed wiring board using the copper foil with a carrier of this invention is produced.
  • the other carrier-attached copper foil may be the carrier-attached copper foil of the present invention, a conventional carrier-attached copper foil, or a normal copper foil.
  • one or more circuits may be formed on the second-layer circuit in Step 8, and the circuit formation may be performed by any of the semi-additive method, subtractive method, partly additive method, or modified semi-additive method. It may be performed by any method.
  • the circuit plating is embedded in the resin layer, for example, when the ultrathin copper layer is removed by flash etching as in Step 10, the circuit is formed.
  • the plating is protected by the resin layer, and its shape is maintained, thereby facilitating the formation of a fine circuit.
  • the circuit plating is protected by the resin layer, the migration resistance is improved, and the continuity of the circuit wiring is satisfactorily suppressed. For this reason, formation of a fine circuit becomes easy.
  • the ultrathin copper layer is removed by flash etching as shown in Step 10 and Step 11
  • the exposed surface of the circuit plating has a shape recessed from the resin layer, so that bumps are further formed on the circuit plating.
  • the production efficiency is improved.
  • a known resin or prepreg can be used as the embedding resin (resin).
  • a prepreg that is a glass cloth impregnated with BT (bismaleimide triazine) resin or BT resin, an ABF film or ABF manufactured by Ajinomoto Fine Techno Co., Ltd. can be used.
  • the resin layer and / or resin and / or prepreg as described in this specification can be used for the embedding resin (resin).
  • the carrier-attached copper foil used in the first layer may have a substrate or a resin layer on the surface of the carrier-attached copper foil.
  • substrate or resin layer By having the said board
  • any substrate or resin layer can be used as long as it has an effect of supporting the copper foil with carrier used in the first layer.
  • a printed circuit board is completed by mounting electronic components on the printed wiring board.
  • the “printed wiring board” includes a printed wiring board, a printed circuit board, and a printed board on which electronic parts are mounted as described above.
  • an electronic device may be manufactured using the printed wiring board, an electronic device may be manufactured using a printed circuit board on which the electronic components are mounted, and a print on which the electronic components are mounted.
  • An electronic device may be manufactured using a substrate.
  • the surface profile of the resin base material formed using copper foil and the one formed using a chemical solution were prepared as follows.
  • FIG. 2 shows a sample production flow for obtaining data of examples and comparative examples.
  • Examples A1 to A11 and Comparative Examples A1 to A4 and as copper foils for producing the substrate surface profiles of Examples B1 to B8, Examples B10 to B12 and Comparative Examples B1 to B4, the following copper foils are used.
  • a bulk layer (raw foil) was prepared.
  • Double-sided flat electrolytic green foil Copper concentration 80-120 g / L, sulfuric acid concentration 80-120 g / L, chloride ion concentration 30-100 ppm, leveling agent 1 (bis (3sulfopropyl) disulfide): 10-30 ppm, leveling agent 2 (Amine compound): The linear velocity of the electrolyte flowing between the anode and the cathode (electrodeposition metal drum for copper foil) using a copper sulfate electrolyte of 10 to 30 ppm and an electrolyte temperature of 57 to 62 ° C.
  • R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.
  • a double-sided flat electrolytic raw foil having a thickness of 18 ⁇ m was produced under the above-mentioned double-sided flat electrolytic raw foil manufacturing conditions.
  • a peeling layer and an ultrathin copper layer were formed by the following method to obtain an ultrathin copper foil with a carrier having a thickness of 1.5, 2, 3, 5 ⁇ m.
  • Ni layer (peeling layer: base plating 1) An Ni layer having an adhesion amount of 1000 ⁇ g / dm 2 was formed on the S surface of the copper foil carrier by electroplating with a roll-to-roll type continuous plating line under the following conditions. Specific plating conditions are described below.
  • Nickel sulfate 270 to 280 g / L Nickel chloride: 35 to 45 g / L Nickel acetate: 10-20g / L Boric acid: 30-40g / L Brightener: Saccharin, butynediol, etc.
  • Sodium dodecyl sulfate 55-75 ppm pH: 4-6 Bath temperature: 55-65 ° C Current density: 10 A / dm 2
  • R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.
  • each of roughening treatment, barrier treatment, rust prevention treatment, and silane coupling material application is applied to the M (matte surface) or S surface (shiny surface) which is the surface of the green foil bonded to the resin base material.
  • the surface treatment was applied in this order.
  • Each processing condition is shown below.
  • Co-Ni plating was performed on the M surface of the double-sided flat copper foil subjected to the roughening treatment under the above conditions and the surface of the ultrathin copper foil with carrier.
  • the covering plating conditions are described below.
  • the surface of the ultrathin copper foil with carrier on which the primary roughened particles are formed under the above conditions is covered with a copper electrolytic bath composed of sulfuric acid and copper sulfate to prevent the primary roughened particles from falling off and improve the peel strength. Went.
  • the covering plating conditions are described below.
  • Current density 41 A / dm 2
  • Co—Ni covering plating was performed on the surface of the ultrathin copper foil with a carrier that was subjected to the secondary particle roughening treatment under the above conditions.
  • the covering plating conditions are described below.
  • the surface of the ultrathin copper foil with carrier on which the primary roughened particles are formed under the above conditions is covered with a copper electrolytic bath composed of sulfuric acid and copper sulfate to prevent the primary roughened particles from falling off and improve the peel strength. Went.
  • the covering plating conditions are described below.
  • Current density 41 A / dm 2
  • Co—Ni covering plating was performed on the surface of the ultrathin copper foil with a carrier that was subjected to the secondary particle roughening treatment under the above conditions.
  • the covering plating conditions are described below.
  • the surface of the ultrathin copper foil with carrier on which the primary roughened particles are formed under the above conditions is covered with a copper electrolytic bath composed of sulfuric acid and copper sulfate to prevent the primary roughened particles from falling off and improve the peel strength. Went.
  • the covering plating conditions are described below.
  • Current density 41 A / dm 2
  • Co—Ni covering plating was performed on the surface of the ultrathin copper foil with a carrier that was subjected to the secondary particle roughening treatment under the above conditions.
  • the covering plating conditions are described below.
  • a barrier (heat resistant) treatment was performed under the following conditions to form a brass plating layer or a zinc / nickel alloy plating layer.
  • Example A6 Comparative Examples A2 and A3, Example B6, and Comparative Examples B2 and B3: Current density using brass plating bath with copper concentration 50-80g / L, zinc concentration 2-10g / L, sodium hydroxide concentration 50-80g / L, sodium cyanide concentration 5-30g / L, temperature 60-90 ° C A plating electric quantity of 30 As / dm 2 was applied to the M surface on which the roughening treatment layer was formed at 5 to 10 A / dm 2 (multistage treatment).
  • Example A3, Comparative Example A1, Example B3, and Comparative Example B1 Ni: 10 g / L to 30 g / L, Zn: 1 g / L to 15 g / L, sulfuric acid (H 2 SO 4 ): 1 g / L to 12 g / L, chloride ion: 0 g / L to 5 g / L
  • a plating electric quantity of 5.5 As / dm 2 was applied to the M surface on which the roughening treatment layer was formed at a current density of 1.3 A / dm 2 .
  • Rust prevention treatment (chromate treatment) was performed under the following conditions to form a rust prevention treatment layer. (Chromate conditions) CrO 3 : 2.5 g / L, Zn: 0.7 g / L, Na 2 SO 4 : 10 g / L, pH 4.8, an electric quantity of 0.7 As / dm 2 in a chromate bath at 54 ° C. Addition. Furthermore, immediately after completion of the rust prevention treatment in the chromate bath, the entire roughened surface was showered using the same chromate bath using a liquid shower pipe.
  • silane coupling material application A silane coupling material coating treatment was performed by spraying a solution having a pH of 7 to 8 containing 0.2 to 2% of alkoxysilane on the roughened surface of the copper foil.
  • Example A8 and Example B8 the resin layer was formed on the following conditions after the antirust process and the silane coupling material application
  • (Resin synthesis example) To a 2-liter three-necked flask equipped with a stainless steel vertical stirring bar, a trap equipped with a nitrogen inlet tube and a stopcock, and a reflux condenser equipped with a ball cooling tube, 3,4, 3 ', 117.68 g (400 mmol) of 4′-biphenyltetracarboxylic dianhydride, 87.7 g (300 mmol) of 1,3-bis (3-aminophenoxy) benzene, 4.0 g (40 mmol) of ⁇ -valerolactone, 4.
  • NMP N-methyl-2-pyrrolidone
  • toluene 20 g were added, heated at 180 ° C. for 1 hour, cooled to near room temperature, then 3, 4, 3 ′, 4′- Add 29.42 g (100 mmol) of biphenyltetracarboxylic dianhydride, 82.12 g (200 mmol) of 2,2-bis ⁇ 4- (4-aminophenoxy) phenyl ⁇ propane, 200 g of NMP, and 40 g of toluene.
  • NMP N-methyl-2-pyrrolidone
  • the block copolymerized polyimide solution obtained in the synthesis example was further diluted with NMP to obtain a block copolymerized polyimide solution having a solid content of 10%.
  • bis (4-maleimidophenyl) methane BMI-H, Silica Chemical
  • a resin solution was prepared by dissolving and mixing at 60 ° C. for 20 minutes.
  • Example A8 and Example B8 the resin solution was applied to the ultrathin copper surface of the copper foil using a reverse roll coating machine, and the resultant was subjected to 3 minutes at 160 ° C. for 3 minutes at 120 ° C. in a nitrogen atmosphere. After a drying treatment for 5 minutes, a heat treatment was finally performed at 300 ° C. for 2 minutes to produce a copper foil provided with a resin layer. The thickness of the resin layer was 2 ⁇ m.
  • ⁇ Roughness Sz> Surface treatment layer side surface of copper foil with surface treatment and copper foil with carrier using Olympus laser microscope (test machine: OLYMPUS LEXT OLS 4000, resolution: XY-0.12 ⁇ m, Z-0.0 ⁇ m, cutoff: none)
  • the surface roughness (maximum surface height) Sz was measured in accordance with ISO25178.
  • the measurement area of the observation part was 66524 ⁇ m 2 .
  • About the copper foil after the surface treatment of each example and comparative example, using an Olympus laser microscope (tester: OLYMPUS LEXT OLS 4000, resolution: XY-0.12 ⁇ m, Z-0.0 ⁇ m, cut-off: none), A three-dimensional surface area B in an area equivalent to 256 ⁇ m ⁇ 256 ⁇ m (surface area obtained when viewed in plan) A (66,524 ⁇ m 2 in actual data) is measured, and three-dimensional surface area B ⁇ two-dimensional surface area A area ratio (B / Calculation was performed by the method A).
  • the measurement environment temperature of the three-dimensional surface area B with a laser microscope was 23 to 25 ° C.
  • the following resin base material having a 20 cm square size is prepared, and the surface having the surface treatment layer of the copper foil is prepared with the resin base material and the copper foil.
  • the laminate was pressed so as to contact the resin substrate.
  • the substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press. Resin used: Mitsubishi Gas Chemical Company, Inc. GHPL-830MBT
  • the surface-treated copper foil on the resin substrate was removed by whole surface etching under the following etching conditions. Moreover, about the copper foil with a carrier on a resin base material, after peeling a carrier, the ultra-thin copper layer was removed by the whole surface etching on the following etching conditions. Note that “entire surface etching” means that etching is performed until the copper foil is completely removed by a thickness and the resin is exposed on the entire surface. (Etching conditions) Etching solution: cupric chloride solution, HCl concentration: 3.5 mol / L, temperature: 50 ° C., CuCl 2 concentration adjusted so as to have a specific gravity of 1.26
  • Desmear treatment liquid 40 g / L KMnO 4 , 20 g / L NaOH ⁇ Processing temperature: Room temperature ⁇ Immersion time: 20 minutes ⁇ Rotating speed of stirring bar: 300 rpm
  • Desmear treatment solution 90 g / L KMnO 4 , 5 g / L HCl ⁇ Processing temperature: 49 °C ⁇ Immersion time: 20 minutes ⁇ Stirrer rotation speed: 300 rpm (Neutralization conditions) ⁇ Neutralization treatment liquid: L-ascorbic acid 80g / L ⁇ Processing temperature: Room temperature ⁇ Immersion time: 3 minutes ⁇ No stirring
  • Comparative Example B6 two sheets of a resin base material GHPL-830MBT made by Mitsubishi Gas Chemical Company with a thickness of 100 ⁇ m were prepared.
  • the two resin base materials were overlapped, and a release layer film was bonded to both sides of the two resin base materials, followed by lamination pressing.
  • the substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press.
  • the release layer film was peeled from the resin substrate, and desmear treatments A and B and neutralization treatment were performed under the following immersion treatment conditions to form a surface profile of the resin substrate.
  • Desmear treatment liquid 40 g / L KMnO 4 , 20 g / L NaOH ⁇ Processing temperature: Room temperature ⁇ Immersion time: 20 minutes ⁇ Rotating speed of stirring bar: 300 rpm
  • Desmear treatment solution 90 g / L KMnO 4 , 5 g / L HCl ⁇ Processing temperature: 49 °C ⁇ Immersion time: 30 minutes ⁇ Rotating speed of stirrer: 300 rpm (Neutralization conditions) ⁇ Neutralization treatment liquid: L-ascorbic acid 80g / L ⁇ Processing temperature: Room temperature ⁇ Immersion time: 3 minutes ⁇ No stirring
  • Example B9 two sheets of a resin base material GHPL-830MBT manufactured by Mitsubishi Gas Chemical Company with a thickness of 100 ⁇ m were prepared.
  • the two resin base materials were overlapped, and a release layer film was bonded to both sides of the two resin base materials, followed by lamination pressing.
  • the substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press.
  • the release layer film is peeled from the resin substrate, and the surface profile of the resin substrate is formed by performing shower treatments A and B and neutralization treatment on the resin substrate surface under the following processing conditions. did.
  • the acceleration voltage was set to 15 kV using the scanning electron microscope (SEM), and photography was performed. Note that the contrast and brightness were adjusted so that the outline of the hole in the entire observation field could be clearly seen when taking a picture.
  • the photo was taken while the whole photo was not white or black and the outline of the hole could be observed. If the photo was taken in a state where the entire photo was not white or black and the outline of the hole could be observed, the black area ratio (%) in the photo would be almost the same value.
  • the photograph SEM image (30k times (30000 times)) was subjected to white / black image processing using Photoshop 7.0 software, and the black area ratio (%) was obtained.
  • the black area ratio (%) is the ratio of the black area to the observation area (the total area of the white area and the black area) when the “image” “histogram” in Photoshop 7.0 is selected and the threshold value is 128. did.
  • Electroless copper plating was performed under the following conditions using a catalyst for depositing electroless copper on the etched surface of a resin base material (entire etching base material) and a KAP-8 bath manufactured by Kanto Kasei.
  • the thickness of the obtained electroless copper plating was 0.5 ⁇ m.
  • electrolytic plating was further performed on the electroless copper plating using the following electrolytic solution.
  • the copper thickness (total thickness of electroless plating and electrolytic plating) was 12 ⁇ m.
  • Simple copper sulfate electrolyte Cu concentration: 100 g / L, H 2 SO 4 concentration: 80 g / L
  • a copper circuit having a width of 10 mm was prepared by wet etching on a laminated board with plated copper having electroless copper plating and electrolytic copper plating applied to the resin base material (entire etching base material) to a copper layer thickness of 12 ⁇ m.
  • JIS-C-6481 the strength when the copper circuit was peeled at 90 degrees was measured to obtain the peel strength.
  • the plated copper is processed by etching on the laminated board with plated copper, in which the electroless copper plating and the electrolytic copper plating are applied to the resin base material (entire etching base material) and the copper layer thickness is 12 ⁇ m.
  • / S (space) 15 ⁇ m / 15 ⁇ m and 10 ⁇ m / 10 ⁇ m circuits were formed.
  • the fine wiring formed on the resin substrate was visually observed, and it was determined as OK ( ⁇ ) if there was no peeling of the circuit, shorting between the circuits (abnormal copper deposition between the circuits), and chipping of the circuit.
  • Tables 1 and 4 show the substrate surface profiles of Examples A1 to A11, Comparative Examples A1 to A4, Examples B1 to B12, and Comparative Examples B1 to B4 by transferring the copper foil surface profile to the substrate surface as described above. The manufacturing conditions of the copper foil used in order to obtain are shown.
  • Tables 2 and 5 show the evaluation results of the substrate surface profile described above.
  • Tables 3 and 6 show the evaluation results of the above-described copper foil surface profile that gives the substrate surface profile.
  • Examples A1 to A11 all had good fine wiring formability and further showed good peel strength.
  • the surface roughness Sz of the surface treatment layer surface was outside the range of 2 to 6 ⁇ m, so the surface roughness Sz was outside the range of 1 to 5 ⁇ m in the surface profile of the base material.
  • the fine wiring formability or peel strength was poor.
  • the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface treatment layer surface was In the surface profile of the material, the ratio B / A was outside the range of 1.01 to 1.5, and the fine wiring formability or peel strength was poor.
  • the surface profiles of the base materials of Comparative Examples A1 to A4 are all outside the range of the surface black area ratio of 10 to 50%, and the average diameter of the surface holes is 0.03 to 1.0 ⁇ m. Thus, the fine wiring formability or peel strength was poor.
  • the numerical values of Rz on the copper foil surface and the post-etching substrate surface are not particularly relevant for having good fine wiring formability and peel strength. confirmed.
  • All of the base materials of Examples B1 to B12 had good fine wiring formability and further showed good peel strength.
  • the base materials of Comparative Examples B1 to B6 all had a surface roughness Sz outside the range of 1 to 5 ⁇ m, so that the fine wiring formability or peel strength was poor.
  • the base materials of Comparative Examples B1 to B4 were all out of the range of 1.01 to 1.5, the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A, the fine wiring formability Or the peel strength was poor.
  • the base materials of Comparative Examples B1 to B6 all had a surface black area ratio of 10 to 50% and a surface hole average diameter value of 0.03 to 1.0 ⁇ m, or both were out of range.
  • 3 (a), (b), (c), (d), and (e) show SEM images ( ⁇ 30000) of the copper foil treated surfaces of Examples A1, A2, A3, A5, and A6, respectively.
  • 4 (f) and 4 (g) show SEM images ( ⁇ 6000) of the copper foil treated surfaces of Comparative Examples A1 and A2, respectively.
  • 5 (h), (i), (j), (k), and (l) are shown in Examples A1 (B1), A2 (B2), A3 (B3), A5 (B5), and A6 (B6), respectively.
  • the SEM image (x30000) of the resin base material surface of is shown.
  • 6 (m) and (n) show SEM images ( ⁇ 6000) of the resin base material surfaces of Comparative Examples A1 (B1) and A2 (B2), respectively.

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Abstract

Provided is a treated surface copper foil capable of rendering a post-copper foil removal substrate surface profile that achieves favorable electroless copper plating film adhesion strength while maintaining the ability to form microwiring. Also provided is a resin substrate with a surface profile that achieves favorable electroless copper plating film adhesion strength while maintaining the ability to form microwiring. For this treated surface copper foil in which a treated surface layer is formed on a copper foil, the surface roughness (Sz) of the surface of the treated surface layer is 2 - 6 µm.

Description

表面処理銅箔、キャリア付銅箔、基材、樹脂基材、プリント配線板、銅張積層板及びプリント配線板の製造方法Surface-treated copper foil, copper foil with carrier, substrate, resin substrate, printed wiring board, copper-clad laminate, and printed wiring board manufacturing method
　本発明は、表面処理銅箔、キャリア付銅箔、基材、樹脂基材、プリント配線板、銅張積層板及びプリント配線板の製造方法に関する。 The present invention relates to a surface-treated copper foil, a copper foil with a carrier, a base material, a resin base material, a printed wiring board, a copper-clad laminate, and a printed wiring board manufacturing method.
　半導体パッケージ基板及びプリント配線基板の回路形成工法はサブトラクティブ工法が主流である。しかしながら、近年、半導体の高集積化に伴い、それに使用される半導体パッケージ基板、プリント配線基板の回路の微細化が進展し、サブトラクティブ工法での微細回路形成が困難となりつつある。 The subtractive method is the mainstream for circuit formation methods for semiconductor package substrates and printed wiring boards. However, in recent years, with higher integration of semiconductors, miniaturization of circuits of semiconductor package substrates and printed wiring boards used therein has progressed, and it has become difficult to form microcircuits by a subtractive method.
　更なる微細配線化への対応として、極薄銅箔を給電層としてパターン銅めっきを施し、最後に極薄銅層をフラッシュエッチングにより除去し配線形成する回路形成工法(1)、プリプレグやビルドアップフィルムを真空プレス等で硬化させ、その表面を粗面化し、基材面に適切な凹凸を形成させることで、信頼性のある微細配線を形成する回路形成工法(2)、銅箔表面プロファイルを基材表面に転写させ、基材表面に適切な凹凸を形成させることで、信頼性のある微細配線を形成する回路形成工法(3)が注目されている。これらの工法は一般的にSAP工法（セミアディティブ工法）と呼ばれる。 As a countermeasure for further miniaturization, circuit formation method (1), prepreg and build-up is performed by pattern copper plating using ultra-thin copper foil as a power feeding layer and finally removing the ultra-thin copper layer by flash etching. Circuit formation method (2), copper foil surface profile that forms reliable fine wiring by curing the film with a vacuum press etc., roughening the surface and forming appropriate irregularities on the substrate surface A circuit forming method (3) that forms a reliable fine wiring by transferring to a substrate surface and forming appropriate irregularities on the substrate surface has attracted attention. These methods are generally called the SAP method (semi-additive method).
　銅箔表面のプロファイルを用いたSAP工法は、例えば特許文献１に記載されている。このような銅箔表面のプロファイルを用いた典型的なSAP工法の例としては、次が挙げられる。すなわち、樹脂に積層した銅箔を全面エッチングし、エッチング基材面を穴開けし、穴開け部及び基材の全面或いは一部にデスミア処理を施し、穴開け部のエッチング面にドライフィルムを貼付し、回路を形成しない部分のドライフィルムを露光・現像し、ドライフィルム不要部を薬液で除去し、ドライフィルムの被覆されていない銅箔表面プロファイルが転写したエッチング基材面に無電解銅めっき、電気銅めっきを施し、最終的に無電解銅めっき層をフラッシュエッチングにより除去して微細配線を形成するというものである。 An SAP method using a copper foil surface profile is described in Patent Document 1, for example. The following is mentioned as an example of the typical SAP method using the profile of such copper foil surface. That is, the entire surface of the copper foil laminated on the resin is etched, the etched substrate surface is perforated, the desmear treatment is applied to the entire surface or part of the perforated portion and the substrate, and the dry film is applied to the etched surface of the perforated portion. Then, the portion of the dry film that does not form a circuit is exposed and developed, the unnecessary portion of the dry film is removed with a chemical solution, and the electroless copper plating is applied to the etching substrate surface to which the copper foil surface profile not covered with the dry film is transferred. Electro copper plating is performed, and finally the electroless copper plating layer is removed by flash etching to form fine wiring.
特開２００６－１９６８６３号公報JP 2006-196863 A
　微細配線形成のためには、基材表面のプロファイルが小さく平滑な方が好ましいが、この場合、無電解銅めっき皮膜の密着力が弱くなり、半導体パッケージ基板或いはプリント配線板に求められる信頼性を損なう恐れがある。一方で、無電解銅めっき皮膜の密着力を確保するためには、基材表面のプロファイルが大きい方が好ましいが、この場合、微細配線形成性が損なわれる恐れがある。 For fine wiring formation, it is preferable that the profile of the substrate surface is small and smooth, but in this case, the adhesion of the electroless copper plating film is weakened, and the reliability required for the semiconductor package substrate or printed wiring board is reduced. There is a risk of damage. On the other hand, in order to ensure the adhesion of the electroless copper plating film, it is preferable that the profile of the base material surface is large. However, in this case, the fine wiring formability may be impaired.
　これらの点に関して、従来技術では十分な検討がなされておらず、未だ改善の余地が残されている。そこで、本発明は、微細配線形成性を維持し、且つ、無電解銅めっき皮膜の良好な密着力を実現する、銅箔除去後基材面のプロファイル形状を与えることができる表面処理銅箔、及び／又は、表面のプロファイル形状を備える樹脂基材を提供することを課題とする。 These points have not been fully studied in the prior art, and there is still room for improvement. Therefore, the present invention is a surface-treated copper foil that can provide a profile shape of the substrate surface after removing the copper foil, which maintains fine wiring formability and realizes good adhesion of the electroless copper plating film, Another object of the present invention is to provide a resin substrate having a profile shape on the surface.
　上記目的を達成するため、本発明者らは鋭意研究を重ねたところ、表面処理層表面の面粗さ（表面の最大高さ）Ｓｚが所定範囲に制御された表面処理銅箔を用い、回路を形成する基材上に当該表面処理銅箔を貼り合わせた後、除去することで、微細配線形成性を維持し、且つ、無電解銅めっき皮膜の良好な密着力を実現する銅箔除去後基材面のプロファイル形状を与えることができることを見出した。また、表面の面粗さ（表面の最大高さ）Ｓｚが所定範囲に制御された樹脂基材を用いることで、樹脂基材表面に回路を形成する際の、微細配線形成性を維持し、且つ、無電解銅めっき皮膜の良好な密着力を実現することができることを見出した。 In order to achieve the above-mentioned object, the present inventors have conducted intensive research and found that a surface-treated copper foil in which the surface roughness (maximum surface height) Sz of the surface-treated layer was controlled within a predetermined range was used. After bonding the surface-treated copper foil on the base material forming the copper foil after removing the copper foil to maintain fine wiring formability and realize good adhesion of the electroless copper plating film It has been found that the profile shape of the substrate surface can be provided. In addition, by using a resin base material whose surface roughness (maximum surface height) Sz is controlled within a predetermined range, it is possible to maintain fine wiring formability when forming a circuit on the resin base material surface, And it discovered that the favorable adhesive force of the electroless copper plating film | membrane was realizable.
　本発明は上記知見を基礎として完成したものであり、一側面において、銅箔上に表面処理層が形成された表面処理銅箔であり、前記表面処理層表面の面粗さＳｚが２～６μｍである表面処理銅箔である。 The present invention has been completed based on the above knowledge, and in one aspect, is a surface-treated copper foil in which a surface-treated layer is formed on a copper foil, and the surface roughness Sz of the surface-treated layer surface is 2 to 6 μm. This is a surface-treated copper foil.
　本発明の表面処理銅箔は一実施形態において、銅箔上に表面処理層が形成された表面処理銅箔であり、前記表面処理層表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８である。 In one embodiment, the surface-treated copper foil of the present invention is a surface-treated copper foil in which a surface-treated layer is formed on a copper foil, and the ratio B between the three-dimensional surface area B and the two-dimensional surface area A of the surface-treated layer surface. / A is 1.05 to 1.8.
　本発明の表面処理銅箔は別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の面粗さＳｚが１～５μｍとなる。 In another embodiment of the surface-treated copper foil of the present invention, when the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the copper foil of the resin base material The surface roughness Sz of the removal side surface is 1 to 5 μm.
　本発明の表面処理銅箔は更に別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる。 In still another embodiment, the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed. The ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the foil removal side surface is 1.01 to 1.5.
　本発明の表面処理銅箔は更に別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる。 In still another embodiment, the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed. The black area ratio on the foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface of the resin substrate is 0.03 to 1.0 μm.
　本発明の表面処理銅箔は別の一側面において、銅箔上に表面処理層が形成された表面処理銅箔であり、前記表面処理層表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８である表面処理銅箔である。 In another aspect, the surface-treated copper foil of the present invention is a surface-treated copper foil in which a surface-treated layer is formed on the copper foil, and the ratio of the three-dimensional surface area B and the two-dimensional surface area A of the surface-treated layer surface. A surface-treated copper foil having a B / A of 1.05 to 1.8.
　本発明の表面処理銅箔は更に別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の面粗さＳｚが１～５μｍとなる。 In still another embodiment, the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed. The surface roughness Sz on the foil removal side surface is 1 to 5 μm.
　本発明の表面処理銅箔は更に別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる。 In still another embodiment, the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed. The ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the foil removal side surface is 1.01 to 1.5.
　本発明の表面処理銅箔は更に別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる。 In still another embodiment, the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed. The black area ratio on the foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface of the resin substrate is 0.03 to 1.0 μm.
　本発明の表面処理銅箔は更に別の一側面において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の面粗さＳｚが１～５μｍとなる表面処理銅箔である。 In another aspect of the surface-treated copper foil of the present invention, when the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the copper foil of the resin substrate The surface-treated copper foil has a surface roughness Sz of 1 to 5 μm on the removal side surface.
　本発明の表面処理銅箔は更に別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる。 In still another embodiment, the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed. The ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the foil removal side surface is 1.01 to 1.5.
　本発明の表面処理銅箔は更に別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる。 In still another embodiment, the surface-treated copper foil of the present invention is bonded to the resin base material from the surface-treated layer side, and the surface-treated copper foil is removed when the surface-treated copper foil is removed. The black area ratio on the foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface of the resin substrate is 0.03 to 1.0 μm.
　本発明は更に別の一側面において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる表面処理銅箔である。 In yet another aspect of the present invention, when the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the surface of the copper base material on the copper foil removal side is tertiary. The surface-treated copper foil has a ratio B / A between the original surface area B and the two-dimensional surface area A of 1.01 to 1.5.
　本発明は更に別の一実施形態において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる。 In still another embodiment of the present invention, when the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the surface of the copper foil removal side surface of the resin base material is removed. The black area ratio is 10 to 50%, and the average diameter value of the holes on the copper foil removal side surface of the resin base material is 0.03 to 1.0 μm.
　本発明は更に別の一側面において、表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる表面処理銅箔である。 According to another aspect of the present invention, when the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the surface of the resin base material on the copper foil removal side surface is black. The surface-treated copper foil has an area ratio of 10 to 50% and an average diameter of holes on the copper foil removal side surface of the resin base material of 0.03 to 1.0 μm.
　本発明の表面処理銅箔は更に別の一実施形態において、前記表面処理層が粗化処理層である。 In another embodiment of the surface-treated copper foil of the present invention, the surface-treated layer is a roughened layer.
　本発明の表面処理銅箔は更に別の一実施形態において、前記粗化処理層が、銅、ニッケル、コバルト、リン、タングステン、ヒ素、モリブデン、クロム及び亜鉛からなる群から選択されたいずれかの単体又はいずれか１種以上を含む合金からなる層である。 In another embodiment of the surface-treated copper foil of the present invention, the roughening layer is any one selected from the group consisting of copper, nickel, cobalt, phosphorus, tungsten, arsenic, molybdenum, chromium, and zinc. It is a layer made of a single substance or an alloy containing one or more of them.
　本発明の表面処理銅箔は更に別の一実施形態において、前記粗化処理層の表面に、耐熱層、防錆層、クロメート処理層及びシランカップリング処理層からなる群から選択された１種以上の層を有する。 In yet another embodiment, the surface-treated copper foil of the present invention is one type selected from the group consisting of a heat-resistant layer, a rust-proof layer, a chromate-treated layer, and a silane coupling-treated layer on the surface of the roughened layer. It has the above layers.
　本発明の表面処理銅箔は更に別の一実施形態において、前記表面処理層が、粗化処理層、耐熱層、防錆層、クロメート処理層及びシランカップリング処理層からなる群から選択された１種以上の層である。 In another embodiment of the surface-treated copper foil of the present invention, the surface-treated layer is selected from the group consisting of a roughened layer, a heat-resistant layer, a rust-proof layer, a chromate-treated layer, and a silane coupling-treated layer. One or more layers.
　本発明の表面処理銅箔は更に別の一実施形態において、前記表面処理層上に樹脂層を備える。 In yet another embodiment, the surface-treated copper foil of the present invention includes a resin layer on the surface-treated layer.
　本発明は更に別の一側面において、キャリア、中間層及び極薄銅層をこの順に備えたキャリア付銅箔であって、前記極薄銅層が本発明の表面処理銅箔であるキャリア付銅箔である。 In another aspect of the present invention, a carrier-attached copper foil comprising a carrier, an intermediate layer, and an ultrathin copper layer in this order, wherein the ultrathin copper layer is the surface-treated copper foil of the present invention. It is a foil.
　本発明のキャリア付銅箔は一実施形態において、前記キャリアの両面に前記極薄銅層を備える。 In one embodiment, the copper foil with a carrier of the present invention includes the ultrathin copper layer on both sides of the carrier.
　本発明のキャリア付銅箔は別の一実施形態において、前記キャリアの前記極薄銅層とは反対側に粗化処理層を備える。 In another embodiment, the copper foil with a carrier of the present invention includes a roughening layer on the opposite side of the carrier from the ultrathin copper layer.
　本発明は更に別の一側面において、本発明の表面処理銅箔を表面処理層側から基材に貼り合わせ、前記表面処理銅箔を除去した基材であり、前記銅箔除去側表面の面粗さＳｚが１～５μｍである基材である。 In yet another aspect of the present invention, the surface-treated copper foil of the present invention is bonded to a substrate from the surface-treated layer side and the surface-treated copper foil is removed, and the surface of the copper foil-removed side surface The base material has a roughness Sz of 1 to 5 μm.
　本発明は更に別の一側面において、本発明のキャリア付銅箔を極薄銅層側から基材に貼り合わせ、前記キャリアを前記キャリア付銅箔から除去した後に、前記表面処理銅箔である前記極薄銅層を除去した基材であり、前記銅箔除去側表面の面粗さＳｚが１～５μｍである基材である。 In yet another aspect of the present invention, the copper foil with a carrier of the present invention is bonded to a substrate from the ultrathin copper layer side, and after removing the carrier from the copper foil with a carrier, the surface-treated copper foil. It is a base material from which the ultrathin copper layer is removed, and a surface roughness Sz on the copper foil removal side surface is 1 to 5 μm.
　本発明は更に別の一側面において、本発明の表面処理銅箔を表面処理層側から基材に貼り合わせ、前記表面処理銅箔を除去した基材であり、前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５である。 In yet another aspect of the present invention, the surface-treated copper foil of the present invention is bonded to a base material from the surface-treated layer side, and the surface-treated copper foil is removed. The ratio B / A between the original surface area B and the two-dimensional surface area A is 1.01 to 1.5.
　本発明は更に別の一側面において、本発明のキャリア付銅箔を極薄銅層側から基材に貼り合わせ、前記キャリアを前記キャリア付銅箔から除去した後に、前記表面処理銅箔である前記極薄銅層を除去した基材であり、前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５である基材である。 In yet another aspect of the present invention, the copper foil with a carrier of the present invention is bonded to a substrate from the ultrathin copper layer side, and after removing the carrier from the copper foil with a carrier, the surface-treated copper foil. The base material from which the ultrathin copper layer has been removed, and the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the copper foil removal side surface is 1.01 to 1.5.
　本発明は更に別の一側面において、本発明の表面処理銅箔を表面処理層側から基材に貼り合わせ、前記表面処理銅箔を除去した基材であり、前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍである基材である。 In yet another aspect of the present invention, the surface-treated copper foil of the present invention is bonded to the base material from the surface-treated layer side, and the surface-treated copper foil is removed. The base material has an area ratio of 10 to 50% and an average diameter of holes on the copper foil removal side surface of 0.03 to 1.0 μm.
　本発明は更に別の一側面において、本発明のキャリア付銅箔を極薄銅層側から基材に貼り合わせ、前記キャリアを前記キャリア付銅箔から除去した後に、前記表面処理銅箔である前記極薄銅層を除去した基材であり、前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍである基材である。 In yet another aspect of the present invention, the copper foil with a carrier of the present invention is bonded to a substrate from the ultrathin copper layer side, and after removing the carrier from the copper foil with a carrier, the surface-treated copper foil. The base material from which the ultrathin copper layer has been removed, the black area ratio on the copper foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface is 0.03 to The substrate is 1.0 μm.
　本発明は更に別の一側面において、本発明の表面処理銅箔、又は、本発明のキャリア付銅箔を用いて製造した銅張積層板である。 Further another aspect of the present invention is a copper-clad laminate manufactured using the surface-treated copper foil of the present invention or the copper foil with carrier of the present invention.
　本発明は更に別の一側面において、本発明の表面処理銅箔、又は、本発明のキャリア付銅箔を用いて製造したプリント配線板である。 Further another aspect of the present invention is a printed wiring board manufactured using the surface-treated copper foil of the present invention or the copper foil with a carrier of the present invention.
　本発明は更に別の一側面において、本発明のプリント配線板を用いた電子機器である。 In yet another aspect, the present invention is an electronic device using the printed wiring board of the present invention.
　本発明は更に別の一側面において、本発明の表面処理銅箔と絶縁基板とを準備する工程、
　前記表面処理銅箔を、表面処理層側から絶縁基板に積層する工程、
　前記絶縁基板上の表面処理銅箔を除去する工程、
　前記表面処理銅箔を除去した絶縁基板の表面に回路を形成する工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, a step of preparing the surface-treated copper foil of the present invention and an insulating substrate,
Laminating the surface-treated copper foil on the insulating substrate from the surface-treated layer side,
Removing the surface-treated copper foil on the insulating substrate;
It is a manufacturing method of a printed wiring board including the process of forming a circuit on the surface of an insulating substrate which removed the surface treatment copper foil.
　本発明は更に別の一側面において、本発明のキャリア付銅箔と絶縁基板とを準備する工程、
　前記キャリア付銅箔を極薄銅層側から絶縁基板に積層する工程、
　前記キャリア付銅箔と絶縁基板とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、
　前記キャリアを剥がした後の絶縁基板上の極薄銅層を除去する工程、
　前記極薄銅層を除去した絶縁基板の表面に回路を形成する工程
を含むプリント配線板の製造方法である。 In another aspect of the present invention, a step of preparing the carrier-attached copper foil of the present invention and an insulating substrate,
Laminating the copper foil with carrier on the insulating substrate from the ultrathin copper layer side,
After laminating the copper foil with carrier and the insulating substrate, the step of peeling the carrier of the copper foil with carrier,
Removing the ultrathin copper layer on the insulating substrate after peeling off the carrier;
The printed wiring board manufacturing method includes a step of forming a circuit on the surface of the insulating substrate from which the ultrathin copper layer is removed.
　本発明は更に別の一側面において、本発明の表面処理銅箔と絶縁基板とを準備する工程、
　前記表面処理銅箔を、表面処理層側から絶縁基板に積層して銅張積層板を形成し、
その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, a step of preparing the surface-treated copper foil of the present invention and an insulating substrate,
The surface-treated copper foil is laminated on an insulating substrate from the surface-treated layer side to form a copper-clad laminate,
Thereafter, the printed wiring board manufacturing method includes a step of forming a circuit by any one of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
　本発明は更に別の一側面において、本発明のキャリア付銅箔と絶縁基板とを準備する工程、
　前記キャリア付銅箔を極薄銅層側から絶縁基板に積層する工程、
　前記キャリア付銅箔と絶縁基板とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程を経て銅張積層板を形成し、
その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含むプリント配線板の製造方法である。 In another aspect of the present invention, a step of preparing the carrier-attached copper foil of the present invention and an insulating substrate,
Laminating the copper foil with carrier on the insulating substrate from the ultrathin copper layer side,
After laminating the carrier-attached copper foil and the insulating substrate, a copper-clad laminate is formed through a step of peeling the carrier of the carrier-attached copper foil,
Thereafter, the printed wiring board manufacturing method includes a step of forming a circuit by any one of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
　本発明は更に別の一側面において、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　前記樹脂層の表面に回路を形成する工程、及び、
　前記表面処理銅箔又は前記キャリア付銅箔を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In another aspect of the present invention, the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface treatment layer is formed, or the circuit in which a circuit is formed on the surface of the ultrathin copper layer. Preparing a copper foil with a carrier,
Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
Forming a circuit on the surface of the resin layer; and
It is a manufacturing method of a printed wiring board including the process of exposing the circuit buried in the resin layer by removing the surface-treated copper foil or the copper foil with a carrier.
　本発明は更に別の一側面において、表面に回路が形成された金属箔、又は、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔である第１の表面処理銅箔、又は、極薄金属側表面に回路が形成されたキャリア付金属箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔である第１のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記金属箔表面又は前記表面処理銅箔表面又は前記キャリア付金属箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　本発明の表面処理銅箔である第２の表面処理銅箔を表面処理層側から前記樹脂層に積層する工程、又は、本発明のキャリア付銅箔である第２のキャリア付銅箔を極薄銅層側から前記樹脂層に積層する工程、
　前記樹脂層に積層した箔が前記第２のキャリア付銅箔である場合は、前記第２のキャリア付銅箔のキャリアを剥がす工程、
　前記樹脂層上の表面処理銅箔、又は、前記第２のキャリア付銅箔のキャリアが剥がされて残った極薄銅層を除去する工程、
　前記表面処理銅箔を除去した樹脂層の表面、又は、極薄銅層を除去した樹脂層の表面に回路を形成する工程、及び、
　前記樹脂層上に回路を形成した後に、前記金属箔を除去することで、又は、前記第１の表面処理銅箔を除去することで、又は、前記キャリア付金属箔のキャリアを剥離させた後に極薄金属層を除去することで、又は、前記第１のキャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 According to still another aspect of the present invention, there is provided the first metal foil having a circuit formed on the surface or the surface-treated copper foil of the present invention having a circuit formed on the surface on the side on which the surface treatment layer is formed. A surface-treated copper foil, or a metal foil with a carrier having a circuit formed on the surface of the ultrathin metal, or a copper foil with a carrier of the present invention in which a circuit is formed on the surface of the ultrathin copper layer. The step of preparing the attached copper foil,
Forming a resin layer on the surface of the metal foil or the surface-treated copper foil or the surface of the metal foil with carrier or the surface of the copper foil with carrier so that the circuit is buried;
The step of laminating the second surface-treated copper foil that is the surface-treated copper foil of the present invention on the resin layer from the surface-treated layer side, or the second copper foil with a carrier that is the copper foil with carrier of the present invention Laminating the resin layer from the thin copper layer side;
When the foil laminated on the resin layer is the second copper foil with carrier, the step of peeling the carrier of the second carrier copper foil,
Removing the ultrathin copper layer remaining after the surface-treated copper foil on the resin layer or the carrier of the copper foil with the second carrier is peeled off,
Forming a circuit on the surface of the resin layer from which the surface-treated copper foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and
After forming a circuit on the resin layer, by removing the metal foil, or by removing the first surface-treated copper foil, or after peeling the carrier of the metal foil with carrier The process of exposing the circuit embedded in the resin layer by removing the ultra-thin copper layer after removing the ultra-thin metal layer or by removing the carrier of the copper foil with the first carrier Is a method of manufacturing a printed wiring board including
　本発明は更に別の一側面において、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　金属箔を前記樹脂層に積層する工程、又は、キャリア付金属箔を極薄銅層側から前記樹脂層に積層する工程、
　前記樹脂層に積層した箔が前記キャリア付金属箔である場合は、前記キャリア付金属箔のキャリアを剥がす工程、
　前記樹脂層上の金属箔、又は、前記キャリア付金属箔のキャリアが剥がされて残った極薄金属層を除去する工程、
　前記金属箔を除去した樹脂層の表面、又は、極薄銅層を除去した樹脂層の表面に回路を形成する工程、及び、
　前記樹脂層上に回路を形成した後に、前記表面処理銅箔を除去することで、又は、前記キャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In another aspect of the present invention, the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface treatment layer is formed, or the circuit in which a circuit is formed on the surface of the ultrathin copper layer. Preparing a copper foil with a carrier,
Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
A step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin copper layer side,
When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier,
Removing the ultrathin metal layer remaining after the metal foil on the resin layer or the carrier of the metal foil with carrier is peeled off,
Forming a circuit on the surface of the resin layer from which the metal foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and
After forming a circuit on the resin layer, by removing the surface-treated copper foil, or by removing the ultrathin copper layer after peeling the carrier of the copper foil with carrier, the resin layer It is a manufacturing method of a printed wiring board including the process of exposing the circuit which is buried.
　本発明は更に別の一側面において、表面に回路が形成された金属箔、又は、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔である第１の表面処理銅箔、又は、極薄金属層側表面に回路が形成されたキャリア付金属箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔である第１のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記金属箔表面又は前記表面処理銅箔表面又は前記キャリア付金属箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　本発明の表面処理銅箔である第２の表面処理銅箔を表面処理層側から前記樹脂層に積層する工程、又は、本発明のキャリア付銅箔である第２のキャリア付銅箔を極薄銅層側から前記樹脂層に積層する工程、
　前記樹脂層に積層した箔が前記第２のキャリア付銅箔である場合は、前記第２のキャリア付銅箔のキャリアを剥がす工程、
　前記樹脂層上の表面処理銅箔、又は、前記第２のキャリア付銅箔のキャリアが剥がされて残った極薄銅層を用いてセミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、
　前記樹脂層上に回路を形成した後に、前記金属箔を除去することで、又は、前記第１の表面処理銅箔を除去することで、又は、前記キャリア付金属箔のキャリアを剥離させた後に極薄金属層を除去することで、又は、前記第１のキャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 According to still another aspect of the present invention, there is provided the first metal foil having a circuit formed on the surface or the surface-treated copper foil of the present invention having a circuit formed on the surface on the side on which the surface treatment layer is formed. The surface-treated copper foil, the metal foil with a carrier having a circuit formed on the surface of the ultrathin metal layer side, or the copper foil with a carrier of the present invention in which a circuit is formed on the surface of the ultrathin copper layer side Preparing copper foil with carrier,
Forming a resin layer on the surface of the metal foil or the surface-treated copper foil or the surface of the metal foil with carrier or the surface of the copper foil with carrier so that the circuit is buried;
The step of laminating the second surface-treated copper foil that is the surface-treated copper foil of the present invention on the resin layer from the surface-treated layer side, or the second copper foil with a carrier that is the copper foil with carrier of the present invention Laminating the resin layer from the thin copper layer side;
When the foil laminated on the resin layer is the second copper foil with carrier, the step of peeling the carrier of the second carrier copper foil,
A semi-additive method, a subtractive method, a partly additive method or a modified semi-additive method using the surface-treated copper foil on the resin layer or the ultrathin copper layer remaining after the carrier of the copper foil with the second carrier is peeled off. Forming a circuit on the resin layer by any one of the methods,
After forming a circuit on the resin layer, by removing the metal foil, or by removing the first surface-treated copper foil, or after peeling the carrier of the metal foil with carrier The process of exposing the circuit embedded in the resin layer by removing the ultra-thin copper layer after removing the ultra-thin metal layer or by removing the carrier of the copper foil with the first carrier Is a method of manufacturing a printed wiring board including
　本発明は更に別の一側面において、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　金属箔を前記樹脂層に積層する工程、又は、キャリア付金属箔を極薄銅層側から前記樹脂層に積層する工程、
　前記樹脂層に積層した箔が前記キャリア付金属箔である場合は、前記キャリア付金属箔のキャリアを剥がす工程、
　前記樹脂層上の金属箔、又は、前記キャリア付金属箔のキャリアが剥がされて残った極薄金属層を用いてセミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、
　前記樹脂層上に回路を形成した後に、前記表面処理銅箔を除去することで、又は、前記キャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In another aspect of the present invention, the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface treatment layer is formed, or the circuit in which a circuit is formed on the surface of the ultrathin copper layer. Preparing a copper foil with a carrier,
Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
A step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin copper layer side,
When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier,
Either a semi-additive method, a subtractive method, a partial additive method or a modified semi-additive method using a metal foil on the resin layer or an ultra-thin metal layer remaining after the carrier of the metal foil with carrier is peeled off Forming a circuit on the resin layer by a method,
After forming a circuit on the resin layer, by removing the surface-treated copper foil, or by removing the ultrathin copper layer after peeling the carrier of the copper foil with carrier, the resin layer It is a manufacturing method of a printed wiring board including the process of exposing the circuit which is buried.
　本発明は更に別の一側面において、本発明の表面の面粗さＳｚが１～５μｍである樹脂基材である。 In yet another aspect of the present invention, there is provided a resin substrate having a surface roughness Sz of 1 to 5 μm.
　本発明の樹脂基材は一実施形態において、表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５である。 In one embodiment of the resin base material of the present invention, the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A is 1.01 to 1.5.
　本発明の樹脂基材は別の一実施形態において、表面の黒色面積率が１０～５０％であり、且つ、表面の穴の直径平均値が０．０３～１．０μｍである。 In another embodiment of the resin base material of the present invention, the surface black area ratio is 10 to 50%, and the average diameter of the surface holes is 0.03 to 1.0 μm.
　本発明は更に別の一側面において、表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５である樹脂基材である。 In yet another aspect of the present invention, the resin base material has a ratio B / A of a surface three-dimensional surface area B to a two-dimensional surface area A of 1.01 to 1.5.
　本発明は更に別の一側面において、表面の黒色面積率が１０～５０％であり、且つ、表面の穴の直径平均値が０．０３～１．０μｍである樹脂基材である。 In yet another aspect of the present invention, the resin base material has a black area ratio of 10 to 50% on the surface and an average diameter of holes on the surface of 0.03 to 1.0 μm.
　本発明の樹脂基材は更に別の一実施形態において、表面の黒色面積率が１０～５０％であり、且つ、表面の穴の直径平均値が０．０３～１．０μｍである。 In yet another embodiment of the resin base material of the present invention, the surface black area ratio is 10 to 50%, and the average diameter of the surface holes is 0.03 to 1.0 μm.
　本発明の樹脂基材は更に別の一実施形態において、セミアディティブ工法用である。 In yet another embodiment, the resin base material of the present invention is for a semi-additive construction method.
　本発明は更に別の一側面において、本発明の樹脂基材を用いて製造したプリント配線板である。 In yet another aspect, the present invention is a printed wiring board manufactured using the resin base material of the present invention.
　本発明は更に別の一側面において、本発明の樹脂基材を用いて製造した銅張積層板である。 In yet another aspect, the present invention is a copper-clad laminate produced using the resin base material of the present invention.
　本発明は更に別の一側面において、表面処理銅箔と樹脂基材とを準備する工程、
　前記表面処理銅箔を、表面処理層側から樹脂基材に積層する工程、
　前記樹脂基材上の表面処理銅箔を除去して本発明の樹脂基材を得る工程、
　前記表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程
を含むプリント配線板の製造方法である。 In another aspect of the present invention, a step of preparing a surface-treated copper foil and a resin base material,
Laminating the surface-treated copper foil on the resin substrate from the surface-treated layer side,
Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate of the present invention,
It is a manufacturing method of a printed wiring board including the process of forming a circuit on the surface of the resin substrate which removed the surface treatment copper foil.
　本発明は更に別の一側面において、キャリア、中間層、極薄銅層がこの順で積層されて構成されたキャリア付銅箔と、樹脂基材とを準備する工程、
　前記キャリア付銅箔を極薄銅層側から樹脂基材に積層する工程、
　前記キャリア付銅箔と樹脂基材とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、
　前記キャリアを剥がした後の樹脂基材上の極薄銅層を除去して本発明の樹脂基材を得る工程、
　前記極薄銅層を除去した樹脂基材の表面に回路を形成する工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, a carrier, an intermediate layer, a copper foil with a carrier configured by laminating an ultrathin copper layer in this order, and a step of preparing a resin base material,
Laminating the copper foil with carrier on the resin substrate from the ultrathin copper layer side,
After laminating the copper foil with carrier and the resin base material, the step of peeling the carrier of the copper foil with carrier,
Removing the ultrathin copper layer on the resin substrate after peeling off the carrier to obtain the resin substrate of the present invention,
It is a manufacturing method of a printed wiring board including the process of forming a circuit on the surface of the resin substrate which removed the ultra-thin copper layer.
　本発明は更に別の一側面において、表面処理銅箔を、表面処理層側から本発明の樹脂基材に積層して銅張積層板を形成し、その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含むプリント配線板の製造方法である。 In another aspect of the present invention, a surface-treated copper foil is laminated on the resin base material of the present invention from the surface-treated layer side to form a copper-clad laminate, and then a semi-additive method, a subtractive method, a partly method A printed wiring board manufacturing method including a step of forming a circuit by either the additive method or the modified semi-additive method.
　本発明は更に別の一側面において、キャリア、中間層、極薄銅層がこの順で積層されて構成されたキャリア付銅箔を極薄銅層側から本発明の樹脂基材に積層する工程、
　前記キャリア付銅箔と樹脂基材とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程を経て銅張積層板を形成し、
その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, the carrier, the intermediate layer, and the ultrathin copper layer are laminated in this order, and the carrier-attached copper foil is laminated on the resin base material of the present invention from the ultrathin copper layer side. ,
After laminating the carrier-attached copper foil and the resin base material, a copper-clad laminate is formed through a step of peeling the carrier of the carrier-attached copper foil,
Thereafter, the printed wiring board manufacturing method includes a step of forming a circuit by any one of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
　本発明は更に別の一側面において、表面に回路が形成された金属箔を準備する工程、
　前記回路が埋没するように前記金属箔表面に樹脂基材を形成する工程、
　表面処理銅箔を、表面処理層側から前記樹脂基材に積層する工程、
　前記樹脂基材上の表面処理銅箔を除去して本発明の樹脂基材を得る工程、
　前記表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程、及び、
　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, a step of preparing a metal foil having a circuit formed on the surface,
Forming a resin base material on the surface of the metal foil so that the circuit is buried;
Laminating a surface-treated copper foil on the resin substrate from the surface-treated layer side,
Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate of the present invention,
Forming a circuit on the surface of the resin base material from which the surface-treated copper foil has been removed; and
It is a manufacturing method of a printed wiring board including the process of exposing the circuit embedded in the resin base material formed in the metal foil surface by removing the metal foil.
　本発明は更に別の一側面において、キャリア、中間層、極薄銅層がこの順で積層されて構成された第１のキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
　前記回路が埋没するように前記第１のキャリア付銅箔の前記極薄銅層側表面に樹脂基材を形成する工程、
　キャリア、中間層、極薄銅層がこの順で積層されて構成された第２のキャリア付銅箔を準備し、前記第２のキャリア付銅箔の極薄銅層側から前記樹脂基材に積層する工程、
　前記第２のキャリア付銅箔を前記樹脂基材に積層した後に、前記第２のキャリア付銅箔のキャリアを剥がす工程、
　前記第２のキャリア付銅箔のキャリアを剥がした後の樹脂基材上の極薄銅層を除去して本発明の樹脂基材を得る工程、
　前記極薄銅層を除去した樹脂基材の表面に回路を形成する工程、
　前記樹脂基材上に回路を形成した後に、前記第１のキャリア付銅箔のキャリアを剥離させる工程、及び、
　前記第１のキャリア付銅箔のキャリアを剥離させた後に、前記第１のキャリア付銅箔の極薄銅層を除去することで、前記第１のキャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, the step of forming a circuit on the surface of the ultrathin copper layer side of the first carrier-attached copper foil in which the carrier, the intermediate layer, and the ultrathin copper layer are laminated in this order,
Forming a resin base material on the ultrathin copper layer side surface of the first carrier-attached copper foil so that the circuit is buried;
Prepare a second carrier-attached copper foil in which a carrier, an intermediate layer, and an ultrathin copper layer are laminated in this order. From the ultrathin copper layer side of the second carrier-attached copper foil to the resin base material Laminating process,
A step of peeling the carrier of the second carrier-attached copper foil after laminating the second carrier-attached copper foil on the resin substrate;
Removing the ultra-thin copper layer on the resin substrate after peeling the carrier of the copper foil with the second carrier to obtain the resin substrate of the present invention;
Forming a circuit on the surface of the resin substrate from which the ultrathin copper layer has been removed,
After forming the circuit on the resin base material, the step of peeling the carrier of the first copper foil with carrier, and
After peeling the carrier of the first copper foil with carrier, the ultra thin copper layer side surface of the first copper foil with carrier is removed by removing the ultra thin copper layer of the first copper foil with carrier. A method for manufacturing a printed wiring board, comprising the step of exposing a circuit embedded in the resin base material formed in step 1).
　本発明は更に別の一側面において、表面に回路が形成された金属箔を準備する工程、
　前記回路が埋没するように前記金属箔表面に本発明の樹脂基材を形成する工程、
　表面処理銅箔を、表面処理層側から前記樹脂基材に積層し、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、及び、
　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, a step of preparing a metal foil having a circuit formed on the surface,
Forming the resin base material of the present invention on the surface of the metal foil so that the circuit is buried;
A surface-treated copper foil is laminated on the resin base material from the surface-treated layer side, and a circuit is formed on the resin layer by any one of a semi-additive method, a subtractive method, a partial additive method, or a modified semi-additive method. Process and
It is a manufacturing method of a printed wiring board including the process of exposing the circuit embedded in the resin base material formed in the metal foil surface by removing the metal foil.
　本発明は更に別の一側面において、キャリア、中間層、極薄銅層がこの順で積層されて構成された第１のキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
　前記回路が埋没するように前記第１のキャリア付銅箔の前記極薄銅層側表面に本発明の樹脂基材を形成する工程、
　キャリア、中間層、極薄銅層がこの順で積層されて構成された第２のキャリア付銅箔を準備し、前記第２のキャリア付銅箔の極薄銅層側から前記樹脂基材に積層して前記第２のキャリア付銅箔のキャリアを剥がし、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂基材上に回路を形成する工程、
　前記樹脂基材上に回路を形成した後に、前記第１のキャリア付銅箔のキャリアを剥離させる工程、及び、
　前記第１のキャリア付銅箔のキャリアを剥離させた後に、前記第１のキャリア付銅箔の極薄銅層を除去することで、前記第１のキャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, the step of forming a circuit on the surface of the ultrathin copper layer side of the first carrier-attached copper foil in which the carrier, the intermediate layer, and the ultrathin copper layer are laminated in this order,
Forming the resin substrate of the present invention on the ultrathin copper layer side surface of the first carrier-attached copper foil so that the circuit is buried;
Prepare a second carrier-attached copper foil in which a carrier, an intermediate layer, and an ultrathin copper layer are laminated in this order. Laminating and peeling the carrier of the copper foil with the second carrier, and forming a circuit on the resin substrate by any one of a semi-additive method, a subtractive method, a partial additive method, or a modified semi-additive method,
After forming the circuit on the resin base material, the step of peeling the carrier of the first copper foil with carrier, and
After peeling the carrier of the first copper foil with carrier, the ultra thin copper layer side surface of the first copper foil with carrier is removed by removing the ultra thin copper layer of the first copper foil with carrier. A method for manufacturing a printed wiring board, comprising the step of exposing a circuit embedded in the resin base material formed in step 1).
　本発明は更に別の一側面において、表面に回路が形成された金属箔を準備する工程、
　前記回路が埋没するように前記金属箔表面に樹脂基材を形成する工程、
　キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔を極薄銅層側表面から前記樹脂基材に積層する工程、
　前記キャリア付銅箔のキャリアを剥離させた後に、前記樹脂基材上の極薄銅層を除去して本発明の樹脂基材を得る工程、
　前記極薄銅層を除去した樹脂基材の表面に回路を形成する工程、及び、
　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, a step of preparing a metal foil having a circuit formed on the surface,
Forming a resin base material on the surface of the metal foil so that the circuit is buried;
Laminating a carrier, an intermediate layer, a copper foil with a carrier provided with an ultrathin copper layer in this order from the ultrathin copper layer side surface to the resin base material,
After peeling the carrier of the copper foil with carrier, the step of removing the ultrathin copper layer on the resin substrate to obtain the resin substrate of the present invention,
Forming a circuit on the surface of the resin substrate from which the ultrathin copper layer has been removed, and
It is a manufacturing method of a printed wiring board including the process of exposing the circuit embedded in the resin base material formed in the metal foil surface by removing the metal foil.
　本発明は更に別の一側面において、キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
　前記回路が埋没するように前記キャリア付銅箔の前記極薄銅層側表面に樹脂基材を形成する工程、
　表面処理銅箔を、表面処理層側から前記樹脂基材に積層する工程、
　前記樹脂基材上の表面処理銅箔を除去して本発明の樹脂基材を得る工程、
　前記表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程、
　前記樹脂基材上に回路を形成した後に、前記キャリア付銅箔のキャリアを剥離させる工程、及び、
　前記キャリア付銅箔のキャリアを剥離させた後に、前記キャリア付銅箔の極薄銅層を除去することで、前記キャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, the step of forming a circuit on the ultrathin copper layer side surface of the carrier-attached copper foil provided with the carrier, the intermediate layer, and the ultrathin copper layer in this order,
Forming a resin base material on the ultrathin copper layer side surface of the copper foil with carrier so that the circuit is buried;
Laminating a surface-treated copper foil on the resin substrate from the surface-treated layer side,
Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate of the present invention,
Forming a circuit on the surface of the resin base material from which the surface-treated copper foil has been removed,
After forming the circuit on the resin substrate, the step of peeling the carrier of the copper foil with carrier, and
After peeling the carrier of the copper foil with carrier, by removing the ultra thin copper layer of the copper foil with carrier, the resin base material formed on the ultra thin copper layer side surface of the copper foil with carrier It is a manufacturing method of a printed wiring board including the process of exposing the circuit which is buried.
　本発明は更に別の一側面において、表面に回路が形成された金属箔を準備する工程、
　前記回路が埋没するように前記金属箔表面に本発明の樹脂基材を形成する工程、
　前記樹脂基材上に回路を形成する工程、及び、
　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, a step of preparing a metal foil having a circuit formed on the surface,
Forming the resin base material of the present invention on the surface of the metal foil so that the circuit is buried;
Forming a circuit on the resin substrate; and
It is a manufacturing method of a printed wiring board including the process of exposing the circuit embedded in the resin base material formed in the metal foil surface by removing the metal foil.
　本発明は更に別の一側面において、キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
　前記回路が埋没するように前記キャリア付銅箔の前記極薄銅層側表面に本発明の樹脂基材を形成する工程、
　前記樹脂基材上に回路を形成する工程、
　前記樹脂基材上に回路を形成した後に、前記キャリア付銅箔のキャリアを剥離させる工程、及び、
　前記キャリア付銅箔のキャリアを剥離させた後に、前記キャリア付銅箔の極薄銅層を除去することで、前記キャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
を含むプリント配線板の製造方法である。 In yet another aspect of the present invention, the step of forming a circuit on the ultrathin copper layer side surface of the carrier-attached copper foil provided with the carrier, the intermediate layer, and the ultrathin copper layer in this order,
Forming the resin base material of the present invention on the ultrathin copper layer side surface of the carrier-attached copper foil so that the circuit is buried;
Forming a circuit on the resin substrate;
After forming the circuit on the resin substrate, the step of peeling the carrier of the copper foil with carrier, and
After peeling the carrier of the copper foil with carrier, by removing the ultra thin copper layer of the copper foil with carrier, the resin base material formed on the ultra thin copper layer side surface of the copper foil with carrier It is a manufacturing method of a printed wiring board including the process of exposing the circuit which is buried.
　本発明によれば、微細配線形成性を維持し、且つ、無電解銅めっき皮膜の良好な密着力を実現する、銅箔除去後基材面のプロファイル形状を与えることができる表面処理銅箔、及び、表面のプロファイル形状を備える樹脂基材を提供することができる。 According to the present invention, a surface-treated copper foil that can provide a profile shape of the substrate surface after removing the copper foil, which maintains fine wiring formability and realizes good adhesion of the electroless copper plating film, And the resin base material provided with the profile shape of a surface can be provided.
銅箔のプロファイルを使用したセミアディティブ工法の概略例を示す。A schematic example of a semi-additive construction method using a copper foil profile is shown. 実施例及び比較例のデータを得るためのサンプル作製フローを示す。The sample preparation flow for obtaining the data of an Example and a comparative example is shown. （ａ）、（ｂ）、（ｃ）、（ｄ）、（ｅ）に、それぞれ実施例Ａ１、Ａ２、Ａ３、Ａ５、Ａ６の銅箔処理面のSEM像（×３００００）を示す。(A), (b), (c), (d), and (e) show SEM images (× 30000) of the copper foil treated surfaces of Examples A1, A2, A3, A5, and A6, respectively. （ｆ）、（ｇ）に、それぞれ比較例Ａ１、Ａ２の銅箔処理面のSEM像（×６０００）を示す。(F) and (g) show SEM images (× 6000) of the copper foil treated surfaces of Comparative Examples A1 and A2, respectively. （ｈ）、（ｉ）、（ｊ）、（ｋ）、（ｌ）に、それぞれ実施例Ａ１（Ｂ１）、Ａ２（Ｂ２）、Ａ３（Ｂ３）、Ａ５（Ｂ５）、Ａ６（Ｂ６）の樹脂基材面のSEM像（×３００００）を示す。Resins of Examples A1 (B1), A2 (B2), A3 (B3), A5 (B5), and A6 (B6) are respectively added to (h), (i), (j), (k), and (l). The SEM image (x30000) of a base-material surface is shown. （ｍ）、（ｎ）に、それぞれ比較例Ａ１（Ｂ１）、Ａ２（Ｂ２）の樹脂基材面のSEM像（×６０００）を示す。(M) and (n) show SEM images (× 6000) of the resin base material surfaces of Comparative Examples A1 (B1) and A2 (B2), respectively.
　〔樹脂基材〕
　本発明に係る樹脂基材は、後述の表面形態が形成可能なものであれば特に限定されないが、例えば、三菱ガス化学社製プリプレグ（ＧＨＰＬ－８３０ＭＢＴ等）、日立化成工業社製プリプレグ（６７９－ＦＧ等）、住友ベークライト社製プリプレグ（ＥＩ－６７８５ＴＳ－Ｆ等）で形成することができる。本発明においては、三菱ガス化学社製プリプレグＧＨＰＬ－８３０ＭＢＴを準備した。積層プレスの温度、圧力、時間は、基材メーカーの推奨条件を用いた。 [Resin substrate]
The resin base material according to the present invention is not particularly limited as long as the surface form described later can be formed. For example, a prepreg manufactured by Mitsubishi Gas Chemical Company (GHPL-830MBT, etc.), a prepreg manufactured by Hitachi Chemical Co., Ltd. (679- FG, etc.) and a prepreg manufactured by Sumitomo Bakelite Co., Ltd. (EI-6785TS-F, etc.). In the present invention, a prepreg GHPL-830MBT manufactured by Mitsubishi Gas Chemical Company was prepared. The substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press.
　本発明に係る樹脂基材の厚さとしては特に限定されないが、例えば、７５０～８５０μｍ、１００～２００μｍ、３０～１００μｍとすることができ、典型的には３０～２００μｍ（両面板の場合）である。 The thickness of the resin base material according to the present invention is not particularly limited. For example, it can be 750 to 850 μm, 100 to 200 μm, 30 to 100 μm, and typically 30 to 200 μm (in the case of a double-sided board). is there.
　〔樹脂基材表面の面粗さＳｚ〕
　SAP工法において、従来、回路を形成する基材表面のプロファイル形状を定量化する方法として、接触式粗さ計を用いた粗度測定が一般的であった。これに対し、本発明では、レーザー粗さ測定計で測定される面粗さ（表面の最大高さ）Ｓｚが適性範囲に規定された基材表面のプロファイル形状が、より良好に微細配線形成性を維持し、且つ、無電解銅めっき皮膜の良好な密着力を実現することを見出した。このような観点から、本発明に係る樹脂基材は、１～５μｍに制御されている。樹脂基材表面の面粗さＳｚが１μｍ未満であると、無電解銅めっき皮膜の良好な密着力の実現が困難となる。また、樹脂基材表面の面粗さＳｚが５μｍ超であると、樹脂基材表面の微細配線形成性が劣化する。樹脂基材表面の面粗さＳｚは好ましくは１～４μｍ、より好ましくは１．５～３．５μｍ、更により好ましくは２～３μｍである。 [Surface roughness Sz of resin base material surface]
In the SAP method, conventionally, as a method for quantifying the profile shape of the surface of a substrate forming a circuit, roughness measurement using a contact-type roughness meter has been common. On the other hand, in the present invention, the profile shape on the surface of the base material in which the surface roughness (maximum surface height) Sz measured by a laser roughness meter is defined in an appropriate range is more excellent in fine wiring formability. It was found that good adhesion of the electroless copper plating film was achieved. From such a viewpoint, the resin base material according to the present invention is controlled to 1 to 5 μm. When the surface roughness Sz of the resin base material surface is less than 1 μm, it is difficult to achieve good adhesion of the electroless copper plating film. Further, when the surface roughness Sz on the surface of the resin substrate is more than 5 μm, the fine wiring formability on the surface of the resin substrate is deteriorated. The surface roughness Sz of the resin substrate surface is preferably 1 to 4 μm, more preferably 1.5 to 3.5 μm, and still more preferably 2 to 3 μm.
　〔樹脂基材表面の面積比Ｂ／Ａ〕
　三次元表面積と二次元表面積との比を所定の範囲で有する樹脂基材の表面のプロファイル形状は、微細配線形成性が良好で、且つ、無電解銅めっき皮膜の良好な密着力を実現する。このような観点から、本発明に係る樹脂基材表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａは、１．０１～１．５に制御されているのが好ましい。樹脂基材表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１未満であると、無電解銅めっき皮膜の良好な密着力の実現が困難となる。また、樹脂基材表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．５超であると、樹脂基材表面の微細配線形成性が劣化する。本発明に係る樹脂基材表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａは好ましくは１．０３～１．４、より好ましくは１．０５～１．３５、更により好ましくは１．１～１．３である。 [Area ratio of resin substrate surface B / A]
The profile shape of the surface of the resin base material having the ratio of the three-dimensional surface area to the two-dimensional surface area within a predetermined range provides good fine wiring formability and good adhesion of the electroless copper plating film. From such a viewpoint, the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface of the resin substrate according to the present invention is preferably controlled to 1.01 to 1.5. When the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface of the resin substrate is less than 1.01, it is difficult to achieve good adhesion of the electroless copper plating film. Further, when the ratio B / A of the three-dimensional surface area B and the two-dimensional surface area A on the resin base material surface is more than 1.5, the fine wiring formability on the resin base material surface is deteriorated. The ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A of the resin substrate surface according to the present invention is preferably 1.03 to 1.4, more preferably 1.05 to 1.35, and still more preferably. 1.1 to 1.3.
　〔樹脂基材表面の黒色面積率及び穴の直径平均値〕
　樹脂基材表面の凹凸の程度をSEM観察写真から得られる黒色面積率で示したとき、当該黒色面積率を所定の範囲で有する樹脂基材の表面のプロファイル形状は、微細配線形成性が良好で、且つ、無電解銅めっき皮膜の良好な密着力を実現する。このような観点から、本発明に係る樹脂基材表面の黒色面積率は１０～５０％となるように制御されているのが好ましい。ここで、黒色面積率として、基材表面のSEM像（30k倍）について、Photo Shop 7.0ソフトウェアを使用し、白色・黒色画像処理を施し、当該黒色領域の面積率（％）を求めた。黒色面積率（％）は、Photo Shop 7.0にある「イメージ」の「ヒストグラム」を選定し、閾値128における比率とした。なお、黒色領域は測定表面が凹状、白色部は測定表面が凸状になっていることを示す。基材表面の当該黒色面積率が１５％未満であると、無電解銅めっき皮膜の良好な密着力の実現が困難となる。基材表面の当該黒色面積率が５０％超であると、微細配線形成性が劣化する。 [Black area ratio of resin substrate surface and average diameter of holes]
When the degree of unevenness on the surface of the resin base material is indicated by the black area ratio obtained from the SEM observation photograph, the profile shape of the surface of the resin base material having the black area ratio in a predetermined range has good fine wiring formability. In addition, good adhesion of the electroless copper plating film is realized. From such a viewpoint, it is preferable that the black area ratio on the surface of the resin substrate according to the present invention is controlled to be 10 to 50%. Here, as the black area ratio, the SEM image (30 k times) of the substrate surface was subjected to white / black image processing using Photoshop 7.0 software, and the area ratio (%) of the black area was obtained. For the black area ratio (%), a “histogram” of “image” in Photoshop 7.0 was selected, and the ratio at the threshold value 128 was used. The black region indicates that the measurement surface is concave, and the white portion indicates that the measurement surface is convex. If the black area ratio on the substrate surface is less than 15%, it is difficult to achieve good adhesion of the electroless copper plating film. If the black area ratio on the surface of the substrate is more than 50%, the fine wiring formability deteriorates.
　黒色面積比率と同時に、表面の穴の直径平均値を所定の範囲で有する樹脂基材の表面のプロファイル形状は、微細配線形成性が良好で、且つ、無電解銅めっき皮膜の良好な密着力を実現するための必要条件である。その理由は、黒色面積比率だけではプロファイルのサイズとその平面上の適切な分布を満足しないためである。このような観点から、本発明に係る樹脂基材表面の穴の直径平均値が０．０３～１．０μｍとなるように制御されているのが好ましい。樹脂基材表面の当該穴の直径平均値が０．０３μｍ未満であると、無電解銅めっき皮膜の良好な密着力の実現が困難となる。樹脂基材表面の当該穴の直径平均値が１．０μｍ超であると、微細配線形成性が劣化する。 At the same time as the black area ratio, the profile shape of the surface of the resin base material having a diameter average value of holes on the surface within a predetermined range has good fine wiring formability and good adhesion of the electroless copper plating film It is a necessary condition to realize. The reason is that the black area ratio alone does not satisfy the profile size and the appropriate distribution on the plane. From such a viewpoint, it is preferable that the average diameter value of the holes on the surface of the resin substrate according to the present invention is controlled to be 0.03 to 1.0 μm. If the average diameter of the holes on the surface of the resin substrate is less than 0.03 μm, it is difficult to achieve good adhesion of the electroless copper plating film. If the average diameter value of the holes on the surface of the resin substrate is more than 1.0 μm, the fine wiring formability deteriorates.
　このように、本発明に係る樹脂基材は、基材表面の当該黒色面積比率が１０～５０％であり且つ当該穴の直径平均値が０．０３～１．０μｍであるのが好ましく、黒色面積比率が１５～４５％であり且つ穴の直径平均値が０．１～０．８μｍであるのがより好ましく、黒色面積比率が２０～４０％であり且つ穴の直径平均値が０．１５～０．７μｍであるのが更により好ましい。 As described above, the resin base material according to the present invention preferably has a black surface area ratio of 10 to 50% on the base material surface and a diameter average value of the holes of 0.03 to 1.0 μm. More preferably, the area ratio is 15 to 45% and the average diameter of the holes is 0.1 to 0.8 μm, the black area ratio is 20 to 40% and the average diameter of the holes is 0.15. Even more preferably it is ˜0.7 μm.
　〔樹脂基材の表面プロファイルの形成方法〕
　本発明に係る樹脂基材の表面のプロファイル形状は、樹脂基材に表面処理銅箔を積層した後、当該表面処理銅箔を全面エッチング等で除去することで形成することができる。また、本発明に係る樹脂基材の表面のプロファイル形状は、樹脂基材表面を所定の薬液によって処理することで形成することができる。 [Method for forming surface profile of resin substrate]
The profile shape of the surface of the resin substrate according to the present invention can be formed by laminating the surface-treated copper foil on the resin substrate and then removing the surface-treated copper foil by etching or the like on the entire surface. Moreover, the profile shape of the surface of the resin base material which concerns on this invention can be formed by processing the resin base material surface by a predetermined chemical | medical solution.
　表面処理銅箔を用いた本発明に係る樹脂基材の表面プロファイルの形成方法としては、まず、表面処理層表面の面粗さ（表面の最大高さ）Ｓｚが２～６μｍに制御されている表面処理銅箔を準備する。次に、当該表面処理銅箔の表面処理層側から樹脂基材に貼り合わせて、表面処理銅箔を全面エッチング等により除去する。これにより、表面処理銅箔除去後の樹脂基材表面の面粗さＳｚが１～５μｍとなる。
　なお、本発明において「表面処理層表面」とは表面処理されている側の最表面をいう。
すなわち、粗化処理層、防錆層、耐熱層、クロメート処理層、シランカップリング処理層等の表面処理層を銅箔に設けた場合には、銅箔に当該表面処理層を設けた後の表面をいう。
　また、表面処理銅箔として、表面処理層表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８に制御されたものを用いて、同様に樹脂基材に貼り合わせて、全面エッチング等により当該表面処理銅箔を除去すると、表面処理銅箔除去後の樹脂基材表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる。
　また、同様に、表面処理銅箔として、レーザー粗さ計での面粗さＳｚが２～６μｍで、三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８で制御されたものを用いて、同様に樹脂基材に貼り合わせて、全面エッチング等により当該表面処理銅箔を除去すると、樹脂基材表面の黒色面積率を１０～５０％、樹脂基材表面の穴の直径平均値を０．０３～１．０μｍにそれぞれ制御することができる。
　粗化粒子形成時などの表面処理時に表面処理の電流密度と表面処理終了後のメッキ液中の浸漬時間とを制御することで、表面処理後の銅箔の表面状態や粗化粒子の形態や形成密度が決まり、これにより上記表面処理銅箔の面粗さＳｚ、面積比Ｂ／Ａ、黒色面積率、及び、穴の直径平均値を制御することができる。
　具体的には、粗化粒子形成時などの表面処理時に、表面処理の電流密度を高く制御して表面処理を行い、続いて表面処理の電流密度を低く制御して表面処理を行うことで、表面処理後の銅箔の表面状態や粗化粒子の形態や形成密度が決まり、上記面粗さＳｚ、面積比Ｂ／Ａ、黒色面積率、及び、穴の直径平均値を制御することができる。また、表面処理の電流密度を高く制御して表面処理を行い、続いて表面処理の電流密度を低く制御して表面処理を行うことを繰り返し行うことも有効である。
　ここで、粗化粒子形成時などの表面処理時に表面処理の電流密度を高くすると、析出する金属粒子が、銅箔の表面に対して垂直方向に成長しやすい傾向にある。また、粗化粒子形成時などの表面処理時に表面処理の電流密度を低くすると、銅箔表面が平滑（凹凸が少なくなる）になりやすい傾向にある。
　そのため、表面処理の電流密度を高く制御して表面処理を行い、続いて表面処理の電流密度を低く制御して表面処理を行うことは、金属粒子を銅箔表面と垂直方向に成長させた後に、前記金属粒子と銅箔表面の凹凸を埋めて平滑にするという表面状態の制御することであると考えられる。
　また、銅箔の表面処理層がめっき液に溶けやすい場合、表面処理銅箔の表面形態に及ぼす、表面処理終了後のめっき液中の浸漬時間の影響がより大きくなる傾向がある。 As a method for forming a surface profile of a resin substrate according to the present invention using a surface-treated copper foil, first, the surface roughness (maximum surface height) Sz of the surface treatment layer surface is controlled to 2 to 6 μm. A surface-treated copper foil is prepared. Next, it bonds together to the resin base material from the surface treatment layer side of the said surface treatment copper foil, and removes surface treatment copper foil by whole surface etching etc. As a result, the surface roughness Sz of the resin base material surface after the surface-treated copper foil is removed becomes 1 to 5 μm.
In the present invention, the “surface treatment layer surface” means the outermost surface on the surface-treated side.
That is, when a surface treatment layer such as a roughening treatment layer, a rust prevention layer, a heat resistance layer, a chromate treatment layer, a silane coupling treatment layer is provided on the copper foil, the surface treatment layer after the copper foil is provided with the surface treatment layer The surface.
Also, as the surface-treated copper foil, a resin base material is used in which the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the surface-treated layer is controlled to 1.05 to 1.8. When the surface-treated copper foil is removed by overall etching or the like, the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A of the resin substrate surface after the removal of the surface-treated copper foil is 1.01 to 1.5.
Similarly, as the surface-treated copper foil, the surface roughness Sz with a laser roughness meter is 2 to 6 μm, and the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A is 1.05 to 1.8. When the surface-treated copper foil is removed by whole surface etching or the like, the surface area of the resin base material is 10 to 50% black, and the surface of the resin base material is controlled. The average diameter of the holes can be controlled to 0.03 to 1.0 μm.
By controlling the current density of the surface treatment and the immersion time in the plating solution after completion of the surface treatment during the surface treatment such as the formation of the roughened particles, the surface state of the copper foil after the surface treatment, the form of the roughened particles, The formation density is determined, whereby the surface roughness Sz, the area ratio B / A, the black area ratio, and the average diameter of the holes of the surface-treated copper foil can be controlled.
Specifically, at the time of surface treatment such as when roughening particles are formed, the surface treatment is performed by controlling the current density of the surface treatment high, and then the surface treatment is performed by controlling the current density of the surface treatment low The surface state of the copper foil after the surface treatment, the form and formation density of the roughened particles are determined, and the surface roughness Sz, the area ratio B / A, the black area ratio, and the average diameter of the holes can be controlled. . It is also effective to repeatedly perform the surface treatment by controlling the current density of the surface treatment high, and then performing the surface treatment by controlling the current density of the surface treatment low.
Here, when the current density of the surface treatment is increased during the surface treatment such as during the formation of roughened particles, the deposited metal particles tend to grow in a direction perpendicular to the surface of the copper foil. Moreover, when the current density of the surface treatment is lowered during the surface treatment such as the formation of roughened particles, the copper foil surface tends to be smooth (unevenness is reduced).
Therefore, the surface treatment is performed by controlling the current density of the surface treatment high, and then the surface treatment is performed by controlling the current density of the surface treatment low. It is considered that the surface state is controlled by filling the metal particles and the copper foil surface with unevenness and smoothing the surface.
Moreover, when the surface treatment layer of copper foil is easy to melt | dissolve in a plating solution, there exists a tendency for the influence of the immersion time in the plating solution after completion | finish of a surface treatment which acts on the surface form of a surface treatment copper foil to become larger.
　薬液を用いた処理による本発明に係る樹脂基材の表面プロファイル（上記面粗さＳｚ、面積比Ｂ／Ａ、黒色面積率、穴の直径平均値）の形成方法としては、樹脂基材に以下の浸漬処理条件Ａ又はＢにてデスミア処理を行い、その後中和処理を行うことで形成することができる。 As a method of forming the surface profile of the resin base material according to the present invention by the treatment using the chemical solution (the surface roughness Sz, the area ratio B / A, the black area ratio, the hole diameter average value), the following is applied to the resin base material. It can form by performing a desmear process on the immersion process conditions A or B of No. 1, and performing a neutralization process after that.
　（デスミア処理条件Ａ）
　・デスミア処理液：４０ｇ／Ｌ　ＫＭｎＯ4、２０ｇ／Ｌ　ＮａＯＨ
　・処理温度：室温
　・浸漬時間：２０分
　・攪拌子回転数：３００ｒｐｍ
　（デスミア処理条件Ｂ）
　・デスミア処理液：９０ｇ／Ｌ　ＫＭｎＯ4、５ｇ／Ｌ　ＨＣｌ
　・処理温度：４９℃
　・浸漬時間：２０分
　・攪拌子回転数：３００ｒｐｍ
　（中和処理条件）
　・中和処理液：Ｌ－アスコルビン酸　８０ｇ／Ｌ
　・処理温度：室温
　・浸漬時間：３分
　・攪拌なし
　なお、本発明に用いられる、デスミア処理、電解、表面処理又はめっき等に用いられる処理液の残部は特に明記しない限り水である。 (Desmear processing condition A)
Desmear treatment liquid: 40 g / L KMnO 4 , 20 g / L NaOH
・ Processing temperature: Room temperature ・ Immersion time: 20 minutes ・ Rotating speed of stirring bar: 300 rpm
(Desmear processing condition B)
Desmear treatment solution: 90 g / L KMnO 4 , 5 g / L HCl
・ Processing temperature: 49 ℃
・ Immersion time: 20 minutes ・ Stirrer rotation speed: 300 rpm
(Neutralization conditions)
・ Neutralization treatment liquid: L-ascorbic acid 80g / L
-Treatment temperature: Room temperature-Immersion time: 3 minutes-No stirring Note that the balance of the treatment liquid used in the present invention, such as desmear treatment, electrolysis, surface treatment or plating, is water unless otherwise specified.
　また、上記浸漬処理の他に、以下の処理条件にて樹脂基材表面にシャワー処理Ａ、Ｂ及び中和処理を行うことでも、同様に樹脂基材の表面プロファイル（上記面粗さＳｚ、面積比Ｂ／Ａ、黒色面積率、穴の直径平均値）の形成を行うことができる。
　（シャワー処理条件Ａ）
　・デスミア処理液：４０ｇ／Ｌ　ＫＭｎＯ4、２０ｇ／Ｌ　ＮａＯＨ
　・処理温度：室温
　・処理時間：２０分
　・シャワー圧力：０．２ＭＰａ
　（シャワー処理条件Ｂ）
　・デスミア処理液：９０ｇ／Ｌ　ＫＭｎＯ4、５ｇ／Ｌ　ＨＣｌ
　・処理温度：４９℃
　・処理時間：２０分
　・シャワー圧力：０．２ＭＰａ
　（中和処理条件）
　・中和処理液：Ｌ－アスコルビン酸　８０ｇ／Ｌ
　・処理温度：室温
　・浸漬時間：３分
　・攪拌なし In addition to the immersion treatment, the surface profile of the resin substrate (the surface roughness Sz, the area is the same) by performing shower treatments A and B and neutralization treatment on the resin substrate surface under the following treatment conditions. (B / A ratio, black area ratio, hole diameter average value) can be formed.
(Shower treatment condition A)
Desmear treatment liquid: 40 g / L KMnO 4 , 20 g / L NaOH
・ Processing temperature: Room temperature ・ Processing time: 20 minutes ・ Shower pressure: 0.2 MPa
(Shower treatment condition B)
Desmear treatment solution: 90 g / L KMnO 4 , 5 g / L HCl
・ Processing temperature: 49 ℃
・ Processing time: 20 minutes ・ Shower pressure: 0.2 MPa
(Neutralization conditions)
・ Neutralization treatment liquid: L-ascorbic acid 80g / L
・ Processing temperature: Room temperature ・ Immersion time: 3 minutes ・ No stirring
　〔表面処理銅箔〕
　本発明に係る表面処理銅箔は、上記樹脂基材の表面プロファイルを形成するために用いることができる。当該表面処理銅箔において使用する銅箔は、電解銅箔或いは圧延銅箔いずれでもよい。当該銅箔の厚みは特に限定する必要は無いが、例えば１μｍ以上、２μｍ以上、３μｍ以上、５μｍ以上であり、例えば３０００μｍ以下、１５００μｍ以下、８００μｍ以下、３００μｍ以下、１５０μｍ以下、１００μｍ以下、７０μｍ以下、５０μｍ以下、４０μｍ以下である。 [Surface treated copper foil]
The surface-treated copper foil which concerns on this invention can be used in order to form the surface profile of the said resin base material. The copper foil used in the surface-treated copper foil may be an electrolytic copper foil or a rolled copper foil. The thickness of the copper foil is not particularly limited, but is, for example, 1 μm or more, 2 μm or more, 3 μm or more, 5 μm or more, for example, 3000 μm or less, 1500 μm or less, 800 μm or less, 300 μm or less, 150 μm or less, 100 μm or less, 70 μm or less. , 50 μm or less and 40 μm or less.
　本発明で使用する圧延銅箔にはＡｇ、Ｓｎ、Ｉｎ、Ｔｉ、Ｚｎ、Ｚｒ、Ｆｅ、Ｐ、Ｎｉ、Ｓｉ、Ｔｅ、Ｃｒ、Ｎｂ、Ｖ、Ｂ、Ｃｏ等の元素を一種以上含む銅合金箔も含まれる。上記元素の濃度が高くなる（例えば合計で１０質量％以上）と、導電率が低下する場合がある。圧延銅箔の導電率は、好ましくは５０％ＩＡＣＳ以上、より好ましくは６０％ＩＡＣＳ以上、更に好ましくは８０％ＩＡＣＳ以上である。また、圧延銅箔にはタフピッチ銅（ＪＩＳ　Ｈ３１００　Ｃ１１００）や無酸素銅（ＪＩＳ　Ｈ３１００　Ｃ１０２０）を用いて製造した銅箔も含まれる。なお、本明細書において用語「銅箔」を単独で用いたときには銅合金箔も含むものとする。 The rolled copper foil used in the present invention contains a copper alloy containing one or more elements such as Ag, Sn, In, Ti, Zn, Zr, Fe, P, Ni, Si, Te, Cr, Nb, V, B, and Co. Foil is also included. When the concentration of the above elements increases (for example, 10% by mass or more in total), the conductivity may decrease. The conductivity of the rolled copper foil is preferably 50% IACS or more, more preferably 60% IACS or more, and still more preferably 80% IACS or more. The rolled copper foil includes copper foil produced using tough pitch copper (JIS H3100 C1100) or oxygen-free copper (JIS H3100 C1020). In addition, when the term “copper foil” is used alone in this specification, a copper alloy foil is also included.
　また、本発明に用いることができる電解銅箔については、以下の電解液組成および製造条件で作製することができる。
　・一般電解生箔：
　＜電解液組成＞
　銅：８０～１２０ｇ／Ｌ
　硫酸：８０～１２０ｇ／Ｌ
　塩素：３０～１００ｐｐｍ
　レベリング剤（ニカワ）：０．１～１０ｐｐｍ
　・両面フラット電解生箔、キャリア付極薄銅箔のキャリア銅箔：
　＜電解液組成＞
　銅：８０～１２０ｇ／Ｌ
　硫酸：８０～１２０ｇ／Ｌ
　塩素：３０～１００ｐｐｍ
　レベリング剤１（ビス（３スルホプロピル）ジスルフィド）：１０～３０ｐｐｍ
　レベリング剤２（アミン化合物）：１０～３０ｐｐｍ
　上記のアミン化合物には以下の化学式のアミン化合物を用いることができる。 Moreover, about the electrolytic copper foil which can be used for this invention, it can produce with the following electrolyte solution composition and manufacturing conditions.
・ General electrolytic raw foil:
<Electrolyte composition>
Copper: 80-120 g / L
Sulfuric acid: 80-120 g / L
Chlorine: 30-100ppm
Leveling agent (Nika): 0.1-10ppm
・ Double-sided flat electrolytic foil, carrier copper foil of ultra-thin copper foil with carrier:
<Electrolyte composition>
Copper: 80-120 g / L
Sulfuric acid: 80-120 g / L
Chlorine: 30-100ppm
Leveling agent 1 (bis (3sulfopropyl) disulfide): 10 to 30 ppm
Leveling agent 2 (amine compound): 10 to 30 ppm
As the amine compound, an amine compound having the following chemical formula can be used.
Figure JPOXMLDOC01-appb-C000001
 （上記化学式中、Ｒ1及びＲ2はヒドロキシアルキル基、エーテル基、アリール基、芳香族置換アルキル基、不飽和炭化水素基、アルキル基からなる一群から選ばれるものである。）
Figure JPOXMLDOC01-appb-C000001
 (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.)
　＜製造条件＞
　電流密度：７０～１００Ａ／ｄｍ2
　電解液温度：５０～６５℃
　電解液線速：１．５～５ｍ／ｓｅｃ
　電解時間：０．５～１０分間（析出させる銅厚、電流密度により調整） <Production conditions>
Current density: 70-100 A / dm 2
Electrolyte temperature: 50-65 ° C
Electrolyte linear velocity: 1.5-5m / sec
Electrolysis time: 0.5 to 10 minutes (adjusted according to the thickness of copper to be deposited and current density)
　粗化処理として銅－コバルト－ニッケル合金めっき、銅－ニッケル－リン合金めっき、銅－ニッケル－タングステン合金めっき、銅－コバルト－タングステン合金めっきなどの合金めっき、より好ましくは銅合金めっきを用いることができる。粗化処理としての銅－コバルト－ニッケル合金めっきは、電解めっきにより、付着量が１５～４０ｍｇ／ｄｍ2の銅－１００～３０００μｇ／ｄｍ2のコバルト－１００～１５００μｇ／ｄｍ2のニッケルであるような３元系合金層を形成するように実施することができる。Ｃｏ付着量が１００μｇ／ｄｍ2未満では、耐熱性が悪化し、エッチング性が悪くなることがある。Ｃｏ付着量が３０００μｇ／ｄｍ2 を超えると、磁性の影響を考慮せねばならない場合には好ましくなく、エッチングシミが生じ、また、耐酸性及び耐薬品性の悪化がすることがある。Ｎｉ付着量が１００μｇ／ｄｍ2未満であると、耐熱性が悪くなることがある。他方、Ｎｉ付着量が１５００μｇ／ｄｍ2を超えると、エッチング残が多くなることがある。好ましいＣｏ付着量は１０００～２５００μｇ／ｄｍ2であり、好ましいニッケル付着量は５００～１２００μｇ／ｄｍ2である。ここで、エッチングシミとは、塩化銅でエッチングした場合、Ｃｏが溶解せずに残ってしまうことを意味しそしてエッチング残とは塩化アンモニウムでアルカリエッチングした場合、Ｎｉが溶解せずに残ってしまうことを意味するものである。 For the roughening treatment, alloy plating such as copper-cobalt-nickel alloy plating, copper-nickel-phosphorus alloy plating, copper-nickel-tungsten alloy plating, copper-cobalt-tungsten alloy plating, and more preferably copper alloy plating is used. it can. The copper-cobalt-nickel alloy plating as the roughening treatment is, as a result of electrolytic plating, an amount of adhesion of 15 to 40 mg / dm 2 of copper—100 to 3000 μg / dm 2 of cobalt—100 to 1500 μg / dm 2 of nickel. It can be carried out so as to form a ternary alloy layer. If the amount of deposited Co is less than 100 μg / dm 2 , the heat resistance may deteriorate and the etching property may deteriorate. When the amount of Co deposition exceeds 3000 μg / dm 2 , it is not preferable when the influence of magnetism must be taken into account, etching spots may occur, and acid resistance and chemical resistance may deteriorate. If the Ni adhesion amount is less than 100 μg / dm 2 , the heat resistance may deteriorate. On the other hand, when the Ni adhesion amount exceeds 1500 μg / dm 2 , the etching residue may increase. A preferable Co adhesion amount is 1000 to 2500 μg / dm 2 , and a preferable nickel adhesion amount is 500 to 1200 μg / dm 2 . Here, the etching stain means that Co remains without being dissolved when etched with copper chloride, and the etching residue means that Ni remains without being dissolved when alkaline etching is performed with ammonium chloride. It means that.
　このような３元系銅－コバルト－ニッケル合金めっきを形成するためのめっき浴及びめっき条件は次の通りである：
　めっき浴組成：Ｃｕ１０～２０ｇ／Ｌ、Ｃｏ１～１０ｇ／Ｌ、Ｎｉ１～１０ｇ／Ｌ
　ｐＨ：１～４
　温度：３０～５０℃
　電流密度Ｄk：２０～３０Ａ／ｄｍ2
　めっき時間：１～５秒
　めっき終了後の同めっき液浸漬時間：２０秒以下（２０秒よりも長く浸漬すると粒子形状が乱れるため）、好ましくは１０秒以下、より好ましくは５秒以下
　前記めっき終了後は、通常であれば特に急いでめっき液から取り出すことは無いが、本発明では、当該めっき終了後、所定の時間内にめっき液から取り出す必要がある。このため、上記のように前記めっき終了後の同めっき液浸漬時間を２０秒以下としている。当該浸漬時間が、２０秒を超えて浸漬してしまうと、めっき液により粗化粒子の一部が溶解している可能性がある。当該粗化粒子の一部の溶解が、粒子形状の乱れの原因の一つとなると考えられる。
　前記めっき終了後の同めっき液浸漬時間を１０秒以下、あるいは５秒以下と短くすることで、粒子形状をより乱れにくくすることができるため有効である。
　なお、銅－コバルト－ニッケル合金めっきと同様に、銅－コバルト－ニッケル合金めっき以外の合金めっきもめっき終了後の同めっき液浸漬時間を２０秒以下（２０秒よりも長く浸漬すると粒子形状が乱れるため）、好ましくは１０秒以下、より好ましくは５秒以下に制御することが重要である。当該浸漬時間が、２０秒を超えて浸漬してしまうと、めっき液により粗化粒子の一部が溶解している可能性がある。当該粗化粒子の一部の溶解が、粒子形状の乱れの原因の一つとなると考えられる。銅－コバルト－ニッケル合金めっき以外の合金めっきのｐＨ、温度、電流密度、めっき時間は公知の条件を用いることができる。
　前記めっき終了後の同めっき液浸漬時間を１０秒以下、あるいは５秒以下と短くすることで、粒子形状をより乱れにくくすることができるため有効である。
　また、表面処理として以下の粗化処理としての銅めっきを行うことも良い。以下の粗化処理としての銅めっきにより形成される表面処理層は銅濃度が高く、大部分が銅で構成される粗化処理層（めっき層）となる。銅濃度が高い、粗化処理層（めっき層）はメッキ液に溶けにくいという特徴がある。以下の粗化処理としての銅めっきは銅めっき１、銅めっき２の順に行う。 The plating bath and plating conditions for forming such a ternary copper-cobalt-nickel alloy plating are as follows:
Plating bath composition: Cu 10-20 g / L, Co 1-10 g / L, Ni 1-10 g / L
pH: 1 to 4
Temperature: 30-50 ° C
Current density D k : 20 to 30 A / dm 2
Plating time: 1 to 5 seconds Immersion time of the same plating solution after completion of plating: 20 seconds or less (because the particle shape is disturbed when immersed for longer than 20 seconds), preferably 10 seconds or less, more preferably 5 seconds or less Thereafter, if it is normal, it is not particularly quickly removed from the plating solution, but in the present invention, it is necessary to remove from the plating solution within a predetermined time after the completion of the plating. For this reason, as described above, the plating solution immersion time after the completion of the plating is set to 20 seconds or less. If the immersion time exceeds 20 seconds, a part of the roughened particles may be dissolved by the plating solution. It is considered that dissolution of a part of the roughened particles is one of the causes of the disturbance of the particle shape.
By shortening the plating solution immersion time after the completion of the plating to 10 seconds or less, or 5 seconds or less, the particle shape can be made more difficult to disturb, which is effective.
As with copper-cobalt-nickel alloy plating, alloy plating other than copper-cobalt-nickel alloy plating is less than 20 seconds after immersion of the plating solution after plating (the particle shape is disturbed if immersed for longer than 20 seconds). Therefore, it is important to control to 10 seconds or less, more preferably 5 seconds or less. If the immersion time exceeds 20 seconds, a part of the roughened particles may be dissolved by the plating solution. It is considered that dissolution of a part of the roughened particles is one of the causes of the disturbance of the particle shape. Known conditions can be used for the pH, temperature, current density, and plating time of alloy plating other than copper-cobalt-nickel alloy plating.
By shortening the plating solution immersion time after the completion of the plating to 10 seconds or less, or 5 seconds or less, the particle shape can be made more difficult to disturb, which is effective.
Further, copper plating as the following roughening treatment may be performed as the surface treatment. The surface treatment layer formed by copper plating as the following roughening treatment has a high copper concentration, and becomes a roughening treatment layer (plating layer) mostly composed of copper. A roughening layer (plating layer) having a high copper concentration is characterized by being hardly soluble in the plating solution. Copper plating as the following roughening treatment is performed in the order of copper plating 1 and copper plating 2.
・銅めっき１
（液組成１）
　　　Ｃｕ濃度：１０～３０ｇ／Ｌ
　　　Ｈ2ＳＯ4濃度：５０～１５０ｇ／Ｌ
　　　タングステン濃度：０．５～５０ｍｇ／Ｌ
　　　ドデシル硫酸ナトリウム： ０．５～５０ｍｇ／Ｌ
（電気めっき条件１）
　　温度： ３０～７０℃ 
（一段目電流条件）
　　　電流密度： １８～７０Ａ／ｄｍ2
　　　粗化クーロン量： １．８～１０００Ａ／ｄｍ2好ましくは１．８～５００Ａ／ｄｍ2
　　　めっき時間： ０．１～２０秒
（二段目電流条件）
　　　電流密度： ０．５～１３Ａ／ｄｍ2
　　　粗化クーロン量： ０．０５～１０００Ａ／ｄｍ2好ましくは０．０５～５００Ａ／ｄｍ2
　　　めっき時間： ０．１～２０秒
　なお、一段目と二段目を繰り返してもよい。また、一段目を１回または複数回行った後、二段目を１回または複数回行ってもよい。また、一段目を１回または複数回行った後、二段目を１回または複数回行うことを繰り返してもよい。 ・ Copper plating 1
(Liquid composition 1)
Cu concentration: 10-30 g / L
H 2 SO 4 concentration: 50 to 150 g / L
Tungsten concentration: 0.5-50mg / L
Sodium dodecyl sulfate: 0.5-50 mg / L
(Electroplating condition 1)
Temperature: 30-70 ° C
(First stage current condition)
Current density: 18 to 70 A / dm 2
Roughening coulomb amount: 1.8 to 1000 A / dm 2, preferably 1.8 to 500 A / dm 2
Plating time: 0.1 to 20 seconds (second stage current condition)
Current density: 0.5-13 A / dm 2
Roughening coulomb amount: 0.05 to 1000 A / dm 2, preferably 0.05 to 500 A / dm 2
Plating time: 0.1 to 20 seconds Note that the first and second steps may be repeated. Further, after the first stage is performed once or a plurality of times, the second stage may be performed once or a plurality of times. Further, after the first stage is performed once or a plurality of times, the second stage may be repeated once or a plurality of times.
・銅めっき２
（液組成２）
　　　Ｃｕ濃度：２０～８０ｇ／Ｌ
　　　Ｈ2ＳＯ4濃度：５０～２００ｇ／Ｌ
（電気めっき条件２）
　　温度： ３０～７０℃
　（電流条件）
　　　電流密度： ５～５０Ａ／ｄｍ2
　　粗化クーロン量： ５０～３００Ａ／ｄｍ2
　　　めっき時間： １～６０秒
　また、銅箔上に前述の銅－コバルト－ニッケル合金めっきなどの合金めっきと前述の銅めっきを組み合わせて行ってもよい。銅箔上に前述の銅めっきを行った後に、前述の合金めっきを行うことが好ましい。 ・ Copper plating 2
(Liquid composition 2)
Cu concentration: 20-80g / L
H 2 SO 4 concentration: 50 to 200 g / L
(Electroplating condition 2)
Temperature: 30-70 ° C
(Current condition)
Current density: 5 to 50 A / dm 2
Roughening coulomb amount: 50 to 300 A / dm 2
Plating time: 1 to 60 seconds Further, the above-described copper plating may be combined with the above-described alloy plating such as copper-cobalt-nickel alloy plating on the copper foil. It is preferable to perform the alloy plating described above after the copper plating is performed on the copper foil.
　本発明において、銅箔上に形成する表面処理層は、粗化処理層であってもよい。粗化処理は、通常、銅箔の、樹脂基板と接着する面、即ち表面処理側の表面に積層後の銅箔の引き剥し強さを向上させることを目的として、脱脂後の銅箔の表面にふしこぶ状の電着を形成する処理を云う。電解銅箔は製造時点で凹凸を有しているが、粗化処理により電解銅箔の凸部を増強して凹凸を一層大きくすることができる。粗化処理は、例えば、銅又は銅合金で粗化粒子を形成することにより行うことができる。粗化処理は微細なものであっても良い。粗化処理層は、銅、ニッケル、コバルト、リン、タングステン、ヒ素、モリブデン、クロム及び亜鉛からなる群から選択されたいずれかの単体又はいずれか１種以上を含む合金からなる層などであってもよい。また、銅又は銅合金で粗化粒子を形成した後、更にニッケル、コバルト、銅、亜鉛の単体または合金等で二次粒子や三次粒子を設ける粗化処理を行うこともできる。また、粗化処理層の表面に、耐熱層、防錆層、クロメート処理層及びシランカップリング処理層からなる群から選択された１種以上の層を形成してもよい。 In the present invention, the surface treatment layer formed on the copper foil may be a roughening treatment layer. The roughening treatment is usually performed on the surface of the copper foil after degreasing for the purpose of improving the peel strength of the copper foil after being laminated on the surface of the copper foil to be bonded to the resin substrate, that is, the surface on the surface treatment side. A process for forming a fist-like electrodeposition. Although the electrolytic copper foil has irregularities at the time of manufacture, the irregularities can be further increased by enhancing the convex portions of the electrolytic copper foil by roughening treatment. The roughening treatment can be performed, for example, by forming roughened particles with copper or a copper alloy. The roughening process may be fine. The roughening treatment layer is a layer made of any single element selected from the group consisting of copper, nickel, cobalt, phosphorus, tungsten, arsenic, molybdenum, chromium and zinc, or an alloy containing one or more of them. Also good. Moreover, after forming the roughened particles with copper or a copper alloy, a roughening treatment can be performed in which secondary particles or tertiary particles are further formed of nickel, cobalt, copper, zinc alone or an alloy. Moreover, you may form 1 or more types of layers selected from the group which consists of a heat-resistant layer, a rust prevention layer, a chromate processing layer, and a silane coupling processing layer on the surface of a roughening processing layer.
　また、本発明において銅箔上に形成する表面処理層は、粗化処理層、耐熱層、防錆層、クロメート処理層及びシランカップリング処理層からなる群から選択された１種以上の層であってもよい。
　耐熱層、防錆層としては公知の耐熱層、防錆層を用いることが出来る。例えば、耐熱層および／または防錆層はニッケル、亜鉛、錫、コバルト、モリブデン、銅、タングステン、リン、ヒ素、クロム、バナジウム、チタン、アルミニウム、金、銀、白金族元素、鉄、タンタルの群から選ばれる１種以上の元素を含む層であってもよく、ニッケル、亜鉛、錫、コバルト、モリブデン、銅、タングステン、リン、ヒ素、クロム、バナジウム、チタン、アルミニウム、金、銀、白金族元素、鉄、タンタルの群から選ばれる１種以上の元素からなる金属層または合金層であってもよい。また、耐熱層および／または防錆層はニッケル、亜鉛、錫、コバルト、モリブデン、銅、タングステン、リン、ヒ素、クロム、バナジウム、チタン、アルミニウム、金、銀、白金族元素、鉄、タンタルの群から選ばれる１種以上の元素を含む酸化物、窒化物、珪化物を含んでもよい。また、耐熱層および／または防錆層はニッケル－亜鉛合金を含む層であってもよい。また、耐熱層および／または防錆層はニッケル－亜鉛合金層であってもよい。前記ニッケル－亜鉛合金層は、不可避不純物を除き、ニッケルを５０ｗｔ％～９９ｗｔ％、亜鉛を５０ｗｔ％～１ｗｔ％含有するものであってもよい。前記ニッケル－亜鉛合金層の亜鉛及びニッケルの合計付着量が５～１０００ｍｇ／ｍ2、好ましくは１０～５００ｍｇ／ｍ2、好ましくは２０～１００ｍｇ／ｍ2であってもよい。また、前記ニッケル－亜鉛合金を含む層または前記ニッケル－亜鉛合金層のニッケルの付着量と亜鉛の付着量との比（＝ニッケルの付着量／亜鉛の付着量）が１．５～１０であることが好ましい。また、前記ニッケル－亜鉛合金を含む層または前記ニッケル－亜鉛合金層のニッケルの付着量は０．５ｍｇ／ｍ2～５００ｍｇ／ｍ2であることが好ましく、１ｍｇ／ｍ2～５０ｍｇ／ｍ2であることがより好ましい。耐熱層および／または防錆層がニッケル－亜鉛合金を含む層である場合、スルーホールやビアホール等の内壁部がデスミア液と接触したときに銅箔と樹脂基板との界面がデスミア液に浸食されにくく、銅箔と樹脂基板との密着性が向上する。 In the present invention, the surface treatment layer formed on the copper foil is one or more layers selected from the group consisting of a roughening treatment layer, a heat-resistant layer, a rust prevention layer, a chromate treatment layer, and a silane coupling treatment layer. There may be.
As the heat-resistant layer and the rust-proof layer, known heat-resistant layers and rust-proof layers can be used. For example, the heat-resistant layer and / or the anticorrosive layer is a group of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, platinum group elements, iron, tantalum A layer containing one or more elements selected from nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, platinum group elements Further, it may be a metal layer or an alloy layer made of one or more elements selected from the group consisting of iron, tantalum and the like. The heat-resistant layer and / or rust preventive layer is a group of nickel, zinc, tin, cobalt, molybdenum, copper, tungsten, phosphorus, arsenic, chromium, vanadium, titanium, aluminum, gold, silver, platinum group elements, iron, and tantalum. An oxide, nitride, or silicide containing one or more elements selected from the above may be included. Further, the heat-resistant layer and / or the rust preventive layer may be a layer containing a nickel-zinc alloy. Further, the heat-resistant layer and / or the rust preventive layer may be a nickel-zinc alloy layer. The nickel-zinc alloy layer may contain 50 wt% to 99 wt% nickel and 50 wt% to 1 wt% zinc, excluding inevitable impurities. The total adhesion amount of zinc and nickel in the nickel-zinc alloy layer may be 5 to 1000 mg / m 2 , preferably 10 to 500 mg / m 2 , preferably 20 to 100 mg / m 2 . The ratio of the nickel adhesion amount and the zinc adhesion amount of the layer containing the nickel-zinc alloy or the nickel-zinc alloy layer (= nickel adhesion amount / zinc adhesion amount) is 1.5 to 10. It is preferable. Further, the amount of nickel deposited on the layer containing the nickel-zinc alloy or the nickel-zinc alloy layer is preferably 0.5 mg / m 2 to 500 mg / m 2 , and 1 mg / m 2 to 50 mg / m 2 . More preferably. When the heat-resistant layer and / or rust prevention layer is a layer containing a nickel-zinc alloy, the interface between the copper foil and the resin substrate is eroded by the desmear liquid when the inner wall of a through hole or via hole comes into contact with the desmear liquid. It is difficult to improve the adhesion between the copper foil and the resin substrate.
　例えば耐熱層および／または防錆層は、付着量が１ｍｇ／ｍ2～１００ｍｇ／ｍ2、好ましくは５ｍｇ／ｍ2～５０ｍｇ／ｍ2のニッケルまたはニッケル合金層と、付着量が１ｍｇ／ｍ2～８０ｍｇ／ｍ2、好ましくは５ｍｇ／ｍ2～４０ｍｇ／ｍ2のスズ層とを順次積層したものであってもよく、前記ニッケル合金層はニッケル－モリブデン、ニッケル－亜鉛、ニッケル－モリブデン－コバルトのいずれか一種により構成されてもよい。また、耐熱層および／または防錆層は、ニッケルまたはニッケル合金とスズとの合計付着量が２ｍｇ／ｍ2～１５０ｍｇ／ｍ2であることが好ましく、１０ｍｇ／ｍ2～７０ｍｇ／ｍ2であることがより好ましい。また、耐熱層および／または防錆層は、［ニッケルまたはニッケル合金中のニッケル付着量］／［スズ付着量］＝０．２５～１０であることが好ましく、０．３３～３であることがより好ましい。当該耐熱層および／または防錆層を用いるとキャリア付銅箔をプリント配線板に加工して以降の回路の引き剥がし強さ、当該引き剥がし強さの耐薬品性劣化率等が良好になる。 For example, the heat-resistant layer and / or the rust preventive layer has a nickel or nickel alloy layer with an adhesion amount of 1 mg / m 2 to 100 mg / m 2 , preferably 5 mg / m 2 to 50 mg / m 2 , and an adhesion amount of 1 mg / m 2. A tin layer of ˜80 mg / m 2 , preferably 5 mg / m 2 ˜40 mg / m 2 may be sequentially laminated. The nickel alloy layer may be nickel-molybdenum, nickel-zinc, nickel-molybdenum-cobalt. You may be comprised by any one of these. The heat-resistant layer and / or rust-preventing layer preferably has a total adhesion amount of nickel or nickel alloy and tin of 2 mg / m 2 to 150 mg / m 2 and 10 mg / m 2 to 70 mg / m 2 . It is more preferable. In addition, the heat-resistant layer and / or the rust-preventing layer preferably has [amount of nickel deposited in nickel or nickel alloy] / [amount of tin deposited] = 0.25 to 10, preferably 0.33 to 3. More preferred. When the heat-resistant layer and / or rust-preventing layer is used, the carrier-clad copper foil is processed into a printed wiring board, and the subsequent circuit peeling strength, the chemical resistance deterioration rate of the peeling strength, and the like are improved.
　なお、シランカップリング処理に用いられるシランカップリング剤には公知のシランカップリング剤を用いてよく、例えばアミノ系シランカップリング剤又はエポキシ系シランカップリング剤、メルカプト系シランカップリング剤を用いてよい。また、シランカップリング剤にはビニルトリメトキシシラン、ビニルフェニルトリメトキシラン、γ－メタクリロキシプロピルトリメトキシシラン、γ－グリシドキシプロピルトリメトキシシラン、４－グリシジルブチルトリメトキシシラン、γ－アミノプロピルトリエトキシシラン、Ｎ－β（アミノエチル）γ－アミノプロピルトリメトキシシラン、Ｎ－３－（４－（３－アミノプロポキシ）プトキシ）プロピル－３－アミノプロピルトリメトキシシラン、イミダゾールシラン、トリアジンシラン、γ－メルカプトプロピルトリメトキシシラン等を用いてもよい。 In addition, you may use a well-known silane coupling agent for the silane coupling agent used for a silane coupling process, for example, using an amino-type silane coupling agent or an epoxy-type silane coupling agent, a mercapto-type silane coupling agent. Good. Silane coupling agents include vinyltrimethoxysilane, vinylphenyltrimethoxylane, γ-methacryloxypropyltrimethoxysilane, γ-glycidoxypropyltrimethoxysilane, 4-glycidylbutyltrimethoxysilane, and γ-aminopropyl. Triethoxysilane, N-β (aminoethyl) γ-aminopropyltrimethoxysilane, N-3- (4- (3-aminopropoxy) ptoxy) propyl-3-aminopropyltrimethoxysilane, imidazole silane, triazine silane, γ-mercaptopropyltrimethoxysilane or the like may be used.
　前記シランカップリング処理層は、エポキシ系シラン、アミノ系シラン、メタクリロキシ系シラン、メルカプト系シランなどのシランカップリング剤などを使用して形成してもよい。なお、このようなシランカップリング剤は、２種以上混合して使用してもよい。中でも、アミノ系シランカップリング剤又はエポキシ系シランカップリング剤を用いて形成したものであることが好ましい。 The silane coupling treatment layer may be formed using a silane coupling agent such as epoxy silane, amino silane, methacryloxy silane, mercapto silane, or the like. In addition, you may use 2 or more types of such silane coupling agents in mixture. Especially, it is preferable to form using an amino-type silane coupling agent or an epoxy-type silane coupling agent.
　ここで言うアミノ系シランカップリング剤とは、Ｎ－（２－アミノエチル）－３－アミノプロピルトリメトキシシラン、３－（Ｎ－スチリルメチル－２－アミノエチルアミノ）プロピルトリメトキシシラン、３－アミノプロピルトリエトキシシラン、ビス（２－ヒドロキシエチル）－３－アミノプロピルトリエトキシシラン、アミノプロピルトリメトキシシラン、Ｎ－メチルアミノプロピルトリメトキシシラン、Ｎ－フェニルアミノプロピルトリメトキシシラン、Ｎ－（３－アクリルオキシ－２－ヒドロキシプロピル）－３－アミノプロピルトリエトキシシラン、４－アミノブチルトリエトキシシラン、（アミノエチルアミノメチル）フェネチルトリメトキシシラン、Ｎ－（２－アミノエチル－３－アミノプロピル）トリメトキシシラン、Ｎ－（２－アミノエチル－３－アミノプロピル）トリス（２－エチルヘキソキシ）シラン、６－（アミノヘキシルアミノプロピル）トリメトキシシラン、アミノフェニルトリメトキシシラン、３－（１－アミノプロポキシ）－３，３－ジメチル－１－プロペニルトリメトキシシラン、３－アミノプロピルトリス（メトキシエトキシエトキシ）シラン、３－アミノプロピルトリエトキシシラン、３－アミノプロピルトリメトキシシラン、ω－アミノウンデシルトリメトキシシラン、３－（２－Ｎ－ベンジルアミノエチルアミノプロピル）トリメトキシシラン、ビス（２－ヒドロキシエチル）－３－アミノプロピルトリエトキシシラン、（Ｎ，Ｎ－ジエチル－３－アミノプロピル）トリメトキシシラン、（Ｎ，Ｎ－ジメチル－３－アミノプロピル）トリメトキシシラン、Ｎ－メチルアミノプロピルトリメトキシシラン、Ｎ－フェニルアミノプロピルトリメトキシシラン、３－（Ｎ－スチリルメチル－２－アミノエチルアミノ）プロピルトリメトキシシラン、γ－アミノプロピルトリエトキシシラン、Ｎ－β（アミノエチル）γ－アミノプロピルトリメトキシシラン、Ｎ－３－（４－（３－アミノプロポキシ）プトキシ）プロピル－３－アミノプロピルトリメトキシシランからなる群から選択されるものであってもよい。 The amino silane coupling agent referred to here is N- (2-aminoethyl) -3-aminopropyltrimethoxysilane, 3- (N-styrylmethyl-2-aminoethylamino) propyltrimethoxysilane, 3- Aminopropyltriethoxysilane, bis (2-hydroxyethyl) -3-aminopropyltriethoxysilane, aminopropyltrimethoxysilane, N-methylaminopropyltrimethoxysilane, N-phenylaminopropyltrimethoxysilane, N- (3 -Acryloxy-2-hydroxypropyl) -3-aminopropyltriethoxysilane, 4-aminobutyltriethoxysilane, (aminoethylaminomethyl) phenethyltrimethoxysilane, N- (2-aminoethyl-3-aminopropyl) Trimethoxysilane, -(2-aminoethyl-3-aminopropyl) tris (2-ethylhexoxy) silane, 6- (aminohexylaminopropyl) trimethoxysilane, aminophenyltrimethoxysilane, 3- (1-aminopropoxy) -3,3 -Dimethyl-1-propenyltrimethoxysilane, 3-aminopropyltris (methoxyethoxyethoxy) silane, 3-aminopropyltriethoxysilane, 3-aminopropyltrimethoxysilane, ω-aminoundecyltrimethoxysilane, 3- ( 2-N-benzylaminoethylaminopropyl) trimethoxysilane, bis (2-hydroxyethyl) -3-aminopropyltriethoxysilane, (N, N-diethyl-3-aminopropyl) trimethoxysilane, (N, N -Dimethyl-3-aminopropyl) Trimethoxysilane, N-methylaminopropyltrimethoxysilane, N-phenylaminopropyltrimethoxysilane, 3- (N-styrylmethyl-2-aminoethylamino) propyltrimethoxysilane, γ-aminopropyltriethoxysilane, N Even one selected from the group consisting of -β (aminoethyl) γ-aminopropyltrimethoxysilane and N-3- (4- (3-aminopropoxy) ptoxy) propyl-3-aminopropyltrimethoxysilane Good.
　シランカップリング処理層は、ケイ素原子換算で、０．０５ｍｇ／ｍ2～２００ｍｇ／ｍ2、好ましくは０．１５ｍｇ／ｍ2～２０ｍｇ／ｍ2、好ましくは０．３ｍｇ／ｍ2～２．０ｍｇ／ｍ2の範囲で設けられていることが望ましい。前述の範囲の場合、基材と表面処理銅箔との密着性をより向上させることが出来る。 The silane coupling treatment layer is 0.05 mg / m 2 to 200 mg / m 2 , preferably 0.15 mg / m 2 to 20 mg / m 2 , preferably 0.3 mg / m 2 to 2.0 mg in terms of silicon atoms. / M 2 is desirable. In the case of the above-mentioned range, the adhesiveness between the substrate and the surface-treated copper foil can be further improved.
　〔表面処理銅箔の面粗さＳｚ〕
　SAP工法において、従来、回路を形成する基材表面のプロファイル形状を定量化する方法として、接触式粗さ計を用いた粗度測定が一般的であった。これに対し、本発明では、レーザー粗さ測定計で測定される面粗さ（表面の最大高さ）Ｓｚが適性範囲に規定された基材表面のプロファイル形状が、より良好に微細配線形成性を維持し、且つ、無電解銅めっき皮膜の良好な密着力を実現することを見出した。このような観点から、本発明に係る表面処理銅箔は、表面処理層表面の面粗さＳｚが２～６μｍに制御されている。表面処理層表面の面粗さＳｚが２～６μｍに制御されていることにより、当該表面処理銅箔を表面処理層側から基材に貼り合わせて、表面処理銅箔を除去した後の基材の、銅箔除去側表面の面粗さＳｚが１～５μｍとなる。表面処理銅箔の表面処理層表面の面粗さＳｚが２μｍ未満であると、当該表面処理銅箔を表面処理層側から基材に貼り合わせて、表面処理銅箔を除去した後の基材の、銅箔除去側表面の面粗さＳｚが１μｍ未満となり、無電解銅めっき皮膜の良好な密着力の実現が困難となる。また、表面処理銅箔の表面処理層表面の面粗さＳｚが６μｍ超であると、当該表面処理銅箔を表面処理層側から基材に貼り合わせて、表面処理銅箔を除去した後の基材の、銅箔除去側表面の面粗さＳｚが５μｍ超となり、微細配線形成性が劣化する。本発明に係る表面処理銅箔の表面処理層表面の面粗さＳｚは好ましくは２～５．５μｍ、より好ましくは２．５～５．５μｍ、更により好ましくは３～５μｍである。本発明に係る上記表面処理銅箔を除去した後の基材表面の面粗さＳｚは好ましくは１～４μｍ、より好ましくは１．５～３．５μｍ、更により好ましくは２～３μｍである。 [Surface roughness Sz of surface-treated copper foil]
In the SAP method, conventionally, as a method for quantifying the profile shape of the surface of a substrate forming a circuit, roughness measurement using a contact-type roughness meter has been common. On the other hand, in the present invention, the profile shape on the surface of the base material in which the surface roughness (maximum surface height) Sz measured by a laser roughness meter is defined in an appropriate range is more excellent in fine wiring formability. It was found that good adhesion of the electroless copper plating film was achieved. From such a viewpoint, the surface-treated copper foil according to the present invention has a surface roughness Sz of 2 to 6 μm on the surface-treated layer surface. The substrate after the surface-treated copper foil is removed by bonding the surface-treated copper foil to the substrate from the surface-treated layer side by controlling the surface roughness Sz of the surface-treated layer to 2 to 6 μm. The surface roughness Sz of the copper foil removal side surface is 1 to 5 μm. When the surface roughness Sz of the surface-treated layer surface of the surface-treated copper foil is less than 2 μm, the surface-treated copper foil is bonded to the substrate from the surface-treated layer side and the surface-treated copper foil is removed. The surface roughness Sz of the copper foil removal side surface becomes less than 1 μm, and it becomes difficult to achieve good adhesion of the electroless copper plating film. Moreover, when surface roughness Sz of the surface treatment layer surface of surface treatment copper foil is more than 6 micrometers, the said surface treatment copper foil is bonded together to a base material from the surface treatment layer side, and surface treatment copper foil is removed. The surface roughness Sz of the substrate on the copper foil removal side surface exceeds 5 μm, and the fine wiring formability deteriorates. The surface roughness Sz of the surface-treated layer of the surface-treated copper foil according to the present invention is preferably 2 to 5.5 μm, more preferably 2.5 to 5.5 μm, and still more preferably 3 to 5 μm. The surface roughness Sz of the substrate surface after removing the surface-treated copper foil according to the present invention is preferably 1 to 4 μm, more preferably 1.5 to 3.5 μm, and still more preferably 2 to 3 μm.
　〔表面処理銅箔の面積比Ｂ／Ａ〕
　表面処理銅箔の表面処理側の表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａは、当該表面処理銅箔を表面処理層側から基材に貼り合わせて、表面処理銅箔を除去した後の基材の表面のプロファイル形状に大いに影響を及ぼす。このような観点から、本発明に係る表面処理銅箔は、表面処理層表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８に制御されているのが好ましい。ここで、表面処理側の表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａは、例えば当該表面が粗化処理されている場合、粗化粒子の表面積Ｂと、銅箔を銅箔表面側から平面視したときに得られる面積Ａとの比Ｂ／Ａとも云うことができる。表面処理銅箔の表面処理側の表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８に制御されていることにより、当該表面処理銅箔を表面処理層側から基材に貼り合わせて、表面処理銅箔を除去した後の基材の、銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる。表面処理銅箔の表面処理側の表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５未満であると、当該表面処理銅箔を表面処理層側から基材に貼り合わせて、表面処理銅箔を除去した後の基材の、銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１未満となり、無電解銅めっき皮膜の良好な密着力の実現が困難となる。また、表面処理銅箔の表面処理側の表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．８超であると、当該表面処理銅箔を表面処理層側から基材に貼り合わせて、表面処理銅箔を除去した後の基材の、銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．５超となり、微細配線形成性が劣化する。本発明に係る表面処理銅箔の表面処理層表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａは好ましくは１．１０～１．７５、より好ましくは１．１４～１．７１、更により好ましくは１．１８～１．６７である。本発明に係る上記表面処理銅箔を除去した後の基材表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａは好ましくは１．０３～１．４、より好ましくは１．０５～１．３５、更により好ましくは１．１～１．３である。 [Area ratio B / A of surface-treated copper foil]
The ratio B / A of the three-dimensional surface area B and the two-dimensional surface area A on the surface-treated surface of the surface-treated copper foil is obtained by bonding the surface-treated copper foil to the base material from the surface-treated layer side. It greatly affects the profile shape of the surface of the substrate after the removal of. From such a viewpoint, in the surface-treated copper foil according to the present invention, the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the surface-treated layer surface is controlled to 1.05 to 1.8. Is preferred. Here, the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A of the surface on the surface treatment side is, for example, when the surface is roughened, and the surface area B of the roughened particles and the copper foil are copper. It can also be referred to as the ratio B / A to the area A obtained when viewed in plan from the foil surface side. The surface-treated copper foil is surface-treated by controlling the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the surface-treated surface of the surface-treated copper foil to 1.05 to 1.8. The ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A of the surface after removing the surface-treated copper foil from the layer side and the surface-treated copper foil is 1.01 to 1 .5. When the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface-treated surface of the surface-treated copper foil is less than 1.05, the surface-treated copper foil is attached to the substrate from the surface-treated layer side. In addition, the ratio B / A of the three-dimensional surface area B and the two-dimensional surface area A on the copper foil removal side surface of the substrate after removing the surface-treated copper foil is less than 1.01, and the electroless copper plating film It becomes difficult to achieve good adhesion. Further, when the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface treatment side surface of the surface-treated copper foil is more than 1.8, the surface-treated copper foil is removed from the surface treatment layer side to the base material. The ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the copper foil removal side surface of the substrate after removing the surface-treated copper foil is 1.5 and the fine wiring formability Deteriorates. The ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface treatment layer surface of the surface-treated copper foil according to the present invention is preferably 1.10 to 1.75, more preferably 1.14 to 1.71. Even more preferably, it is 1.18 to 1.67. The ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the substrate surface after removing the surface-treated copper foil according to the present invention is preferably 1.03 to 1.4, more preferably 1.05. To 1.35, even more preferably 1.1 to 1.3.
　〔表面処理銅箔の黒色面積率及び穴の直径平均値〕
　基材表面の凹凸の程度をSEM観察写真から得られる黒色面積率で示したとき、当該黒色面積率を所定の範囲で有する基材の表面のプロファイル形状は、微細配線形成性が良好で、且つ、無電解銅めっき皮膜の良好な密着力を実現する。このような観点から、本発明に係る表面処理銅箔は、表面処理層側から基材に貼り合わせ、表面処理銅箔を除去したとき、基材の銅箔除去側表面の黒色面積率が１０～５０％となるように制御されているのが好ましい。ここで、黒色面積率として、基材表面のSEM像（30k倍）について、Photo Shop 7.0ソフトウェアを使用し、白色・黒色画像処理を施し、当該黒色領域の面積率（％）を求めた。黒色面積率（％）は、Photo Shop 7.0にある「イメージ」の「ヒストグラム」を選定し、閾値128における比率とした。なお、黒色領域は測定表面が凹状、白色部は測定表面が凸状になっていることを示す。基材表面の当該黒色面積率が１０％未満であると、無電解銅めっき皮膜の良好な密着力の実現が困難となる。基材表面の当該黒色面積率が５０％超であると、微細配線形成性が劣化する。 [Black area ratio of surface-treated copper foil and average diameter of holes]
When the degree of unevenness on the surface of the substrate is indicated by the black area ratio obtained from the SEM observation photograph, the profile shape of the surface of the substrate having the black area ratio in a predetermined range has good fine wiring formability, and Realizes good adhesion of electroless copper plating film. From such a viewpoint, when the surface-treated copper foil according to the present invention is bonded to the base material from the surface-treated layer side and the surface-treated copper foil is removed, the black area ratio of the surface of the base material on the copper foil removal side is 10 It is preferably controlled to be ˜50%. Here, as the black area ratio, the SEM image (30 k times) of the substrate surface was subjected to white / black image processing using Photoshop 7.0 software, and the area ratio (%) of the black area was obtained. For the black area ratio (%), a “histogram” of “image” in Photoshop 7.0 was selected, and the ratio at the threshold value 128 was used. The black region indicates that the measurement surface is concave, and the white portion indicates that the measurement surface is convex. If the black area ratio on the surface of the substrate is less than 10%, it is difficult to achieve good adhesion of the electroless copper plating film. If the black area ratio on the surface of the substrate is more than 50%, the fine wiring formability deteriorates.
　黒色面積比率と同時に、表面の穴の直径平均値を所定の範囲で有する樹脂基材の表面のプロファイル形状は、微細配線形成性が良好で、且つ、無電解銅めっき皮膜の良好な密着力を実現するための必要条件である。その理由は、黒色面積比率だけではプロファイルのサイズとその平面上の適切な分布を満足しないためである。このような観点から、本発明に係る樹脂基材表面の穴の直径平均値が０．０３～１．０μｍとなるように制御されている。樹脂基材表面の当該穴の直径平均値が０．０３μｍ未満であると、無電解銅めっき皮膜の良好な密着力の実現が困難となる。樹脂基材表面の当該穴の直径平均値が１．０μｍ超であると、微細配線形成性が劣化する。 At the same time as the black area ratio, the profile shape of the surface of the resin base material having a diameter average value of holes on the surface within a predetermined range has good fine wiring formability and good adhesion of the electroless copper plating film It is a necessary condition to realize. The reason is that the black area ratio alone does not satisfy the profile size and the appropriate distribution on the plane. From such a viewpoint, the average diameter value of the holes on the surface of the resin substrate according to the present invention is controlled to be 0.03 to 1.0 μm. If the average diameter of the holes on the surface of the resin substrate is less than 0.03 μm, it is difficult to achieve good adhesion of the electroless copper plating film. If the average diameter value of the holes on the surface of the resin substrate is more than 1.0 μm, the fine wiring formability deteriorates.
　このように、本発明に係る樹脂基材は、基材表面の当該黒色面積比率が１０～５０％であり且つ当該穴の直径平均値が０．０３～１．０μｍであるのが好ましく、黒色面積比率が１５～４５％であり且つ穴の直径平均値が０．１～０．８μｍであるのがより好ましく、黒色面積比率が２０～４０％であり且つ穴の直径平均値が０．１５～０．７μｍであるのが更により好ましい。 As described above, the resin base material according to the present invention preferably has a black surface area ratio of 10 to 50% on the base material surface and a diameter average value of the holes of 0.03 to 1.0 μm. More preferably, the area ratio is 15 to 45% and the average diameter of the holes is 0.1 to 0.8 μm, the black area ratio is 20 to 40% and the average diameter of the holes is 0.15. Even more preferably it is ˜0.7 μm.
　粗化粒子形成時などの表面処理時に表面処理の電流密度と表面処理終了後のメッキ液中の浸漬時間とを制御することで、表面処理後の銅箔の表面状態や粗化粒子の形態や形成密度が決まり、上記面粗さＳｚ、面積比Ｂ／Ａ、黒色面積率、及び、穴の直径平均値を制御することができる。
　具体的には、粗化粒子形成時などの表面処理時に、表面処理の電流密度を高く制御して表面処理を行い、続いて表面処理の電流密度を低く制御して表面処理を行うことで、表面処理後の銅箔の表面状態や粗化粒子の形態や形成密度が決まり、上記面粗さＳｚ、面積比Ｂ／Ａ、黒色面積率、及び、穴の直径平均値を制御することができる。また、表面処理の電流密度を高く制御して表面処理を行い、続いて表面処理の電流密度を低く制御して表面処理を行うことを繰り返し行うことも有効である。
　ここで、粗化粒子形成時などの表面処理時に表面処理の電流密度を高くすると、析出する金属粒子が、銅箔の表面に対して垂直方向に成長しやすい傾向にある。また、粗化粒子形成時などの表面処理時に表面処理の電流密度を低くすると、銅箔表面が平滑（凹凸が少なくなる）になりやすい傾向にある。
　そのため、表面処理の電流密度を高く制御して表面処理を行い、続いて表面処理の電流密度を低く制御して表面処理を行うことは、金属粒子を銅箔表面と垂直方向に成長させた後に、前記金属粒子と銅箔表面の凹凸を埋めて平滑にするという表面状態の制御することであると考えられる。
　また、銅箔の表面処理層がめっき液に溶けやすい場合、表面処理銅箔の表面形態に及ぼす、表面処理終了後のめっき液中の浸漬時間の影響がより大きくなる傾向がある。 By controlling the current density of the surface treatment and the immersion time in the plating solution after completion of the surface treatment during the surface treatment such as the formation of the roughened particles, the surface state of the copper foil after the surface treatment, the form of the roughened particles, The formation density is determined, and the surface roughness Sz, the area ratio B / A, the black area ratio, and the average diameter of the holes can be controlled.
Specifically, at the time of surface treatment such as when roughening particles are formed, the surface treatment is performed by controlling the current density of the surface treatment high, and then the surface treatment is performed by controlling the current density of the surface treatment low The surface state of the copper foil after the surface treatment, the form and formation density of the roughened particles are determined, and the surface roughness Sz, the area ratio B / A, the black area ratio, and the average diameter of the holes can be controlled. . It is also effective to repeatedly perform the surface treatment by controlling the current density of the surface treatment high, and then performing the surface treatment by controlling the current density of the surface treatment low.
Here, when the current density of the surface treatment is increased during the surface treatment such as during the formation of roughened particles, the deposited metal particles tend to grow in a direction perpendicular to the surface of the copper foil. Moreover, when the current density of the surface treatment is lowered during the surface treatment such as the formation of roughened particles, the copper foil surface tends to be smooth (unevenness is reduced).
Therefore, the surface treatment is performed by controlling the current density of the surface treatment high, and then the surface treatment is performed by controlling the current density of the surface treatment low. It is considered that the surface state is controlled by filling the metal particles and the copper foil surface with unevenness and smoothing the surface.
Moreover, when the surface treatment layer of copper foil is easy to melt | dissolve in a plating solution, there exists a tendency for the influence of the immersion time in the plating solution after completion | finish of a surface treatment which acts on the surface form of a surface treatment copper foil to become larger.
　〔キャリア付銅箔〕
　本発明に係る表面処理銅箔としては、キャリア付銅箔を用いても良い。キャリア付銅箔は、キャリアと、キャリア上に積層された中間層と、中間層上に積層された極薄銅層とを備える。また、キャリア付銅箔はキャリア、中間層および極薄銅層をこの順で備えても良い。キャリア付銅箔はキャリア側の表面および極薄銅層側の表面のいずれか一方または両方に粗化処理層等の表面処理層を有してもよい。
　キャリア付銅箔のキャリア側の表面に粗化処理層を設けた場合、キャリア付銅箔を当該キャリア側の表面側から樹脂基板などの支持体に積層する際、キャリアと樹脂基板などの支持体とが剥離し難くなるという利点を有する。 [Copper foil with carrier]
As the surface-treated copper foil according to the present invention, a copper foil with a carrier may be used. The copper foil with a carrier includes a carrier, an intermediate layer laminated on the carrier, and an ultrathin copper layer laminated on the intermediate layer. Moreover, the copper foil with a carrier may include a carrier, an intermediate layer, and an ultrathin copper layer in this order. The copper foil with a carrier may have a surface treatment layer such as a roughening treatment layer on one or both of the surface on the carrier side and the surface on the ultrathin copper layer side.
When a roughening treatment layer is provided on the carrier-side surface of the carrier-attached copper foil, when the carrier-attached copper foil is laminated on the support such as a resin substrate from the carrier-side surface side, the carrier and the support such as the resin substrate Has the advantage that it becomes difficult to peel off.
　＜キャリア＞
　本発明ではキャリアとして金属箔を使用することができる。金属箔としては銅箔、銅合金箔、ニッケル箔、ニッケル合金箔、アルミニウム箔、アルミニウム合金箔、鉄箔、鉄合金箔、ステンレス箔、亜鉛箔、亜鉛合金箔等を用いることができる。このうち、キャリアとしては、剥離層を形成しやすい点から、特に銅箔を使用することが好ましい。キャリアは典型的には圧延銅箔や電解銅箔の形態で提供される。一般的には、電解銅箔は硫酸銅めっき浴からチタンやステンレスのドラム上に銅を電解析出して製造され、圧延銅箔は圧延ロールによる塑性加工と熱処理を繰り返して製造される。銅箔の材料としてはタフピッチ銅や無酸素銅といった高純度の銅の他、例えばＳｎ入り銅、Ａｇ入り銅、Ｃｒ、Ｚｒ又はＭｇ等を添加した銅合金、Ｎｉ及びＳｉ等を添加したコルソン系銅合金のような銅合金も使用可能である。 <Career>
In the present invention, a metal foil can be used as a carrier. As the metal foil, copper foil, copper alloy foil, nickel foil, nickel alloy foil, aluminum foil, aluminum alloy foil, iron foil, iron alloy foil, stainless steel foil, zinc foil, zinc alloy foil and the like can be used. Among these, as the carrier, it is particularly preferable to use a copper foil because it is easy to form a release layer. The carrier is typically provided in the form of rolled copper foil or electrolytic copper foil. In general, the electrolytic copper foil is produced by electrolytic deposition of copper from a copper sulfate plating bath onto a drum of titanium or stainless steel, and the rolled copper foil is produced by repeating plastic working and heat treatment with a rolling roll. In addition to high-purity copper such as tough pitch copper and oxygen-free copper, the copper foil material is, for example, Sn-containing copper, Ag-containing copper, copper alloy added with Cr, Zr, Mg, etc., and Corson-based added with Ni, Si, etc. Copper alloys such as copper alloys can also be used.
　本発明に用いることのできるキャリアの厚さについても特に制限はないが、キャリアとしての役目を果たす上で適した厚さに適宜調節すればよく、例えば１２μｍ以上とすることができる。但し、厚すぎると生産コストが高くなるので一般には３５μｍ以下とするのが好ましい。従って、キャリアの厚みは典型的には１２～７０μｍであり、より典型的には１８～３５μｍである。 The thickness of the carrier that can be used in the present invention is not particularly limited, but may be appropriately adjusted to a thickness suitable for serving as a carrier, for example, 12 μm or more. However, if it is too thick, the production cost becomes high, so generally it is preferably 35 μm or less. Accordingly, the thickness of the carrier is typically 12-70 μm, more typically 18-35 μm.
　＜中間層＞
　キャリア上には中間層を設ける。キャリアと中間層の間には他の層を設けてもよい。本発明で用いる中間層は、キャリア付銅箔が絶縁基板への積層工程前にはキャリアから極薄銅層が剥離し難い一方で、絶縁基板への積層工程後にはキャリアから極薄銅層が剥離可能となるような構成であれば特に限定されない。例えば、本発明のキャリア付銅箔の中間層はＣｒ、Ｎｉ、Ｃｏ、Ｆｅ、Ｍｏ、Ｔｉ、Ｗ、Ｐ、Ｃｕ、Ａｌ、Ｚｎ、これらの合金、これらの水和物、これらの酸化物、有機物からなる群から選択される一種又は二種以上を含んでも良い。また、中間層は複数の層であっても良い。
　また、例えば、中間層はキャリア側からＣｒ、Ｎｉ、Ｃｏ、Ｆｅ、Ｍｏ、Ｔｉ、Ｗ、Ｐ、Ｃｕ、Ａｌ、Ｚｎで構成された元素群から選択された一種の元素からなる単一金属層、或いは、Ｃｒ、Ｎｉ、Ｃｏ、Ｆｅ、Ｍｏ、Ｔｉ、Ｗ、Ｐ、Ｃｕ、Ａｌ、Ｚｎで構成された元素群から選択された一種又は二種以上の元素からなる合金層を形成し、その上にＣｒ、Ｎｉ、Ｃｏ、Ｆｅ、Ｍｏ、Ｔｉ、Ｗ、Ｐ、Ｃｕ、Ａｌ、Ｚｎで構成された元素群から選択された一種又は二種以上の元素の水和物または酸化物からなる層を形成することで構成することができる。
　また、例えば、中間層は、キャリア上に、ニッケル、ニッケル－リン合金又はニッケル－コバルト合金と、クロムとがこの順で積層されて構成することができる。ニッケルと銅との接着力はクロムと銅の接着力よりも高いので、極薄銅層を剥離する際に、極薄銅層とクロムとの界面で剥離するようになる。また、中間層のニッケルにはキャリアから銅成分が極薄銅層へと拡散していくのを防ぐバリア効果が期待される。中間層におけるニッケルの付着量は好ましくは１００μｇ／ｄｍ2以上４００００μｇ／ｄｍ2以下、より好ましくは１００μｇ／ｄｍ2以上４０００μｇ／ｄｍ2以下、より好ましくは１００μｇ／ｄｍ2以上２５００μｇ／ｄｍ2以下、より好ましくは１００μｇ／ｄｍ2以上１０００μｇ／ｄｍ2未満であり、中間層におけるクロムの付着量は５μｇ／ｄｍ2以上１００μｇ／ｄｍ2以下であることが好ましい。中間層を片面にのみ設ける場合、キャリアの反対面にはＮｉめっき層などの防錆層を設けることが好ましい。なお、キャリアの両側に中間層を設けてもよい。 <Intermediate layer>
An intermediate layer is provided on the carrier. Another layer may be provided between the carrier and the intermediate layer. In the intermediate layer used in the present invention, the ultrathin copper layer is hardly peeled off from the carrier before the copper foil with the carrier is laminated on the insulating substrate, while the ultrathin copper layer is separated from the carrier after the lamination step on the insulating substrate. There is no particular limitation as long as it can be peeled off. For example, the intermediate layer of the copper foil with a carrier of the present invention is Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, alloys thereof, hydrates thereof, oxides thereof, One or two or more selected from the group consisting of organic substances may be included. The intermediate layer may be a plurality of layers.
Further, for example, the intermediate layer is a single metal layer composed of one kind of element selected from the element group composed of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn from the carrier side. Or forming an alloy layer composed of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, Zn, A layer made of a hydrate or oxide of one or more elements selected from the group consisting of Cr, Ni, Co, Fe, Mo, Ti, W, P, Cu, Al, and Zn. It can comprise by forming.
Further, for example, the intermediate layer can be constituted by laminating nickel, a nickel-phosphorus alloy or a nickel-cobalt alloy, and chromium in this order on a carrier. Since the adhesive strength between nickel and copper is higher than the adhesive strength between chromium and copper, when the ultrathin copper layer is peeled off, it peels at the interface between the ultrathin copper layer and chromium. Further, the nickel of the intermediate layer is expected to have a barrier effect that prevents the copper component from diffusing from the carrier into the ultrathin copper layer. Adhesion amount of nickel in the intermediate layer is preferably 100 [mu] g / dm 2 or more 40000μg / dm 2 or less, more preferably 100 [mu] g / dm 2 or more 4000μg / dm 2 or less, more preferably 100 [mu] g / dm 2 or more 2500 g / dm 2 or less, more Preferably, it is 100 μg / dm 2 or more and less than 1000 μg / dm 2 , and the amount of chromium deposited on the intermediate layer is preferably 5 μg / dm 2 or more and 100 μg / dm 2 or less. When the intermediate layer is provided only on one side, it is preferable to provide a rust preventive layer such as a Ni plating layer on the opposite side of the carrier. An intermediate layer may be provided on both sides of the carrier.
　＜極薄銅層＞
　中間層の上には極薄銅層を設ける。中間層と極薄銅層との間に他の層を設けてもよい。当該極薄銅層は、本発明の表面処理銅箔である。極薄銅層の厚みは特に制限はないが、一般的にはキャリアよりも薄く、例えば１２μｍ以下である。典型的には０．５～１２μｍであり、より典型的には１．５～５μｍである。また、中間層の上に極薄銅層を設ける前に、極薄銅層のピンホールを低減させるために銅－リン合金によるストライクめっきを行ってもよい。ストライクめっきにはピロリン酸銅めっき液などが挙げられる。キャリアの両側に極薄銅層を設けてもよい。 <Ultrathin copper layer>
An ultrathin copper layer is provided on the intermediate layer. Another layer may be provided between the intermediate layer and the ultrathin copper layer. The ultrathin copper layer is the surface-treated copper foil of the present invention. The thickness of the ultrathin copper layer is not particularly limited, but is generally thinner than the carrier, for example, 12 μm or less. Typically 0.5 to 12 μm, more typically 1.5 to 5 μm. Further, before the ultrathin copper layer is provided on the intermediate layer, strike plating with a copper-phosphorus alloy may be performed in order to reduce pinholes in the ultrathin copper layer. Examples of the strike plating include a copper pyrophosphate plating solution. Ultrathin copper layers may be provided on both sides of the carrier.
　〔表面処理層上の樹脂層〕
　本発明の表面処理銅箔の表面処理層の上に樹脂層を備えても良い。前記樹脂層は絶縁樹脂層であってもよい。 [Resin layer on the surface treatment layer]
A resin layer may be provided on the surface treatment layer of the surface-treated copper foil of the present invention. The resin layer may be an insulating resin layer.
　前記樹脂層は接着剤であってもよく、接着用の半硬化状態（Ｂステージ状態）の絶縁樹脂層であってもよい。半硬化状態（Ｂステージ状態）とは、その表面に指で触れても粘着感はなく、該絶縁樹脂層を重ね合わせて保管することができ、更に加熱処理を受けると硬化反応が起こる状態のことを含む。 The resin layer may be an adhesive or an insulating resin layer in a semi-cured state (B stage state) for bonding. The semi-cured state (B stage state) is a state in which there is no sticky feeling even if the surface is touched with a finger, the insulating resin layer can be stacked and stored, and a curing reaction occurs when subjected to heat treatment. Including that.
　また前記樹脂層は熱硬化性樹脂を含んでもよく、熱可塑性樹脂であってもよい。また、前記樹脂層は熱可塑性樹脂を含んでもよい。その種類は格別限定されるものではないが、例えば、エポキシ樹脂、ポリイミド樹脂、多官能性シアン酸エステル化合物、マレイミド化合物、マレイミド系樹脂、ポリビニルアセタール樹脂、ウレタン樹脂、ポリエーテルサルホン、ポリエーテルスルホン樹脂、芳香族ポリアミド樹脂、ポリアミドイミド樹脂、ゴム変成エポキシ樹脂、フェノキシ樹脂、カルボキシル基変性アクリロニトリル-ブタジエン樹脂、ポリフェニレンオキサイド、ビスマレイミドトリアジン樹脂、熱硬化性ポリフェニレンオキサイド樹脂、シアネートエステル系樹脂、多価カルボン酸の無水物などを含む樹脂を好適なものとしてあげることができる。また、前記樹脂層がブロック共重合ポリイミド樹脂層を含有する樹脂層またはブロック共重合ポリイミド樹脂とポリマレイミド化合物を含有する樹脂層であってもよい。また前記エポキシ樹脂は、分子内に２個以上のエポキシ基を有するものであって、電気・電子材料用途に用いることのできるものであれば、特に問題なく使用できる。また、前記エポキシ樹脂は分子内に２個以上のグリシジル基を有する化合物を用いてエポキシ化したエポキシ樹脂が好ましい。また、ビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、ビスフェノールＳ型エポキシ樹脂、ビスフェノールＡＤ型エポキシ樹脂、ノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、脂環式エポキシ樹脂、ブロム化エポキシ樹脂、グリシジルアミン型エポキシ樹脂、トリグリシジルイソシアヌレート、N,N-ジグリシジルアニリン等のグリシジルアミン化合物、テトラヒドロフタル酸ジグリシジルエステル等のグリシジルエステル化合物、リン含有エポキシ樹脂、ビフェニル型エポキシ樹脂、ビフェニルノボラック型エポキシ樹脂、トリスヒドロキシフェニルメタン型エポキシ樹脂、テトラフェニルエタン型エポキシ樹脂、の群から選ばれる１種又は２種以上を混合して用いることができ、又は前記エポキシ樹脂の水素添加体やハロゲン化体を用いることができる。 The resin layer may contain a thermosetting resin or a thermoplastic resin. The resin layer may include a thermoplastic resin. The type is not particularly limited. For example, epoxy resin, polyimide resin, polyfunctional cyanate ester compound, maleimide compound, maleimide resin, polyvinyl acetal resin, urethane resin, polyethersulfone, polyethersulfone Resin, aromatic polyamide resin, polyamideimide resin, rubber-modified epoxy resin, phenoxy resin, carboxyl group-modified acrylonitrile-butadiene resin, polyphenylene oxide, bismaleimide triazine resin, thermosetting polyphenylene oxide resin, cyanate ester resin, polyvalent carboxyl A resin containing an acid anhydride or the like can be mentioned as a preferable one. The resin layer may be a resin layer containing a block copolymerized polyimide resin layer or a resin layer containing a block copolymerized polyimide resin and a polymaleimide compound. The epoxy resin has two or more epoxy groups in the molecule and can be used without any problem as long as it can be used for electric / electronic materials. The epoxy resin is preferably an epoxy resin epoxidized using a compound having two or more glycidyl groups in the molecule. Bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, bisphenol AD type epoxy resin, novolac type epoxy resin, cresol novolac type epoxy resin, alicyclic epoxy resin, brominated epoxy resin, glycidylamine Type epoxy resin, triglycidyl isocyanurate, glycidyl amine compound such as N, N-diglycidyl aniline, glycidyl ester compound such as tetrahydrophthalic acid diglycidyl ester, phosphorus-containing epoxy resin, biphenyl type epoxy resin, biphenyl novolac type epoxy resin, One or two or more selected from the group of trishydroxyphenylmethane type epoxy resin and tetraphenylethane type epoxy resin can be used, or the epoxy Resin hydrogenated products and halogenated products can be used.
　前記樹脂層は公知の樹脂、樹脂硬化剤、化合物、硬化促進剤、誘電体（無機化合物及び／または有機化合物を含む誘電体、金属酸化物を含む誘電体等どのような誘電体を用いてもよい）、反応触媒、架橋剤、ポリマー、プリプレグ、骨格材等を含んでよい。また、前記樹脂層は例えば国際公開番号ＷＯ２００８／００４３９９号、国際公開番号ＷＯ２００８／０５３８７８、国際公開番号ＷＯ２００９／０８４５３３、特開平１１－５８２８号、特開平１１－１４０２８１号、特許第３１８４４８５号、国際公開番号ＷＯ９７／０２７２８、特許第３６７６３７５号、特開２０００－４３１８８号、特許第３６１２５９４号、特開２００２－１７９７７２号、特開２００２－３５９４４４号、特開２００３－３０４０６８号、特許第３９９２２２５、特開２００３－２４９７３９号、特許第４１３６５０９号、特開２００４－８２６８７号、特許第４０２５１７７号、特開２００４－３４９６５４号、特許第４２８６０６０号、特開２００５－２６２５０６号、特許第４５７００７０号、特開２００５－５３２１８号、特許第３９４９６７６号、特許第４１７８４１５号、国際公開番号ＷＯ２００４／００５５８８、特開２００６－２５７１５３号、特開２００７－３２６９２３号、特開２００８－１１１１６９号、特許第５０２４９３０号、国際公開番号ＷＯ２００６／０２８２０７、特許第４８２８４２７号、特開２００９－６７０２９号、国際公開番号ＷＯ２００６／１３４８６８、特許第５０４６９２７号、特開２００９－１７３０１７号、国際公開番号ＷＯ２００７／１０５６３５、特許第５１８０８１５号、国際公開番号ＷＯ２００８／１１４８５８、国際公開番号ＷＯ２００９／００８４７１、特開２０１１－１４７２７号、国際公開番号ＷＯ２００９／００１８５０、国際公開番号ＷＯ２００９／１４５１７９、国際公開番号ＷＯ２０１１／０６８１５７、特開２０１３－１９０５６号に記載されている物質（樹脂、樹脂硬化剤、化合物、硬化促進剤、誘電体、反応触媒、架橋剤、ポリマー、プリプレグ、骨格材等）および／または樹脂層の形成方法、形成装置を用いて形成してもよい。 The resin layer may be made of any known dielectric such as a known resin, resin curing agent, compound, curing accelerator, dielectric (dielectric including an inorganic compound and / or organic compound, dielectric including a metal oxide). May be included), a reaction catalyst, a crosslinking agent, a polymer, a prepreg, a skeleton material, and the like. The resin layer may be, for example, International Publication No. WO2008 / 004399, International Publication No. WO2008 / 053878, International Publication No. WO2009 / 084533, JP-A-11-5828, JP-A-11-140281, Patent 3184485, International Publication. No. WO 97/02728, Japanese Patent No. 3676375, Japanese Patent Application Laid-Open No. 2000-43188, Japanese Patent No. 3612594, Japanese Patent Application Laid-Open No. 2002-179721, Japanese Patent Application Laid-Open No. 2002-309444, Japanese Patent Application Laid-Open No. 2003-302068, Japanese Patent No. 3992225, Japanese Patent Application Laid-Open No. -249739, Japanese Patent No. 4136509, Japanese Patent Application Laid-Open No. 2004-82687, Japanese Patent No. 4025177, Japanese Patent Application Laid-Open No. 2004-349654, Japanese Patent No. 4286060, Japanese Patent Application Laid-Open No. 2005-262506, Japanese Patent No. 4570070, and Japanese Patent Application Laid-Open No. 4570070. No. 5-53218, Japanese Patent No. 3949676, Japanese Patent No. 4178415, International Publication No. WO2004 / 005588, Japanese Patent Application Laid-Open No. 2006-257153, Japanese Patent Application Laid-Open No. 2007-326923, Japanese Patent Application Laid-Open No. 2008-11169, and Japanese Patent No. 5024930. No. WO2006 / 028207, Japanese Patent No. 4828427, JP 2009-67029, International Publication No. WO 2006/134868, Japanese Patent No. 5046927, JP 2009-173017, International Publication No. WO 2007/105635, Patent No. 5180815, International Publication No. WO 2008/114858, International Publication Number WO 2009/008471, JP 2011-14727, International Publication Number WO 2009/001850, International Publication Number WO 2009/145179, International Publication Number Nos. WO2011 / 068157 and JP2013-19056 (resins, resin curing agents, compounds, curing accelerators, dielectrics, reaction catalysts, crosslinking agents, polymers, prepregs, skeletal materials, etc.) and / or You may form using the formation method and formation apparatus of a resin layer.
　これらの樹脂を例えばメチルエチルケトン（ＭＥＫ）、シクロペンタノン、ジメチルホルムアミド、ジメチルアセトアミド、Ｎ－メチルピロリドン、トルエン、メタノール、エタノール、プロピレングリコールモノメチルエーテル、ジメチルホルムアミド、ジメチルアセトアミド、シクロヘキサノン、エチルセロソルブ、Ｎ－メチル－２－ピロリドン、Ｎ，Ｎ－ジメチルアセトアミド、Ｎ，Ｎ－ジメチルホルムアミドなどの溶剤に溶解して樹脂液とし、これを前記極薄銅層上、あるいは前記耐熱層、防錆層、あるいは前記クロメート処理層、あるいは前記シランカップリング剤層の上に、例えばロールコータ法などによって塗布し、ついで必要に応じて加熱乾燥して溶剤を除去しＢステージ状態にする。乾燥には例えば熱風乾燥炉を用いればよく、乾燥温度は１００～２５０℃、好ましくは１３０～２００℃であればよい。前記樹脂層の組成物を、溶剤を用いて溶解し、樹脂固形分３ｗｔ％～６０ｗｔ％、好ましくは、１０ｗｔ％～４０ｗｔ％、より好ましくは２５ｗｔ％～４０ｗｔ％の樹脂液としてもよい。なお、メチルエチルケトンとシクロペンタノンとの混合溶剤を用いて溶解することが、環境的な見地より現段階では最も好ましい。 These resins are, for example, methyl ethyl ketone (MEK), cyclopentanone, dimethylformamide, dimethylacetamide, N-methylpyrrolidone, toluene, methanol, ethanol, propylene glycol monomethyl ether, dimethylformamide, dimethylacetamide, cyclohexanone, ethyl cellosolve, N-methyl. -2-Pyrrolidone, N, N-dimethylacetamide, N, N-dimethylformamide or the like is dissolved in a solvent to obtain a resin liquid, which is applied to the ultrathin copper layer, the heat-resistant layer, the rust-proof layer, or the chromate. On the treatment layer or the silane coupling agent layer, for example, it is applied by a roll coater method or the like, and then heated and dried as necessary to remove the solvent to obtain a B stage state. For example, a hot air drying furnace may be used for drying, and the drying temperature may be 100 to 250 ° C., preferably 130 to 200 ° C. The resin layer composition may be dissolved using a solvent to obtain a resin liquid having a resin solid content of 3 wt% to 60 wt%, preferably 10 wt% to 40 wt%, more preferably 25 wt% to 40 wt%. In addition, it is most preferable at this stage from an environmental standpoint to dissolve using a mixed solvent of methyl ethyl ketone and cyclopentanone.
　前記樹脂層を備えた表面処理銅箔（樹脂付き表面処理銅箔）は、その樹脂層を基材に重ね合わせたのち全体を熱圧着して該樹脂層を熱硬化せしめ、ついで銅箔に所定の配線パターンを形成するという態様で使用される。また、当該表面処理銅箔を極薄銅層として用いたキャリア付銅箔について、樹脂層を備えたキャリア付銅箔（樹脂付きキャリア付銅箔）は、その樹脂層を基材に重ね合わせたのち全体を熱圧着して該樹脂層を熱硬化せしめ、ついでキャリアを剥離して極薄銅層を表出せしめ（当然に表出するのは該極薄銅層の中間層側の表面である）、そこに所定の配線パターンを形成するという態様で使用される。 The surface-treated copper foil provided with the resin layer (surface-treated copper foil with resin) is superposed on the base material, and the whole is thermocompressed to thermally cure the resin layer. This wiring pattern is used in the form of forming. Moreover, about the copper foil with a carrier which used the said surface-treated copper foil as an ultra-thin copper layer, the copper foil with a carrier provided with the resin layer (copper foil with a carrier with a resin) overlapped the resin layer on the base material After that, the entire resin layer is thermocompression-bonded to thermally cure the resin layer, and then the carrier is peeled off to expose the ultrathin copper layer (naturally it is the surface on the intermediate layer side of the ultrathin copper layer) And a predetermined wiring pattern is formed there.
　この樹脂付き表面処理銅箔或いは樹脂付きキャリア付銅箔を使用すると、多層プリント配線基板の製造時におけるプリプレグ材の使用枚数を減らすことができる。しかも、樹脂層の厚みを層間絶縁が確保できるような厚みにしたり、プリプレグ材を全く使用していなくても銅張積層板を製造することができる。またこのとき、基材の表面に絶縁樹脂をアンダーコートして表面の平滑性を更に改善することもできる。 When the surface-treated copper foil with resin or the copper foil with carrier with resin is used, the number of prepreg materials used in the production of the multilayer printed wiring board can be reduced. In addition, the copper-clad laminate can be manufactured even if the resin layer is made thick enough to ensure interlayer insulation or no prepreg material is used. At this time, the surface smoothness can be further improved by undercoating the surface of the substrate with an insulating resin.
　なお、プリプレグ材を使用しない場合には、プリプレグ材の材料コストが節約され、また積層工程も簡略になるので経済的に有利となり、しかも、プリプレグ材の厚み分だけ製造される多層プリント配線基板の厚みは薄くなり、特に樹脂付きキャリア付銅箔については１層の厚みが１００μｍ以下である極薄の多層プリント配線基板を製造することができるという利点がある。当該樹脂層の厚みは０．１～１２０μｍであることが好ましい。 In addition, when the prepreg material is not used, the material cost of the prepreg material is saved and the laminating process is simplified, which is economically advantageous. Moreover, the multilayer printed wiring board manufactured by the thickness of the prepreg material is used. The thickness is reduced, and particularly with respect to the copper foil with a carrier with resin, there is an advantage that an extremely thin multilayer printed wiring board in which the thickness of one layer is 100 μm or less can be manufactured. The thickness of the resin layer is preferably 0.1 to 120 μm.
　樹脂層の厚みが０．１μｍより薄くなると、接着力が低下し、プリプレグ材を介在させることなくこの樹脂付き表面処理銅箔或いは樹脂付きキャリア付銅箔を内層材を備えた基材に積層したときに、内層材の回路との間の層間絶縁を確保することが困難になる場合がある。また、前記硬化樹脂層、半硬化樹脂層との総樹脂層厚みは０．１μｍ～１２０μｍであるものが好ましく、３５μｍ～１２０μｍのものが実用上好ましい。そして、その場合の各厚みは、硬化樹脂層は５～２０μｍで、半硬化樹脂層は１５～１１５μｍであることが望ましい。総樹脂層厚みが１２０μｍを超えると、薄厚の多層プリント配線板を製造することが難しくなる場合があり、３５μｍ未満では薄厚の多層プリント配線板を形成し易くなるものの、内層の回路間における絶縁層である樹脂層が薄くなりすぎ、内層の回路間の絶縁性を不安定にする傾向が生じる場合があるためである。また、硬化樹脂層厚みが５μｍ未満であると、銅箔粗化面の表面粗度を考慮する必要が生じる場合がある。逆に硬化樹脂層厚みが２０μｍを超えると硬化済み樹脂層による効果は特に向上することがなくなる場合があり、総絶縁層厚は厚くなる。また、前記硬化樹脂層は、厚さが３μｍ～３０μｍであってもよい。また、前記半硬化樹脂層は、厚さが７μｍ～５５μｍであってもよい。また、前記硬化樹脂層と前記半硬化樹脂層との合計厚さは１０μｍ～６０μｍであってもよい。 When the thickness of the resin layer becomes thinner than 0.1 μm, the adhesive strength is reduced, and the surface-treated copper foil with resin or the copper foil with carrier with resin is laminated on the base material provided with the inner layer material without interposing a prepreg material. In some cases, it may be difficult to ensure interlayer insulation with the circuit of the inner layer material. Further, the total resin layer thickness of the cured resin layer and the semi-cured resin layer is preferably 0.1 μm to 120 μm, more preferably 35 μm to 120 μm. In this case, the thickness is preferably 5 to 20 μm for the cured resin layer and 15 to 115 μm for the semi-cured resin layer. If the total resin layer thickness exceeds 120 μm, it may be difficult to produce a thin multilayer printed wiring board. If the total resin layer thickness is less than 35 μm, it is easy to form a thin multilayer printed wiring board, but an insulating layer between inner layer circuits This is because the resin layer may become too thin and the insulation between the circuits of the inner layer tends to become unstable. Moreover, when the cured resin layer thickness is less than 5 μm, it may be necessary to consider the surface roughness of the roughened copper foil surface. Conversely, if the cured resin layer thickness exceeds 20 μm, the effect of the cured resin layer may not be particularly improved, and the total insulating layer thickness becomes thick. The cured resin layer may have a thickness of 3 μm to 30 μm. The semi-cured resin layer may have a thickness of 7 μm to 55 μm. The total thickness of the cured resin layer and the semi-cured resin layer may be 10 μm to 60 μm.
　また、樹脂付き表面処理銅箔或いは樹脂付きキャリア付銅箔が極薄の多層プリント配線板を製造することに用いられる場合には、前記樹脂層の厚みを０．１μｍ～５μｍ、より好ましくは０．５μｍ～５μｍ、より好ましくは１μｍ～５μｍとすることが、多層プリント配線板の厚みを小さくするために好ましい。なお、前記樹脂層の厚みを０．１μｍ～５μｍとする場合には、樹脂層と銅箔との密着性を向上させるため、表面処理層の上に耐熱層および／または防錆層および／またはクロメート処理層および／またはシランカップリング処理層を設けた後に、当該耐熱層または防錆層またはクロメート処理層またはシランカップリング処理層の上に樹脂層を形成することが好ましい。
　また、樹脂層が誘電体を含む場合には、樹脂層の厚みは０．１～５０μｍであることが好ましく、０．５μｍ～２５μｍであることが好ましく、１．０μｍ～１５μｍであることがより好ましい。なお、前述の樹脂層の厚みは、任意の１０点において断面観察により測定した厚みの平均値をいう。 In addition, when the surface-treated copper foil with resin or the copper foil with carrier with resin is used for producing an extremely thin multilayer printed wiring board, the thickness of the resin layer is 0.1 μm to 5 μm, more preferably 0 The thickness is preferably 5 μm to 5 μm, more preferably 1 μm to 5 μm, in order to reduce the thickness of the multilayer printed wiring board. In the case where the thickness of the resin layer is 0.1 μm to 5 μm, in order to improve the adhesion between the resin layer and the copper foil, a heat-resistant layer and / or a rust-proof layer and / or on the surface treatment layer After providing the chromate treatment layer and / or the silane coupling treatment layer, it is preferable to form a resin layer on the heat-resistant layer, rust prevention layer, chromate treatment layer or silane coupling treatment layer.
When the resin layer contains a dielectric, the thickness of the resin layer is preferably 0.1 to 50 μm, more preferably 0.5 μm to 25 μm, and more preferably 1.0 μm to 15 μm. preferable. In addition, the thickness of the above-mentioned resin layer says the average value of the thickness measured by cross-sectional observation in arbitrary 10 points | pieces.
　一方、樹脂層の厚みを１２０μｍより厚くすると、１回の塗布工程で目的厚みの樹脂層を形成することが困難となり、余分な材料費と工数がかかるため経済的に不利となる。更には、形成された樹脂層はその可撓性が劣るので、ハンドリング時にクラックなどが発生しやすくなり、また内層材との熱圧着時に過剰な樹脂流れが起こって円滑な積層が困難になる場合がある。 On the other hand, if the thickness of the resin layer is made thicker than 120 μm, it becomes difficult to form a resin layer having a desired thickness in a single coating process, which is economically disadvantageous because of extra material costs and man-hours. Furthermore, since the formed resin layer is inferior in flexibility, cracks are likely to occur during handling, and excessive resin flow occurs during thermocompression bonding with the inner layer material, making smooth lamination difficult. There is.
　更に、樹脂付きキャリア付銅箔のもう一つの製品形態としては、前記極薄銅層上、あるいは前記耐熱層、防錆層、あるいは前記クロメート処理層、あるいは前記シランカップリング処理層の上に樹脂層で被覆し、半硬化状態とした後、ついでキャリアを剥離して、キャリアが存在しない樹脂付き銅箔の形で製造することも可能である。 Furthermore, another product form of the copper foil with a carrier with resin is a resin on the ultrathin copper layer, or on the heat-resistant layer, rust-proof layer, chromate-treated layer, or silane coupling-treated layer. After coating with a layer and making it into a semi-cured state, the carrier can then be peeled off and manufactured in the form of a copper foil with resin in which no carrier is present.
　以下に、本発明に係る樹脂基材を用いたプリント配線板の製造工程の例を幾つか示す。また、プリント配線板に電子部品類を搭載することで、プリント回路板が完成する。 Hereinafter, some examples of the manufacturing process of the printed wiring board using the resin base material according to the present invention will be shown. Moreover, a printed circuit board is completed by mounting electronic components on the printed wiring board.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、表面処理銅箔と樹脂基材とを準備する工程、表面処理銅箔を、表面処理層側から樹脂基材に積層する工程、樹脂基材上の表面処理銅箔を除去して本発明の樹脂基材を得る工程、表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a surface-treated copper foil and a resin base material, the surface-treated copper foil is formed from the surface-treated layer side with a resin substrate. A step of laminating the material, a step of removing the surface-treated copper foil on the resin base material to obtain the resin base material of the present invention, and a step of forming a circuit on the surface of the resin base material from which the surface-treated copper foil has been removed.
　図１に銅箔のプロファイルを使用したセミアディティブ工法の概略例を示す。当該工法では、樹脂基材の表面プロファイルの形成のために、銅箔の表面プロファイルを用いている。具体的には、まず、樹脂基材に本発明の銅箔を積層させて銅張積層体を作製する。次に、銅張積層体の銅箔を全面エッチングする。次に、銅箔表面プロファイルが転写した樹脂基材（全面エッチング基材）の表面に無電解銅メッキを施す。そして、樹脂基材（全面エッチング基材）の回路を形成しない部分をドライフィルム等で被覆し、ドライフィルムに被覆されていない無電解銅メッキ層の表面に電気（電解）銅メッキを施す。その後、ドライフィルムを除去した後に、回路を形成しない部分に形成された無電解銅メッキ層を除去することにより微細な回路を形成する。本発明で形成される微細回路は、本発明の銅箔表面プロファイルが転写された樹脂基材（全面エッチング基材）のエッチング面と密着しているため、その密着力（ピール強度）が良好となっている。 Fig. 1 shows a schematic example of a semi-additive method using a copper foil profile. In this construction method, the surface profile of the copper foil is used for forming the surface profile of the resin base material. Specifically, first, the copper foil of the present invention is laminated on a resin base material to produce a copper clad laminate. Next, the entire surface of the copper foil of the copper clad laminate is etched. Next, electroless copper plating is applied to the surface of the resin substrate (entire etching substrate) to which the copper foil surface profile has been transferred. Then, a portion of the resin base material (entire etching base material) where the circuit is not formed is covered with a dry film or the like, and electroless (electrolytic) copper plating is applied to the surface of the electroless copper plating layer not covered with the dry film. Then, after removing the dry film, a fine circuit is formed by removing the electroless copper plating layer formed in the portion where the circuit is not formed. Since the fine circuit formed in the present invention is in close contact with the etching surface of the resin base material (entire etching base material) to which the copper foil surface profile of the present invention is transferred, the adhesion force (peel strength) is good. It has become.
　樹脂基材は内層回路入りのものとすることも可能である。また、本発明において、セミアディティブ法とは、樹脂基材又は銅箔シード層上に薄い無電解めっき及び／又は電解めっきを行い、パターンを形成後、電気めっき及びエッチングを用いて導体パターンを形成する方法を指す。無電解めっき及び／又は電解めっきには銅めっきを用いることができる。銅めっきを形成する方法としては公知の方法を用いることができる。 The resin base material can be one with an inner layer circuit. Further, in the present invention, the semi-additive method means that a thin electroless plating and / or electrolytic plating is performed on a resin base material or a copper foil seed layer, a pattern is formed, and then a conductor pattern is formed using electroplating and etching. Refers to how to do. Copper plating can be used for electroless plating and / or electrolytic plating. As a method for forming the copper plating, a known method can be used.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア付銅箔と、樹脂基材とを準備する工程、キャリア付銅箔を極薄銅層側から樹脂基材に積層する工程、キャリア付銅箔と樹脂基材とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、キャリアを剥がした後の樹脂基材上の極薄銅層を除去して本発明の樹脂基材を得る工程、極薄銅層を除去した樹脂基材の表面に回路を形成する工程を含む。
　本発明において、セミアディティブ法とは、絶縁基板又は銅箔シード層上に薄い無電解めっきを行い、必要であればその後電解めっきを行い、更にその後、パターンを形成後、電気めっき及びエッチングを用いて導体パターンを形成する方法を指す。 In one embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a copper foil with a carrier and a resin base material, the copper foil with a carrier is resin from the ultrathin copper layer side The process of laminating on the substrate, laminating the carrier-attached copper foil and the resin substrate, removing the carrier of the copper foil with carrier, removing the ultrathin copper layer on the resin substrate after removing the carrier And a step of forming a circuit on the surface of the resin substrate from which the ultrathin copper layer has been removed.
In the present invention, the semi-additive method means that a thin electroless plating is performed on an insulating substrate or a copper foil seed layer, and if necessary, an electroplating is performed thereafter. After that, a pattern is formed, and then electroplating and etching are used. The method of forming a conductor pattern.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔を極薄銅層側から絶縁基板に積層する工程、前記キャリア付銅箔と絶縁基板とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がした後の絶縁基板上の極薄銅層を除去する工程、前記極薄銅層を除去した絶縁基板の表面に回路を形成する工程を含む。 In one embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a copper foil with a carrier and an insulating substrate, the copper foil with a carrier from the ultrathin copper layer side to the insulating substrate The step of laminating, the step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the insulating substrate, the step of removing the ultrathin copper layer on the insulating substrate after peeling the carrier, Forming a circuit on the surface of the insulating substrate from which the ultrathin copper layer has been removed.
　本発明に係るプリント配線板の製造方法の一実施形態においては、表面処理銅箔を、表面処理層側から本発明の樹脂基材に積層して銅張積層板を形成し、その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a surface-treated copper foil is laminated on the resin substrate of the present invention from the surface-treated layer side to form a copper-clad laminate, and then semi-additive Forming a circuit by any one of a method, a subtractive method, a partly additive method, or a modified semi-additive method.
　本発明に係るプリント配線板の製造方法の一実施形態においては、本発明の表面処理銅箔と絶縁基板とを準備する工程、前記表面処理銅箔を、表面処理層側から絶縁基板に積層して銅張積層板を形成し、その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a step of preparing the surface-treated copper foil and the insulating substrate of the present invention, the surface-treated copper foil is laminated on the insulating substrate from the surface-treated layer side. Forming a copper-clad laminate, and then forming a circuit by any one of a semi-additive method, a subtractive method, a partial additive method, or a modified semi-additive method.
　本発明において、サブトラクティブ法とは、銅張積層板上の銅箔の不要部分を、エッチングなどによって、選択的に除去して、導体パターンを形成する方法を指す。 In the present invention, the subtractive method refers to a method of selectively removing unnecessary portions of the copper foil on the copper clad laminate by etching or the like to form a conductor pattern.
　本発明において、パートリーアディティブ法とは、導体層を設けてなる基板、必要に応じてスルーホールやバイアホール用の孔を穿けてなる基板上に触媒核を付与し、エッチングして導体回路を形成し、必要に応じてソルダレジストまたはメッキレジストを設けた後に、前記導体回路上、スルーホールやバイアホールなどに無電解めっき処理によって厚付けを行うことにより、プリント配線板を製造する方法を指す。 In the present invention, the partial additive method means that a catalyst circuit is formed on a substrate provided with a conductor layer, and if necessary, a substrate provided with holes for through holes or via holes, and etched to form a conductor circuit. Then, after providing a solder resist or a plating resist as necessary, it refers to a method of manufacturing a printed wiring board by thickening through holes, via holes, etc. on the conductor circuit by electroless plating.
　本発明において、モディファイドセミアディティブ法とは、樹脂基材上に金属箔を積層し、めっきレジストにより非回路形成部を保護し、電解めっきにより回路形成部の銅厚付けを行った後、レジストを除去し、前記回路形成部以外の金属箔を（フラッシュ）エッチングで除去することにより、樹脂基材上に回路を形成する方法を指す。 In the present invention, the modified semi-additive method is a method of laminating a metal foil on a resin base material, protecting a non-circuit forming portion with a plating resist, thickening the copper of the circuit forming portion by electrolytic plating, It refers to a method of forming a circuit on a resin substrate by removing and removing the metal foil other than the circuit forming part by (flash) etching.
　本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア付銅箔を極薄銅層側から本発明の樹脂基材に積層する工程、キャリア付銅箔と樹脂基材とを積層した後に、キャリア付銅箔のキャリアを剥がす工程を経て銅張積層板を形成し、その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, the step of laminating the copper foil with carrier on the resin base material of the present invention from the ultrathin copper layer side, laminating the copper foil with carrier and the resin base material After that, a copper-clad laminate is formed through a process of peeling the carrier of the copper foil with carrier, and then a circuit is formed by any of the semi-additive method, subtractive method, partly additive method, or modified semi-additive method The process of carrying out is included.
　本発明に係るプリント配線板の製造方法の一実施形態においては、本発明のキャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔を極薄銅層側から絶縁基板に積層する工程、前記キャリア付銅箔と絶縁基板とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程を経て銅張積層板を形成し、その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a step of preparing the copper foil with carrier and the insulating substrate of the present invention, the copper foil with carrier is laminated on the insulating substrate from the ultrathin copper layer side. Forming a copper-clad laminate through a step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and an insulating substrate, and then semi-additive method, subtractive method, partly additive method or The method includes a step of forming a circuit by any one of the modified semi-additive methods.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、表面に回路が形成された金属箔を準備する工程、回路が埋没するように金属箔表面に樹脂基材を形成する工程、表面処理銅箔またはキャリア付銅箔を、表面処理層側または極薄銅層側から樹脂基材に積層する工程、樹脂基材上の表面処理銅箔またはキャリア付銅箔を除去して本発明の樹脂基材を得る工程、表面処理銅箔またはキャリア付銅箔を除去した樹脂基材の表面に回路を形成する工程、及び、金属箔を除去することで、金属箔表面に形成した、樹脂基材に埋没している回路を露出させる工程を含む。 In one embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a metal foil having a circuit formed on the surface, a resin base material on the surface of the metal foil so that the circuit is buried A step of forming a surface-treated copper foil or a copper foil with a carrier on a resin substrate from the surface-treated layer side or the ultrathin copper layer side, a surface-treated copper foil on a resin substrate or a copper foil with a carrier The step of removing to obtain the resin base material of the present invention, the step of forming a circuit on the surface of the resin base material from which the surface-treated copper foil or the copper foil with carrier is removed, and the metal foil surface by removing the metal foil And a step of exposing the circuit buried in the resin base material.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、表面に回路が形成された金属箔を準備する工程、前記回路が埋没するように前記金属箔表面に樹脂層を形成する工程、本発明の表面処理銅箔を、表面処理層側から前記樹脂層に積層する工程、前記樹脂層上の表面処理銅箔を除去する工程、前記表面処理銅箔を除去した樹脂層の表面に回路を形成する工程、及び、前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂層に埋没している回路を露出させる工程を含む。 In one embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a metal foil having a circuit formed on the surface, a resin on the surface of the metal foil so that the circuit is buried A step of forming a layer, a step of laminating the surface-treated copper foil of the present invention on the resin layer from the surface-treated layer side, a step of removing the surface-treated copper foil on the resin layer, and removing the surface-treated copper foil Forming a circuit on the surface of the resin layer; and removing the metal foil to expose a circuit embedded in the resin layer formed on the surface of the metal foil.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、第１のキャリア付銅箔の極薄銅層側表面に回路を形成する工程、回路が埋没するように第１のキャリア付銅箔の極薄銅層側表面に樹脂基材を形成する工程、第２のキャリア付銅箔または表面処理銅箔を準備し、第２のキャリア付銅箔の極薄銅層側または表面処理層側から樹脂基材に積層する工程、第２のキャリア付銅箔または表面処理銅箔を樹脂基材に積層した後に、第２のキャリア付銅箔のキャリアを剥がす工程、第２のキャリア付銅箔のキャリアを剥がした後の樹脂基材上の極薄銅層または表面処理銅箔を除去して本発明の樹脂基材を得る工程、極薄銅層または表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程、樹脂基材上に回路を形成した後に、第１のキャリア付銅箔のキャリアを剥離させる工程、及び、第１のキャリア付銅箔のキャリアを剥離させた後に、第１のキャリア付銅箔の極薄銅層を除去することで、第１のキャリア付銅箔の極薄銅層側表面に形成した、樹脂基材に埋没している回路を露出させる工程を含む。 In one embodiment of the method for manufacturing a printed wiring board according to the present invention using the semi-additive method, a step of forming a circuit on the ultrathin copper layer side surface of the first copper foil with carrier so that the circuit is buried The process of forming a resin base material on the surface of the ultrathin copper layer of the first copper foil with carrier, the second copper foil with carrier or the surface-treated copper foil is prepared, and the ultrathin copper of the second copper foil with carrier A step of laminating the resin substrate from the layer side or the surface-treated layer side, a step of peeling the carrier of the second carrier-attached copper foil after laminating the second carrier-attached copper foil or the surface-treated copper foil to the resin substrate, The process of obtaining the resin base material of the present invention by removing the ultrathin copper layer or the surface-treated copper foil on the resin base material after peeling the carrier of the copper foil with the second carrier, the ultrathin copper layer or the surface-treated copper The process of forming a circuit on the surface of the resin substrate from which the foil has been removed, on the resin substrate After forming the path, after peeling the carrier of the first copper foil with carrier, and after peeling the carrier of the first copper foil with carrier, the ultrathin copper layer of the first copper foil with carrier The step of exposing the circuit embedded in the resin base material formed on the ultrathin copper layer side surface of the first copper foil with carrier by removing is included.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、本発明のキャリア付銅箔を第１のキャリア付銅箔とし、前記第１のキャリア付銅箔の極薄銅層側表面に回路を形成する工程、前記回路が埋没するように前記第１のキャリア付銅箔の前記極薄銅層側表面に樹脂層を形成する工程、第２のキャリア付銅箔を準備し、前記第２のキャリア付銅箔の極薄銅層側から前記樹脂層に積層する工程、前記第２のキャリア付銅箔を前記樹脂層に積層した後に、前記第２のキャリア付銅箔のキャリアを剥がす工程、前記第２のキャリア付銅箔のキャリアを剥がした後の樹脂層上の極薄銅層を除去する工程、前記極薄銅層を除去した樹脂層の表面に回路を形成する工程、前記樹脂層上に回路を形成した後に、前記第１のキャリア付銅箔のキャリアを剥離させる工程、及び、前記第１のキャリア付銅箔のキャリアを剥離させた後に、前記第１のキャリア付銅箔の極薄銅層を除去することで、前記第１のキャリア付銅箔の極薄銅層側表面に形成した、前記樹脂層に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention using a semi-additive method, the copper foil with a carrier of the present invention is a first copper foil with a carrier, and the pole of the first copper foil with a carrier A step of forming a circuit on the surface of the thin copper layer, a step of forming a resin layer on the surface of the ultrathin copper layer of the first copper foil with carrier so that the circuit is buried, a second copper foil with carrier And laminating the second carrier-attached copper foil on the resin layer from the ultrathin copper layer side, laminating the second carrier-attached copper foil on the resin layer, and then attaching the second carrier A step of peeling the carrier of the copper foil, a step of removing the ultrathin copper layer on the resin layer after peeling the carrier of the second copper foil with carrier, a circuit on the surface of the resin layer from which the ultrathin copper layer has been removed Forming a circuit on the resin layer; Removing the carrier of the copper foil with carrier, and after peeling the carrier of the copper foil with the first carrier, removing the ultrathin copper layer of the copper foil with the first carrier, A step of exposing a circuit buried in the resin layer formed on the surface of the first copper foil with a carrier on the side of the ultrathin copper layer.
　本発明に係るプリント配線板の製造方法の一実施形態においては、表面に回路が形成された金属箔を準備する工程、回路が埋没するように金属箔表面に本発明の樹脂基材を形成する工程、表面処理銅箔またはキャリア付銅箔を、表面処理層側または極薄銅層側から樹脂基材に積層し、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって樹脂層上に回路を形成する工程、及び、金属箔を除去することで、金属箔表面に形成した、樹脂基材に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a step of preparing a metal foil having a circuit formed on the surface, the resin base material of the present invention is formed on the surface of the metal foil so that the circuit is buried Process, surface-treated copper foil or carrier-attached copper foil is laminated on the resin substrate from the surface-treated layer side or ultrathin copper layer side, and any of the semi-additive method, subtractive method, partly additive method or modified semi-additive method A step of forming a circuit on the resin layer by the method and a step of exposing the circuit embedded in the resin base material formed on the surface of the metal foil by removing the metal foil.
　本発明に係るプリント配線板の製造方法の一実施形態においては、表面に回路が形成された金属箔を準備する工程、前記回路が埋没するように前記金属箔表面に樹脂層を形成する工程、本発明の表面処理銅箔を、表面処理層側から樹脂層に積層し、サブトラクティブ法、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、及び、前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂層に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a step of preparing a metal foil having a circuit formed on the surface, a step of forming a resin layer on the surface of the metal foil so that the circuit is buried, The surface-treated copper foil of the present invention is laminated on the resin layer from the surface-treated layer side, and is applied onto the resin layer by any one of the subtractive method, semi-additive method, subtractive method, partly additive method, or modified semi-additive method. Forming a circuit, and removing the metal foil to expose the circuit buried in the resin layer formed on the surface of the metal foil.
　本発明に係るプリント配線板の製造方法の一実施形態においては、第１のキャリア付銅箔の極薄銅層側表面に回路を形成する工程、回路が埋没するように第１のキャリア付銅箔の極薄銅層側表面に本発明の樹脂基材を形成する工程、第２のキャリア付銅箔または表面処理銅箔を準備し、第２のキャリア付銅箔の極薄銅層側または表面処理銅箔の表面処理層側から樹脂基材に積層して、第２のキャリア付銅箔を樹脂基材に積層した場合には第２のキャリア付銅箔のキャリアを剥がし、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって樹脂基材上に回路を形成する工程、樹脂基材上に回路を形成した後に、第１のキャリア付銅箔のキャリアを剥離させる工程、及び、第１のキャリア付銅箔のキャリアを剥離させた後に、第１のキャリア付銅箔の極薄銅層を除去することで、第１のキャリア付銅箔の極薄銅層側表面に形成した、樹脂基材に埋没している回路を露出させる工程を含む。 In one embodiment of the method for manufacturing a printed wiring board according to the present invention, a step of forming a circuit on the surface of the first copper foil with carrier on the ultrathin copper layer side, the first copper with carrier so that the circuit is buried The step of forming the resin base material of the present invention on the ultrathin copper layer side surface of the foil, preparing the second carrier-attached copper foil or surface-treated copper foil, and preparing the second carrier-attached copper foil on the ultrathin copper layer side or When the second copper foil with carrier is laminated on the resin base material from the surface treatment layer side of the surface-treated copper foil, the carrier of the second copper foil with carrier is peeled off, and the semi-additive method , A step of forming a circuit on the resin substrate by any one of the subtractive method, the partly additive method, or the modified semi-additive method, and after forming the circuit on the resin substrate, the carrier of the first copper foil with a carrier To peel off After the carrier of the first copper foil with carrier is peeled off, the ultra thin copper layer side surface of the first copper foil with carrier is removed by removing the ultra thin copper layer of the first copper foil with carrier. And a step of exposing the circuit buried in the resin base material.
　本発明に係るプリント配線板の製造方法の一実施形態においては、本発明のキャリア付銅箔を第１のキャリア付銅箔とし、前記第１のキャリア付銅箔の極薄銅層側表面に回路を形成する工程、前記回路が埋没するように前記第１のキャリア付銅箔の前記極薄銅層側表面に樹脂層を形成する工程、第２のキャリア付銅箔を準備し、前記第２のキャリア付銅箔の極薄銅層側から前記樹脂層に積層して前記第２のキャリア付銅箔のキャリアを剥がし、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、前記樹脂層上に回路を形成した後に、前記第１のキャリア付銅箔のキャリアを剥離させる工程、及び、前記第１のキャリア付銅箔のキャリアを剥離させた後に、前記第１のキャリア付銅箔の極薄銅層を除去することで、前記第１のキャリア付銅箔の極薄銅層側表面に形成した、前記樹脂層に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, the copper foil with a carrier of the present invention is a first copper foil with a carrier, and the ultrathin copper layer side surface of the first copper foil with a carrier is used. A step of forming a circuit, a step of forming a resin layer on the ultrathin copper layer side surface of the first carrier-attached copper foil so that the circuit is buried, and preparing a second carrier-attached copper foil, The carrier-added copper foil is laminated on the resin layer from the ultrathin copper layer side and the carrier of the second carrier-attached copper foil is peeled off, and the semi-additive method, subtractive method, partly additive method or modified semi-additive method is used. A step of forming a circuit on the resin layer by any method, a step of peeling a carrier of the copper foil with the first carrier after forming a circuit on the resin layer, and the first carrier After peeling the carrier of the attached copper foil, the ultrathin copper layer of the first carrier-attached copper foil was removed, thereby forming the ultrathin copper layer side surface of the first carrier-attached copper foil, A step of exposing a circuit buried in the resin layer.
　本発明に係るプリント配線板の製造方法の一実施形態においては、表面に回路が形成された金属箔を準備する工程、
　前記回路が埋没するように前記金属箔表面に樹脂基材を形成する工程、
　キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔を極薄銅層側表面から前記樹脂基材に積層する工程、
　前記キャリア付銅箔のキャリアを剥離させた後に、前記樹脂基材上の極薄銅層を除去して本発明の樹脂基材を得る工程、
　前記極薄銅層を除去した樹脂基材の表面に回路を形成する工程、及び、
　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a step of preparing a metal foil having a circuit formed on the surface,
Forming a resin base material on the surface of the metal foil so that the circuit is buried;
Laminating a carrier, an intermediate layer, a copper foil with a carrier provided with an ultrathin copper layer in this order from the ultrathin copper layer side surface to the resin base material,
After peeling the carrier of the copper foil with carrier, the step of removing the ultrathin copper layer on the resin substrate to obtain the resin substrate of the present invention,
Forming a circuit on the surface of the resin substrate from which the ultrathin copper layer has been removed, and
The step of exposing the circuit buried in the resin base material formed on the surface of the metal foil by removing the metal foil is included.
　本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
　前記回路が埋没するように前記キャリア付銅箔の前記極薄銅層側表面に樹脂基材を形成する工程、
　表面処理銅箔を、表面処理層側から前記樹脂基材に積層する工程、
　前記樹脂基材上の表面処理銅箔を除去して本発明の樹脂基材を得る工程、
　前記表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程、
　前記樹脂基材上に回路を形成した後に、前記キャリア付銅箔のキャリアを剥離させる工程、及び、
　前記キャリア付銅箔のキャリアを剥離させた後に、前記キャリア付銅箔の極薄銅層を除去することで、前記キャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a step of forming a circuit on the ultrathin copper layer side surface of the carrier-attached copper foil provided with the carrier, the intermediate layer, and the ultrathin copper layer in this order,
Forming a resin base material on the ultrathin copper layer side surface of the copper foil with carrier so that the circuit is buried;
Laminating a surface-treated copper foil on the resin substrate from the surface-treated layer side,
Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate of the present invention,
Forming a circuit on the surface of the resin base material from which the surface-treated copper foil has been removed,
After forming the circuit on the resin substrate, the step of peeling the carrier of the copper foil with carrier, and
After peeling the carrier of the copper foil with carrier, by removing the ultra thin copper layer of the copper foil with carrier, the resin base material formed on the ultra thin copper layer side surface of the copper foil with carrier Exposing the buried circuit.
　本発明に係るプリント配線板の製造方法の一実施形態においては、表面に回路が形成された金属箔を準備する工程、
　前記回路が埋没するように前記金属箔表面に本発明の樹脂基材を形成する工程、
　キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔を準備し、前記キャリア付銅箔の極薄銅層側から前記樹脂基材に積層した後、前記キャリア付銅箔のキャリアを剥がし、その後、前記樹脂基材上に回路を形成する工程、及び、
　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a step of preparing a metal foil having a circuit formed on the surface,
Forming the resin base material of the present invention on the surface of the metal foil so that the circuit is buried;
After preparing a carrier, copper foil with a carrier, an intermediate layer, and an ultrathin copper layer in this order, and laminating the copper foil with carrier from the ultrathin copper layer side of the copper foil with carrier, Peeling the carrier, and then forming a circuit on the resin substrate; and
The step of exposing the circuit buried in the resin base material formed on the surface of the metal foil by removing the metal foil is included.
　本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
　前記回路が埋没するように前記キャリア付銅箔の前記極薄銅層側表面に本発明の樹脂基材を形成する工程、
　表面処理銅箔を、表面処理層側から前記樹脂基材に積層し、その後、前記樹脂基材上に回路を形成する工程、
　前記樹脂基材上に回路を形成した後に、前記キャリア付銅箔のキャリアを剥離させる工程、及び、
　前記キャリア付銅箔のキャリアを剥離させた後に、前記キャリア付銅箔の極薄銅層を除去することで、前記キャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention, a step of forming a circuit on the ultrathin copper layer side surface of the carrier-attached copper foil provided with the carrier, the intermediate layer, and the ultrathin copper layer in this order,
Forming the resin base material of the present invention on the ultrathin copper layer side surface of the carrier-attached copper foil so that the circuit is buried;
Laminating a surface-treated copper foil on the resin substrate from the surface treatment layer side, and then forming a circuit on the resin substrate;
After forming the circuit on the resin substrate, the step of peeling the carrier of the copper foil with carrier, and
After peeling the carrier of the copper foil with carrier, by removing the ultra thin copper layer of the copper foil with carrier, the resin base material formed on the ultra thin copper layer side surface of the copper foil with carrier Exposing the buried circuit.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア付銅箔と樹脂基材とを準備する工程、キャリア付銅箔と樹脂基材を積層する工程、前記キャリア付銅箔と樹脂基材を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層を酸などの腐食溶液を用いたエッチングやプラズマなどの方法によりすべて除去して本発明の樹脂基材を得る工程、前記極薄銅層をエッチングにより除去することにより露出した前記樹脂にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行う工程、前記樹脂および前記スルーホールまたは／およびブラインドビアを含む領域について無電解めっき層を設ける工程、前記無電解めっき層の上にめっきレジストを設ける工程、前記めっきレジストに対して露光し、その後、回路が形成される領域のめっきレジストを除去する工程、前記めっきレジストが除去された前記回路が形成される領域に、電解めっき層を設ける工程、前記めっきレジストを除去する工程、前記回路が形成される領域以外の領域にある無電解めっき層をフラッシュエッチングなどにより除去する工程を含む。 In one embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a copper foil with a carrier and a resin base material, a step of laminating the copper foil with a carrier and a resin base material, After laminating the copper foil with carrier and the resin base material, the step of peeling the carrier of the copper foil with carrier, the ultrathin copper layer exposed by peeling the carrier is etched using a corrosive solution such as acid or plasma Removing all by a method to obtain the resin base material of the present invention, providing a through hole or / and a blind via in the resin exposed by removing the ultrathin copper layer by etching, the through hole or / and A step of performing a desmear process on a region including the blind via, including the resin and the through hole or / and the blind via; A step of providing an electroless plating layer for a region, a step of providing a plating resist on the electroless plating layer, a step of exposing the plating resist, and then removing the plating resist in a region where a circuit is formed, A step of providing an electrolytic plating layer in a region where the circuit from which the plating resist is removed is formed, a step of removing the plating resist, a flash etching of an electroless plating layer in a region other than the region where the circuit is formed, etc. The step of removing by.
　本発明のプリント配線板の製造方法は一実施形態において、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　前記樹脂層の表面に回路を形成する工程、及び、
　前記表面処理銅箔又は前記キャリア付銅箔を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含む。 In one embodiment of the method for producing a printed wiring board of the present invention, the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface-treated layer is formed, or the circuit is on the surface of the ultrathin copper layer side. Preparing the formed copper foil with a carrier of the present invention,
Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
Forming a circuit on the surface of the resin layer; and
A step of exposing the circuit buried in the resin layer by removing the surface-treated copper foil or the copper foil with carrier is included.
　本発明のプリント配線板の製造方法は一実施形態において、表面に回路が形成された金属箔、又は、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔である第１の表面処理銅箔、又は、極薄金属層側表面に回路が形成されたキャリア付金属箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔である第１のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記金属箔表面又は前記表面処理銅箔表面又は前記キャリア付金属箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　本発明の表面処理銅箔である第２の表面処理銅箔を表面処理層側から前記樹脂層に積層する工程、又は、本発明のキャリア付銅箔である第２のキャリア付銅箔を極薄銅層側から前記樹脂層に積層する工程、
　前記樹脂層に積層した箔が前記第２のキャリア付銅箔である場合は、前記第２のキャリア付銅箔のキャリアを剥がす工程、
　前記樹脂層上の表面処理銅箔、又は、前記第２のキャリア付銅箔のキャリアが剥がされて残った極薄銅層を除去する工程、
　前記表面処理銅箔を除去した樹脂層の表面、又は、極薄銅層を除去した樹脂層の表面に回路を形成する工程、及び、
　前記樹脂層上に回路を形成した後に、前記金属箔を除去することで、又は、前記第１の表面処理銅箔を除去することで、又は、前記キャリア付金属箔のキャリアを剥離させた後に極薄金属層を除去することで、又は、前記第１のキャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含む。 In one embodiment of the method for producing a printed wiring board of the present invention, a metal foil having a circuit formed on its surface, or a surface-treated copper foil of the present invention having a circuit formed on the surface on which the surface treatment layer is formed The first surface-treated copper foil, or the metal foil with carrier in which the circuit is formed on the surface of the ultrathin metal layer, or the copper foil with carrier of the present invention in which the circuit is formed on the surface of the ultrathin copper layer Preparing a first copper foil with a carrier,
Forming a resin layer on the surface of the metal foil or the surface-treated copper foil or the surface of the metal foil with carrier or the surface of the copper foil with carrier so that the circuit is buried;
The step of laminating the second surface-treated copper foil that is the surface-treated copper foil of the present invention on the resin layer from the surface-treated layer side, or the second copper foil with a carrier that is the copper foil with carrier of the present invention Laminating the resin layer from the thin copper layer side;
When the foil laminated on the resin layer is the second copper foil with carrier, the step of peeling the carrier of the second carrier copper foil,
Removing the ultrathin copper layer remaining after the surface-treated copper foil on the resin layer or the carrier of the copper foil with the second carrier is peeled off,
Forming a circuit on the surface of the resin layer from which the surface-treated copper foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and
After forming a circuit on the resin layer, by removing the metal foil, or by removing the first surface-treated copper foil, or after peeling the carrier of the metal foil with carrier The process of exposing the circuit embedded in the resin layer by removing the ultra-thin copper layer after removing the ultra-thin metal layer or by removing the carrier of the copper foil with the first carrier including.
　本発明において、キャリア付金属箔は、少なくともキャリアと極薄金属層をこの順に備えている。キャリア付金属箔のキャリアとしては、金属箔を使用することができる。金属箔として銅箔、銅合金箔、ニッケル箔、ニッケル合金箔、アルミニウム箔、アルミニウム合金箔、鉄箔、鉄合金箔、ステンレス箔、亜鉛箔、亜鉛合金箔を用いることができる。金属箔の厚みは１～１００００μｍ、好ましくは２～５０００μｍ、好ましくは１０～１０００μｍ、好ましくは１８～５００μｍ、好ましくは３５～３００μｍとすることができる。また、キャリアとして樹脂基材や無機物質や有機物質の板を用いることもできる。樹脂基材や無機物質や有機物質の板の厚みは前述の金属箔の厚みと同じとすることができる。
　キャリアと金属箔とは、接着剤や離型剤、中間層を介して剥離可能に積層してもよい。またキャリアと金属箔を溶接、溶着等で剥離可能に接合してもよい。キャリアと金属箔が剥離困難な場合には、キャリアと金属箔の接合されている箇所を切断等により取り除いた後に、キャリアと金属箔を剥離してもよい。
　極薄金属層は、銅、銅合金、ニッケル、ニッケル合金、アルミニウム、アルミニウム合金、鉄、鉄合金、ステンレス、亜鉛、亜鉛合金であってもよい。極薄金属層の厚みはキャリア付銅箔の極薄銅層と同じ範囲とすることができる。極薄金属層は、回路にした際の導電性の観点から極薄銅層であることが好ましい。 In the present invention, the metal foil with a carrier includes at least a carrier and an ultrathin metal layer in this order. A metal foil can be used as a carrier of the metal foil with a carrier. Copper foil, copper alloy foil, nickel foil, nickel alloy foil, aluminum foil, aluminum alloy foil, iron foil, iron alloy foil, stainless steel foil, zinc foil, zinc alloy foil can be used as the metal foil. The thickness of the metal foil can be 1 to 10000 μm, preferably 2 to 5000 μm, preferably 10 to 1000 μm, preferably 18 to 500 μm, preferably 35 to 300 μm. In addition, a resin substrate, an inorganic material, or an organic material plate can be used as the carrier. The thickness of the resin substrate, the inorganic material, or the organic material plate can be the same as the thickness of the metal foil.
You may laminate | stack a carrier and metal foil so that peeling is possible through an adhesive agent, a mold release agent, and an intermediate | middle layer. Further, the carrier and the metal foil may be joined so as to be peeled off by welding, welding or the like. When it is difficult to peel off the carrier and the metal foil, the carrier and the metal foil may be peeled after removing the portion where the carrier and the metal foil are joined by cutting or the like.
The ultrathin metal layer may be copper, copper alloy, nickel, nickel alloy, aluminum, aluminum alloy, iron, iron alloy, stainless steel, zinc, zinc alloy. The thickness of the ultrathin metal layer can be in the same range as the ultrathin copper layer of the copper foil with carrier. The ultra-thin metal layer is preferably an ultra-thin copper layer from the viewpoint of conductivity when a circuit is formed.
　本発明のプリント配線板の製造方法は一実施形態において、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　金属箔を前記樹脂層に積層する工程、又は、キャリア付金属箔を極薄金属層側から前記樹脂層に積層する工程、
　前記樹脂層に積層した箔が前記キャリア付金属箔である場合は、前記キャリア付金属箔のキャリアを剥がす工程、
　前記樹脂層上の金属箔、又は、前記キャリア付金属箔のキャリアが剥がされて残った極薄金属層を除去する工程、
　前記金属箔を除去した樹脂層の表面、又は、極薄銅層を除去した樹脂層の表面に回路を形成する工程、及び、
　前記樹脂層上に回路を形成した後に、前記表面処理銅箔を除去することで、又は、前記キャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含む。 In one embodiment of the method for producing a printed wiring board of the present invention, the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface-treated layer is formed, or the circuit is on the surface of the ultrathin copper layer side. Preparing the formed copper foil with a carrier of the present invention,
Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
A step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin metal layer side,
When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier,
Removing the ultrathin metal layer remaining after the metal foil on the resin layer or the carrier of the metal foil with carrier is peeled off,
Forming a circuit on the surface of the resin layer from which the metal foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and
After forming a circuit on the resin layer, by removing the surface-treated copper foil, or by removing the ultrathin copper layer after peeling the carrier of the copper foil with carrier, the resin layer Exposing the buried circuit.
　本発明のプリント配線板の製造方法は一実施形態において、表面に回路が形成された金属箔、又は、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔である第１の表面処理銅箔、又は、極薄金属層側表面に回路が形成されたキャリア付金属箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔である第１のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記金属箔表面又は前記表面処理銅箔表面又は前記キャリア付金属箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　本発明の表面処理銅箔である第２の表面処理銅箔を表面処理層側から前記樹脂層に積層する工程、又は、本発明のキャリア付銅箔である第２のキャリア付銅箔を極薄銅層側から前記樹脂層に積層する工程、
　前記樹脂層に積層した箔が前記第２のキャリア付銅箔である場合は、前記第２のキャリア付銅箔のキャリアを剥がす工程、
　前記樹脂層上の表面処理銅箔、又は、前記第２のキャリア付銅箔のキャリアが剥がされて残った極薄銅層を用いてセミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、
　前記樹脂層上に回路を形成した後に、前記金属箔を除去することで、又は、前記第１の表面処理銅箔を除去することで、又は、前記キャリア付金属箔のキャリアを剥離させた後に極薄金属層を除去することで、又は、前記第１のキャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
を含む。 In one embodiment of the method for producing a printed wiring board of the present invention, a metal foil having a circuit formed on its surface, or a surface-treated copper foil of the present invention having a circuit formed on the surface on which the surface treatment layer is formed The first surface-treated copper foil, or the metal foil with carrier in which the circuit is formed on the surface of the ultrathin metal layer, or the copper foil with carrier of the present invention in which the circuit is formed on the surface of the ultrathin copper layer Preparing a first copper foil with a carrier,
Forming a resin layer on the surface of the metal foil or the surface-treated copper foil or the surface of the metal foil with carrier or the surface of the copper foil with carrier so that the circuit is buried;
The step of laminating the second surface-treated copper foil that is the surface-treated copper foil of the present invention on the resin layer from the surface-treated layer side, or the second copper foil with a carrier that is the copper foil with carrier of the present invention Laminating the resin layer from the thin copper layer side;
When the foil laminated on the resin layer is the second copper foil with carrier, the step of peeling the carrier of the second carrier copper foil,
A semi-additive method, a subtractive method, a partly additive method or a modified semi-additive method using the surface-treated copper foil on the resin layer or the ultrathin copper layer remaining after the carrier of the copper foil with the second carrier is peeled off. Forming a circuit on the resin layer by any one of the methods,
After forming a circuit on the resin layer, by removing the metal foil, or by removing the first surface-treated copper foil, or after peeling the carrier of the metal foil with carrier The process of exposing the circuit embedded in the resin layer by removing the ultra-thin copper layer after removing the ultra-thin metal layer or by removing the carrier of the copper foil with the first carrier including.
　本発明のプリント配線板の製造方法は一実施形態において、表面処理層が形成された側の表面に回路が形成された本発明の表面処理銅箔、又は、極薄銅層側表面に回路が形成された本発明のキャリア付銅箔を準備する工程、
　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
　金属箔を前記樹脂層に積層する工程、又は、キャリア付金属箔を極薄銅層側から前記樹脂層に積層する工程、
　前記樹脂層に積層した箔が前記キャリア付金属箔である場合は、前記キャリア付金属箔のキャリアを剥がす工程、
　前記樹脂層上の金属箔、又は、前記キャリア付金属箔のキャリアが剥がされて残った極薄金属層を用いてセミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、
　前記樹脂層上に回路を形成した後に、前記表面処理銅箔を除去することで、又は、前記キャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程を含む。 In one embodiment of the method for producing a printed wiring board of the present invention, the surface-treated copper foil of the present invention in which a circuit is formed on the surface on which the surface-treated layer is formed, or the circuit is on the surface of the ultrathin copper layer side. Preparing the formed copper foil with a carrier of the present invention,
Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
A step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin copper layer side,
When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier,
Either a semi-additive method, a subtractive method, a partial additive method or a modified semi-additive method using a metal foil on the resin layer or an ultra-thin metal layer remaining after the carrier of the metal foil with carrier is peeled off Forming a circuit on the resin layer by a method,
After forming a circuit on the resin layer, by removing the surface-treated copper foil, or by removing the ultrathin copper layer after peeling the carrier of the copper foil with carrier, the resin layer Exposing the buried circuit.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、本発明に係るキャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔と絶縁基板を積層する工程、前記キャリア付銅箔と絶縁基板を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層を酸などの腐食溶液を用いたエッチングやプラズマなどの方法によりすべて除去する工程、前記極薄銅層をエッチングにより除去することにより露出した前記樹脂にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行う工程、前記樹脂および前記スルーホールまたは／およびブラインドビアを含む領域について無電解めっき層を設ける工程、前記無電解めっき層の上にめっきレジストを設ける工程、前記めっきレジストに対して露光し、その後、回路が形成される領域のめっきレジストを除去する工程、前記めっきレジストが除去された前記回路が形成される領域に、電解めっき層を設ける工程、前記めっきレジストを除去する工程、前記回路が形成される領域以外の領域にある無電解めっき層をフラッシュエッチングなどにより除去する工程を含む。 In one embodiment of a method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention, laminating the copper foil with a carrier and an insulating substrate A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and an insulating substrate, etching or plasma using a corrosive solution such as an acid on the exposed ultrathin copper layer by peeling off the carrier A step of removing all by a method such as, a step of providing a through hole or / and a blind via in the resin exposed by removing the ultrathin copper layer by etching, a desmear for a region including the through hole or / and the blind via A region for processing, including the resin and the through-hole or / and blind via A step of providing an electroless plating layer, a step of providing a plating resist on the electroless plating layer, a step of exposing the plating resist, and then removing the plating resist in a region where a circuit is formed, the plating The step of providing an electrolytic plating layer in the region where the circuit from which the resist has been removed is formed, the step of removing the plating resist, and the electroless plating layer in a region other than the region where the circuit is formed by flash etching or the like Removing.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の別の一実施形態においては、キャリア付銅箔と樹脂基材とを準備する工程、前記キャリア付銅箔と樹脂基材を積層する工程、前記キャリア付銅箔と樹脂基材を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層を酸などの腐食溶液を用いたエッチングやプラズマなどの方法によりすべて除去して本発明の樹脂基材を得る工程、前記極薄銅層をエッチングにより除去することにより露出した前記樹脂の表面について無電解めっき層を設ける工程、前記無電解めっき層の上にめっきレジストを設ける工程、前記めっきレジストに対して露光し、その後、回路が形成される領域のめっきレジストを除去する工程、前記めっきレジストが除去された前記回路が形成される領域に、電解めっき層を設ける工程、前記めっきレジストを除去する工程、前記回路が形成される領域以外の領域にある無電解めっき層及び極薄銅層をフラッシュエッチングなどにより除去する工程を含む。 In another embodiment of the method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a copper foil with a carrier and a resin base material, and laminating the copper foil with a carrier and a resin base material A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and a resin base material, etching using a corrosive solution such as an acid on the ultrathin copper layer exposed by peeling the carrier, Removing all by a method such as plasma to obtain the resin substrate of the present invention, providing an electroless plating layer on the surface of the resin exposed by removing the ultrathin copper layer by etching, the electroless plating Providing a plating resist on the layer, exposing the plating resist, and then removing the plating resist in a region where a circuit is to be formed; A step of providing an electrolytic plating layer in a region where the circuit from which the resist is removed is formed, a step of removing the plating resist, an electroless plating layer and an ultrathin copper layer in a region other than the region where the circuit is formed Is removed by flash etching or the like.
　セミアディティブ法を用いた本発明に係るプリント配線板の製造方法の別の一実施形態においては、本発明に係るキャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔と絶縁基板を積層する工程、前記キャリア付銅箔と絶縁基板を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層を酸などの腐食溶液を用いたエッチングやプラズマなどの方法によりすべて除去する工程、前記極薄銅層をエッチングにより除去することにより露出した前記樹脂の表面について無電解めっき層を設ける工程、前記無電解めっき層の上にめっきレジストを設ける工程、前記めっきレジストに対して露光し、その後、回路が形成される領域のめっきレジストを除去する工程、前記めっきレジストが除去された前記回路が形成される領域に、電解めっき層を設ける工程、前記めっきレジストを除去する工程、前記回路が形成される領域以外の領域にある無電解めっき層及び極薄銅層をフラッシュエッチングなどにより除去する工程を含む。 In another embodiment of the method for producing a printed wiring board according to the present invention using a semi-additive method, a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention, the copper foil with a carrier and the insulating substrate Laminating the copper foil with carrier and the insulating substrate, then peeling off the carrier of the copper foil with carrier, etching the exposed ultrathin copper layer with a corrosive solution such as an acid. Removing all by a method such as plasma or plasma, providing an electroless plating layer on the surface of the resin exposed by removing the ultrathin copper layer by etching, and providing a plating resist on the electroless plating layer A step of exposing the plating resist, and then removing the plating resist in a region where a circuit is formed, the plating resist The step of providing an electrolytic plating layer in the region where the removed circuit is formed, the step of removing the plating resist, and flushing the electroless plating layer and the ultrathin copper layer in the region other than the region where the circuit is formed A step of removing by etching or the like.
　モディファイドセミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア付銅箔と樹脂基材とを準備する工程、前記キャリア付銅箔と樹脂基材を積層する工程、前記キャリア付銅箔と樹脂基材を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層と樹脂基材にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行い、本発明の樹脂基材の表面プロファイルを得る工程、前記スルーホールまたは／およびブラインドビアを含む領域について無電解めっき層を設ける工程、前記キャリアを剥がして露出した極薄銅層表面にめっきレジストを設ける工程、前記めっきレジストを設けた後に、電解めっきにより回路を形成する工程、前記めっきレジストを除去する工程、前記めっきレジストを除去することにより露出した極薄銅層をフラッシュエッチングにより除去する工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention using the modified semi-additive method, a step of preparing a copper foil with a carrier and a resin base material, and laminating the copper foil with a carrier and a resin base material A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the resin base, a through hole or / and a blind via in the ultrathin copper layer and the resin base exposed by peeling the carrier Providing a surface profile of the resin base material of the present invention by performing a desmear process on the region including the through hole or / and the blind via, and electroless plating layer on the region including the through hole or / and the blind via A step of providing a plating resist on the surface of the ultrathin copper layer exposed by peeling off the carrier After providing said plating resist to form a circuit by electroplating, removing the plating resist, comprising the step of removing the ultra-thin copper layer exposed by removing the plating resist by flash etching.
　モディファイドセミアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、本発明に係るキャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔と絶縁基板を積層する工程、前記キャリア付銅箔と絶縁基板を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層と絶縁基板にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行う工程、前記スルーホールまたは／およびブラインドビアを含む領域について無電解めっき層を設ける工程、前記キャリアを剥がして露出した極薄銅層表面にめっきレジストを設ける工程、前記めっきレジストを設けた後に、電解めっきにより回路を形成する工程、前記めっきレジストを除去する工程、前記めっきレジストを除去することにより露出した極薄銅層をフラッシュエッチングにより除去する工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention using the modified semi-additive method, a step of preparing the copper foil with carrier and the insulating substrate according to the present invention, the copper foil with carrier and the insulating substrate are prepared. A step of laminating, a step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and an insulating substrate, a through hole or / and a blind via in the ultrathin copper layer and the insulating substrate exposed by peeling the carrier A step of performing a desmear process on the region including the through hole or / and the blind via, a step of providing an electroless plating layer on the region including the through hole or / and the blind via, and an electrode exposed by peeling off the carrier Step of providing a plating resist on the surface of the thin copper layer, after providing the plating resist , Including the step of forming a circuit by electroplating, removing the plating resist, a step of removing by flash etching ultrathin copper layer exposed by removing the plating resist.
　モディファイドセミアディティブ法を用いた本発明に係るプリント配線板の製造方法の別の一実施形態においては、キャリア付銅箔と樹脂基材とを準備する工程、前記キャリア付銅箔と樹脂基材を積層する工程、前記キャリア付銅箔と樹脂基材を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層の上にめっきレジストを設ける工程、前記めっきレジストに対して露光し、その後、回路が形成される領域のめっきレジストを除去する工程、前記めっきレジストが除去された前記回路が形成される領域に、電解めっき層を設ける工程、前記めっきレジストを除去する工程、前記回路が形成される領域以外の領域にある無電解めっき層及び極薄銅層をフラッシュエッチングなどにより除去し、本発明の樹脂基材の表面プロファイルを得る工程を含む。 In another embodiment of the method for producing a printed wiring board according to the present invention using the modified semi-additive method, a step of preparing a copper foil with a carrier and a resin base, the copper foil with a carrier and the resin base A step of laminating, a step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and a resin base material, a step of providing a plating resist on the exposed ultrathin copper layer by peeling off the carrier, Exposing the plating resist, and then removing the plating resist in the region where the circuit is formed; providing an electrolytic plating layer in the region where the circuit where the plating resist is removed; and the plating resist Removing the electroless plating layer and the ultrathin copper layer in a region other than the region where the circuit is formed by flash etching or the like. It comprises obtaining the surface profile of the resin substrate of the present invention.
　モディファイドセミアディティブ法を用いた本発明に係るプリント配線板の製造方法の別の一実施形態においては、本発明に係るキャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔と絶縁基板を積層する工程、前記キャリア付銅箔と絶縁基板を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層の上にめっきレジストを設ける工程、前記めっきレジストに対して露光し、その後、回路が形成される領域のめっきレジストを除去する工程、前記めっきレジストが除去された前記回路が形成される領域に、電解めっき層を設ける工程、前記めっきレジストを除去する工程、前記回路が形成される領域以外の領域にある無電解めっき層及び極薄銅層をフラッシュエッチングなどにより除去する工程を含む。 In another embodiment of the method for manufacturing a printed wiring board according to the present invention using the modified semi-additive method, the step of preparing the copper foil with carrier and the insulating substrate according to the present invention, the copper foil with carrier and the insulation A step of laminating the substrate, a step of laminating the carrier-attached copper foil and an insulating substrate, a step of peeling the carrier of the copper foil with carrier, a step of providing a plating resist on the exposed ultrathin copper layer by peeling off the carrier, Exposing the plating resist and then removing the plating resist in a region where a circuit is formed; providing an electrolytic plating layer in a region where the circuit where the plating resist is removed; Step of removing resist, flash etching of electroless plating layer and ultrathin copper layer in regions other than the region where the circuit is formed, etc. Comprising the step of further removing.
　パートリーアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア付銅箔と樹脂基材とを準備する工程、前記キャリア付銅箔と樹脂基材を積層する工程、前記キャリア付銅箔と樹脂基材を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層と樹脂基材にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行い、本発明の樹脂基材の表面プロファイルを得る工程、前記スルーホールまたは／およびブラインドビアを含む領域について触媒核を付与する工程、前記キャリアを剥がして露出した極薄銅層表面にエッチングレジストを設ける工程、前記エッチングレジストに対して露光し、回路パターンを形成する工程、前記極薄銅層および前記触媒核を酸などの腐食溶液を用いたエッチングやプラズマなどの方法により除去して、回路を形成する工程、前記エッチングレジストを除去する工程、前記極薄銅層および前記触媒核を酸などの腐食溶液を用いたエッチングやプラズマなどの方法により除去して露出した前記樹脂基材表面に、ソルダレジストまたはメッキレジストを設ける工程、前記ソルダレジストまたはメッキレジストが設けられていない領域に無電解めっき層を設ける工程を含む。 In one embodiment of a method for producing a printed wiring board according to the present invention using a partly additive method, a step of preparing a copper foil with a carrier and a resin base material, a step of laminating the copper foil with a carrier and a resin base material The step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the resin base material, through holes or / and blind vias in the ultrathin copper layer and the resin base material exposed by peeling the carrier A step of performing a desmear process on the region including the through hole or / and the blind via to obtain a surface profile of the resin base material of the present invention, and providing a catalyst nucleus for the region including the through hole or / and the blind via. Forming an etching resist on the surface of the ultrathin copper layer exposed by peeling off the carrier; Forming a circuit pattern by exposing the photoresist to a circuit pattern, removing the ultrathin copper layer and the catalyst core by a method such as etching or plasma using a corrosive solution such as an acid to form a circuit, A step of removing the etching resist, a solder resist or a plating resist on the surface of the resin substrate exposed by removing the ultrathin copper layer and the catalyst core by a method such as etching using an acid or other corrosive solution or plasma. And a step of providing an electroless plating layer in a region where the solder resist or the plating resist is not provided.
　パートリーアディティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、本発明に係るキャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔と絶縁基板を積層する工程、前記キャリア付銅箔と絶縁基板を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層と絶縁基板にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行う工程、前記スルーホールまたは／およびブラインドビアを含む領域について触媒核を付与する工程、前記キャリアを剥がして露出した極薄銅層表面にエッチングレジストを設ける工程、前記エッチングレジストに対して露光し、回路パターンを形成する工程、前記極薄銅層および前記触媒核を酸などの腐食溶液を用いたエッチングやプラズマなどの方法により除去して、回路を形成する工程、前記エッチングレジストを除去する工程、前記極薄銅層および前記触媒核を酸などの腐食溶液を用いたエッチングやプラズマなどの方法により除去して露出した前記絶縁基板表面に、ソルダレジストまたはメッキレジストを設ける工程、前記ソルダレジストまたはメッキレジストが設けられていない領域に無電解めっき層を設ける工程を含む。 In one embodiment of a method for producing a printed wiring board according to the present invention using a partly additive method, a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention, laminating the copper foil with a carrier and an insulating substrate A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the insulating substrate, a through hole or / and a blind via on the exposed ultrathin copper layer and the insulating substrate after peeling the carrier. A step of performing a desmear process on the region including the through hole or / and the blind via, a step of applying a catalyst nucleus to the region including the through hole or / and the blind via, and an ultrathin copper exposed by peeling off the carrier Providing an etching resist on the layer surface, exposing the etching resist; Forming a circuit pattern; removing the ultrathin copper layer and the catalyst core by a method such as etching or plasma using a corrosive solution such as an acid to form a circuit; removing the etching resist; A step of providing a solder resist or a plating resist on the surface of the insulating substrate exposed by removing the ultrathin copper layer and the catalyst core by a method such as etching using an etching solution such as acid or plasma, and the solder resist or plating. A step of providing an electroless plating layer in a region where no resist is provided.
　サブトラクティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、キャリア付銅箔と樹脂基材とを準備する工程、前記キャリア付銅箔と樹脂基材を積層する工程、前記キャリア付銅箔と樹脂基材を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層と樹脂基材にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行い、本発明の樹脂基材の表面プロファイルを得る工程、前記スルーホールまたは／およびブラインドビアを含む領域について無電解めっき層を設ける工程、前記無電解めっき層の表面に、電解めっき層を設ける工程、前記電解めっき層または／および前記極薄銅層の表面にエッチングレジストを設ける工程、前記エッチングレジストに対して露光し、回路パターンを形成する工程、前記極薄銅層および前記無電解めっき層および前記電解めっき層を酸などの腐食溶液を用いたエッチングやプラズマなどの方法により除去して、回路を形成する工程、前記エッチングレジストを除去する工程を含む。 In one embodiment of the method for producing a printed wiring board according to the present invention using a subtractive method, a step of preparing a copper foil with a carrier and a resin base material, a step of laminating the copper foil with a carrier and a resin base material The step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the resin base material, through holes or / and blind vias in the ultrathin copper layer and the resin base material exposed by peeling the carrier A step of performing a desmear process on the region including the through hole or / and the blind via to obtain a surface profile of the resin base material of the present invention, and an electroless plating layer on the region including the through hole or / and the blind via. The step of providing, the step of providing an electrolytic plating layer on the surface of the electroless plating layer, the electrolytic plating layer or / and The step of providing an etching resist on the surface of the ultrathin copper layer, the step of exposing the etching resist to form a circuit pattern, the ultrathin copper layer, the electroless plating layer, and the electrolytic plating layer as an acid, etc. It includes a step of forming a circuit by removing by a method such as etching or plasma using a corrosive solution, and a step of removing the etching resist.
　サブトラクティブ法を用いた本発明に係るプリント配線板の製造方法の一実施形態においては、本発明に係るキャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔と絶縁基板を積層する工程、前記キャリア付銅箔と絶縁基板を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層と絶縁基板にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行う工程、前記スルーホールまたは／およびブラインドビアを含む領域について無電解めっき層を設ける工程、前記無電解めっき層の表面に、電解めっき層を設ける工程、前記電解めっき層または／および前記極薄銅層の表面にエッチングレジストを設ける工程、前記エッチングレジストに対して露光し、回路パターンを形成する工程、前記極薄銅層および前記無電解めっき層および前記電解めっき層を酸などの腐食溶液を用いたエッチングやプラズマなどの方法により除去して、回路を形成する工程、前記エッチングレジストを除去する工程を含む。 In one embodiment of a method for producing a printed wiring board according to the present invention using a subtractive method, a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention, laminating the copper foil with a carrier and an insulating substrate A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the insulating substrate, a through hole or / and a blind via on the exposed ultrathin copper layer and the insulating substrate after peeling the carrier. A step of providing, a step of performing a desmear process on the region including the through hole or / and the blind via, a step of providing an electroless plating layer on the region including the through hole or / and the blind via, on the surface of the electroless plating layer, Step of providing an electrolytic plating layer, etching on the surface of the electrolytic plating layer or / and the ultrathin copper layer A step of providing a resist, a step of exposing the etching resist to form a circuit pattern, etching of the ultrathin copper layer, the electroless plating layer, and the electrolytic plating layer using a corrosive solution such as an acid, plasma, etc. And removing the etching resist.
　サブトラクティブ法を用いた本発明に係るプリント配線板の製造方法の別の一実施形態においては、キャリア付銅箔と樹脂基材とを準備する工程、前記キャリア付銅箔と樹脂基材を積層する工程、前記キャリア付銅箔と樹脂基材を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層と樹脂基材にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行い、本発明の樹脂基材の表面プロファイルを得る工程、前記スルーホールまたは／およびブラインドビアを含む領域について無電解めっき層を設ける工程、前記無電解めっき層の表面にマスクを形成する工程、マスクが形成されいない前記無電解めっき層の表面に電解めっき層を設ける工程、前記電解めっき層または／および前記極薄銅層の表面にエッチングレジストを設ける工程、前記エッチングレジストに対して露光し、回路パターンを形成する工程、前記極薄銅層および前記無電解めっき層を酸などの腐食溶液を用いたエッチングやプラズマなどの方法により除去して、回路を形成する工程、前記エッチングレジストを除去する工程を含む。 In another embodiment of the method for producing a printed wiring board according to the present invention using a subtractive method, a step of preparing a copper foil with a carrier and a resin base material, and laminating the copper foil with a carrier and the resin base material A step of peeling the carrier of the copper foil with carrier after laminating the copper foil with carrier and the resin base material, a through hole or / and a blind in the ultrathin copper layer and the resin base material exposed by peeling the carrier A step of providing vias, a step of obtaining a surface profile of the resin base material of the present invention by performing desmear treatment on the region including the through hole or / and the blind via, and electroless plating on the region including the through hole or / and the blind via. A step of providing a layer, a step of forming a mask on the surface of the electroless plating layer, and the electroless where the mask is not formed A step of providing an electrolytic plating layer on the surface of the plating layer, a step of providing an etching resist on the surface of the electrolytic plating layer or / and the ultrathin copper layer, a step of exposing the etching resist to form a circuit pattern, The method includes forming the circuit by removing the ultrathin copper layer and the electroless plating layer by a method such as etching or plasma using a corrosive solution such as an acid, and removing the etching resist.
　サブトラクティブ法を用いた本発明に係るプリント配線板の製造方法の別の一実施形態においては、本発明に係るキャリア付銅箔と絶縁基板とを準備する工程、前記キャリア付銅箔と絶縁基板を積層する工程、前記キャリア付銅箔と絶縁基板を積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、前記キャリアを剥がして露出した極薄銅層と絶縁基板にスルーホールまたは／およびブラインドビアを設ける工程、前記スルーホールまたは／およびブラインドビアを含む領域についてデスミア処理を行う工程、前記スルーホールまたは／およびブラインドビアを含む領域について無電解めっき層を設ける工程、前記無電解めっき層の表面にマスクを形成する工程、マスクが形成されいない前記無電解めっき層の表面に電解めっき層を設ける工程、前記電解めっき層または／および前記極薄銅層の表面にエッチングレジストを設ける工程、前記エッチングレジストに対して露光し、回路パターンを形成する工程、前記極薄銅層および前記無電解めっき層を酸などの腐食溶液を用いたエッチングやプラズマなどの方法により除去して、回路を形成する工程、前記エッチングレジストを除去する工程を含む。 In another embodiment of the method for producing a printed wiring board according to the present invention using a subtractive method, a step of preparing a copper foil with a carrier and an insulating substrate according to the present invention, the copper foil with a carrier and the insulating substrate Laminating the carrier-attached copper foil and the insulating substrate, then peeling the carrier of the carrier-attached copper foil, peeling the carrier and exposing the ultrathin copper layer and the insulating substrate through holes or / and blinds A step of providing a via, a step of performing a desmear process on a region including the through hole or / and the blind via, a step of providing an electroless plating layer on the region including the through hole or / and the blind via, a surface of the electroless plating layer Forming a mask on the surface of the electroless plating layer on which the mask is not formed. A step of providing an etching resist on the surface of the electrolytic plating layer or / and the ultrathin copper layer, a step of exposing the etching resist to form a circuit pattern, the ultrathin copper layer and the electroless plating The method includes a step of forming a circuit by removing the layer by a method such as etching or plasma using a corrosive solution such as an acid, and a step of removing the etching resist.
　スルーホールまたは／およびブラインドビアを設ける工程、及びその後のデスミア工程は行わなくてもよい。 ¡Through holes and / or blind vias and subsequent desmear steps may not be performed.
　ここで、本発明のキャリア付銅箔を用いたプリント配線板の製造方法の具体例を詳細に説明する。
　工程１：まず、表面に粗化処理層が形成された極薄銅層を有するキャリア付銅箔（１層目）を準備する。
　工程２：次に、極薄銅層の粗化処理層上にレジストを塗布し、露光・現像を行い、レジストを所定の形状にエッチングする。
　工程３：次に、回路用のメッキを形成した後、レジストを除去することで、所定の形状の回路メッキを形成する。
　工程４：次に、回路メッキを覆うように（回路メッキが埋没するように）極薄銅層上に埋め込み樹脂を設けて樹脂層を積層し、続いて別のキャリア付銅箔（２層目）を極薄銅層側から接着させる。
　工程５：次に、２層目のキャリア付銅箔からキャリアを剥がす。なお、２層目にはキャリアを有さない銅箔を用いてもよい。
　工程６：次に、２層目の極薄銅層または銅箔および樹脂層の所定位置にレーザー穴あけを行い、回路メッキを露出させてブラインドビアを形成する。
　工程７：次に、ブラインドビアに銅を埋め込みビアフィルを形成する。
　工程８：次に、ビアフィル上に、上記工程２及び３のようにして回路メッキを形成する。
　工程９：次に、１層目のキャリア付銅箔からキャリアを剥がす。
　工程１０：次に、フラッシュエッチングにより両表面の極薄銅層（２層目に銅箔を設けた場合には銅箔）を除去し、樹脂層内の回路メッキの表面を露出させる。
　工程１１：次に、樹脂層内の回路メッキ上にバンプを形成し、当該はんだ上に銅ピラーを形成する。このようにして本発明のキャリア付銅箔を用いたプリント配線板を作製する。 Here, the specific example of the manufacturing method of the printed wiring board using the copper foil with a carrier of this invention is demonstrated in detail.
Step 1: First, a copper foil with a carrier (first layer) having an ultrathin copper layer with a roughened layer formed on the surface is prepared.
Step 2: Next, a resist is applied on the roughened layer of the ultrathin copper layer, exposed and developed, and the resist is etched into a predetermined shape.
Step 3: Next, after circuit plating is formed, the resist is removed to form circuit plating having a predetermined shape.
Step 4: Next, an embedding resin is provided on the ultrathin copper layer so as to cover the circuit plating (so that the circuit plating is buried), a resin layer is laminated, and then another copper foil with a carrier (second layer) ) Is bonded from the ultrathin copper layer side.
Process 5: Next, a carrier is peeled off from the copper foil with a carrier of the 2nd layer. Note that a copper foil having no carrier may be used for the second layer.
Step 6: Next, laser drilling is performed at predetermined positions of the second ultrathin copper layer or copper foil and resin layer to expose the circuit plating and form blind vias.
Step 7: Next, copper is embedded in the blind via to form a via fill.
Step 8: Next, circuit plating is formed on the via fill as in steps 2 and 3 above.
Process 9: Next, a carrier is peeled off from the copper foil with a carrier of the 1st layer.
Step 10: Next, ultra-thin copper layers (copper foil when a copper foil is provided as the second layer) on both surfaces are removed by flash etching, and the surface of the circuit plating in the resin layer is exposed.
Step 11: Next, bumps are formed on the circuit plating in the resin layer, and copper pillars are formed on the solder. Thus, the printed wiring board using the copper foil with a carrier of this invention is produced.
　上記別のキャリア付銅箔（２層目）は、本発明のキャリア付銅箔を用いてもよく、従来のキャリア付銅箔を用いてもよく、さらに通常の銅箔を用いてもよい。また、工程８における２層目の回路上に、さらに回路を１層或いは複数層形成してもよく、それらの回路形成をセミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって行ってもよい。 The other carrier-attached copper foil (second layer) may be the carrier-attached copper foil of the present invention, a conventional carrier-attached copper foil, or a normal copper foil. Further, one or more circuits may be formed on the second-layer circuit in Step 8, and the circuit formation may be performed by any of the semi-additive method, subtractive method, partly additive method, or modified semi-additive method. It may be performed by any method.
　上述のようなプリント配線板の製造方法によれば、回路メッキが樹脂層に埋め込まれた構成となっているため、例えば工程１０のようなフラッシュエッチングによる極薄銅層の除去の際に、回路メッキが樹脂層によって保護され、その形状が保たれ、これにより微細回路の形成が容易となる。また、回路メッキが樹脂層によって保護されるため、耐マイグレーション性が向上し、回路の配線の導通が良好に抑制される。このため、微細回路の形成が容易となる。また、工程１０及び工程１１に示すようにフラッシュエッチングによって極薄銅層を除去したとき、回路メッキの露出面が樹脂層から凹んだ形状となるため、当該回路メッキ上にバンプが、さらにその上に銅ピラーがそれぞれ形成しやすくなり、製造効率が向上する。 According to the method for manufacturing a printed wiring board as described above, since the circuit plating is embedded in the resin layer, for example, when the ultrathin copper layer is removed by flash etching as in Step 10, the circuit is formed. The plating is protected by the resin layer, and its shape is maintained, thereby facilitating the formation of a fine circuit. Further, since the circuit plating is protected by the resin layer, the migration resistance is improved, and the continuity of the circuit wiring is satisfactorily suppressed. For this reason, formation of a fine circuit becomes easy. In addition, when the ultrathin copper layer is removed by flash etching as shown in Step 10 and Step 11, the exposed surface of the circuit plating has a shape recessed from the resin layer, so that bumps are further formed on the circuit plating. Thus, copper pillars can be easily formed, and the production efficiency is improved.
　なお、埋め込み樹脂（レジン）には公知の樹脂、プリプレグを用いることができる。例えば、ＢＴ（ビスマレイミドトリアジン）レジンやＢＴレジンを含浸させたガラス布であるプリプレグ、味の素ファインテクノ株式会社製ＡＢＦフィルムやＡＢＦを用いることができる。また、前記埋め込み樹脂（レジン）には本明細書に記載の樹脂層および／または樹脂および／またはプリプレグを使用することができる。 A known resin or prepreg can be used as the embedding resin (resin). For example, a prepreg that is a glass cloth impregnated with BT (bismaleimide triazine) resin or BT resin, an ABF film or ABF manufactured by Ajinomoto Fine Techno Co., Ltd. can be used. Moreover, the resin layer and / or resin and / or prepreg as described in this specification can be used for the embedding resin (resin).
　また、前記一層目に用いられるキャリア付銅箔は、当該キャリア付銅箔の表面に基板または樹脂層を有してもよい。当該基板または樹脂層を有することで一層目に用いられるキャリア付銅箔は支持され、しわが入りにくくなるため、生産性が向上するという利点がある。なお、前記基板または樹脂層には、前記一層目に用いられるキャリア付銅箔を支持する効果するものであれば、全ての基板または樹脂層を用いることが出来る。例えば前記基板または樹脂層として本願明細書に記載のキャリア、プリプレグ、樹脂層や公知のキャリア、プリプレグ、樹脂層、金属板、金属箔、無機化合物の板、無機化合物の箔、有機化合物の板、有機化合物の箔を用いることができる。 Further, the carrier-attached copper foil used in the first layer may have a substrate or a resin layer on the surface of the carrier-attached copper foil. By having the said board | substrate or resin layer, the copper foil with a carrier used for the first layer is supported, and since it becomes difficult to wrinkle, there exists an advantage that productivity improves. As the substrate or resin layer, any substrate or resin layer can be used as long as it has an effect of supporting the copper foil with carrier used in the first layer. For example, as the substrate or resin layer, the carrier, prepreg, resin layer and known carrier, prepreg, resin layer, metal plate, metal foil, inorganic compound plate, inorganic compound foil, organic compound plate described in the present specification, Organic compound foils can be used.
　更に、プリント配線板に電子部品類を搭載することで、プリント回路板が完成する。本発明において、「プリント配線板」にはこのように電子部品類が搭載されたプリント配線板およびプリント回路板およびプリント基板も含まれることとする。
　また、当該プリント配線板を用いて電子機器を作製してもよく、当該電子部品類が搭載されたプリント回路板を用いて電子機器を作製してもよく、当該電子部品類が搭載されたプリント基板を用いて電子機器を作製してもよい。 Furthermore, a printed circuit board is completed by mounting electronic components on the printed wiring board. In the present invention, the “printed wiring board” includes a printed wiring board, a printed circuit board, and a printed board on which electronic parts are mounted as described above.
In addition, an electronic device may be manufactured using the printed wiring board, an electronic device may be manufactured using a printed circuit board on which the electronic components are mounted, and a print on which the electronic components are mounted. An electronic device may be manufactured using a substrate.
　以下に本発明の実施例を示すが、これらの実施例は本発明及びその利点をよりよく理解するために提供するものであり、発明が限定されることを意図するものではない。
　本実施例では、以下のように、樹脂基材の表面プロファイルについて、銅箔を用いて形成したものと、薬液を用いて形成したものとを作製した。 Examples of the present invention are shown below, but these examples are provided for better understanding of the present invention and its advantages, and are not intended to limit the invention.
In this example, the surface profile of the resin base material formed using copper foil and the one formed using a chemical solution were prepared as follows.
　１．銅箔を用いた樹脂基材の表面プロファイルの形成
　図２に、実施例及び比較例のデータを得るためのサンプル作製フローを示す。
　実施例Ａ１～Ａ１１及び比較例Ａ１～Ａ４として、また、実施例Ｂ１～Ｂ８、実施例Ｂ１０～Ｂ１２及び比較例Ｂ１～Ｂ４の基材表面プロファイルを作製するための銅箔として、以下の銅箔バルク層（生箔）を準備した。 1. Formation of Surface Profile of Resin Base Material Using Copper Foil FIG. 2 shows a sample production flow for obtaining data of examples and comparative examples.
As Examples A1 to A11 and Comparative Examples A1 to A4, and as copper foils for producing the substrate surface profiles of Examples B1 to B8, Examples B10 to B12 and Comparative Examples B1 to B4, the following copper foils are used. A bulk layer (raw foil) was prepared.
・一般電解生箔
　銅濃度８０～１２０ｇ／Ｌ、硫酸濃度８０～１２０ｇ／Ｌ、塩化物イオン濃度３０～１００ｐｐｍ、ニカワ濃度１～５ｐｐｍ、電解液温度５７～６２℃の硫酸銅電解液を電解銅メッキ浴とし、アノードとカソード（銅箔用電着用金属製ドラム）の間を流れる電解液の線速度を１．５～２．５ｍ／秒、電流密度７０Ａ／ｄｍ2で厚み１２μｍ（重量厚み９５ｇ／ｍ2）の一般電解生箔を作製した。 ・ General electrolytic raw foil Copper copper electrolyte with copper concentration 80-120 g / L, sulfuric acid concentration 80-120 g / L, chloride ion concentration 30-100 ppm, glue concentration 1-5 ppm, electrolyte temperature 57-62 ° C As a plating bath, the linear velocity of the electrolyte flowing between the anode and the cathode (electrodeposition metal drum for copper foil) is 1.5 to 2.5 m / sec, the current density is 70 A / dm 2 , and the thickness is 12 μm (weight thickness 95 g). / M 2 ) general electrolytic green foil was prepared.
・両面フラット電解生箔
　銅濃度８０～１２０ｇ／Ｌ、硫酸濃度８０～１２０ｇ／Ｌ、塩化物イオン濃度３０～１００ｐｐｍ、レベリング剤１（ビス（３スルホプロピル）ジスルフィド）：１０～３０ｐｐｍ、レベリング剤２（アミン化合物）：１０～３０ｐｐｍ、電解液温度５７～６２℃の硫酸銅電解液を電解銅メッキ浴とし、アノードとカソード（銅箔用電着用金属製ドラム）の間を流れる電解液の線速度を１．５～２．５ｍ／秒、電流密度７０Ａ／ｄｍ2で厚み１２μｍ（重量厚み９５ｇ／ｍ2）の両面フラット電解生箔を作製した。上記のアミン化合物には以下の化学式のアミン化合物を用いた。
Figure JPOXMLDOC01-appb-C000002
 （上記化学式中、Ｒ1及びＲ2はヒドロキシアルキル基、エーテル基、アリール基、芳香族置換アルキル基、不飽和炭化水素基、アルキル基からなる一群から選ばれるものである。） ・ Double-sided flat electrolytic green foil Copper concentration 80-120 g / L, sulfuric acid concentration 80-120 g / L, chloride ion concentration 30-100 ppm, leveling agent 1 (bis (3sulfopropyl) disulfide): 10-30 ppm, leveling agent 2 (Amine compound): The linear velocity of the electrolyte flowing between the anode and the cathode (electrodeposition metal drum for copper foil) using a copper sulfate electrolyte of 10 to 30 ppm and an electrolyte temperature of 57 to 62 ° C. as an electrolytic copper plating bath Was produced at a current density of 70 A / dm 2 and a thickness of 12 μm (weight thickness 95 g / m 2 ). As the amine compound, an amine compound having the following chemical formula was used.
Figure JPOXMLDOC01-appb-C000002
 (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.)
・キャリア付き極薄生銅箔
　前述の両面フラット電解生箔製造条件で、厚み１８μｍの両面フラット電解生箔を作製した。これを銅箔キャリアとして、以下の方法により、剥離層、極薄銅層を形成し、厚み１．５、２、３、５μｍのキャリア付き極薄銅箔を得た。 -Ultra-thin raw copper foil with carrier A double-sided flat electrolytic raw foil having a thickness of 18 µm was produced under the above-mentioned double-sided flat electrolytic raw foil manufacturing conditions. Using this as a copper foil carrier, a peeling layer and an ultrathin copper layer were formed by the following method to obtain an ultrathin copper foil with a carrier having a thickness of 1.5, 2, 3, 5 μm.
（１）Ｎｉ層（剥離層：下地メッキ１）
　銅箔キャリアのＳ面に対して、以下の条件でロール・トウ・ロール型の連続メッキラインで電気メッキすることにより１０００μｇ／ｄｍ2の付着量のＮｉ層を形成した。具体的なメッキ条件を以下に記す。
　　硫酸ニッケル：２７０～２８０ｇ／Ｌ
　　塩化ニッケル：３５～４５ｇ／Ｌ
　　酢酸ニッケル：１０～２０ｇ／Ｌ
　　ホウ酸：３０～４０ｇ／Ｌ
　　光沢剤：サッカリン、ブチンジオール等
　　ドデシル硫酸ナトリウム：５５～７５ｐｐｍ
　　ｐＨ：４～６
　　浴温：５５～６５℃
　　電流密度：１０Ａ／ｄｍ2 (1) Ni layer (peeling layer: base plating 1)
An Ni layer having an adhesion amount of 1000 μg / dm 2 was formed on the S surface of the copper foil carrier by electroplating with a roll-to-roll type continuous plating line under the following conditions. Specific plating conditions are described below.
Nickel sulfate: 270 to 280 g / L
Nickel chloride: 35 to 45 g / L
Nickel acetate: 10-20g / L
Boric acid: 30-40g / L
Brightener: Saccharin, butynediol, etc. Sodium dodecyl sulfate: 55-75 ppm
pH: 4-6
Bath temperature: 55-65 ° C
Current density: 10 A / dm 2
（２）Ｃｒ層（剥離層：下地メッキ２）
　次に、（１）にて形成したＮｉ層表面を水洗及び酸洗後、引き続き、ロール・トウ・ロール型の連続メッキライン上でＮｉ層の上に１１μｇ／ｄｍ2の付着量のＣｒ層を以下の条件で電解クロメート処理することにより付着させた。
　　　重クロム酸カリウム１～１０ｇ／Ｌ、亜鉛０ｇ／Ｌ
　　　ｐＨ：７～１０
　　　液温：４０～６０℃
　　　電流密度：２Ａ／ｄｍ2 (2) Cr layer (peeling layer: base plating 2)
Next, after the surface of the Ni layer formed in (1) was washed with water and pickled, a Cr layer having an adhesion amount of 11 μg / dm 2 was subsequently formed on the Ni layer on a roll-to-roll type continuous plating line. It was made to adhere by carrying out the electrolytic chromate process on the conditions of.
Potassium dichromate 1-10g / L, zinc 0g / L
pH: 7-10
Liquid temperature: 40-60 ° C
Current density: 2 A / dm 2
（３）極薄銅層
　次に、（２）にて形成したＣｒ層表面を水洗及び酸洗後、引き続き、ロール・トウ・ロール型の連続メッキライン上で、Ｃｒ層の上に厚み１．５、２、３、５μｍの極薄銅層を以下の条件で電気メッキすることにより形成し、キャリア付極薄銅箔を作製した。
　　　銅濃度：８０～１２０ｇ／Ｌ
　　　硫酸濃度：８０～１２０ｇ／Ｌ
　　　塩化物イオン濃度：３０～１００ｐｐｍ
　　　レベリング剤１（ビス（３スルホプロピル）ジスルフィド）：１０～３０ｐｐｍ
　　　レベリング剤２（アミン化合物）：１０～３０ｐｐｍ
　なお、レべリング剤２には以下のアミン化合物を用いた。上記のアミン化合物には以下の化学式のアミン化合物を用いた。
Figure JPOXMLDOC01-appb-C000003
 （上記化学式中、Ｒ1及びＲ2はヒドロキシアルキル基、エーテル基、アリール基、芳香族置換アルキル基、不飽和炭化水素基、アルキル基からなる一群から選ばれるものである。）
　　　電解液温度：５０～８０℃
　　　電流密度：１００Ａ／ｄｍ2 (3) Ultra-thin copper layer Next, after the surface of the Cr layer formed in (2) was washed with water and pickled, the thickness 1. on the Cr layer on a continuous roll-to-roll type continuous plating line. An ultrathin copper layer of 5, 2, 3, 5 μm was formed by electroplating under the following conditions to produce an ultrathin copper foil with a carrier.
Copper concentration: 80-120 g / L
Sulfuric acid concentration: 80-120 g / L
Chloride ion concentration: 30-100ppm
Leveling agent 1 (bis (3sulfopropyl) disulfide): 10 to 30 ppm
Leveling agent 2 (amine compound): 10 to 30 ppm
In addition, the following amine compounds were used for the leveling agent 2. As the amine compound, an amine compound having the following chemical formula was used.
Figure JPOXMLDOC01-appb-C000003
 (In the above chemical formula, R 1 and R 2 are selected from the group consisting of a hydroxyalkyl group, an ether group, an aryl group, an aromatic substituted alkyl group, an unsaturated hydrocarbon group, and an alkyl group.)
Electrolyte temperature: 50-80 ° C
Current density: 100 A / dm 2
　次に、上記生箔の樹脂基材との接着側表面であるＭ（マット面）面或いはＳ面（シャイニー面）に、粗化処理、バリヤー処理、防錆処理、シランカップリング材塗布の各表面処理をこの順で施した。各処理条件を以下に示す。 Next, each of roughening treatment, barrier treatment, rust prevention treatment, and silane coupling material application is applied to the M (matte surface) or S surface (shiny surface) which is the surface of the green foil bonded to the resin base material. The surface treatment was applied in this order. Each processing condition is shown below.
　〔粗化処理〕
・球状粗化（通常）：
　先に記した各種生箔のＭ面或いはＳ面に、下記条件で粗化処理を行った。
　（電解液組成）
　　　Ｃｕ：２０～３０ｇ／Ｌ（硫酸銅５水和物で添加、以下同様）
　　　Ｈ2ＳＯ4:８０～１２０ｇ／Ｌ
　　　砒素：１．０～２．０ｇ／Ｌ
　（電解液温）
　　　３５～４０℃
　（電流条件）
　　　電流密度：７０Ａ/ｄｍ2 [Roughening treatment]
・ Spherical roughening (normal):
The roughening process was performed on the M surface or S surface of the various raw foils described above under the following conditions.
(Electrolytic solution composition)
Cu: 20 to 30 g / L (added with copper sulfate pentahydrate, the same applies hereinafter)
H 2 SO 4 : 80-120g / L
Arsenic: 1.0-2.0 g / L
(Electrolyte temperature)
35-40 ° C
(Current condition)
Current density: 70 A / dm 2
　上記条件で粗化処理を施した各種銅箔のＭ面、キャリア付き極薄銅箔の表面に、粗化粒子の脱落防止とピール強度向上のため、硫酸・硫酸銅からなる銅電解浴で被せメッキを行った。被せメッキ条件を以下に記す。 Cover the M surface of various copper foils roughened under the above conditions and the surface of the ultrathin copper foil with carrier with a copper electrolytic bath made of sulfuric acid and copper sulfate to prevent the removal of the roughened particles and improve the peel strength. Plating was performed. The covering plating conditions are described below.
　（電解液組成）
　　　Ｃｕ：４０～５０ｇ／Ｌ
　　　Ｈ2ＳＯ4:８０～１２０ｇ／Ｌ
　（電解液温）
　　　４３～４７℃
　（電流条件）
　　　電流密度：２９Ａ／ｄｍ2 (Electrolytic solution composition)
Cu: 40-50 g / L
H 2 SO 4 : 80-120g / L
(Electrolyte temperature)
43-47 ° C
(Current condition)
Current density: 29 A / dm 2
・微細粗化（１）：
　先に記した各種生箔のＭ面、キャリア付き極薄生銅箔の表面に、下記条件で粗化処理を行った。
　（電解液組成）
　　　Ｃｕ濃度：１０～２０ｇ／Ｌ
　　　Ｈ2ＳＯ4濃度：８０～１２０ｇ／Ｌ
　　　タングステン濃度：１～１０ｍｇ／Ｌ（タングステン酸ナトリウム２水和物で添加）
　　　ドデシル硫酸ナトリウム濃度：１～１０ｍｇ／Ｌ
　（電解液温）
　　　３５～４５℃
　（電流条件）
　　　所定の穴形状を得るため、四段式で電流を付与した。電流密度は次の通りとした。
　　　　　一段目：　３０Ａ／ｄｍ2
　　　　　二段目：　１０Ａ／ｄｍ2
　　　　　三段目：　３０Ａ／ｄｍ2
　　　　　四段目：　１０Ａ／ｄｍ2 -Fine roughening (1):
The M surface of the various raw foils described above and the surface of the ultrathin raw copper foil with a carrier were subjected to a roughening treatment under the following conditions.
(Electrolytic solution composition)
Cu concentration: 10 to 20 g / L
H 2 SO 4 concentration: 80-120 g / L
Tungsten concentration: 1 to 10 mg / L (added with sodium tungstate dihydrate)
Sodium dodecyl sulfate concentration: 1 to 10 mg / L
(Electrolyte temperature)
35-45 ° C
(Current condition)
In order to obtain a predetermined hole shape, a current was applied in a four-stage system. The current density was as follows.
First stage: 30 A / dm 2
Second stage: 10 A / dm 2
Third stage: 30 A / dm 2
Fourth stage: 10 A / dm 2
　上記条件で粗化処理を施した各種銅箔のＭ面、キャリア付き極薄銅箔の表面に、粗化粒子の脱落防止とピール強度向上のため、硫酸・硫酸銅からなる銅電解浴で被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｕ：４０～５０ｇ／Ｌ
　　　Ｈ2ＳＯ4:８０～１２０ｇ／Ｌ
　（電解液温）
　　　４３～４７℃
　（電流条件）
　　　電流密度：４１Ａ／ｄｍ2 Cover the M surface of various copper foils roughened under the above conditions and the surface of the ultrathin copper foil with carrier with a copper electrolytic bath made of sulfuric acid and copper sulfate to prevent the removal of the roughened particles and improve the peel strength. Plating was performed. The covering plating conditions are described below.
(Electrolytic solution composition)
Cu: 40-50 g / L
H 2 SO 4 : 80-120g / L
(Electrolyte temperature)
43-47 ° C
(Current condition)
Current density: 41 A / dm 2
・微細粗化（２）：
　先に記したキャリア付き極薄生銅箔の表面に、下記条件で粗化処理を行った。
　（電解液組成）
　　　Ｃｕ濃度：１０～２０ｇ／Ｌ
　　　Ｈ2ＳＯ4濃度：８０～１２０ｇ／Ｌ
　　　タングステン濃度：１～１０ｍｇ／Ｌ（タングステン酸ナトリウム２水和物で添加）
　　　ドデシル硫酸ナトリウム濃度：１～１０ｍｇ／Ｌ
　（電解液温）
　　　３５～４５℃
　（電流条件）
　　　所定の穴形状を得るため、二段式を適用した。電流密度は次の通りとした。
　　　　　一段目：５０Ａ／ｄｍ2
　　　　　二段目：１０Ａ／ｄｍ2 -Fine roughening (2):
The surface of the ultrathin raw copper foil with a carrier described above was roughened under the following conditions.
(Electrolytic solution composition)
Cu concentration: 10 to 20 g / L
H 2 SO 4 concentration: 80-120 g / L
Tungsten concentration: 1 to 10 mg / L (added with sodium tungstate dihydrate)
Sodium dodecyl sulfate concentration: 1 to 10 mg / L
(Electrolyte temperature)
35-45 ° C
(Current condition)
A two-stage system was applied to obtain a predetermined hole shape. The current density was as follows.
First stage: 50 A / dm 2
Second stage: 10 A / dm 2
　上記条件で粗化処理を施した各種銅箔のＭ面、キャリア付き極薄銅箔の表面に、粗化粒子の脱落防止とピール強度向上のため、硫酸・硫酸銅からなる銅電解浴で被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｕ：４０～５０ｇ／Ｌ
　　　Ｈ2ＳＯ4:８０～１２０ｇ／Ｌ
　（電解液温）
　　　４３～４７℃
　（電流条件）
　　　電流密度：４１Ａ／ｄｍ2 Cover the M surface of various copper foils roughened under the above conditions and the surface of the ultrathin copper foil with carrier with a copper electrolytic bath made of sulfuric acid and copper sulfate to prevent the removal of the roughened particles and improve the peel strength. Plating was performed. The covering plating conditions are described below.
(Electrolytic solution composition)
Cu: 40-50 g / L
H 2 SO 4 : 80-120g / L
(Electrolyte temperature)
43-47 ° C
(Current condition)
Current density: 41 A / dm 2
・微細粗化（３）：
　先に記した両面フラット電解生箔のＭ面、及び、キャリア付き極薄生銅箔の表面に、下記条件で粗化処理を行った。
　（電解液組成）
　　　Ｃｕ：１０～２０ｇ／Ｌ
　　　Ｃｏ：１～１０ｇ／Ｌ
　　　Ｎｉ：１～１０ｇ／Ｌ
　　　ｐＨ：１～４
　（電解液温度）
　　　４０～５０℃
　（電流条件）
　　　電流密度：２５Ａ／ｄｍ2
　（メッキ終了後のメッキ液中の浸漬時間）
　　　所定の穴形状を得るため５秒以内とした。 -Fine roughening (3):
The roughening process was performed on the M surface of the double-sided flat electrolytic raw foil described above and the surface of the ultrathin raw copper foil with carrier under the following conditions.
(Electrolytic solution composition)
Cu: 10 to 20 g / L
Co: 1-10g / L
Ni: 1-10g / L
pH: 1 to 4
(Electrolyte temperature)
40-50 ℃
(Current condition)
Current density: 25 A / dm 2
(Immersion time in plating solution after plating)
In order to obtain a predetermined hole shape, it was within 5 seconds.
　上記条件で粗化処理を施した両面フラット銅箔のＭ面、及び、キャリア付き極薄銅箔の表面に、Ｃｏ－Ｎｉの被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｏ：１～３０ｇ／Ｌ
　　　Ｎｉ：１～３０ｇ／Ｌ
　　　ｐＨ：１．０～３．５
　（電解液温）
　　　３０～８０℃
　（電流条件）
　　　電流密度５．０Ａ／ｄｍ2 Co-Ni plating was performed on the M surface of the double-sided flat copper foil subjected to the roughening treatment under the above conditions and the surface of the ultrathin copper foil with carrier. The covering plating conditions are described below.
(Electrolytic solution composition)
Co: 1-30g / L
Ni: 1-30g / L
pH: 1.0 to 3.5
(Electrolyte temperature)
30-80 ℃
(Current condition)
Current density 5.0A / dm 2
・微細粗化（４）：
　先に記したキャリア付き極薄生銅箔の表面に、下記条件で第一次粒子と第二次粒子を形成させる粗化処理を行った。
　第一次粒子形成：
　（電解液組成）
　　　Ｃｕ濃度：１０～２０ｇ／Ｌ
　　　Ｈ2ＳＯ4濃度：８０～１２０ｇ／Ｌ
　　　タングステン濃度：１～１０ｍｇ／Ｌ（タングステン酸ナトリウム２水和物で添加）
　　　ドデシル硫酸ナトリウム濃度：１～１０ｍｇ／Ｌ
　（電解液温）
　　　３５～４５℃
　（電流条件）
　　　所定の穴形状を得るため、二段式を適用した。電流密度は次の通りとした。
　　　　　一段目：５０Ａ／ｄｍ2
　　　　　二段目：１０Ａ／ｄｍ2 -Fine roughening (4):
The surface of the ultrathin raw copper foil with a carrier described above was subjected to a roughening treatment for forming primary particles and secondary particles under the following conditions.
Primary particle formation:
(Electrolytic solution composition)
Cu concentration: 10 to 20 g / L
H 2 SO 4 concentration: 80-120 g / L
Tungsten concentration: 1 to 10 mg / L (added with sodium tungstate dihydrate)
Sodium dodecyl sulfate concentration: 1 to 10 mg / L
(Electrolyte temperature)
35-45 ° C
(Current condition)
A two-stage system was applied to obtain a predetermined hole shape. The current density was as follows.
First stage: 50 A / dm 2
Second stage: 10 A / dm 2
　上記条件で第一次粗化粒子を形成したキャリア付き極薄銅箔の表面に、第一次粗化粒子の脱落防止とピール強度向上のため、硫酸・硫酸銅からなる銅電解浴で被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｕ：４０～５０ｇ／Ｌ
　　　Ｈ2ＳＯ4:８０～１２０ｇ／Ｌ
　（電解液温）
　　　４３～４７℃
　（電流条件）
　　　電流密度：４１Ａ／ｄｍ2 The surface of the ultrathin copper foil with carrier on which the primary roughened particles are formed under the above conditions is covered with a copper electrolytic bath composed of sulfuric acid and copper sulfate to prevent the primary roughened particles from falling off and improve the peel strength. Went. The covering plating conditions are described below.
(Electrolytic solution composition)
Cu: 40-50 g / L
H 2 SO 4 : 80-120g / L
(Electrolyte temperature)
43-47 ° C
(Current condition)
Current density: 41 A / dm 2
　第二次粒子形成：
　次に、キャリア付き極薄銅箔の第一次粗化粒子の上に第二次粗化粒子を形成させるための粗化処理を行った。
　（電解液組成）
　　　Ｃｕ：１０～２０ｇ／Ｌ
　　　Ｃｏ：１～１０ｇ／Ｌ
　　　Ｎｉ：１～１０ｇ／Ｌ
　　　ｐＨ：１～４
　（電解液温度）
　　　４０～５０℃
　（電流条件）
　　　電流密度：２５Ａ／ｄｍ2
　（メッキ終了後のメッキ液中の浸漬時間）
　　　所定の穴形状を得るため５秒以内とした。 Secondary particle formation:
Next, the roughening process for forming a secondary coarse particle on the primary coarse particle of the ultra-thin copper foil with a carrier was performed.
(Electrolytic solution composition)
Cu: 10 to 20 g / L
Co: 1-10g / L
Ni: 1-10g / L
pH: 1 to 4
(Electrolyte temperature)
40-50 ℃
(Current condition)
Current density: 25 A / dm 2
(Immersion time in plating solution after plating)
In order to obtain a predetermined hole shape, it was within 5 seconds.
　上記条件で第二次粒子粗化処理を施したキャリア付き極薄銅箔の表面にＣｏ－Ｎｉの被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｏ：１～３０ｇ／Ｌ
　　　Ｎｉ：１～３０ｇ／Ｌ
　　　ｐＨ：１．０～３．５
　（電解液温）
　　　３０～８０℃
　（電流条件）
　　　電流密度５．０Ａ／ｄｍ2 Co—Ni covering plating was performed on the surface of the ultrathin copper foil with a carrier that was subjected to the secondary particle roughening treatment under the above conditions. The covering plating conditions are described below.
(Electrolytic solution composition)
Co: 1-30g / L
Ni: 1-30g / L
pH: 1.0 to 3.5
(Electrolyte temperature)
30-80 ℃
(Current condition)
Current density 5.0A / dm 2
・微細粗化（５）：
　先に記したキャリア付き極薄生銅箔の表面に、下記条件で第一次粒子と第二次粒子を形成させる粗化処理を行った。
　第一次粒子形成：
　（電解液組成）
　　　Ｃｕ濃度：１０～２０ｇ／Ｌ
　　　Ｈ2ＳＯ4濃度：８０～１２０ｇ／Ｌ
　　　タングステン濃度：１～１０ｍｇ／Ｌ（タングステン酸ナトリウム２水和物で添加）
　　　ドデシル硫酸ナトリウム濃度：１～１０ｍｇ／Ｌ
　（電解液温）
　　　３５～４５℃
　（電流条件）
　　　所定の穴形状を得るため、二段式を適用した。電流密度は次の通りとした。
　　　　　一段目：２０Ａ／ｄｍ2
　　　　　二段目：１０Ａ／ｄｍ2 -Fine roughening (5):
The surface of the ultrathin raw copper foil with a carrier described above was subjected to a roughening treatment for forming primary particles and secondary particles under the following conditions.
Primary particle formation:
(Electrolytic solution composition)
Cu concentration: 10 to 20 g / L
H 2 SO 4 concentration: 80-120 g / L
Tungsten concentration: 1 to 10 mg / L (added with sodium tungstate dihydrate)
Sodium dodecyl sulfate concentration: 1 to 10 mg / L
(Electrolyte temperature)
35-45 ° C
(Current condition)
A two-stage system was applied to obtain a predetermined hole shape. The current density was as follows.
First stage: 20 A / dm 2
Second stage: 10 A / dm 2
　上記条件で第一次粗化粒子を形成したキャリア付き極薄銅箔の表面に、第一次粗化粒子の脱落防止とピール強度向上のため、硫酸・硫酸銅からなる銅電解浴で被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｕ：４０～５０ｇ／Ｌ
　　　Ｈ2ＳＯ4:８０～１２０ｇ／Ｌ
　（電解液温）
　　　４３～４７℃
　（電流条件）
　　　電流密度：４１Ａ／ｄｍ2 The surface of the ultrathin copper foil with carrier on which the primary roughened particles are formed under the above conditions is covered with a copper electrolytic bath composed of sulfuric acid and copper sulfate to prevent the primary roughened particles from falling off and improve the peel strength. Went. The covering plating conditions are described below.
(Electrolytic solution composition)
Cu: 40-50 g / L
H 2 SO 4 : 80-120g / L
(Electrolyte temperature)
43-47 ° C
(Current condition)
Current density: 41 A / dm 2
　第二次粒子形成：
　次に、キャリア付き極薄銅箔の第一次粗化粒子の上に第二次粗化粒子を形成させるための粗化処理を行った。
　（電解液組成）
　　　Ｃｕ：１０～２０ｇ／Ｌ
　　　Ｃｏ：１～１０ｇ／Ｌ
　　　Ｎｉ：１～１０ｇ／Ｌ
　　　ｐＨ：１～４
　（電解液温度）
　　　４０～５０℃
　（電流条件）
　　　電流密度：２５Ａ／ｄｍ2
　（メッキ終了後のメッキ液中の浸漬時間）
　　　所定の穴形状を得るため１５～２０秒とした。 Secondary particle formation:
Next, the roughening process for forming a secondary coarse particle on the primary coarse particle of the ultra-thin copper foil with a carrier was performed.
(Electrolytic solution composition)
Cu: 10 to 20 g / L
Co: 1-10g / L
Ni: 1-10g / L
pH: 1 to 4
(Electrolyte temperature)
40-50 ℃
(Current condition)
Current density: 25 A / dm 2
(Immersion time in plating solution after plating)
In order to obtain a predetermined hole shape, the time was 15 to 20 seconds.
　上記条件で第二次粒子粗化処理を施したキャリア付き極薄銅箔の表面にＣｏ－Ｎｉの被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｏ：１～３０ｇ／Ｌ
　　　Ｎｉ：１～３０ｇ／Ｌ
　　　ｐＨ：１．０～３．５
　（電解液温）
　　　３０～８０℃
　（電流条件）
　　　電流密度５．０Ａ／ｄｍ2 Co—Ni covering plating was performed on the surface of the ultrathin copper foil with a carrier that was subjected to the secondary particle roughening treatment under the above conditions. The covering plating conditions are described below.
(Electrolytic solution composition)
Co: 1-30g / L
Ni: 1-30g / L
pH: 1.0 to 3.5
(Electrolyte temperature)
30-80 ℃
(Current condition)
Current density 5.0A / dm 2
・微細粗化（６）：
　先に記したキャリア付き極薄生銅箔の表面に、下記条件で粗化処理を行った。
　（電解液組成）
　　　Ｃｕ濃度：１０～２０ｇ／Ｌ
　　　Ｈ2ＳＯ4濃度：８０～１２０ｇ／Ｌ
　　　タングステン濃度：１～１０ｍｇ／Ｌ（タングステン酸ナトリウム２水和物で添加）
　　　ドデシル硫酸ナトリウム濃度：１～１０ｍｇ／Ｌ
　（電解液温）
　　　３５～４５℃
　（電流条件）
　　　所定の穴形状を得るため、四段式を適用した。電流密度は次の通りとした。
　　　　　一段目：５０Ａ／ｄｍ2
　　　　　二段目：１０Ａ／ｄｍ2
　　　　　三段目：５０Ａ／ｄｍ2
　　　　　四段目：１０Ａ／ｄｍ2 -Fine roughening (6):
The surface of the ultrathin raw copper foil with a carrier described above was roughened under the following conditions.
(Electrolytic solution composition)
Cu concentration: 10 to 20 g / L
H 2 SO 4 concentration: 80-120 g / L
Tungsten concentration: 1 to 10 mg / L (added with sodium tungstate dihydrate)
Sodium dodecyl sulfate concentration: 1 to 10 mg / L
(Electrolyte temperature)
35-45 ° C
(Current condition)
A four-stage system was applied to obtain a predetermined hole shape. The current density was as follows.
First stage: 50 A / dm 2
Second stage: 10 A / dm 2
Third stage: 50 A / dm 2
Fourth stage: 10 A / dm 2
　上記条件で粗化処理を施した各種銅箔のＭ面、キャリア付き極薄銅箔の表面に、粗化粒子の脱落防止とピール強度向上のため、硫酸・硫酸銅からなる銅電解浴で被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｕ：４０～５０ｇ／Ｌ
　　　Ｈ2ＳＯ4:８０～１２０ｇ／Ｌ
　（電解液温）
　　　４３～４７℃
　（電流条件）
　　　電流密度：４１Ａ／ｄｍ2 Cover the M surface of various copper foils roughened under the above conditions and the surface of the ultrathin copper foil with carrier with a copper electrolytic bath made of sulfuric acid and copper sulfate to prevent the removal of the roughened particles and improve the peel strength. Plating was performed. The covering plating conditions are described below.
(Electrolytic solution composition)
Cu: 40-50 g / L
H 2 SO 4 : 80-120g / L
(Electrolyte temperature)
43-47 ° C
(Current condition)
Current density: 41 A / dm 2
・微細粗化（７）：
　先に記したキャリア付き極薄生銅箔の表面に、下記条件で第一次粒子と第二次粒子を形成させる粗化処理を行った。
　第一次粒子形成：
　（電解液組成）
　　　Ｃｕ濃度：１０～２０ｇ／Ｌ
　　　Ｈ2ＳＯ4濃度：８０～１２０ｇ／Ｌ
　　　タングステン濃度：１～１０ｍｇ／Ｌ（タングステン酸ナトリウム２水和物で添加）
　　　ドデシル硫酸ナトリウム濃度：１～１０ｍｇ／Ｌ
　（電解液温）
　　　３５～４５℃
　（電流条件）
　　　所定の穴形状を得るため、三段式を適用した。電流密度は次の通りとした。
　　　　　一段目：２５Ａ／ｄｍ2
　　　　　二段目：１０Ａ／ｄｍ2
　　　　　三段目：５Ａ／ｄｍ2 -Fine roughening (7):
The surface of the ultrathin raw copper foil with a carrier described above was subjected to a roughening treatment for forming primary particles and secondary particles under the following conditions.
Primary particle formation:
(Electrolytic solution composition)
Cu concentration: 10 to 20 g / L
H 2 SO 4 concentration: 80-120 g / L
Tungsten concentration: 1 to 10 mg / L (added with sodium tungstate dihydrate)
Sodium dodecyl sulfate concentration: 1 to 10 mg / L
(Electrolyte temperature)
35-45 ° C
(Current condition)
A three-stage system was applied in order to obtain a predetermined hole shape. The current density was as follows.
First stage: 25 A / dm 2
Second stage: 10 A / dm 2
Third stage: 5 A / dm 2
　上記条件で第一次粗化粒子を形成したキャリア付き極薄銅箔の表面に、第一次粗化粒子の脱落防止とピール強度向上のため、硫酸・硫酸銅からなる銅電解浴で被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｕ：４０～５０ｇ／Ｌ
　　　Ｈ2ＳＯ4:８０～１２０ｇ／Ｌ
　（電解液温）
　　　４３～４７℃
　（電流条件）
　　　電流密度：４１Ａ／ｄｍ2 The surface of the ultrathin copper foil with carrier on which the primary roughened particles are formed under the above conditions is covered with a copper electrolytic bath composed of sulfuric acid and copper sulfate to prevent the primary roughened particles from falling off and improve the peel strength. Went. The covering plating conditions are described below.
(Electrolytic solution composition)
Cu: 40-50 g / L
H 2 SO 4 : 80-120g / L
(Electrolyte temperature)
43-47 ° C
(Current condition)
Current density: 41 A / dm 2
　第二次粒子形成：
　次に、キャリア付き極薄銅箔の第一次粗化粒子の上に第二次粗化粒子を形成させるための粗化処理を行った。
　（電解液組成）
　　　Ｃｕ：１０～２０ｇ／Ｌ
　　　Ｃｏ：１～１０ｇ／Ｌ
　　　Ｎｉ：１～１０ｇ／Ｌ
　　　ｐＨ：１～４
　（電解液温度）
　　　４０～５０℃
　（電流条件）
　　　電流密度：２５Ａ／ｄｍ2
　（メッキ終了後のメッキ液中の浸漬時間）
　　　所定の穴形状を得るため５～１０秒とした。 Secondary particle formation:
Next, the roughening process for forming a secondary coarse particle on the primary coarse particle of the ultra-thin copper foil with a carrier was performed.
(Electrolytic solution composition)
Cu: 10 to 20 g / L
Co: 1-10g / L
Ni: 1-10g / L
pH: 1 to 4
(Electrolyte temperature)
40-50 ℃
(Current condition)
Current density: 25 A / dm 2
(Immersion time in plating solution after plating)
In order to obtain a predetermined hole shape, 5 to 10 seconds were used.
　上記条件で第二次粒子粗化処理を施したキャリア付き極薄銅箔の表面にＣｏ－Ｎｉの被せメッキを行った。被せメッキ条件を以下に記す。
　（電解液組成）
　　　Ｃｏ：１～３０ｇ／Ｌ
　　　Ｎｉ：１～３０ｇ／Ｌ
　　　ｐＨ：１．０～３．５
　（電解液温）
　　　３０～８０℃
　（電流条件）
　　　電流密度５．０Ａ／ｄｍ2 Co—Ni covering plating was performed on the surface of the ultrathin copper foil with a carrier that was subjected to the secondary particle roughening treatment under the above conditions. The covering plating conditions are described below.
(Electrolytic solution composition)
Co: 1-30g / L
Ni: 1-30g / L
pH: 1.0 to 3.5
(Electrolyte temperature)
30-80 ℃
(Current condition)
Current density 5.0A / dm 2
　〔バリヤー（耐熱）処理〕
　バリヤー（耐熱）処理を下記の条件で行い、真鍮メッキ層又は亜鉛・ニッケル合金メッキ層を形成した。 [Barrier (heat resistant) treatment]
A barrier (heat resistant) treatment was performed under the following conditions to form a brass plating layer or a zinc / nickel alloy plating layer.
　実施例Ａ６、比較例Ａ２、Ａ３、実施例Ｂ６、比較例Ｂ２、Ｂ３のバリヤー層（真鍮メッキ）形成条件：
　銅濃度５０～８０ｇ／Ｌ、亜鉛濃度２～１０ｇ／Ｌ、水酸化ナトリウム濃度５０～８０ｇ／Ｌ、シアン化ナトリウム濃度５～３０ｇ／Ｌ、温度６０～９０℃の真鍮メッキ浴を用い、電流密度５～１０Ａ／ｄｍ2（多段処理）でメッキ電気量３０Ａｓ／ｄｍ2を、粗化処理層を形成したＭ面に付与した。 Barrier layer (brass plating) formation conditions of Example A6, Comparative Examples A2 and A3, Example B6, and Comparative Examples B2 and B3:
Current density using brass plating bath with copper concentration 50-80g / L, zinc concentration 2-10g / L, sodium hydroxide concentration 50-80g / L, sodium cyanide concentration 5-30g / L, temperature 60-90 ° C A plating electric quantity of 30 As / dm 2 was applied to the M surface on which the roughening treatment layer was formed at 5 to 10 A / dm 2 (multistage treatment).
　実施例Ａ３、比較例Ａ１、実施例Ｂ３、比較例Ｂ１のバリヤー層（亜鉛・ニッケルメッキ）形成条件：
　Ｎｉ：１０ｇ／Ｌ～３０ｇ／Ｌ、 Ｚｎ:１ｇ／Ｌ～１５ｇ／Ｌ、 硫酸(Ｈ2ＳＯ4)：１ｇ／Ｌ～１２ｇ／Ｌ、塩化物イオン：０ｇ／Ｌ～５g／Ｌを添加したメッキ浴を用い、電流密度１．３Ａ／ｄｍ2でメッキ電気量５．５Ａｓ／ｄｍ2を、粗化処理層を形成したＭ面に付与した。 Barrier layer (zinc / nickel plating) formation conditions of Example A3, Comparative Example A1, Example B3, and Comparative Example B1:
Ni: 10 g / L to 30 g / L, Zn: 1 g / L to 15 g / L, sulfuric acid (H 2 SO 4 ): 1 g / L to 12 g / L, chloride ion: 0 g / L to 5 g / L Using a plating bath, a plating electric quantity of 5.5 As / dm 2 was applied to the M surface on which the roughening treatment layer was formed at a current density of 1.3 A / dm 2 .
　〔防錆処理〕
　防錆処理（クロメート処理）を下記の条件で行い、防錆処理層を形成した。
　（クロメート条件）　ＣｒＯ3：２．５ｇ／Ｌ、Ｚｎ：０．７ｇ／Ｌ、Ｎａ2ＳＯ4：１０ｇ／Ｌ、ｐＨ４．８、５４℃のクロメート浴で０．７Ａｓ／ｄｍ2の電気量を付加。更に、クロメート浴での防錆処理終了直後、液シャワー配管を用いて、同じクロメート浴を使って粗化処理面全面をシャワーリングした。 [Rust prevention treatment]
Rust prevention treatment (chromate treatment) was performed under the following conditions to form a rust prevention treatment layer.
(Chromate conditions) CrO 3 : 2.5 g / L, Zn: 0.7 g / L, Na 2 SO 4 : 10 g / L, pH 4.8, an electric quantity of 0.7 As / dm 2 in a chromate bath at 54 ° C. Addition. Furthermore, immediately after completion of the rust prevention treatment in the chromate bath, the entire roughened surface was showered using the same chromate bath using a liquid shower pipe.
　〔シランカップリング材塗布〕
　銅箔の粗化処理面に、０．２～２％のアルコキシシランを含有量するｐＨ７～８の溶液を噴霧することで、シランカップリング材塗布処理を行った。 [Silane coupling material application]
A silane coupling material coating treatment was performed by spraying a solution having a pH of 7 to 8 containing 0.2 to 2% of alkoxysilane on the roughened surface of the copper foil.
　実施例Ａ８、実施例Ｂ８については、防錆処理、シランカップリング材塗布の後、更に下記の条件で樹脂層の形成を行った。
（樹脂合成例）
　ステンレス製の碇型攪拌棒、窒素導入管とストップコックのついたトラップ上に、玉付冷却管を取り付けた還流冷却器を取り付けた２リットルの三つ口フラスコに、3,4、3',4'-ビフェニルテトラカルボン酸二無水物１１７．６８ｇ（４００ｍｍｏｌ）、1,3-ビス(3-アミノフェノキシ)ベンゼン８７．７ｇ（３００ｍｍｏｌ）、γ-バレロラクトン４．０ｇ（４０ｍｍｏｌ）、ピリジン４．８ｇ（６０ｍｍｏｌ）、N-メチル-2-ピロリドン(以下ＮＭＰと記す)３００ｇ、トルエン２０ｇを加え、１８０℃で１時間加熱した後室温付近まで冷却した後、3,4、3',4'-ビフェニルテトラカルボン酸二無水物２９．４２ｇ（１００ｍｍｏｌ）、2,2-ビス{4-(4-アミノフェノキシ)フェニル}プロパン８２．１２ｇ（２００ｍｍｏｌ）、ＮＭＰ２００ｇ、トルエン４０ｇを加え、室温で１時間混合後、１８０℃で３時間加熱して、固形分３８％のブロック共重合ポリイミドを得た。このブロック共重合ポリイミドは、下記に示す一般式(１)：一般式(２)＝３：２であり、数平均分子量：７００００、重量平均分子量：１５００００であった。 About Example A8 and Example B8, the resin layer was formed on the following conditions after the antirust process and the silane coupling material application | coating.
(Resin synthesis example)
To a 2-liter three-necked flask equipped with a stainless steel vertical stirring bar, a trap equipped with a nitrogen inlet tube and a stopcock, and a reflux condenser equipped with a ball cooling tube, 3,4, 3 ', 117.68 g (400 mmol) of 4′-biphenyltetracarboxylic dianhydride, 87.7 g (300 mmol) of 1,3-bis (3-aminophenoxy) benzene, 4.0 g (40 mmol) of γ-valerolactone, 4. 8 g (60 mmol), N-methyl-2-pyrrolidone (hereinafter referred to as NMP) 300 g, and toluene 20 g were added, heated at 180 ° C. for 1 hour, cooled to near room temperature, then 3, 4, 3 ′, 4′- Add 29.42 g (100 mmol) of biphenyltetracarboxylic dianhydride, 82.12 g (200 mmol) of 2,2-bis {4- (4-aminophenoxy) phenyl} propane, 200 g of NMP, and 40 g of toluene. After 1 hour mixing at room temperature, and heated for 3 hours at 180 ° C., to obtain a 38% solids polyimide block copolymer. The block copolymerized polyimide had the following general formula (1): general formula (2) = 3: 2, number average molecular weight: 70000, and weight average molecular weight: 150,000.
Figure JPOXMLDOC01-appb-C000004
Figure JPOXMLDOC01-appb-C000004
　合成例で得られたブロック共重合ポリイミド溶液をＮＭＰで更に希釈し、固形分１０％のブロック共重合ポリイミド溶液とした。このブロック共重合ポリイミド溶液にビス(4-マレイミドフェニル)メタン(ＢＭＩ-Ｈ、ケイ・アイ化成)を固形分重量比率３５、ブロック共重合ポリイミドの固形分重量比率６５として（即ち、樹脂溶液に含まれるビス(4-マレイミドフェニル)メタン固形分重量：樹脂溶液に含まれるブロック共重合ポリイミド固形分重量＝３５：６５）６０℃、２０分間溶解混合して樹脂溶液とした。その後、実施例Ａ８、実施例Ｂ８では銅箔の極薄銅表面に、リバースロール塗工機を用いて前記樹脂溶液を塗工し、窒素雰囲気下で、１２０℃で３分間、１６０℃で３分間乾燥処理後、最後に３００℃で２分間加熱処理を行い、樹脂層を備える銅箔を作製した。なお、樹脂層の厚みは２μｍとした。 The block copolymerized polyimide solution obtained in the synthesis example was further diluted with NMP to obtain a block copolymerized polyimide solution having a solid content of 10%. In this block copolymerized polyimide solution, bis (4-maleimidophenyl) methane (BMI-H, Silica Chemical) is contained in a solid content weight ratio of 35 and a solid content weight ratio of block copolymer polyimide of 65 (that is, included in the resin solution). Bis (4-maleimidophenyl) methane solid content weight: block copolymerized polyimide solid content weight contained in resin solution = 35: 65) A resin solution was prepared by dissolving and mixing at 60 ° C. for 20 minutes. Thereafter, in Example A8 and Example B8, the resin solution was applied to the ultrathin copper surface of the copper foil using a reverse roll coating machine, and the resultant was subjected to 3 minutes at 160 ° C. for 3 minutes at 120 ° C. in a nitrogen atmosphere. After a drying treatment for 5 minutes, a heat treatment was finally performed at 300 ° C. for 2 minutes to produce a copper foil provided with a resin layer. The thickness of the resin layer was 2 μm.
（表面処理銅箔及びキャリア付銅箔の各種評価）
　上記のようにして得られた表面処理銅箔及びキャリア付銅箔について、以下の方法で各種の評価を実施した。 (Various evaluations of surface-treated copper foil and copper foil with carrier)
Various evaluation was implemented with the following method about the surface-treated copper foil and the copper foil with a carrier obtained as mentioned above.
＜線粗さＲｚ＞
　各実施例、比較例の表面処理銅箔、キャリア付銅箔について、株式会社小阪研究所製接触粗さ計Ｓｕｒｆｃｏｒｄｅｒ　ＳＥ－３Ｃを使用してＪＩＳ　Ｂ０６０１－１９９４に準拠して十点平均粗さを表面処理面について測定した。測定基準長さ０．８ｍｍ、評価長さ４ｍｍ、カットオフ値０．２５ｍｍ、送り速さ０．１ｍｍ／秒の条件で、圧延銅箔については圧延方向と垂直な方向（ＴＤ）に測定位置を変えて、または、電解銅箔については電解銅箔の製造装置における電解銅箔の進行方向と垂直な方向（ＴＤ）に測定位置を変えて、それぞれ３回行い、３回の測定での値を求めた。 <Line roughness Rz>
About each example and the surface-treated copper foil of the comparative example and the copper foil with carrier, the ten-point average roughness was measured according to JIS B0601-1994 by using a contact roughness meter Surfcoder SE-3C manufactured by Kosaka Laboratory Ltd. Measurements were made on the surface treated surface. On the condition of measurement standard length 0.8mm, evaluation length 4mm, cut-off value 0.25mm, feed rate 0.1mm / sec, the measurement position is in the direction perpendicular to the rolling direction (TD) for rolled copper foil. Change or change the measurement position in the direction (TD) perpendicular to the traveling direction of the electrolytic copper foil in the electrolytic copper foil manufacturing apparatus, and perform the measurement three times for each of the electrolytic copper foil. Asked.
＜面粗さＳｚ＞
　オリンパス社製レーザー顕微鏡（試験機：OLYMPUS LEXT OLS 4000、解像度：XY- 0.12μｍ、Z - 0.0μｍ、カットオフ：無し）を用いて、表面処理銅箔及びキャリア付銅箔の表面処理層側表面の面粗さ（表面の最大高さ）Ｓｚを、ＩＳＯ２５１７８に準拠して測定した。なお、観察部の測定面積を６６５２４μｍ２とした。 <Roughness Sz>
Surface treatment layer side surface of copper foil with surface treatment and copper foil with carrier using Olympus laser microscope (test machine: OLYMPUS LEXT OLS 4000, resolution: XY-0.12μm, Z-0.0μm, cutoff: none) The surface roughness (maximum surface height) Sz was measured in accordance with ISO25178. The measurement area of the observation part was 66524 μm 2 .
＜面積比（Ｂ／Ａ）＞
　各実施例、比較例の表面処理銅箔、キャリア付銅箔について、表面処理層側表面の面積はレーザー顕微鏡による測定法を使用した。各実施例、比較例の表面処理後の銅箔について、オリンパス社製レーザー顕微鏡（試験機：OLYMPUS LEXT OLS 4000、解像度：XY- 0.12μｍ、Z - 0.0μｍ、カットオフ：無し）を用いて、２５６μｍ×２５６μｍ相当面積（平面視したときに得られる表面積）Ａ（実データでは６６，５２４μｍ2）における三次元表面積Ｂを測定して、三次元表面積Ｂ÷二次元表面積Ａ＝面積比（Ｂ／Ａ）とする手法により算出を行った。なお、レーザー顕微鏡による三次元表面積Ｂの測定環境温度は２３～２５℃とした。 <Area ratio (B / A)>
About the surface treatment copper foil of each Example and the comparative example, and the copper foil with a carrier, the measuring method by a laser microscope used the area of the surface treatment layer side surface. About the copper foil after the surface treatment of each example and comparative example, using an Olympus laser microscope (tester: OLYMPUS LEXT OLS 4000, resolution: XY-0.12 μm, Z-0.0 μm, cut-off: none), A three-dimensional surface area B in an area equivalent to 256 μm × 256 μm (surface area obtained when viewed in plan) A (66,524 μm 2 in actual data) is measured, and three-dimensional surface area B ÷ two-dimensional surface area A = area ratio (B / Calculation was performed by the method A). The measurement environment temperature of the three-dimensional surface area B with a laser microscope was 23 to 25 ° C.
　各実施例、比較例の表面処理銅箔、キャリア付銅箔について、２０ｃｍ角サイズの下記の樹脂基材を準備し、樹脂基材と銅箔とを、銅箔の表面処理層を有する面を樹脂基材に接するようにして積層プレスした。積層プレスの温度、圧力、時間は、基材メーカーの推奨条件を用いた。
　使用樹脂：三菱ガス化学社ＧＨＰＬ－８３０ＭＢＴ About the surface-treated copper foil and the copper foil with carrier of each example and comparative example, the following resin base material having a 20 cm square size is prepared, and the surface having the surface treatment layer of the copper foil is prepared with the resin base material and the copper foil. The laminate was pressed so as to contact the resin substrate. The substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press.
Resin used: Mitsubishi Gas Chemical Company, Inc. GHPL-830MBT
　次に、樹脂基材上の表面処理銅箔を下記のエッチング条件にて全面エッチングで除去した。また、樹脂基材上のキャリア付銅箔については、キャリアを剥がした後、極薄銅層を下記のエッチング条件にて全面エッチングで除去した。なお、「全面エッチング」とは、銅箔が厚み分、全て除去されて、全面に樹脂が露出するまでエッチングすることをいう。
　　（エッチング条件）エッチング液：塩化第二銅溶液、ＨＣｌ濃度：３．５mol/Ｌ、温度：５０℃、比重１．２６となるようにＣｕＣｌ2濃度調節 Next, the surface-treated copper foil on the resin substrate was removed by whole surface etching under the following etching conditions. Moreover, about the copper foil with a carrier on a resin base material, after peeling a carrier, the ultra-thin copper layer was removed by the whole surface etching on the following etching conditions. Note that “entire surface etching” means that etching is performed until the copper foil is completely removed by a thickness and the resin is exposed on the entire surface.
(Etching conditions) Etching solution: cupric chloride solution, HCl concentration: 3.5 mol / L, temperature: 50 ° C., CuCl 2 concentration adjusted so as to have a specific gravity of 1.26
　２．薬液を用いた樹脂基材の表面プロファイルの形成
　比較例Ｂ５として、厚さ１００μｍの三菱ガス化学社製の樹脂基材ＧＨＰＬ－８３０ＭＢＴを２枚準備した。この樹脂基材２枚を重ねあわせ、その両側に離型層フィルムを貼り合わせて積層プレスした。積層プレスの温度、圧力、時間は、基材メーカーの推奨条件を用いた。積層プレス終了後、離型層フィルムを樹脂基材から剥離し、以下の浸漬処理の条件でデスミア処理Ａ、Ｂ及び中和処理を行い、樹脂基材の表面プロファイルを形成した。
（デスミア処理条件Ａ）
　・デスミア処理液：４０ｇ／Ｌ　ＫＭｎＯ4、２０ｇ／Ｌ　ＮａＯＨ
　・処理温度：室温
　・浸漬時間：２０分
　・攪拌子回転数：３００ｒｐｍ
（デスミア処理条件Ｂ）
　・デスミア処理液：９０ｇ／Ｌ　ＫＭｎＯ4、５ｇ／Ｌ　ＨＣｌ
　・処理温度：４９℃
　・浸漬時間：２０分
　・攪拌子回転数：３００ｒｐｍ
（中和処理条件）
　・中和処理液：Ｌ－アスコルビン酸　８０ｇ／Ｌ
　・処理温度：室温
　・浸漬時間：３分
　・攪拌なし 2. Formation of Surface Profile of Resin Base Material Using Chemical Solution As Comparative Example B5, two resin base materials GHPL-830MBT having a thickness of 100 μm manufactured by Mitsubishi Gas Chemical Company were prepared. The two resin base materials were overlapped, and a release layer film was bonded to both sides of the two resin base materials, followed by lamination pressing. The substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press. After the lamination press was completed, the release layer film was peeled from the resin substrate, and desmear treatments A and B and neutralization treatment were performed under the following immersion treatment conditions to form a surface profile of the resin substrate.
(Desmear processing condition A)
Desmear treatment liquid: 40 g / L KMnO 4 , 20 g / L NaOH
・ Processing temperature: Room temperature ・ Immersion time: 20 minutes ・ Rotating speed of stirring bar: 300 rpm
(Desmear processing condition B)
Desmear treatment solution: 90 g / L KMnO 4 , 5 g / L HCl
・ Processing temperature: 49 ℃
・ Immersion time: 20 minutes ・ Stirrer rotation speed: 300 rpm
(Neutralization conditions)
・ Neutralization treatment liquid: L-ascorbic acid 80g / L
・ Processing temperature: Room temperature ・ Immersion time: 3 minutes ・ No stirring
　比較例Ｂ６として、厚さ１００μｍの三菱ガス化学社製の樹脂基材ＧＨＰＬ－８３０ＭＢＴを２枚準備した。この樹脂基材２枚を重ねあわせ、その両側に離型層フィルムを貼り合わせて積層プレスした。積層プレスの温度、圧力、時間は、基材メーカーの推奨条件を用いた。積層プレス終了後、離型層フィルムを樹脂基材から剥離し、以下の浸漬処理の条件でデスミア処理Ａ、Ｂ及び中和処理を行い、樹脂基材の表面プロファイルを形成した。
（デスミア処理条件Ａ）
　・デスミア処理液：４０ｇ／Ｌ　ＫＭｎＯ4、２０ｇ／Ｌ　ＮａＯＨ
　・処理温度：室温
　・浸漬時間：２０分
　・攪拌子回転数：３００ｒｐｍ
（デスミア処理条件Ｂ）
　・デスミア処理液：９０ｇ／Ｌ　ＫＭｎＯ4、５ｇ／Ｌ　ＨＣｌ
　・処理温度：４９℃
　・浸漬時間：３０分
　・攪拌子回転数：３００ｒｐｍ
（中和処理条件）
　・中和処理液：Ｌ－アスコルビン酸　８０ｇ／Ｌ
　・処理温度：室温
　・浸漬時間：３分
　・攪拌なし As Comparative Example B6, two sheets of a resin base material GHPL-830MBT made by Mitsubishi Gas Chemical Company with a thickness of 100 μm were prepared. The two resin base materials were overlapped, and a release layer film was bonded to both sides of the two resin base materials, followed by lamination pressing. The substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press. After the lamination press was completed, the release layer film was peeled from the resin substrate, and desmear treatments A and B and neutralization treatment were performed under the following immersion treatment conditions to form a surface profile of the resin substrate.
(Desmear processing condition A)
Desmear treatment liquid: 40 g / L KMnO 4 , 20 g / L NaOH
・ Processing temperature: Room temperature ・ Immersion time: 20 minutes ・ Rotating speed of stirring bar: 300 rpm
(Desmear processing condition B)
Desmear treatment solution: 90 g / L KMnO 4 , 5 g / L HCl
・ Processing temperature: 49 ℃
・ Immersion time: 30 minutes ・ Rotating speed of stirrer: 300 rpm
(Neutralization conditions)
・ Neutralization treatment liquid: L-ascorbic acid 80g / L
・ Processing temperature: Room temperature ・ Immersion time: 3 minutes ・ No stirring
　実施例Ｂ９として、厚さ１００μｍの三菱ガス化学社製の樹脂基材ＧＨＰＬ－８３０ＭＢＴを２枚準備した。この樹脂基材２枚を重ねあわせ、その両側に離型層フィルムを貼り合わせて積層プレスした。積層プレスの温度、圧力、時間は、基材メーカーの推奨条件を用いた。積層プレス終了後、離型層フィルムを樹脂基材から剥離し、以下の処理条件にて樹脂基材表面にシャワー処理Ａ、Ｂ及び中和処理を行うことで、樹脂基材の表面プロファイルを形成した。
　（シャワー処理条件Ａ）
　・デスミア処理液：４０ｇ／Ｌ　ＫＭｎＯ4、２０ｇ／Ｌ　ＮａＯＨ
　・処理温度：室温
　・処理時間：２０分
　・シャワー圧力：０．２ＭＰａ
　（シャワー処理条件Ｂ）
　・デスミア処理液：９０ｇ／Ｌ　ＫＭｎＯ4、５ｇ／Ｌ　ＨＣｌ
　・処理温度：４９℃
　・処理時間：２０分
　・シャワー圧力：０．２ＭＰａ
　（中和処理条件）
　・中和処理液：Ｌ－アスコルビン酸　８０ｇ／Ｌ
　・処理温度：室温
　・浸漬時間：３分
　・攪拌なし
　このようにして、薬液を用いた樹脂基材の表面プロファイルの形成を行った。 As Example B9, two sheets of a resin base material GHPL-830MBT manufactured by Mitsubishi Gas Chemical Company with a thickness of 100 μm were prepared. The two resin base materials were overlapped, and a release layer film was bonded to both sides of the two resin base materials, followed by lamination pressing. The substrate press manufacturer's recommended conditions were used for the temperature, pressure, and time of the lamination press. After the lamination press is completed, the release layer film is peeled from the resin substrate, and the surface profile of the resin substrate is formed by performing shower treatments A and B and neutralization treatment on the resin substrate surface under the following processing conditions. did.
(Shower treatment condition A)
Desmear treatment liquid: 40 g / L KMnO 4 , 20 g / L NaOH
・ Processing temperature: Room temperature ・ Processing time: 20 minutes ・ Shower pressure: 0.2 MPa
(Shower treatment condition B)
Desmear treatment solution: 90 g / L KMnO 4 , 5 g / L HCl
・ Processing temperature: 49 ℃
・ Processing time: 20 minutes ・ Shower pressure: 0.2 MPa
(Neutralization conditions)
・ Neutralization treatment liquid: L-ascorbic acid 80g / L
-Processing temperature: Room temperature-Immersion time: 3 minutes-No stirring In this way, the surface profile of the resin base material was formed using a chemical solution.
（樹脂基材の評価）
　上記で作製した表面プロファイルを有する実施例及び比較例の樹脂基材について、以下の評価を行った。
＜線粗さＲｚ＞
　各実施例、比較例の樹脂基材のエッチング側表面について、株式会社小阪研究所製接触粗さ計Ｓｕｒｆｃｏｒｄｅｒ　ＳＥ－３Ｃを使用してＪＩＳ　Ｂ０６０１－１９９４に準拠して十点平均粗さを測定した。測定基準長さ０．８ｍｍ、評価長さ４ｍｍ、カットオフ値０．２５ｍｍ、送り速さ０．１ｍｍ／秒の条件でそれぞれ３回行い、３回の測定での値を求めた。 (Evaluation of resin base material)
The following evaluation was performed about the resin base material of the Example and comparative example which have the surface profile produced above.
<Line roughness Rz>
Ten-point average roughness was measured in accordance with JIS B0601-1994 using a contact roughness meter Surfcoder SE-3C manufactured by Kosaka Laboratory Co., Ltd. . The measurement was performed three times under the conditions of a measurement reference length of 0.8 mm, an evaluation length of 4 mm, a cut-off value of 0.25 mm, and a feed rate of 0.1 mm / second, and values obtained by three measurements were obtained.
＜面粗さＳｚ＞
　各実施例、比較例の樹脂基材のエッチング側表面について、オリンパス社製レーザー顕微鏡（試験機：OLYMPUS LEXT OLS 4000、解像度：XY - 0.12μｍ、Z - 0.0μｍ、カットオフ：無し）を用いて、面粗さ（表面の最大高さ）Ｓｚを、ＩＳＯ２５１７８に準拠して測定した。なお、観察部の測定面積を６６５２４μｍ２とした。 <Roughness Sz>
Using the Olympus laser microscope (test machine: OLYMPUS LEXT OLS 4000, resolution: XY-0.12 μm, Z-0.0 μm, cut-off: none) for the etching side surface of the resin base material of each example and comparative example The surface roughness (maximum surface height) Sz was measured in accordance with ISO25178. The measurement area of the observation part was 66524 μm 2 .
＜面積比（Ｂ／Ａ）＞
　各実施例、比較例の樹脂基材のエッチング側表面について、オリンパス社製レーザー顕微鏡（試験機：OLYMPUS LEXT OLS 4000、解像度：XY - 0.12μｍ、Z - 0.0μｍ、カットオフ：無し）を用いて、２５６μｍ×２５６μｍ相当面積（平面視したときに得られる表面積）Ａ（実データでは６６，５２４μｍ2）における三次元表面積Ｂを測定して、三次元表面積Ｂ÷二次元表面積Ａ＝面積比（Ｂ／Ａ）とする手法により算出を行った。なお、レーザー顕微鏡による三次元表面積Ｂの測定環境温度は２３～２５℃とした。 <Area ratio (B / A)>
Using the Olympus laser microscope (test machine: OLYMPUS LEXT OLS 4000, resolution: XY-0.12 μm, Z-0.0 μm, cut-off: none) for the etching side surface of the resin base material of each example and comparative example A three-dimensional surface area B in an area equivalent to 256 μm × 256 μm (surface area obtained when viewed in plan) A (66,524 μm 2 in actual data) is measured, and three-dimensional surface area B ÷ two-dimensional surface area A = area ratio (B / A). The measurement environment temperature of the three-dimensional surface area B with a laser microscope was 23 to 25 ° C.
＜黒色面積率＞
　各実施例、比較例の樹脂基材のエッチング側表面について、走査型電子顕微鏡（ＳＥＭ）を用いて加速電圧を１５ｋＶとして、写真撮影を行った。なお、写真撮影の際に、観察視野全体の穴の輪郭が明確に見えるように、コントラストとブライトネスを調整した。写真全体が真っ白や真っ黒ではなく、穴の輪郭が観察できる状態で写真撮影を行った。写真全体が真っ白や真っ黒ではなく、穴の輪郭が観察できる状態で写真撮影を行ったのであれば、当該写真における黒色面積率（％）はほぼ同じ値となる。そして撮影した写真（SEM像（30k倍（３００００倍）））について、Photo Shop 7.0ソフトウェアを使用し、白色・黒色画像処理を施し、黒色面積率（％）を求めた。黒色面積率（％）は、Photo Shop 7.0にある「イメージ」の「ヒストグラム」を選定し、閾値128とした場合の観察面積（白色面積と黒色面積とを合計した面積）に対する黒色面積の割合とした。 <Black area ratio>
About the etching side surface of the resin base material of each Example and a comparative example, the acceleration voltage was set to 15 kV using the scanning electron microscope (SEM), and photography was performed. Note that the contrast and brightness were adjusted so that the outline of the hole in the entire observation field could be clearly seen when taking a picture. The photo was taken while the whole photo was not white or black and the outline of the hole could be observed. If the photo was taken in a state where the entire photo was not white or black and the outline of the hole could be observed, the black area ratio (%) in the photo would be almost the same value. The photograph (SEM image (30k times (30000 times))) was subjected to white / black image processing using Photoshop 7.0 software, and the black area ratio (%) was obtained. The black area ratio (%) is the ratio of the black area to the observation area (the total area of the white area and the black area) when the “image” “histogram” in Photoshop 7.0 is selected and the threshold value is 128. did.
＜穴の直径平均値＞
　各実施例、比較例の樹脂基材のエッチング側表面について、SEM像（ｘ6000～ｘ30000）から線分法により穴の直径を縦、横、斜めで測定し、それらN=3の平均値を算定した。 <Average diameter of holes>
For the etching side surface of the resin base material of each example and comparative example, the hole diameter is measured vertically, horizontally and diagonally from the SEM image (x6000 to x30000) by the line segment method, and the average value of these N = 3 is calculated. did.
＜ピール強度＞
　樹脂基材（全面エッチング基材）のエッチング面に、無電解銅を析出させるための触媒付与、及び、関東化成製のＫＡＰ－８浴を用い、下記条件にて無電解銅メッキを実施した。得られた無電解銅メッキの厚みは０．５μｍであった。
　ＣｕＳＯ4濃度：０．０６mol/Ｌ、ＨＣＨＯ濃度：０．５mol/Ｌ、ＥＤＴＡ濃度：０．１２mol/Ｌ、ｐＨ１２．５、添加剤：２，２’－ジピリジル、添加剤濃度：１０ｍｇ／Ｌ、表面活性剤：ＲＥＧ－１０００、表面活性剤濃度：５００ｍｇ／Ｌ
　次に、無電解銅メッキ上に、さらに下記の電解液を使用して電解メッキを実施した。銅厚み（無電解メッキ及び電解メッキの総厚）は１２μｍとなった。
　単純硫酸銅電解液：Ｃｕ濃度：１００ｇ／Ｌ、Ｈ2ＳＯ4濃度：８０ｇ／Ｌ
　上述のように樹脂基材（全面エッチング基材）に無電解銅メッキ、電解銅メッキを施して銅層厚を１２μｍとしたメッキ銅付き積層板について、幅１０ｍｍの銅回路を湿式エッチングにより作製した。ＪＩＳ－Ｃ－６４８１に準じ、この銅回路を９０度で剥離したときの強度を測定し、ピール強度とした。 <Peel strength>
Electroless copper plating was performed under the following conditions using a catalyst for depositing electroless copper on the etched surface of a resin base material (entire etching base material) and a KAP-8 bath manufactured by Kanto Kasei. The thickness of the obtained electroless copper plating was 0.5 μm.
CuSO 4 concentration: 0.06 mol / L, HCHO concentration: 0.5 mol / L, EDTA concentration: 0.12 mol / L, pH 12.5, additive: 2,2′-dipyridyl, additive concentration: 10 mg / L, Surfactant: REG-1000, Surfactant concentration: 500 mg / L
Next, electrolytic plating was further performed on the electroless copper plating using the following electrolytic solution. The copper thickness (total thickness of electroless plating and electrolytic plating) was 12 μm.
Simple copper sulfate electrolyte: Cu concentration: 100 g / L, H 2 SO 4 concentration: 80 g / L
As described above, a copper circuit having a width of 10 mm was prepared by wet etching on a laminated board with plated copper having electroless copper plating and electrolytic copper plating applied to the resin base material (entire etching base material) to a copper layer thickness of 12 μm. . In accordance with JIS-C-6481, the strength when the copper circuit was peeled at 90 degrees was measured to obtain the peel strength.
＜微細配線形成性＞
　上述のように樹脂基材（全面エッチング基材）に無電解銅メッキ、電解銅メッキを施して銅層厚を１２μｍとしたメッキ銅付き積層板について、メッキ銅をエッチングにより加工し、Ｌ（ライン）／Ｓ（スペース）＝１５μｍ／１５μｍ、及び、１０μｍ／１０μｍの回路を形成した。このとき、樹脂基板上に形成された微細配線を目視で観察し、回路の剥離、回路間のショート（回路間の銅異常析出）、回路の欠けがないものをOK（○）とした。 <Fine wiring formability>
As described above, the plated copper is processed by etching on the laminated board with plated copper, in which the electroless copper plating and the electrolytic copper plating are applied to the resin base material (entire etching base material) and the copper layer thickness is 12 μm. ) / S (space) = 15 μm / 15 μm and 10 μm / 10 μm circuits were formed. At this time, the fine wiring formed on the resin substrate was visually observed, and it was determined as OK (◯) if there was no peeling of the circuit, shorting between the circuits (abnormal copper deposition between the circuits), and chipping of the circuit.
　表１、４に、上述の、銅箔表面プロファイルの基材面への転写によって、実施例Ａ１～Ａ１１、比較例Ａ１～Ａ４、実施例Ｂ１～Ｂ１２、比較例Ｂ１～Ｂ４の基材面プロファイルを得るために使用される銅箔の製造条件を示す。
　表２、５に、上述の、基材面プロファイルの評価結果を示す。
　表３、６に、上述の、基材面プロファイルを与える銅箔表面プロファイルの評価結果を示す。 Tables 1 and 4 show the substrate surface profiles of Examples A1 to A11, Comparative Examples A1 to A4, Examples B1 to B12, and Comparative Examples B1 to B4 by transferring the copper foil surface profile to the substrate surface as described above. The manufacturing conditions of the copper foil used in order to obtain are shown.
Tables 2 and 5 show the evaluation results of the substrate surface profile described above.
Tables 3 and 6 show the evaluation results of the above-described copper foil surface profile that gives the substrate surface profile.
Figure JPOXMLDOC01-appb-T000005
Figure JPOXMLDOC01-appb-T000005
Figure JPOXMLDOC01-appb-T000006
Figure JPOXMLDOC01-appb-T000006
Figure JPOXMLDOC01-appb-T000007
Figure JPOXMLDOC01-appb-T000007
Figure JPOXMLDOC01-appb-T000008
Figure JPOXMLDOC01-appb-T000008
Figure JPOXMLDOC01-appb-T000009
Figure JPOXMLDOC01-appb-T000009
Figure JPOXMLDOC01-appb-T000010
Figure JPOXMLDOC01-appb-T000010
（評価結果）
　実施例Ａ１～Ａ１１は、いずれも良好な微細配線形成性を有し、さらに良好なピール強度を示した。
　比較例Ａ１～Ａ４の銅箔は、いずれも表面処理層表面の面粗さＳｚが２～６μｍの範囲外であったため、基材の表面プロファイルにおいて面粗さＳｚが１～５μｍの範囲外となり、微細配線形成性又はピール強度が不良となった。また、比較例Ａ１～Ａ４の銅箔は、いずれも表面処理層表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８の範囲外であったため、基材の表面プロファイルにおいて当該比Ｂ／Ａが１．０１～１．５の範囲外となり、微細配線形成性又はピール強度が不良となった。また、比較例Ａ１～Ａ４の基材の表面プロファイルは、いずれも表面の黒色面積率が１０～５０％の範囲外であり、且つ、表面の穴の直径平均値が０．０３～１．０μｍの範囲外であったため、微細配線形成性又はピール強度が不良となった。
　なお、実施例及び比較例の評価結果から、銅箔表面及びエッチング後基材表面のＲｚの数値は、良好な微細配線形成性及びピール強度を兼ね備えることに対して、特に関連性が無いことが確認された。 (Evaluation results)
Examples A1 to A11 all had good fine wiring formability and further showed good peel strength.
In all of the copper foils of Comparative Examples A1 to A4, the surface roughness Sz of the surface treatment layer surface was outside the range of 2 to 6 μm, so the surface roughness Sz was outside the range of 1 to 5 μm in the surface profile of the base material. The fine wiring formability or peel strength was poor. In addition, since the copper foils of Comparative Examples A1 to A4 were all out of the range of 1.05 to 1.8, the ratio B / A between the three-dimensional surface area B and the two-dimensional surface area A on the surface treatment layer surface was In the surface profile of the material, the ratio B / A was outside the range of 1.01 to 1.5, and the fine wiring formability or peel strength was poor. Further, the surface profiles of the base materials of Comparative Examples A1 to A4 are all outside the range of the surface black area ratio of 10 to 50%, and the average diameter of the surface holes is 0.03 to 1.0 μm. Thus, the fine wiring formability or peel strength was poor.
In addition, from the evaluation results of the examples and comparative examples, the numerical values of Rz on the copper foil surface and the post-etching substrate surface are not particularly relevant for having good fine wiring formability and peel strength. confirmed.
　実施例Ｂ１～Ｂ１２の基材は、いずれも良好な微細配線形成性を有し、さらに良好なピール強度を示した。
　比較例Ｂ１～Ｂ６の基材は、いずれも表面の面粗さＳｚが１～５μｍの範囲外であったため、微細配線形成性又はピール強度が不良となった。また、比較例Ｂ１～Ｂ４の基材は、いずれも表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５の範囲外であったため、微細配線形成性又はピール強度が不良となった。また、比較例Ｂ１～Ｂ６の基材は、いずれも表面の黒色面積率が１０～５０％、表面の穴の直径平均値が０．０３～１．０μｍの両方或いはいずれかが範囲外であったため、微細配線形成性又はピール強度が不良となった。
　なお、実施例及び比較例の評価結果から、樹脂基材表面のＲｚの数値は、良好な微細配線形成性及びピール強度を兼ね備えることに対して、特に関連性が無いことが確認された。 All of the base materials of Examples B1 to B12 had good fine wiring formability and further showed good peel strength.
The base materials of Comparative Examples B1 to B6 all had a surface roughness Sz outside the range of 1 to 5 μm, so that the fine wiring formability or peel strength was poor. In addition, since the base materials of Comparative Examples B1 to B4 were all out of the range of 1.01 to 1.5, the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A, the fine wiring formability Or the peel strength was poor. In addition, the base materials of Comparative Examples B1 to B6 all had a surface black area ratio of 10 to 50% and a surface hole average diameter value of 0.03 to 1.0 μm, or both were out of range. Therefore, the fine wiring formability or peel strength was poor.
In addition, it was confirmed from the evaluation result of an Example and a comparative example that the numerical value of Rz of the resin base-material surface has no relationship in particular with respect to having favorable fine wiring formation property and peel strength.
　図３（ａ）、（ｂ）、（ｃ）、（ｄ）、（ｅ）に、それぞれ実施例Ａ１、Ａ２、Ａ３、Ａ５、Ａ６の銅箔処理面のSEM像（×３００００）を示す。
　図４（ｆ）、（ｇ）に、それぞれ比較例Ａ１、Ａ２の銅箔処理面のSEM像（×６０００）を示す。
　図５（ｈ）、（ｉ）、（ｊ）、（ｋ）、（ｌ）に、それぞれ実施例Ａ１（Ｂ１）、Ａ２（Ｂ２）、Ａ３（Ｂ３）、Ａ５（Ｂ５）、Ａ６（Ｂ６）の樹脂基材面のSEM像（×３００００）を示す。
　図６（ｍ）、（ｎ）に、それぞれ比較例Ａ１（Ｂ１）、Ａ２（Ｂ２）の樹脂基材面のSEM像（×６０００）を示す。 3 (a), (b), (c), (d), and (e) show SEM images (× 30000) of the copper foil treated surfaces of Examples A1, A2, A3, A5, and A6, respectively.
4 (f) and 4 (g) show SEM images (× 6000) of the copper foil treated surfaces of Comparative Examples A1 and A2, respectively.
5 (h), (i), (j), (k), and (l) are shown in Examples A1 (B1), A2 (B2), A3 (B3), A5 (B5), and A6 (B6), respectively. The SEM image (x30000) of the resin base material surface of is shown.
6 (m) and (n) show SEM images (× 6000) of the resin base material surfaces of Comparative Examples A1 (B1) and A2 (B2), respectively.

Claims (62)

  1. 　銅箔上に表面処理層が形成された表面処理銅箔であり、前記表面処理層表面の面粗さＳｚが２～６μｍである表面処理銅箔。 A surface-treated copper foil having a surface-treated layer formed on a copper foil, and having a surface roughness Sz of 2 to 6 μm on the surface-treated layer surface.
  2. 　銅箔上に表面処理層が形成された表面処理銅箔であり、前記表面処理層表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８である請求項１に記載の表面処理銅箔。 A surface-treated copper foil having a surface-treated layer formed on a copper foil, wherein the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A of the surface-treated layer surface is 1.05 to 1.8. Item 11. The surface-treated copper foil according to Item 1.
  3. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の面粗さＳｚが１～５μｍとなる請求項１又は２に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the surface roughness Sz of the surface of the resin substrate on the copper foil removal side is 1 to 5 μm. Item 3. The surface-treated copper foil according to Item 1 or 2.
  4. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる請求項１～３のいずれか一項に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the three-dimensional surface area B and the two-dimensional surface area A of the copper foil removal side surface of the resin base material The surface-treated copper foil according to any one of claims 1 to 3, wherein the ratio B / A is 1.01 to 1.5.
  5. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる請求項１～４のいずれか一項に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the black area ratio of the surface of the resin substrate on the copper foil removal side is 10 to 50%, The surface-treated copper foil according to any one of claims 1 to 4, wherein a diameter average value of holes on the surface of the resin base material on the copper foil removal side is 0.03 to 1.0 µm.
  6. 　銅箔上に表面処理層が形成された表面処理銅箔であり、前記表面処理層表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０５～１．８である表面処理銅箔。 A surface-treated copper foil in which a surface-treated layer is formed on a copper foil, and the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A of the surface-treated layer surface is 1.05 to 1.8 Treated copper foil.
  7. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の面粗さＳｚが１～５μｍとなる請求項６に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the surface roughness Sz of the surface of the resin substrate on the copper foil removal side is 1 to 5 μm. Item 7. The surface-treated copper foil according to Item 6.
  8. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる請求項６又は７に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the three-dimensional surface area B and the two-dimensional surface area A of the copper foil removal side surface of the resin base material The surface-treated copper foil according to claim 6 or 7, wherein the ratio B / A is 1.01 to 1.5.
  9. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる請求項６～８のいずれか一項に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the black area ratio of the surface of the resin substrate on the copper foil removal side is 10 to 50%, The surface-treated copper foil according to any one of claims 6 to 8, wherein an average diameter value of holes on the surface of the resin base on the copper foil removal side is 0.03 to 1.0 µm.
  10. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の面粗さＳｚが１～５μｍとなる表面処理銅箔。 Surface with surface roughness Sz of 1 to 5 μm when the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed. Treated copper foil.
  11. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる請求項１０に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the three-dimensional surface area B and the two-dimensional surface area A of the copper foil removal side surface of the resin base material The surface-treated copper foil according to claim 10, wherein the ratio B / A is 1.01 to 1.5.
  12. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる請求項１０又は１１に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the black area ratio of the surface of the resin substrate on the copper foil removal side is 10 to 50%, The surface-treated copper foil according to claim 10 or 11, wherein an average diameter value of holes on the surface of the resin base material on the copper foil removal side is 0.03 to 1.0 µm.
  13. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５となる表面処理銅箔。 When the surface-treated copper foil is bonded to the resin base material from the surface-treated layer side and the surface-treated copper foil is removed, the three-dimensional surface area B and the two-dimensional surface area A of the copper foil removal side surface of the resin base material A surface-treated copper foil having a ratio B / A of 1.01 to 1.5.
  14. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる請求項１３に記載の表面処理銅箔。 When the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the black area ratio of the surface of the resin substrate on the copper foil removal side is 10 to 50%, The surface-treated copper foil according to claim 13, wherein an average diameter value of holes on the surface of the resin base material on the copper foil removal side is 0.03 to 1.0 µm.
  15. 　表面処理銅箔を表面処理層側から樹脂基材に貼り合わせ、前記表面処理銅箔を除去したとき、前記樹脂基材の前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記樹脂基材の前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍとなる表面処理銅箔。 When the surface-treated copper foil is bonded to the resin substrate from the surface-treated layer side and the surface-treated copper foil is removed, the black area ratio of the surface of the resin substrate on the copper foil removal side is 10 to 50%, A surface-treated copper foil in which the average diameter of holes on the copper foil removal side surface of the resin base material is 0.03 to 1.0 μm.
  16. 　前記表面処理層が粗化処理層である請求項１～１５のいずれか一項に記載の表面処理銅箔。 The surface-treated copper foil according to any one of claims 1 to 15, wherein the surface-treated layer is a roughened layer.
  17. 　前記粗化処理層が、銅、ニッケル、コバルト、リン、タングステン、ヒ素、モリブデン、クロム及び亜鉛からなる群から選択されたいずれかの単体又はいずれか１種以上を含む合金からなる層である請求項１６に記載の表面処理銅箔。 The roughening treatment layer is a layer made of any single element selected from the group consisting of copper, nickel, cobalt, phosphorus, tungsten, arsenic, molybdenum, chromium, and zinc, or an alloy containing at least one kind. Item 17. The surface-treated copper foil according to Item 16.
  18. 　前記粗化処理層の表面に、耐熱層、防錆層、クロメート処理層及びシランカップリング処理層からなる群から選択された１種以上の層を有する請求項１６又は１７に記載の表面処理銅箔。 The surface-treated copper according to claim 16 or 17, wherein the surface of the roughened layer has one or more layers selected from the group consisting of a heat-resistant layer, a rust-proof layer, a chromate-treated layer, and a silane coupling-treated layer. Foil.
  19. 　前記表面処理層が、粗化処理層、耐熱層、防錆層、クロメート処理層及びシランカップリング処理層からなる群から選択された１種以上の層である請求項１～１５のいずれか一項に記載の表面処理銅箔。 The surface treatment layer is at least one layer selected from the group consisting of a roughening treatment layer, a heat-resistant layer, a rust prevention layer, a chromate treatment layer, and a silane coupling treatment layer. The surface-treated copper foil as described in the item.
  20. 　前記表面処理層上に樹脂層を備える請求項１～１９のいずれか一項に記載の表面処理銅箔。 The surface-treated copper foil according to any one of claims 1 to 19, further comprising a resin layer on the surface-treated layer.
  21. 　キャリア、中間層及び極薄銅層をこの順に備えたキャリア付銅箔であって、前記極薄銅層が請求項１～２０のいずれか一項に記載の表面処理銅箔であるキャリア付銅箔。 A carrier-attached copper foil comprising a carrier, an intermediate layer, and an ultrathin copper layer in this order, wherein the ultrathin copper layer is the surface-treated copper foil according to any one of claims 1 to 20. Foil.
  22. 　前記キャリアの両面に前記極薄銅層を備えた請求項２１に記載のキャリア付銅箔。
    The copper foil with a carrier of Claim 21 provided with the said ultra-thin copper layer on both surfaces of the said carrier.
  23. 　前記キャリアの前記極薄銅層とは反対側に粗化処理層を備えた請求項２１に記載のキャリア付銅箔。 The copper foil with a carrier according to claim 21, further comprising a roughening treatment layer on a side opposite to the ultrathin copper layer of the carrier.
  24. 　請求項１～２０のいずれか一項に記載の表面処理銅箔を表面処理層側から基材に貼り合わせ、前記表面処理銅箔を除去した基材であり、前記銅箔除去側表面の面粗さＳｚが１～５μｍである基材。 A surface of the copper foil removal side surface, wherein the surface treated copper foil according to any one of claims 1 to 20 is bonded to a base material from the surface treatment layer side and the surface treatment copper foil is removed. A substrate having a roughness Sz of 1 to 5 μm.
  25. 　請求項２１～２３のいずれか一項に記載のキャリア付銅箔を極薄銅層側から基材に貼り合わせ、前記キャリアを前記キャリア付銅箔から除去した後に、前記表面処理銅箔である前記極薄銅層を除去した基材であり、前記銅箔除去側表面の面粗さＳｚが１～５μｍである基材。 The surface-treated copper foil after the carrier-attached copper foil according to any one of claims 21 to 23 is bonded to a substrate from the ultrathin copper layer side and the carrier is removed from the carrier-attached copper foil. A base material from which the ultrathin copper layer has been removed, wherein the surface roughness Sz of the surface on the copper foil removal side is 1 to 5 μm.
  26. 　請求項１～２０のいずれか一項に記載の表面処理銅箔を表面処理層側から基材に貼り合わせ、前記表面処理銅箔を除去した基材であり、前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５である基材。 A surface-treated copper foil according to any one of claims 1 to 20 is bonded to a base material from the surface-treated layer side, and the surface-treated copper foil is removed. A base material having a ratio B / A of the original surface area B to the two-dimensional surface area A of 1.01 to 1.5.
  27. 　請求項２１～２３のいずれか一項に記載のキャリア付銅箔を極薄銅層側から基材に貼り合わせ、前記キャリアを前記キャリア付銅箔から除去した後に、前記表面処理銅箔である前記極薄銅層を除去した基材であり、前記銅箔除去側表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５である基材。 The surface-treated copper foil after the carrier-attached copper foil according to any one of claims 21 to 23 is bonded to a substrate from the ultrathin copper layer side and the carrier is removed from the carrier-attached copper foil. A base material from which the ultrathin copper layer has been removed, wherein the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A on the copper foil removal side surface is 1.01 to 1.5.
  28. 　請求項１～２０のいずれか一項に記載の表面処理銅箔を表面処理層側から基材に貼り合わせ、前記表面処理銅箔を除去した基材であり、前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍである基材。 A surface-treated copper foil according to any one of claims 1 to 20 is bonded to a base material from the surface-treated layer side and the surface-treated copper foil is removed, and the surface of the copper foil removed side is black A base material having an area ratio of 10 to 50% and an average diameter of holes on the copper foil removal side surface of 0.03 to 1.0 μm.
  29. 　請求項２１～２３のいずれか一項に記載のキャリア付銅箔を極薄銅層側から基材に貼り合わせ、前記キャリアを前記キャリア付銅箔から除去した後に、前記表面処理銅箔である前記極薄銅層を除去した基材であり、前記銅箔除去側表面の黒色面積率が１０～５０％であり、且つ、前記銅箔除去側表面の穴の直径平均値が０．０３～１．０μｍである基材。 The surface-treated copper foil after the carrier-attached copper foil according to any one of claims 21 to 23 is bonded to a substrate from the ultrathin copper layer side and the carrier is removed from the carrier-attached copper foil. The base material from which the ultrathin copper layer has been removed, the black area ratio on the copper foil removal side surface is 10 to 50%, and the average diameter of the holes on the copper foil removal side surface is 0.03 to A substrate that is 1.0 μm.
  30. 　請求項１～２０のいずれか一項に記載の表面処理銅箔、又は、請求項２１～２３のいずれか一項に記載のキャリア付銅箔を用いて製造した銅張積層板。 A copper-clad laminate produced using the surface-treated copper foil according to any one of claims 1 to 20 or the copper foil with a carrier according to any one of claims 21 to 23.
  31. 　請求項１～２０のいずれか一項に記載の表面処理銅箔、又は、請求項２１～２３のいずれか一項に記載のキャリア付銅箔を用いて製造したプリント配線板。 A printed wiring board produced using the surface-treated copper foil according to any one of claims 1 to 20 or the copper foil with a carrier according to any one of claims 21 to 23.
  32. 　請求項３１に記載のプリント配線板を用いた電子機器。 An electronic device using the printed wiring board according to claim 31.
  33. 　請求項１～２０のいずれか一項に記載の表面処理銅箔と絶縁基板とを準備する工程、
    　前記表面処理銅箔を、表面処理層側から絶縁基板に積層する工程、
    　前記絶縁基板上の表面処理銅箔を除去する工程、
    　前記表面処理銅箔を除去した絶縁基板の表面に回路を形成する工程
    を含むプリント配線板の製造方法。     Preparing a surface-treated copper foil and an insulating substrate according to any one of claims 1 to 20,
    Laminating the surface-treated copper foil on the insulating substrate from the surface-treated layer side,
    Removing the surface-treated copper foil on the insulating substrate;
    A printed wiring board manufacturing method including a step of forming a circuit on a surface of an insulating substrate from which the surface-treated copper foil is removed.
  34. 　請求項２１～２３のいずれか一項に記載のキャリア付銅箔と絶縁基板とを準備する工程、
    　前記キャリア付銅箔を極薄銅層側から絶縁基板に積層する工程、
    　前記キャリア付銅箔と絶縁基板とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、
    　前記キャリアを剥がした後の絶縁基板上の極薄銅層を除去する工程、
    　前記極薄銅層を除去した絶縁基板の表面に回路を形成する工程
    を含むプリント配線板の製造方法。     Preparing a carrier-attached copper foil and an insulating substrate according to any one of claims 21 to 23;
    Laminating the copper foil with carrier on the insulating substrate from the ultrathin copper layer side,
    After laminating the copper foil with carrier and the insulating substrate, the step of peeling the carrier of the copper foil with carrier,
    Removing the ultrathin copper layer on the insulating substrate after peeling off the carrier;
    A printed wiring board manufacturing method including a step of forming a circuit on a surface of an insulating substrate from which the ultrathin copper layer is removed.
  35. 　請求項１～２０のいずれか一項に記載の表面処理銅箔と絶縁基板とを準備する工程、
    　前記表面処理銅箔を、表面処理層側から絶縁基板に積層して銅張積層板を形成し、
    その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含むプリント配線板の製造方法。     Preparing a surface-treated copper foil and an insulating substrate according to any one of claims 1 to 20,
    The surface-treated copper foil is laminated on an insulating substrate from the surface-treated layer side to form a copper-clad laminate,
    Then, the manufacturing method of a printed wiring board including the process of forming a circuit by any method of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
  36. 　請求項２１～２３のいずれか一項に記載のキャリア付銅箔と絶縁基板とを準備する工程、
    　前記キャリア付銅箔を極薄銅層側から絶縁基板に積層する工程、
    　前記キャリア付銅箔と絶縁基板とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程を経て銅張積層板を形成し、
    その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含むプリント配線板の製造方法。     Preparing a carrier-attached copper foil and an insulating substrate according to any one of claims 21 to 23;
    Laminating the copper foil with carrier on the insulating substrate from the ultrathin copper layer side,
    After laminating the carrier-attached copper foil and the insulating substrate, a copper-clad laminate is formed through a step of peeling the carrier of the carrier-attached copper foil,
    Then, the manufacturing method of a printed wiring board including the process of forming a circuit by any method of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
  37. 　表面処理層が形成された側の表面に回路が形成された請求項１～２０のいずれか一項に記載の表面処理銅箔、又は、極薄銅層側表面に回路が形成された請求項２１～２３のいずれか一項に記載のキャリア付銅箔を準備する工程、
    　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
    　前記樹脂層の表面に回路を形成する工程、及び、
    　前記表面処理銅箔又は前記キャリア付銅箔を除去することで、前記樹脂層に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     The surface-treated copper foil according to any one of claims 1 to 20, wherein a circuit is formed on the surface on the side where the surface treatment layer is formed, or a circuit is formed on the surface of the ultrathin copper layer side. Preparing a copper foil with a carrier according to any one of 21 to 23,
    Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
    Forming a circuit on the surface of the resin layer; and
    A method for producing a printed wiring board, comprising: removing the surface-treated copper foil or the carrier-attached copper foil to expose a circuit buried in the resin layer.
  38. 　表面に回路が形成された金属箔、又は、表面処理層が形成された側の表面に回路が形成された請求項１～２０のいずれか一項に記載の表面処理銅箔である第１の表面処理銅箔、又は、極薄金属層側表面に回路が形成されたキャリア付金属箔、又は、極薄銅層側表面に回路が形成された請求項２１～２３のいずれか一項に記載のキャリア付銅箔である第１のキャリア付銅箔を準備する工程、
    　前記回路が埋没するように前記金属箔表面又は前記表面処理銅箔表面又は前記キャリア付金属箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
    　請求項１～２０のいずれか一項に記載の表面処理銅箔である第２の表面処理銅箔を表面処理層側から前記樹脂層に積層する工程、又は、請求項２１～２３のいずれか一項に記載のキャリア付銅箔である第２のキャリア付銅箔を極薄銅層側から前記樹脂層に積層する工程、
    　前記樹脂層に積層した箔が前記第２のキャリア付銅箔である場合は、前記第２のキャリア付銅箔のキャリアを剥がす工程、
    　前記樹脂層上の表面処理銅箔、又は、前記第２のキャリア付銅箔のキャリアが剥がされて残った極薄銅層を除去する工程、
    　前記表面処理銅箔を除去した樹脂層の表面、又は、極薄銅層を除去した樹脂層の表面に回路を形成する工程、及び、
    　前記樹脂層上に回路を形成した後に、前記金属箔を除去することで、又は、前記第１の表面処理銅箔を除去することで、又は、前記キャリア付金属箔のキャリアを剥離させた後に極薄金属層を除去することで、又は、前記第１のキャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     21. The surface-treated copper foil according to claim 1, wherein a circuit is formed on the surface of the metal foil having a circuit formed on the surface or the surface on which the surface treatment layer is formed. The surface-treated copper foil, the metal foil with a carrier in which a circuit is formed on the surface of the ultrathin metal layer side, or the circuit is formed on a surface of the ultrathin copper layer side. Preparing a first copper foil with carrier, which is a copper foil with carrier,
    Forming a resin layer on the surface of the metal foil or the surface-treated copper foil or the surface of the metal foil with carrier or the surface of the copper foil with carrier so that the circuit is buried;
    The step of laminating the second surface-treated copper foil, which is the surface-treated copper foil according to any one of claims 1 to 20, on the resin layer from the surface-treated layer side, or any one of claims 21 to 23 A step of laminating the second copper foil with carrier, which is the copper foil with carrier according to one item, from the ultrathin copper layer side to the resin layer;
    When the foil laminated on the resin layer is the second copper foil with carrier, the step of peeling the carrier of the second carrier copper foil,
    Removing the ultrathin copper layer remaining after the surface-treated copper foil on the resin layer or the carrier of the copper foil with the second carrier is peeled off,
    Forming a circuit on the surface of the resin layer from which the surface-treated copper foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and
    After forming a circuit on the resin layer, by removing the metal foil, or by removing the first surface-treated copper foil, or after peeling the carrier of the metal foil with carrier The process of exposing the circuit embedded in the resin layer by removing the ultra-thin copper layer after removing the ultra-thin metal layer or by removing the carrier of the copper foil with the first carrier A method of manufacturing a printed wiring board including:
  39. 　表面処理層が形成された側の表面に回路が形成された請求項１～２０のいずれか一項に記載の表面処理銅箔、又は、極薄銅層側表面に回路が形成された請求項２１～２３のいずれか一項に記載のキャリア付銅箔を準備する工程、
    　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
    　金属箔を前記樹脂層に積層する工程、又は、キャリア付金属箔を極薄金属層側から前記樹脂層に積層する工程、
    　前記樹脂層に積層した箔が前記キャリア付金属箔である場合は、前記キャリア付金属箔のキャリアを剥がす工程、
    　前記樹脂層上の金属箔、又は、前記キャリア付金属箔のキャリアが剥がされて残った極薄金属層を除去する工程、
    　前記金属箔を除去した樹脂層の表面、又は、極薄銅層を除去した樹脂層の表面に回路を形成する工程、及び、
    　前記樹脂層上に回路を形成した後に、前記表面処理銅箔を除去することで、又は、前記キャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     The surface-treated copper foil according to any one of claims 1 to 20, wherein a circuit is formed on the surface on the side where the surface treatment layer is formed, or a circuit is formed on the surface of the ultrathin copper layer side. Preparing a copper foil with a carrier according to any one of 21 to 23,
    Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
    A step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin metal layer side,
    When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier,
    Removing the ultrathin metal layer remaining after the metal foil on the resin layer or the carrier of the metal foil with carrier is peeled off,
    Forming a circuit on the surface of the resin layer from which the metal foil has been removed, or on the surface of the resin layer from which the ultrathin copper layer has been removed; and
    After forming a circuit on the resin layer, by removing the surface-treated copper foil, or by removing the ultrathin copper layer after peeling the carrier of the copper foil with carrier, the resin layer A method of manufacturing a printed wiring board, including a step of exposing a buried circuit.
  40. 　表面に回路が形成された金属箔、又は、表面処理層が形成された側の表面に回路が形成された請求項１～２０のいずれか一項に記載の表面処理銅箔である第１の表面処理銅箔、又は、極薄金属層側表面に回路が形成されたキャリア付金属箔、又は、極薄銅層側表面に回路が形成された請求項２１～２３のいずれか一項に記載のキャリア付銅箔である第１のキャリア付銅箔を準備する工程、
    　前記回路が埋没するように前記金属箔表面又は前記表面処理銅箔表面又は前記キャリア付金属箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
    　請求項１～２０のいずれか一項に記載の表面処理銅箔である第２の表面処理銅箔を表面処理層側から前記樹脂層に積層する工程、又は、請求項２１～２３のいずれか一項に記載のキャリア付銅箔である第２のキャリア付銅箔を極薄銅層側から前記樹脂層に積層する工程、
    　前記樹脂層に積層した箔が前記第２のキャリア付銅箔である場合は、前記第２のキャリア付銅箔のキャリアを剥がす工程、
    　前記樹脂層上の表面処理銅箔、又は、前記第２のキャリア付銅箔のキャリアが剥がされて残った極薄銅層を用いてセミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、
    　前記樹脂層上に回路を形成した後に、前記金属箔を除去することで、又は、前記第１の表面処理銅箔を除去することで、又は、前記キャリア付金属箔のキャリアを剥離させた後に極薄金属層を除去することで、又は、前記第１のキャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     21. The surface-treated copper foil according to claim 1, wherein a circuit is formed on the surface of the metal foil having a circuit formed on the surface or the surface on which the surface treatment layer is formed. The surface-treated copper foil, the metal foil with a carrier in which a circuit is formed on the surface of the ultrathin metal layer side, or the circuit is formed on a surface of the ultrathin copper layer side. Preparing a first copper foil with carrier, which is a copper foil with carrier,
    Forming a resin layer on the surface of the metal foil or the surface-treated copper foil or the surface of the metal foil with carrier or the surface of the copper foil with carrier so that the circuit is buried;
    The step of laminating the second surface-treated copper foil, which is the surface-treated copper foil according to any one of claims 1 to 20, on the resin layer from the surface-treated layer side, or any one of claims 21 to 23 A step of laminating the second copper foil with carrier, which is the copper foil with carrier according to one item, from the ultrathin copper layer side to the resin layer;
    When the foil laminated on the resin layer is the second copper foil with carrier, the step of peeling the carrier of the second carrier copper foil,
    A semi-additive method, a subtractive method, a partly additive method or a modified semi-additive method using the surface-treated copper foil on the resin layer or the ultrathin copper layer remaining after the carrier of the copper foil with the second carrier is peeled off. Forming a circuit on the resin layer by any one of the methods,
    After forming a circuit on the resin layer, by removing the metal foil, or by removing the first surface-treated copper foil, or after peeling the carrier of the metal foil with carrier The process of exposing the circuit embedded in the resin layer by removing the ultra-thin copper layer after removing the ultra-thin metal layer or by removing the carrier of the copper foil with the first carrier A method of manufacturing a printed wiring board including:
  41. 　表面処理層が形成された側の表面に回路が形成された請求項１～２０のいずれか一項に記載の表面処理銅箔、又は、極薄銅層側表面に回路が形成された請求項２１～２３のいずれか一項に記載のキャリア付銅箔を準備する工程、
    　前記回路が埋没するように前記表面処理銅箔表面又は前記キャリア付銅箔表面に樹脂層を形成する工程、
    　金属箔を前記樹脂層に積層する工程、又は、キャリア付金属箔を極薄金属層側から前記樹脂層に積層する工程、
    　前記樹脂層に積層した箔が前記キャリア付金属箔である場合は、前記キャリア付金属箔のキャリアを剥がす工程、
    　前記樹脂層上の金属箔、又は、前記キャリア付金属箔のキャリアが剥がされて残った極薄金属層を用いてセミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、
    　前記樹脂層上に回路を形成した後に、前記表面処理銅箔を除去することで、又は、前記キャリア付銅箔のキャリアを剥離させた後に極薄銅層を除去することで、前記樹脂層に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     The surface-treated copper foil according to any one of claims 1 to 20, wherein a circuit is formed on the surface on the side where the surface treatment layer is formed, or a circuit is formed on the surface of the ultrathin copper layer side. Preparing a copper foil with a carrier according to any one of 21 to 23,
    Forming a resin layer on the surface-treated copper foil surface or the carrier-attached copper foil surface so that the circuit is buried;
    A step of laminating a metal foil on the resin layer, or a step of laminating a metal foil with a carrier on the resin layer from the ultrathin metal layer side,
    When the foil laminated on the resin layer is the metal foil with carrier, the step of peeling the carrier of the metal foil with carrier,
    Either a semi-additive method, a subtractive method, a partial additive method or a modified semi-additive method using a metal foil on the resin layer or an ultra-thin metal layer remaining after the carrier of the metal foil with carrier is peeled off Forming a circuit on the resin layer by a method,
    After forming a circuit on the resin layer, by removing the surface-treated copper foil, or by removing the ultrathin copper layer after peeling the carrier of the copper foil with carrier, the resin layer A method of manufacturing a printed wiring board, including a step of exposing a buried circuit.
  42. 　表面の面粗さＳｚが１～５μｍである樹脂基材。 A resin substrate having a surface roughness Sz of 1 to 5 μm.
  43. 　表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５である請求項４２に記載の樹脂基材。 The resin base material according to claim 42, wherein the ratio B / A of the three-dimensional surface area B to the two-dimensional surface area A is 1.01 to 1.5.
  44. 　表面の黒色面積率が１０～５０％であり、且つ、表面の穴の直径平均値が０．０３～１．０μｍである請求項４２又は４３に記載の樹脂基材。 44. The resin base material according to claim 42 or 43, wherein the black area ratio of the surface is 10 to 50% and the average diameter of the surface holes is 0.03 to 1.0 μm.
  45. 　表面の三次元表面積Ｂと二次元表面積Ａとの比Ｂ／Ａが１．０１～１．５である樹脂基材。 A resin base material having a ratio B / A of the surface three-dimensional surface area B to the two-dimensional surface area A of 1.01 to 1.5.
  46. 　表面の黒色面積率が１０～５０％であり、且つ、表面の穴の直径平均値が０．０３～１．０μｍである樹脂基材。 A resin base material having a black area ratio of 10 to 50% on the surface and an average diameter of holes on the surface of 0.03 to 1.0 μm.
  47. 　表面の黒色面積率が１０～５０％であり、且つ、表面の穴の直径平均値が０．０３～１．０μｍである請求項４５に記載の樹脂基材。 46. The resin base material according to claim 45, wherein the surface black area ratio is 10 to 50%, and the average diameter of the surface holes is 0.03 to 1.0 μm.
  48. 　セミアディティブ工法用である請求項４２～４７のいずれか一項に記載の樹脂基材。 The resin base material according to any one of claims 42 to 47, which is for a semi-additive construction method.
  49. 　請求項４２～４８のいずれか一項に記載の樹脂基材を用いて製造したプリント配線板。 A printed wiring board manufactured using the resin base material according to any one of claims 42 to 48.
  50. 　請求項４２～４８のいずれか一項に記載の樹脂基材を用いて製造した銅張積層板。 A copper-clad laminate produced using the resin base material according to any one of claims 42 to 48.
  51. 　表面処理銅箔と樹脂基材とを準備する工程、
    　前記表面処理銅箔を、表面処理層側から樹脂基材に積層する工程、
    　前記樹脂基材上の表面処理銅箔を除去して請求項４２～４８のいずれか一項に記載の樹脂基材を得る工程、
    　前記表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程
    を含むプリント配線板の製造方法。     Preparing a surface-treated copper foil and a resin base material,
    Laminating the surface-treated copper foil on the resin substrate from the surface-treated layer side,
    Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate according to any one of claims 42 to 48;
    The manufacturing method of a printed wiring board including the process of forming a circuit in the surface of the resin base material which removed the said surface treatment copper foil.
  52. 　キャリア、中間層、極薄銅層がこの順で積層されて構成されたキャリア付銅箔と、樹脂基材とを準備する工程、
    　前記キャリア付銅箔を極薄銅層側から樹脂基材に積層する工程、
    　前記キャリア付銅箔と樹脂基材とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程、
    　前記キャリアを剥がした後の樹脂基材上の極薄銅層を除去して請求項４２～４８のいずれか一項に記載の樹脂基材を得る工程、
    　前記極薄銅層を除去した樹脂基材の表面に回路を形成する工程
    を含むプリント配線板の製造方法。     A step of preparing a carrier-added copper foil with a carrier, an intermediate layer, and an ultrathin copper layer laminated in this order, and a resin base material;
    Laminating the copper foil with carrier on the resin substrate from the ultrathin copper layer side,
    After laminating the copper foil with carrier and the resin base material, the step of peeling the carrier of the copper foil with carrier,
    A step of removing the ultrathin copper layer on the resin base material after peeling off the carrier to obtain the resin base material according to any one of claims 42 to 48,
    A method for producing a printed wiring board, comprising a step of forming a circuit on the surface of a resin base material from which the ultrathin copper layer has been removed.
  53. 　表面処理銅箔を、表面処理層側から請求項４２～４７のいずれか一項に記載の樹脂基材に積層して銅張積層板を形成し、その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含むプリント配線板の製造方法。 A surface-treated copper foil is laminated on the resin base material according to any one of claims 42 to 47 from the surface-treated layer side to form a copper-clad laminate, and then a semi-additive method, a subtractive method, a partly method A printed wiring board manufacturing method including a step of forming a circuit by any one of an additive method and a modified semi-additive method.
  54. 　キャリア、中間層、極薄銅層がこの順で積層されて構成されたキャリア付銅箔を極薄銅層側から請求項４２～４７のいずれか一項に記載の樹脂基材に積層する工程、
    　前記キャリア付銅箔と樹脂基材とを積層した後に、前記キャリア付銅箔のキャリアを剥がす工程を経て銅張積層板を形成し、
    その後、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって、回路を形成する工程を含むプリント配線板の製造方法。     The step of laminating the carrier-attached copper foil comprising the carrier, the intermediate layer, and the ultrathin copper layer laminated in this order on the resin base material according to any one of claims 42 to 47. ,
    After laminating the carrier-attached copper foil and the resin base material, a copper-clad laminate is formed through a step of peeling the carrier of the carrier-attached copper foil,
    Then, the manufacturing method of a printed wiring board including the process of forming a circuit by any method of a semi-additive method, a subtractive method, a partly additive method, or a modified semi-additive method.
  55. 　表面に回路が形成された金属箔を準備する工程、
    　前記回路が埋没するように前記金属箔表面に樹脂基材を形成する工程、
    　表面処理銅箔を、表面処理層側から前記樹脂基材に積層する工程、
    　前記樹脂基材上の表面処理銅箔を除去して請求項４２～４８のいずれか一項に記載の樹脂基材を得る工程、
    　前記表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程、及び、
    　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     Preparing a metal foil having a circuit formed on the surface;
    Forming a resin base material on the surface of the metal foil so that the circuit is buried;
    Laminating a surface-treated copper foil on the resin substrate from the surface-treated layer side,
    Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate according to any one of claims 42 to 48;
    Forming a circuit on the surface of the resin base material from which the surface-treated copper foil has been removed; and
    A method for producing a printed wiring board, comprising: removing the metal foil to expose a circuit formed on the surface of the metal foil and buried in the resin base material.
  56. 　キャリア、中間層、極薄銅層がこの順で積層されて構成された第１のキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
    　前記回路が埋没するように前記第１のキャリア付銅箔の前記極薄銅層側表面に樹脂基材を形成する工程、
    　キャリア、中間層、極薄銅層がこの順で積層されて構成された第２のキャリア付銅箔を準備し、前記第２のキャリア付銅箔の極薄銅層側から前記樹脂基材に積層する工程、
    　前記第２のキャリア付銅箔を前記樹脂基材に積層した後に、前記第２のキャリア付銅箔のキャリアを剥がす工程、
    　前記第２のキャリア付銅箔のキャリアを剥がした後の樹脂基材上の極薄銅層を除去して請求項４２～４８のいずれか一項に記載の樹脂基材を得る工程、
    　前記極薄銅層を除去した樹脂基材の表面に回路を形成する工程、
    　前記樹脂基材上に回路を形成した後に、前記第１のキャリア付銅箔のキャリアを剥離させる工程、及び、
    　前記第１のキャリア付銅箔のキャリアを剥離させた後に、前記第１のキャリア付銅箔の極薄銅層を除去することで、前記第１のキャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     Forming a circuit on the ultrathin copper layer side surface of the first carrier-attached copper foil in which the carrier, the intermediate layer, and the ultrathin copper layer are laminated in this order;
    Forming a resin base material on the ultrathin copper layer side surface of the first carrier-attached copper foil so that the circuit is buried;
    Prepare a second carrier-attached copper foil in which a carrier, an intermediate layer, and an ultrathin copper layer are laminated in this order. From the ultrathin copper layer side of the second carrier-attached copper foil to the resin base material Laminating process,
    A step of peeling the carrier of the second carrier-attached copper foil after laminating the second carrier-attached copper foil on the resin substrate;
    The step of obtaining the resin base material according to any one of claims 42 to 48 by removing the ultrathin copper layer on the resin base material after peeling the carrier of the second copper foil with carrier,
    Forming a circuit on the surface of the resin substrate from which the ultrathin copper layer has been removed,
    After forming the circuit on the resin base material, the step of peeling the carrier of the first copper foil with carrier, and
    After peeling the carrier of the first copper foil with carrier, the ultra thin copper layer side surface of the first copper foil with carrier is removed by removing the ultra thin copper layer of the first copper foil with carrier. A method for producing a printed wiring board, comprising the step of exposing a circuit embedded in the resin base material, which is formed on the substrate.
  57. 　表面に回路が形成された金属箔を準備する工程、
    　前記回路が埋没するように前記金属箔表面に請求項４２～４７のいずれか一項に記載の樹脂基材を形成する工程、
    　表面処理銅箔を、表面処理層側から前記樹脂基材に積層し、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂層上に回路を形成する工程、及び、
    　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     Preparing a metal foil having a circuit formed on the surface;
    Forming the resin base material according to any one of claims 42 to 47 on the surface of the metal foil so that the circuit is buried;
    A surface-treated copper foil is laminated on the resin base material from the surface-treated layer side, and a circuit is formed on the resin layer by any one of a semi-additive method, a subtractive method, a partial additive method, or a modified semi-additive method. Process and
    A method for producing a printed wiring board, comprising: removing the metal foil to expose a circuit formed on the surface of the metal foil and buried in the resin base material.
  58. 　キャリア、中間層、極薄銅層がこの順で積層されて構成された第１のキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
    　前記回路が埋没するように前記第１のキャリア付銅箔の前記極薄銅層側表面に請求項４２～４７のいずれか一項に記載の樹脂基材を形成する工程、
    　キャリア、中間層、極薄銅層がこの順で積層されて構成された第２のキャリア付銅箔を準備し、前記第２のキャリア付銅箔の極薄銅層側から前記樹脂基材に積層して前記第２のキャリア付銅箔のキャリアを剥がし、セミアディティブ法、サブトラクティブ法、パートリーアディティブ法又はモディファイドセミアディティブ法のいずれかの方法によって前記樹脂基材上に回路を形成する工程、
    　前記樹脂基材上に回路を形成した後に、前記第１のキャリア付銅箔のキャリアを剥離させる工程、及び、
    　前記第１のキャリア付銅箔のキャリアを剥離させた後に、前記第１のキャリア付銅箔の極薄銅層を除去することで、前記第１のキャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     Forming a circuit on the ultrathin copper layer side surface of the first carrier-attached copper foil in which the carrier, the intermediate layer, and the ultrathin copper layer are laminated in this order;
    The step of forming the resin base material according to any one of claims 42 to 47 on the ultrathin copper layer side surface of the first carrier-attached copper foil so that the circuit is buried,
    Prepare a second carrier-attached copper foil in which a carrier, an intermediate layer, and an ultrathin copper layer are laminated in this order. Laminating and peeling the carrier of the copper foil with the second carrier, and forming a circuit on the resin substrate by any one of a semi-additive method, a subtractive method, a partial additive method, or a modified semi-additive method,
    After forming the circuit on the resin base material, the step of peeling the carrier of the first copper foil with carrier, and
    After peeling the carrier of the first copper foil with carrier, the ultra thin copper layer side surface of the first copper foil with carrier is removed by removing the ultra thin copper layer of the first copper foil with carrier. A method for producing a printed wiring board, comprising the step of exposing a circuit embedded in the resin base material, which is formed on the substrate.
  59. 　表面に回路が形成された金属箔を準備する工程、
    　前記回路が埋没するように前記金属箔表面に樹脂基材を形成する工程、
    　キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔を極薄銅層側表面から前記樹脂基材に積層する工程、
    　前記キャリア付銅箔のキャリアを剥離させた後に、前記樹脂基材上の極薄銅層を除去して請求項４２～４８のいずれか一項に記載の樹脂基材を得る工程、
    　前記極薄銅層を除去した樹脂基材の表面に回路を形成する工程、及び、
    　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     Preparing a metal foil having a circuit formed on the surface;
    Forming a resin base material on the surface of the metal foil so that the circuit is buried;
    Laminating a carrier, an intermediate layer, a copper foil with a carrier provided with an ultrathin copper layer in this order from the ultrathin copper layer side surface to the resin base material,
    The step of obtaining the resin base material according to any one of claims 42 to 48 by removing the ultrathin copper layer on the resin base material after peeling the carrier of the copper foil with carrier,
    Forming a circuit on the surface of the resin substrate from which the ultrathin copper layer has been removed, and
    A method for producing a printed wiring board, comprising: removing the metal foil to expose a circuit formed on the surface of the metal foil and buried in the resin base material.
  60. 　キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
    　前記回路が埋没するように前記キャリア付銅箔の前記極薄銅層側表面に樹脂基材を形成する工程、
    　表面処理銅箔を、表面処理層側から前記樹脂基材に積層する工程、
    　前記樹脂基材上の表面処理銅箔を除去して請求項４２～４８のいずれか一項に記載の樹脂基材を得る工程、
    　前記表面処理銅箔を除去した樹脂基材の表面に回路を形成する工程、
    　前記樹脂基材上に回路を形成した後に、前記キャリア付銅箔のキャリアを剥離させる工程、及び、
    　前記キャリア付銅箔のキャリアを剥離させた後に、前記キャリア付銅箔の極薄銅層を除去することで、前記キャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     Forming a circuit on the ultrathin copper layer side surface of the carrier-added copper foil provided with the carrier, the intermediate layer, and the ultrathin copper layer in this order;
    Forming a resin base material on the ultrathin copper layer side surface of the copper foil with carrier so that the circuit is buried;
    Laminating a surface-treated copper foil on the resin substrate from the surface-treated layer side,
    Removing the surface-treated copper foil on the resin substrate to obtain the resin substrate according to any one of claims 42 to 48;
    Forming a circuit on the surface of the resin base material from which the surface-treated copper foil has been removed,
    After forming the circuit on the resin substrate, the step of peeling the carrier of the copper foil with carrier, and
    After peeling the carrier of the copper foil with carrier, by removing the ultra thin copper layer of the copper foil with carrier, the resin base material formed on the ultra thin copper layer side surface of the copper foil with carrier A method of manufacturing a printed wiring board, including a step of exposing a buried circuit.
  61. 　表面に回路が形成された金属箔を準備する工程、
    　前記回路が埋没するように前記金属箔表面に請求項４２～４８のいずれか一項に記載の樹脂基材を形成する工程、
    　前記樹脂基材上に回路を形成する工程、及び、
    　前記金属箔を除去することで、前記金属箔表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     Preparing a metal foil having a circuit formed on the surface;
    A step of forming the resin base material according to any one of claims 42 to 48 on the surface of the metal foil so that the circuit is buried;
    Forming a circuit on the resin substrate; and
    A method for producing a printed wiring board, comprising: removing the metal foil to expose a circuit formed on the surface of the metal foil and buried in the resin base material.
  62. 　キャリア、中間層、極薄銅層をこの順で備えたキャリア付銅箔の極薄銅層側表面に回路を形成する工程、
    　前記回路が埋没するように前記キャリア付銅箔の前記極薄銅層側表面に請求項４２～４８のいずれか一項に記載の樹脂基材を形成する工程、
    　前記樹脂基材上に回路を形成する工程、
    　前記樹脂基材上に回路を形成した後に、前記キャリア付銅箔のキャリアを剥離させる工程、及び、
    　前記キャリア付銅箔のキャリアを剥離させた後に、前記キャリア付銅箔の極薄銅層を除去することで、前記キャリア付銅箔の極薄銅層側表面に形成した、前記樹脂基材に埋没している回路を露出させる工程
    を含むプリント配線板の製造方法。     Forming a circuit on the ultrathin copper layer side surface of the carrier-added copper foil provided with the carrier, the intermediate layer, and the ultrathin copper layer in this order;
    A step of forming the resin base material according to any one of claims 42 to 48 on the ultrathin copper layer side surface of the copper foil with carrier so that the circuit is buried,
    Forming a circuit on the resin substrate;
    After forming the circuit on the resin substrate, the step of peeling the carrier of the copper foil with carrier, and
    After peeling the carrier of the copper foil with carrier, by removing the ultra thin copper layer of the copper foil with carrier, the resin base material formed on the ultra thin copper layer side surface of the copper foil with carrier A method of manufacturing a printed wiring board, including a step of exposing a buried circuit.
PCT/JP2014/069489 2013-07-23 2014-07-23 Treated surface copper foil, copper foil with carrier, substrate, resin substrate, printed circuit board, copper clad laminate, and printed circuit board manufacturing method WO2015012327A1 (en)

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KR1020167004433A KR101851882B1 (en) 2013-07-23 2014-07-23 Treated surface copper foil, copper foil with carrier, substrate, resin substrate, printed circuit board, copper clad laminate, and printed circuit board manufacturing method
US15/910,499 US20180279482A1 (en) 2013-07-23 2018-03-02 Surface-treated copper foil, copper foil with carrier, substrate, resin substrate, printed wiring board, copper clad laminate and method for producing printed wiring board

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JP2013160828A JP5470493B1 (en) 2013-07-23 2013-08-01 Resin base material, printed wiring board, printed circuit board, copper-clad laminate, and printed wiring board manufacturing method
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