WO2015005181A1 - Élément de conversion de puissance - Google Patents

Élément de conversion de puissance Download PDF

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Publication number
WO2015005181A1
WO2015005181A1 PCT/JP2014/067557 JP2014067557W WO2015005181A1 WO 2015005181 A1 WO2015005181 A1 WO 2015005181A1 JP 2014067557 W JP2014067557 W JP 2014067557W WO 2015005181 A1 WO2015005181 A1 WO 2015005181A1
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Prior art keywords
terminal
switching semiconductor
semiconductor element
main surface
pad
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PCT/JP2014/067557
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English (en)
Japanese (ja)
Inventor
要一 守屋
山本　祐樹
安隆 杉本
▲隆▼裕 ▲高▼田
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株式会社 村田製作所
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Priority to JP2015526278A priority Critical patent/JPWO2015005181A1/ja
Publication of WO2015005181A1 publication Critical patent/WO2015005181A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/071—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Definitions

  • the present invention relates to a power conversion component, and more particularly, to a power conversion component including a switching semiconductor element.
  • a power conversion component including a conventional switching semiconductor element has elements 120a to 120k, 120m such as a switching semiconductor element and a rectifying semiconductor element mounted on one side of a substrate 102, and wires are connected. It is wired using.
  • the device area becomes large, and miniaturization is difficult.
  • the wiring length becomes long and it is necessary to establish electrical connection by wire bonding, so that the amount of power loss increases.
  • the present invention is intended to provide a power conversion component that can be easily miniaturized and can reduce the amount of power loss.
  • the present invention provides a power conversion component configured as follows.
  • the power conversion component includes a main substrate, a first switching semiconductor element, and a second switching semiconductor element.
  • the main substrate has first and second main surfaces facing each other, a first pad is formed along the first main surface, and a second pad is formed along the second main surface. And a via conductor connecting the first pad and the second pad is formed between the first pad and the second pad.
  • a source terminal or emitter terminal and a gate terminal or a base terminal are formed on one main surface, a drain terminal or a collector terminal is formed on the other main surface, and the drain terminal or collector terminal is
  • the main substrate is disposed along the first main surface in a state of being connected to the first pad.
  • a source terminal or an emitter terminal and a gate terminal or a base terminal are formed on one main surface, a drain terminal or a collector terminal is formed on the other main surface, and the source terminal or emitter terminal is
  • the main board is disposed along the second main surface in a state of being connected to the second pad.
  • the via conductor is 20% or more of the area of the smaller one of the first and second switching semiconductor elements when viewed from a direction perpendicular to the first main surface, and the first and second The second pad has an area smaller than the smaller area.
  • the power conversion component can be easily downsized by reducing the area of the main substrate.
  • the wiring conductor is used rather than wiring. Since the wiring can be shortened, the cross-sectional area of the wiring can be increased, and the connection can be made with low resistance, current loss can be reduced.
  • any one of the first pad and the second pad and the via conductor are integrally formed from one material.
  • the via conductor is bonded to the other first pad or the second pad with the via conductor recessed into the other of the first pad and the second pad.
  • the electric resistance of the wiring connecting the drain terminal or collector terminal of the first switching semiconductor element and the source terminal or emitter terminal of the second switching semiconductor element can be reduced.
  • the cross-sectional area of the via conductor which is a wiring connecting the drain terminal or collector terminal of the first switching semiconductor element and the source terminal or emitter terminal of the second switching semiconductor element, is increased to reduce the resistance. Since they can be connected, current loss can be reduced.
  • a plurality of the via conductors connecting the pads are formed between one first pad and one second pad.
  • the electrical resistance can be reduced by increasing the number of via conductors connecting the first pad and the second pad.
  • a power conversion component includes: (a) a first conductive plate connected to the source terminal or emitter terminal of the first switching semiconductor element; and (b) the first switching semiconductor element and the first switching semiconductor element.
  • a second heat radiating plate disposed along the second conductive plate on the second sealing resin.
  • the first and second heat radiating plates can efficiently exhaust heat.
  • a first conductive plate is formed on one main surface, and a first heat radiating plate is formed on most or all of the other main surface.
  • a first ceramic substrate having a surface opposed to the one main surface of the first switching semiconductor element and the first conductive plate connected to the source terminal or emitter terminal of the first switching semiconductor element;
  • B) a second conductive plate is formed on one main surface, a second heat radiating plate is formed on most or all of the other main surface, and the one main surface is the second switching semiconductor element.
  • the first and second heat radiating plates can efficiently exhaust heat.
  • the power conversion component has (i) a rectangular first piece joined to one of the first heat radiating plate and the second heat radiating plate, and a pair of sides of the first piece facing each other. And a pair of second pieces extending to the other side of the first heat radiating plate and the second heat radiating plate, and ends of the second piece opposite to the first piece. A pair of third pieces extending in the opposite direction to each other, and connected to the other first heat radiating plate or the second heat radiating plate. A heat dissipating lead having a pair of openings formed along another pair of opposite sides of the first piece between the second pieces; and (ii) the source terminal or emitter of the first switching semiconductor element.
  • a terminal, the gate terminal or the base terminal of the first switching semiconductor element, and the second terminal Electrically connected to the drain terminal or collector terminal of the switching semiconductor element, the drain terminal or collector terminal of the first switching semiconductor element, and the source terminal or emitter terminal of the second switching semiconductor element; And a terminal lead protruding from the opening of the heat dissipation lead.
  • heat can be further exhausted more efficiently by the heat radiation leads connected to the first or second heat radiation plate.
  • the power conversion component is mounted on the main substrate and between the source terminal or emitter terminal of the first switching semiconductor element and the drain terminal or collector terminal of the second switching semiconductor element.
  • a capacitor electrically connected in parallel between the source terminal or emitter terminal and the drain terminal or collector terminal of each of the first and second switching semiconductor elements.
  • the power conversion component is (iv) mounted on the main substrate, and the drain terminal or collector terminal of the first switching semiconductor element and the source terminal or emitter terminal of the second switching semiconductor element are connected to each other. And a resistor electrically connected in series between the common terminal and the output terminal.
  • the power conversion component of the present invention can be easily downsized and the amount of power loss can be reduced.
  • Example 1 It is sectional drawing of a power conversion component.
  • Example 1 It is an exploded sectional view of a power conversion component.
  • Example 1 It is a top view of power conversion components.
  • Example 1 It is a perspective view of a power conversion component.
  • Example 1 It is a perspective view of a power conversion component.
  • Example 1 It is a perspective view of a power conversion component.
  • Example 1 It is a perspective view of a power conversion component.
  • Example 1 It is an electric circuit diagram of a power conversion component.
  • Example 1 It is an electric circuit diagram of a power conversion component.
  • Modification 1 It is sectional drawing of a power conversion component.
  • Example 2 It is a top view of the main body of power conversion components.
  • Example 2 It is a perspective view of the main body of a power conversion component.
  • Example 2 It is a perspective view of the main body of a power conversion component.
  • Example 2 It is a perspective view of the main body of a power conversion component.
  • Example 2 It is a perspective view of the main body of a power conversion component.
  • Example 2 It is a perspective view of the main body of a power conversion component.
  • Example 2 It is sectional drawing of a power conversion component.
  • Example 3 It is sectional drawing of a power conversion component.
  • Example 4 It is principal part sectional drawing of a power conversion component.
  • Example 5 It is a principal part perspective view of a power conversion component.
  • Example 5 It is principal part sectional drawing of a power conversion component.
  • Example 6 It is a principal part perspective view of a power conversion component.
  • Example 6) It is a top view of power conversion components. (Conventional example)
  • Example 1 The power conversion component 10 of Example 1 will be described with reference to FIGS.
  • FIG. 8 is an electric circuit diagram of the power conversion component 10. As shown in FIG. 8, the power conversion component 10 forms a three-phase bridge circuit. That is, three sets of first and second switching semiconductor elements 50, 51; 52, 53; 54, 55 are connected in parallel between the power supply terminals 20x and 21x.
  • Each of the switching semiconductor elements 50 to 55 is an FET (Field-Effect-Transistor, field effect transistor), and the drain terminals of the first switching semiconductor elements 50, 52, and 54 and the second switching semiconductor elements 51, 53 of each set. , 55 are connected to each other, and common terminals 25, 26 are connected to the drain terminals of the first switching semiconductor elements 50, 52, 54 and the source terminals of the second switching semiconductor elements 51, 53, 55.
  • FET Field-Effect-Transistor, field effect transistor
  • rectifying semiconductor elements 60 to 65 are connected between the source terminals and the drain terminals of the switching semiconductor elements 50 to 55.
  • a DC power source is connected to the power supply terminals 20x and 21x, and appropriate signals are input to the signal terminals 30x to 35x connected to the gate terminals of the switching semiconductor elements 50 to 55, whereby three output terminals 22, 23, and 24 are connected. Phase alternating current is output.
  • the power conversion component can be configured to include two sets of first and second switching semiconductor elements, or can be configured as one unit including one set of first and second switching semiconductor elements. It is. It is also possible to omit the rectifying semiconductor element.
  • FETs field effect transistors
  • IGBTs insulated gate bipolar transistors
  • FETs made of SiC semiconductors that can be operated at high temperatures, which are being developed in recent years, and the like are used.
  • SBD Schottky barrier diode
  • FIG. 1 is a cross-sectional view of the power conversion component 10.
  • FIG. 2 is an exploded cross-sectional view of the power conversion component 10.
  • the power conversion component 10 includes a switching semiconductor element 50 to 55 and a rectifying semiconductor element between a resin substrate 12 as a main substrate and first and second ceramic substrates 14 and 16. 60 to 65 (not shown in FIGS. 1 and 2) are arranged, and the space between the first ceramic substrate 14 and the resin substrate 12 is sealed with the first sealing resin 19a, and the second ceramic substrate. 16 and the resin substrate 12 are sealed with a second sealing resin 19b.
  • the resin substrate 12 has a first pad 13a formed along the first main surface 12a, and second and third pads 13b, 13c formed at intervals from each other along the second main surface 12b. ing.
  • a via conductor 13x that connects the first pad 13a and the second pad 13b is formed between the first pad 13a and the second pad 13b. That is, one end of the via conductor 13x is connected to the first pad 13a, and the other end is connected to the second pad 13b.
  • the resin substrate 12 is formed using, for example, an epoxy resin, a phenol resin, a silicone resin, a polyimide resin, or a bismaleimide resin.
  • an epoxy resin for example, an epoxy resin, a phenol resin, a silicone resin, a polyimide resin, or a bismaleimide resin.
  • the switching semiconductor elements 50 to 55 and the rectifying semiconductor elements 60 to 65 are made of SiC semiconductors that can be operated at a high temperature, silicone resins, polyimide resins, and bismaleimide resins that are high heat resistant resins are preferable.
  • a metal having a low specific resistance such as silver or copper.
  • the via conductor 13x is a cylindrical conductor having a diameter of 0.6 to 5.0 mm and filled with a metal having a low specific resistance such as silver or copper.
  • a metal having a low specific resistance such as silver or copper.
  • the via conductor 13x has the same cross-sectional area as the first and second pads 13a and 13b so that the first and second pads 13a and 13b can be connected with low resistance.
  • the first and second pads 13a and 13b may be slightly smaller than the first and second pads 13a and 13b.
  • the shape of the cross section of the via conductor is not limited to a circle, and may be formed to be a rectangle.
  • the area of each of the first and second pads 13a, 13b is 100 times the area of the first switching semiconductor elements 50, 52, 54. % And more than 100% of the area of the second switching semiconductor elements 51, 53, 55, the area of the via conductor 13x is smaller than the area of the first pad 13a, and the area of the second pad 13b Smaller than.
  • the via conductor 13x is 20% or more of the area of the first pad 13a and 20% or more of the area of the second pad when seen through from the direction perpendicular to the first main surface 12a of the resin substrate 12. Therefore, it is possible to connect with a resistance lower than that of wire bonding.
  • the areas of the first pad and the second pad are the same. However, when the areas of the first pad and the second pad are different, 20% or more of the area of the smaller pad is used.
  • the via conductor may be formed so as to have an area of.
  • a plurality of via conductors may be connected.
  • a plurality of via conductors having a diameter of 0.6 mm to 2 mm may be formed.
  • the resin substrate 12 can easily form a via conductor having a diameter of 0.6 mm or more, which is extremely difficult to form with a ceramic substrate.
  • the optimum diameter of the via conductor 13x varies depending on the conduction current value, but is preferably 1 mm or more.
  • the via conductor 13x and one of the first and second pads 13a and 13b are integrally formed from one material, and the via conductor 13x is recessed into the other of the first and second pads 13a and 13b. In the state, it can be set as the structure joined to the said other 1st or 2nd pad 13a, 13b.
  • This configuration can be formed by the following procedure, for example. That is, the first metal plate, which is one material, is processed from one side by etching or the like to form an integrally formed product in which the cylinder that becomes the via conductor 13x is erected on the plate-like common part, A resin plate having a through hole into which the cylinder enters is placed, and the tip of the cylinder slightly protrudes from the resin plate. Next, a second metal plate is laminated on the resin plate, heated while being pressurized, and the tip of the cylinder is joined to the second metal plate with the tip of the cylinder recessed into the second metal plate. Like that. Next, the common portion on both sides of the resin plate and the second metal plate are processed by etching or the like to form the first to third pads 13a, 13b, and 13c.
  • the via conductor 13x and one of the first and second pads 13a and 13b are integrally formed, the resistance value of the connection portion between the via conductor 13x and one of the first or second pads 13a and 13b.
  • the via conductor 13x having a large cross-sectional area can be easily formed and can be connected with low resistance.
  • the via conductor 13x can be formed by forming a hollow cylindrical metal plating on the side surface of a through hole (through hole) formed in the resin substrate 12 and then filling the hollow space with resin. It is.
  • the conduction resistance per one of the via conductors 13x is very large, as many via conductors 13x as possible are formed, and a plurality of gaps are formed between one first pad 13a and one second pad 13b.
  • the via conductors 13x are preferably connected to reduce the conduction resistance.
  • the first ceramic substrate 14 has a first conductive plate 15b and a third conductive plate 15c formed on one main surface 14a, and a first heat radiating plate 15a formed on the other main surface 14b.
  • the second ceramic substrate 16 has a second conductive plate 17a formed on one main surface 16a and a second heat radiating plate 17b formed on the other main surface 16b.
  • FIG. 3 is a plan view of the power conversion component 10 viewed along line AA in FIG.
  • the first heat radiating plate 15 a is formed on most of the other main surface 14 b of the first ceramic substrate 14.
  • the second heat radiating plate 17b is formed on most of the other main surface 6b of the second ceramic substrate 16.
  • the first heat radiating plate 15 a may be formed on the entire other main surface 14 b of the first ceramic substrate 14.
  • the second heat radiating plate 17b may be formed on the entire other main surface 16b of the second ceramic substrate 16.
  • the first and second ceramic substrates 14 and 16 include alumina (thermal conductivity: 15 to 35 W / m ⁇ K), aluminum nitride (thermal conductivity 130 to 250 W / m ⁇ K), silicon nitride (thermal conductivity). : Using a ceramic insulator with high thermal conductivity such as 50 to 150 W / m ⁇ K), a copper plate or an aluminum plate having a thickness of 0.1 mm or more is bonded to both surfaces by a direct metal method or an active metal method, The first and second heat radiation plates 15a, 17b and the first to third conductive plates 15b, 17a, 15c are patterned. In addition, the heat conductivity of the generally available high heat conductive filler-added resin is 10 W / m ⁇ K or less.
  • a gate terminal 56 and a source terminal 57 are formed on one main surface, and a drain terminal 58 is formed on the other main surface.
  • the rectifying semiconductor elements 60 to 65 each have a terminal formed on a pair of main surfaces.
  • the first switching semiconductor elements 50, 52, and 54 and the first rectifying semiconductor elements 60, 62, and 64 connected between the drain terminal and the source terminal of the first switching semiconductor elements 50, 52, and 54 are made of resin. It arrange
  • the second switching semiconductor elements 51, 53, and 55 and the second rectifying semiconductor elements 61, 63, and 65 connected between the drain terminals and the source terminals of the second switching semiconductor elements 51, 53, and 55 are made of resin. It arrange
  • FIG. 4 is a perspective view of the vicinity of the line BB along the line BB in FIG.
  • the source terminal 57 of the first switching semiconductor element 50, 52, 54 and the one terminal 60a, 62a, 64a of the first rectifying semiconductor element 60, 62, 64 are connected to the first ceramic.
  • the first conductive plate 15b of the substrate 14 is connected.
  • One end side of the terminal lead 20 is connected to the first conductive plate 15b, and the other end side of the terminal lead 20 protrudes to the outside as a power supply terminal 20x (see FIG. 8).
  • the gate terminals 56 of the first switching semiconductor elements 50, 52, 54 are connected to the third conductive plate 15 c of the first ceramic substrate 14.
  • FIG. 5 is a perspective view of the vicinity of the line CC along the line CC in FIG.
  • the drain terminal 58 of the first switching semiconductor elements 50, 52, 54 and the other terminals 60 b, 62 b, 64 b of the first rectifying semiconductor elements 60, 62, 64 are connected to the resin substrate 12.
  • One end side of the terminal leads 22, 23, 24 is connected to the first pad 13a, and the other end side of the terminal leads 22, 23, 24 protrudes to the outside as output terminals 22x, 23x, 24x (see FIG. 8). Yes.
  • FIG. 6 is a perspective view of the vicinity of the line DD along the line DD in FIG.
  • the source terminal 57 of the second switching semiconductor elements 51, 53, 55 and one terminal 61 a, 63 a, 65 a of the second rectifying semiconductor elements 61, 63, 65 are connected to the resin substrate 12.
  • the gate terminals 56 of the second switching semiconductor elements 51, 53 and 55 are connected to the third pad 13 c of the resin substrate 12.
  • One end side of the terminal leads 31, 33, 35 is connected to the third pad 13c, and the other end side of the terminal leads 31, 33, 35 protrudes to the outside as signal terminals 31x, 33x, 35x (see FIG. 8). ing.
  • FIG. 7 is a perspective view of the vicinity of the line EE along the line EE in FIG.
  • the drain terminals 58 of the second switching semiconductor elements 51, 53, and 55 and the other terminals 61b, 63b, and 65b of the second rectifying semiconductor elements 61, 63, and 65 are connected to the second ceramic.
  • the second conductive plate 15b of the substrate 16 is connected.
  • One end of the terminal lead 21 is connected to the second conductive plate 15b, and the other end of the terminal lead 21 protrudes to the outside as a power supply terminal 21x (see FIG. 8).
  • the terminal leads 20 to 25 and 30 to 35 are bent toward, for example, the second heat radiating plate 17b, and the tip portion is flush with the second heat radiating plate 17b and the second heat radiating plate 17b. It is formed to bend to the opposite side.
  • the bonding material 18 shown in FIG. 1 includes the first to third pads 13a, 13b, 13c of the resin substrate 12, the first and third conductive plates 15b, 15c of the first ceramic substrate 14, and the second The terminals of the switching semiconductor elements 50 to 55 and the rectifying semiconductor elements 60 to 65 (not shown in FIG. 1) are joined to the second conductive plate 17a of the ceramic substrate 16.
  • a general solder may be used for the bonding material 18.
  • the joining portions using the joining material 18 are the power supply (IN, OUT), three-phase output (U, V, W), and gate signal terminal leads 20 to 25 and 30 to 35 (see FIG. 3) is bonded to the circuit board so that it does not remelt, Bi—Cu solder having a melting point of 260 ° C. or higher, or a melting point variation type having a melting point of 260 ° C. or higher after bonding. It is preferable to use a high heat-resistant bonding material.
  • the first and second sealing resins 19a and 19b are made of an insulating resin having a high thermal conductivity in order to improve heat exhaustion of heat generated from the switching semiconductor elements 50 to 55 and the rectifying semiconductor elements 60 to 65.
  • the thermal conductivity is 0.8 W / m.m.
  • high thermal conductive ceramic particles such as silica filler, alumina filler and aluminum nitride filler. It is preferable to use a high thermal conductivity insulating resin of K or higher.
  • the switching semiconductor elements 50 to 55 and the rectifying semiconductor elements 60 to 65 can be arranged three-dimensionally, and it is not necessary to route the wiring in the plane direction.
  • the area of 10 can be reduced.
  • the wiring indicated by reference numerals 70 to 73 in FIG. 8 that is, the wiring from the drain terminals of the first switching semiconductor elements 50, 52, and 54 to the source terminals of the second switching semiconductor elements 51, 53, and 55. Becomes shorter.
  • the resistance values of the wiring portions indicated by reference numerals 70 to 73 in FIG. 8 can be made smaller by using the via conductors 13x than when connecting by wire bonding. Therefore, the amount of power loss is reduced.
  • the power conversion component 10 transmits heat generated from the switching semiconductor elements 50 to 55 and the rectifying semiconductor elements 60 to 65 via the first and second ceramic substrates 14 and 16 having high thermal conductivity. Heat can be efficiently exhausted from the heat sinks 15a and 17b.
  • capacitors C1, C2, C3 connected in parallel with the first and second switching semiconductor elements 50, 51; 52, 53; It is mounted on the resin substrate 12.
  • pads or wirings are formed on the first main surface 12a or the second main surface 12b of the resin substrate 12, and the capacitors C1, C2, and C3 are mounted.
  • Capacitors C1, C2, and C3 may be disposed inside the resin substrate 12.
  • resistors R1, R2, and R3 connected in series with 24x is mounted on the resin substrate 12.
  • pads or wirings are formed on the first main surface 12a or the second main surface 12b of the resin substrate 12, and the resistors R1, R2, and R3 are mounted.
  • the resistors R1, R2, and R3 may be disposed inside the resin substrate 12.
  • Example 2 A power conversion component 10a of Example 2 will be described with reference to FIGS.
  • the power conversion component 10a of the second embodiment has substantially the same configuration as the power conversion component 10 of the first embodiment.
  • the same reference numerals are used for the same components as in the first embodiment, and differences from the first embodiment will be mainly described.
  • FIG. 10 is a cross-sectional view of the power conversion component 10a.
  • FIG. 11 is a plan view of the power conversion component 10a.
  • FIG. 12 is a plan view of the main body 11 of the power conversion component 10a.
  • the power conversion component 10 a of the second embodiment includes a main body 11 configured substantially the same as the power conversion component 10 of the first embodiment, and the first heat radiating plate 15 a of the main body 11 is attached to the first heat dissipation plate 15 a.
  • the heat radiation lead 40 is joined via the joining material 48.
  • the heat radiating leads 40 are respectively connected along a rectangular first piece 42 joined to the first heat radiating plate 15a and a pair of opposite sides 42a and 42b of the first piece 42, and the second heat radiating plate 17b.
  • a pair of second pieces 44, 46 extending to the side, and end portions 44a, 46a opposite to the first pieces 42 of the second pieces 44, 46 are connected in an L-shaped cross section to form a second heat radiating plate
  • a pair of third pieces 45 and 47 extending on opposite sides to each other are flush with 17b.
  • the pair of second pieces 44 and 46 of the heat dissipation lead 40 are opposed to the pair of side surfaces 11 a and 11 b facing each other among the side surfaces 11 a, 11 b, 11 s, and 11 t of the main body 11.
  • a pair of openings are formed between the pair of second pieces 44 and 46 of the heat dissipation lead 40 along another pair of opposite sides 42 s and 42 t of the first piece 42.
  • the heat dissipation lead 40 a metal having high thermal conductivity such as silver, copper, aluminum, iron, or the like as a main component is used. As the thickness of the heat dissipation lead 40 is increased, the heat dissipation performance is improved.
  • the main body 11 has substantially the same configuration as that of the power conversion component 10 of the first embodiment, but the arrangement of the terminal leads 20 to 25 and 30 to 35 is different from that of the power conversion component 10 of the first embodiment. That is, as shown in FIGS. 13 to 17, terminal leads 20 to 25 are formed from a pair of openings formed along another pair of opposite sides 42s and 42t of the first piece 42 of the heat radiating lead 40. , 30 to 35 protrude outside.
  • FIG. 13 is a perspective view of the main body 11 as seen in the vicinity of the line AA along the line AA in FIG. As shown in FIG. 13, the shape of the first conductive plate 15 b is changed according to the arrangement of the terminal leads 20.
  • FIG. 14 is a perspective view of the main body 11 as seen in the vicinity of the line BB along the line BB in FIG. As shown in FIG. 14, the shape of the first pad 13 a is changed according to the arrangement of the terminal leads 22, 23, 24.
  • FIG. 15 is a perspective view of the main body 11 as seen in the vicinity of the line CC along the line CC in FIG. As shown in FIG. 15, the arrangement of the second and third pads 13b, 13b and the terminal leads 31, 33, 35 is the same as that in the first embodiment.
  • FIG. 16 is a perspective view of the main body 11 as seen in the vicinity of the line DD along the line DD in FIG. As shown in FIG. 16, the shape of the second conductive plate 17 a is changed according to the arrangement of the terminal leads 21.
  • the power conversion component 10a When the power conversion component 10a is mounted on a circuit board, the power supply (IN, OUT), three-phase output (U, V, W), and gate signal terminal leads 20 to 25 and 30 to 35 are connected to each other using a bonding material. While joining with the mounting terminal of a board
  • the first switching semiconductor disposed between the resin substrate 12 and the first ceramic substrate 14 by adding a heat transfer path for exhausting heat from the first heat dissipation plate 15a to the circuit board via the heat dissipation lead 40. Exhaust heat of the heat generated from the elements 50, 52, 54 and the rectifying semiconductor elements 60, 62, 64 is promoted. Accordingly, the efficiency of exhausting heat generated from the second switching semiconductor elements 51, 53, 55 and the rectifying semiconductor elements 61, 63, 65 disposed between the resin substrate 12 and the second ceramic substrate 16 is also increased. To do. As a result, the heat dissipation efficiency of the entire power conversion component 10a can be significantly increased.
  • the power conversion component 10a can be easily reduced in size and the amount of power loss can be reduced.
  • Example 3 The power conversion component 10b of Example 3 will be described with reference to FIG.
  • FIG. 17 is a cross-sectional view of the power conversion component 10b of the third embodiment.
  • the power conversion component 10 b of the third embodiment includes the first and second sealing resins 19 a and 19 b in the portion where the ceramic substrates 14 and 16 are arranged in the power conversion component 10 of the first embodiment.
  • the first heat radiation plate 15a is disposed along the first conductive plate 15b on the first sealing resin 19a
  • the second conductive plate 17a is disposed on the second sealing resin 19b.
  • the configuration is the same as that of the power conversion component 10 according to the first embodiment except that the second heat radiating plate 17b is disposed along the second heat radiating plate 17b.
  • the first and second sealing resins 19a and 19b may be formed at the same time or may be divided as appropriate.
  • the first and third conductive plates 15b, 15c and the second conductive plate 17a are held with resin, and the periphery is filled with resin later, whereby the first and second sealing resins 19a. , 19b may be formed.
  • the power conversion component 10b can be easily downsized, and the amount of power loss can be reduced.
  • Example 4 The power conversion component 10c of Example 4 will be described with reference to FIG.
  • FIG. 18 is a cross-sectional view of the power conversion component 10c of the fourth embodiment.
  • the first heat radiating plate 15a of the main body 111k having substantially the same configuration as that of the power conversion component 10b of the third embodiment,
  • the heat radiating lead 40 is bonded via the bonding material 48.
  • the main body 11k has a pair of side surfaces 11a and 11b facing each other among the four side surfaces covered with the heat radiation leads 40, and the leads protrude from the other pair of side surfaces. Is configured to do. That is, the main body 11k is filled with the first and second sealing resins 19a and 19b in the portion where the ceramic substrates 14 and 16 are disposed in the main body 11 of the power conversion component 10a of the second embodiment.
  • a first heat radiating plate 15a is disposed on the stop resin 19a along the first conductive plate 15b
  • a second heat radiating plate 17b is disposed on the second sealing resin 19b along the second conductive plate 17a.
  • the configuration is the same as that of the main body 11 of the power conversion component 10b according to the second embodiment except that is disposed.
  • the power conversion component 10c can be easily downsized, and the amount of power loss can be reduced. In addition, the heat dissipation efficiency of the entire power conversion component 10c can be significantly increased.
  • Example 5 The power conversion component 10d of Example 5 will be described with reference to FIGS. 19 and 20.
  • FIG. 19 is a cross-sectional view of a main part of the power conversion component 10d according to the fifth embodiment.
  • the power conversion component 10 d according to the fifth embodiment has the first pad 13 a formed along the first main surface 12 a of the resin substrate 12, as in the first embodiment.
  • a drain terminal 58 of the switching semiconductor element 50 is connected.
  • the source terminal 57 of the second switching semiconductor element 51 is connected to the second pad 13 b formed along the second main surface 12 b of the resin substrate 12, and along the second main surface 12 b of the resin substrate 12.
  • the gate terminal 56 of the second switching semiconductor element 51 is connected to the third pad 13c formed in this manner.
  • a via conductor 13y is formed on the resin substrate 12 to connect the first pad 13a and the second pad 13b.
  • FIG. 20 is a perspective view of main parts seen along the line PP in FIG.
  • the via conductor 13y indicated by the solid line protrudes from the drain terminal 58 of the first switching semiconductor element 50 indicated by the solid line when seen through from the direction perpendicular to the first main surface 12a of the resin substrate 12. Moreover, it protrudes from the source terminal 57 of the 2nd switching semiconductor element 51 shown with a broken line.
  • the via conductor 13y protrudes from the drain terminal 58 of the first switching semiconductor element 50 or the source terminal 57 of the second switching semiconductor element 51. Since the cross-sectional area of the via conductor 13y, which is a wiring connecting the source terminal 57 of the switching semiconductor element 51, can be increased and the connection can be made with low resistance, current loss can be reduced.
  • Example 6 The power conversion component 10e of Example 6 is demonstrated referring FIG.21 and FIG.22.
  • FIG. 21 is a cross-sectional view of the main part of the power conversion component 10e of the sixth embodiment.
  • the power conversion component 10 e according to the sixth embodiment is similar to the fifth embodiment in that the first switching is applied to the first pad 13 a formed along the first main surface 12 a of the resin substrate 12.
  • a drain terminal 58 of the semiconductor element 50 is connected.
  • the source terminal 57 of the second switching semiconductor element 51 is connected to the second pad 13 b formed along the second main surface 12 b of the resin substrate 12, and along the second main surface 12 b of the resin substrate 12.
  • the gate terminal 56 of the second switching semiconductor element 51 is connected to the third pad 13c formed in this manner.
  • the resin substrate 12 is formed with a plurality of via conductors 13p, 13q, and 13r that connect the first pad 13a and the second pad 13b.
  • FIG. 22 is a perspective view of main parts seen along line QQ in FIG.
  • the via conductors 13p, 13q, and 13r indicated by solid lines are drains of the first switching semiconductor element 50 indicated by solid lines when seen through from a direction perpendicular to the first main surface 12a of the resin substrate 12. It protrudes from the terminal 58 and protrudes from the source terminal 57 of the second switching semiconductor element 51 indicated by a broken line.
  • the drain terminal of the first switching semiconductor element 50 is configured such that the via conductors 13p, 13q, and 13r protrude from the drain terminal 58 of the first switching semiconductor element 50 or the source terminal 57 of the second switching semiconductor element 51.
  • 58 and the via conductors 13p, 13q, and 13r, which are wirings connecting between the second switching semiconductor element 51 and the source terminal 57 can be connected with a low resistance by increasing the cross-sectional area. Can be reduced.
  • the power conversion components 10, 10a to 10c described above can be easily downsized, and the amount of power loss can be reduced.
  • the main substrate is preferably a resin substrate, but other than the resin substrate, for example, a ceramic substrate may be used.
  • the present invention is not limited to an inverter, and can be applied to a component including a power electronics circuit such as a bridge-type variable chopper.
  • the FET is used as the switching element.
  • the present invention is not limited to this, and a bipolar IGBT (Insulated Gate Bipolar Transistor) or the like may be used as the switching element.
  • the “gate terminal”, “source terminal”, and “drain terminal” of the FET correspond to the “base terminal”, “emitter terminal”, and “collector terminal” of a bipolar IGBT or the like.

Abstract

L'invention concerne un élément de conversion de puissance dont la taille peut être facilement réduite et pouvant limiter les pertes de puissance. Des bornes de drain ou des bornes de collecteur (58) de premiers éléments semi-conducteurs de commutation (50, 52, 54) sont connectées à des premiers plots (13a) formés sur une première surface principale (12a) d'un substrat principal (12), et des bornes de source ou des bornes d'émetteur (57) de seconds éléments semi-conducteurs de commutation (51, 53, 55) sont connectées à des seconds plots (13b) formés sur une seconde surface principale (12b) du substrat principal (12). Les premiers plots (13a) et les seconds plots (13b) sont connectés les uns aux autres par des conducteurs de trous d'interconnexion verticale (13x). Dans une vue traversière à partir d'une direction perpendiculaire à la première surface principale (12a), la surface des conducteurs de trous d'interconnexion verticale (13x) représente au moins 20 % de la surface des premiers éléments semi-conducteurs de commutation (50, 52, 54) et représente également au moins 20 % de la surface des seconds éléments semi-conducteurs de commutation (51, 53, 55).
PCT/JP2014/067557 2013-07-08 2014-07-01 Élément de conversion de puissance WO2015005181A1 (fr)

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JP2016129461A (ja) * 2015-01-09 2016-07-14 株式会社デンソー 三相インバータ回路の実装構造
WO2016125674A1 (fr) * 2015-02-02 2016-08-11 株式会社村田製作所 Module à semi-conducteurs, et procédé de fabrication de celui-ci
NL2020393A (en) * 2017-02-13 2018-08-22 Shindengen Electric Mfg Electronic device
NL2020395A (en) * 2017-02-13 2018-08-22 Shindengen Electric Mfg Electronic module
NL2020394A (en) * 2017-02-13 2018-08-22 Shindengen Electric Mfg Electronic module
EP3557614A1 (fr) * 2018-04-17 2019-10-23 Siemens Aktiengesellschaft Module de puissance pourvu d'un composant électronique de puissance sur une plaque de substrat et circuit électronique de puissance pourvu d'un tel module de puissance
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