WO2014020871A1 - Solid-state imaging device, method for producing solid-state imaging device and electronic apparatus - Google Patents

Solid-state imaging device, method for producing solid-state imaging device and electronic apparatus Download PDF

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Publication number
WO2014020871A1
WO2014020871A1 PCT/JP2013/004534 JP2013004534W WO2014020871A1 WO 2014020871 A1 WO2014020871 A1 WO 2014020871A1 JP 2013004534 W JP2013004534 W JP 2013004534W WO 2014020871 A1 WO2014020871 A1 WO 2014020871A1
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Prior art keywords
substrate
film
grooves
embedded
section
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PCT/JP2013/004534
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English (en)
French (fr)
Inventor
Takayuki Enomoto
Yoshiki Ebiko
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Sony Corp
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Sony Corp
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Application filed by Sony Corp filed Critical Sony Corp
Priority to KR1020207017435A priority Critical patent/KR102237324B1/ko
Priority to US14/417,590 priority patent/US9748296B2/en
Priority to CN201380039862.9A priority patent/CN104508821B/zh
Priority to KR1020157002058A priority patent/KR102126095B1/ko
Publication of WO2014020871A1 publication Critical patent/WO2014020871A1/en
Anticipated expiration legal-status Critical
Priority to US15/656,873 priority patent/US10229947B2/en
Priority to US16/265,634 priority patent/US10748949B2/en
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/805—Coatings
    • H10F39/8057—Optical shielding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
    • H10F39/014—Manufacture or treatment of image sensors covered by group H10F39/12 of CMOS image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/199—Back-illuminated image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/802—Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes
    • H10F39/8027—Geometry of the photosensitive area
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H10F39/8037—Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/807—Pixel isolation structures

Definitions

  • the present disclosure relates to a backside-illuminated solid-state imaging device, a method for producing the same and an electronic apparatus.
  • backside-illuminated solid-state imaging devices in which light is irradiated from the side opposite the side on which a wiring layer is formed on a substrate, have been proposed.
  • backside-illuminated solid-state imaging devices since the wiring layer and a circuit element are not formed on the side of the light irradiation surface, in addition to it being possible to increase the aperture ratio of a light receiving section which is formed on the substrate, it is possible to achieve an improvement in sensitivity without input light being reflected by the wiring layer as the input light is input into the light receiving section.
  • CCD Charge Coupled Device
  • CMOS Complementary Metal Oxide Semiconductor
  • Input light is applied at a main beam angle that is dependent on the pupil position and brightness (FF value) of the imaging lens of the camera, and is input with the expanse of a vertical light beam angle.
  • FF value pupil position and brightness
  • a light shielding film is provided through an insulation layer at the pixel border of the light receiving surface on which a photoelectric conversion section is arranged.
  • the light shielding film between the light receiving sections of the back surface side of the substrate that form the light input sides, but since the distance between the substrate and the surface of a collecting lens increases in proportion with the height of the light shielding film, there is a possibility that degradations in focusing property will be caused. In addition, there is concern optical color mixing will be caused as a result of diagonal input light from an insulation film that is positioned between a substrate on which a photoelectric conversion section is provided and a light shielding film.
  • the present disclosure it is possible to achieve an improvement in focusing property and it is possible to achieve further improvements in characteristics such as a reduction in optical color mixing in a solid-state imaging device.
  • the method for producing a solid-state imaging device according to embodiments of the present disclosure it is possible to achieve an improvement in focusing property and it is possible to produce a solid-state imaging device which achieves further improvements in characteristics such as a reduction in optical color mixing.
  • the solid-state imaging device it is possible to obtain an electronic apparatus which achieves an improvement in image quality.
  • Fig. 1 is a schematic configuration drawing that shows the entirety of a solid-state imaging device according to a first embodiment of the present disclosure
  • Fig. 2 is a planar layout of the central portion of a region that includes four pixels of the solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 3 is a cross section configuration drawing along the line III-III in Fig. 2
  • Fig. 4A is a process drawing (1 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 4B is a process drawing (1 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 4A is a process drawing (1 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 4B is a process drawing (1 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • FIG. 5C is a process drawing (2 of 4) that show a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 5D is a process drawing (2 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 6E is a process drawing (3 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 6F is a process drawing (3 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 7G is a process drawing (4 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • FIG. 7H is a process drawing (4 of 4) that shows a method for producing a solid-state imaging device according to the first embodiment of the present disclosure
  • Fig. 8 is a cross section configuration drawing of the main portions of a solid-state imaging device according to a comparative example
  • Fig. 9 is a cross section configuration drawing of the main portions of a solid-state imaging device according to a modification example
  • Fig. 10A is a process drawing that shows a method for producing a solid-state imaging device according to a modified example
  • Fig. 10B is a process drawing that shows a method for producing a solid-state imaging device according to a modified example
  • Fig. 10A is a process drawing that shows a method for producing a solid-state imaging device according to a modified example
  • Fig. 10B is a process drawing that shows a method for producing a solid-state imaging device according to a modified example
  • Fig. 10A is a process drawing that shows a method for producing a solid-state imaging device according
  • FIG. 11A is a planar layout of the central portion of a region that includes four pixels of the solid-state imaging device according to the first embodiment
  • Fig. 11B is a cross section configuration drawing along the line A-B in Fig. 11A
  • Fig. 11C is a cross section configuration drawing along the line B-C in Fig. 11A
  • Fig. 12A is a planar layout of the central portion of a region that includes four pixels of the solid-state imaging device according to a second embodiment of the present disclosure
  • Fig. 12B is a cross section configuration drawing along the line A-B in Fig. 12A
  • Fig. 12C is a cross section configuration drawing along the line B-C in Fig. 12A
  • Fig. 12A is a planar layout of the central portion of a region that includes four pixels of the solid-state imaging device according to a second embodiment of the present disclosure
  • Fig. 12B is a cross section configuration drawing along the line A-B in Fig. 12A
  • FIG. 13 is a cross section configuration drawing along the line A-B-C in Fig. 12A;
  • Fig. 14A is a process drawing (1 of 2) that shows a method for producing a solid-state imaging device according to the second embodiment of the present disclosure;
  • Fig. 14B is a process drawing (1 of 2) that shows a method for producing a solid-state imaging device according to the second embodiment of the present disclosure;
  • Fig. 15C is a process drawing (2 of 2) that shows a method for producing a solid-state imaging device according to the second embodiment of the present disclosure;
  • Fig. 15D is a process drawing (2 of 2) that shows a method for producing a solid-state imaging device according to the second embodiment of the present disclosure;
  • Fig. 16A is a planar layout of a semiconductor chip;
  • FIG. 16B is a cross section configuration drawing along the line XVIB-XVIB of the guard ring provided in the semiconductor chip
  • Fig. 16C is a cross section configuration drawing along the line XVIC-XVIC of the guard ring
  • Fig. 17 is a planar layout of the central portion of a region that includes four pixels of the solid-state imaging device according to a third embodiment of the present disclosure
  • Fig. 18 is a cross section configuration drawing along the line XVIII-XVIII in Fig. 17A
  • Fig. 19A is a process drawing (1 of 2) that shows a method for producing a solid-state imaging device according to the third embodiment of the present disclosure
  • FIG. 19B is a process drawing (1 of 2) that shows a method for producing a solid-state imaging device according to the third embodiment of the present disclosure
  • Fig. 20C is a process drawing (2 of 2) that shows a method for producing a solid-state imaging device according to the third embodiment of the present disclosure
  • Fig. 20D is a process drawing (2 of 2) that shows a method for producing a solid-state imaging device according to the third embodiment of the present disclosure
  • Fig. 21 is a cross section configuration drawing of the main portions of a solid-state imaging device according to a modification example
  • Fig. 22 is a cross section configuration drawing of an electronic apparatus according to a fourth embodiment of the present disclosure.
  • First Embodiment Solid-State Imaging Device 1-1 Overall Configuration of Solid-State Imaging Device 1-2 Configuration of Main Portions 1-3 Method for Producing Solid-State Imaging Device 1-4 Comparative Example 1-5 Modification Example 1-6 Method for Producing Solid-State Imaging Device according to Modification Example 2.
  • Second Embodiment Solid-State Imaging Device 2-1 Configuration of Main Portions 2-2 Method for Producing Solid-State Imaging Device 3.
  • Third Embodiment Solid-State Imaging Device 3-1 Configuration of Main Portions 3-2 Method for Producing Solid-State Imaging Device 3-3 Modification Example 4.
  • Fourth Embodiment Electronic Apparatus
  • FIG. 1 is a schematic configuration drawing that shows the entirety of a solid-state imaging device 1 according to a first embodiment of the present disclosure.
  • the solid-state imaging device 1 of the present embodiment is configured to include a pixel region 3 that is configured by a plurality of pixels 2 that are arranged on a substrate 11 that is formed from silicon, a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, an output circuit 7, a control circuit 8 and the like.
  • the pixels 2 are configured by a photoelectric conversion section formed from a photodiode and a plurality of MOS transistors, and a plurality thereof are regularly arranged on the substrate 11 in a two-dimensional array.
  • the MOS transistors that configure the pixels 2 may be four MOS transistors configured by a transfer transistor, a reset transistor, a selection transistor and an amplifier transistor or may be three transistors with the selection transistor omitted.
  • the pixel region 3 is configured by the pixels 2 being regularly arranged in a two-dimensional array.
  • the pixel region 3 is configured by an effective pixel region that receives light in a practical sense and reads a signal charge created through photoelectric conversion to the column signal processing circuit 5 by amplifying the signal charge and a black reference pixel region (not shown in the drawing) for outputting an optical black that forms a black level reference.
  • the black reference pixel region is normally formed at the periphery of the effective pixel region.
  • the control circuit 8 generates a clock signal and a control signal that form references for the operations of the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6 and the like on the basis of a vertical synchronization signal, a horizontal synchronization signal and a master clock signal. Further, the clock signal and control signal and the like that are generated by the a control circuit 8 are input into the vertical drive circuit 4, the column signal processing circuit 5, the horizontal drive circuit 6 and the like.
  • the vertical drive circuit 4 is configured by a shift transistor for example, and selectively scans each pixel 2 of the pixel region 3 one lime at a time in a sequential vertical direction. Further, in the photodiode of each pixel 2, a pixel signal is supplied to the column signal processing circuit 5 through a vertical signal line on the basis of the signal charge that is generated depending on the amount of light received.
  • the column signal processing circuit 5 is, for example, disposed in each column of pixels 2, and performs signal processes such as noise removal and signal amplification of the signal output from one row of pixels 2 for each column of pixels according to the signal from the black reference pixel region (not shown in the drawing, but this component is formed at the periphery of the effective pixel region).
  • a horizontal selection switch (not shown in the drawing) is provided between a horizontal signal line 10 and the column signal processing circuit 5.
  • the horizontal drive circuit 6 is configured by a shift transistor for example, sequentially selects each column signal processing circuit 5 by sequentially outputting a horizontal scanning pulse and outputs a pixel signal from each column signal processing circuit 5 to the horizontal signal line 10.
  • the output circuit 7 performs signal processes on the signals sequentially supplied from each column signal processing circuit 5 through the horizontal signal line 10 and outputs the signals.
  • Fig. 2 is a planar layout of the central portion of a region that includes four pixels that are adjacent in the vertical direction and the horizontal direction of the solid-state imaging device 1 according to the first embodiment of the present disclosure.
  • Fig. 3 is a cross section configuration drawing along the line III-III in Fig. 2.
  • the solid-state imaging device 1 of the present embodiment includes a substrate 22, a wiring layer 23 that is formed on the front surface side of the substrate 22 and a support substrate 26.
  • the solid-state imaging device 1 of the present embodiment includes an element isolation section 31, a planarizing film 32, a color filter layer 33 and a collecting lens 34.
  • the embodiment is described by setting a first conductivity type as a p-type and a second conductivity type as an n-type.
  • the substrate 22 is configured by a semiconductor substrate formed from silicon, and for example, is formed to have a thickness of 1 micrometers to 6 micrometers.
  • a plurality of pixels which are configured by a photoelectric conversion section 35 that is formed from a photodiode and a plurality of pixel transistors that configure a pixel circuit section, are formed in a two-dimensional matrix in the pixel region 3 of the substrate 22.
  • the photoelectric conversion section 35 is configured by first conductivity type (hereinafter referred to as p-type) semiconductor regions 36, 37 that are formed on the front surface side and the back surface side of the substrate 22 and a second conductivity type (hereinafter referred to as n-type) semiconductor region 38 that is formed between the first conductivity type semiconductor regions.
  • the main photodiode is formed by the pn junctions between the p-type semiconductor regions 36, 37 and the n-type semiconductor region 38.
  • a signal charge depending on the amount of light that is input is generated in the photoelectric conversion section 35 and the signal charge is stored in the n-type semiconductor region 38.
  • the p-type semiconductor regions 36, 37 are formed on the front surface and the back surface of the substrate 22 in the present embodiment, the occurrence of a dark current that is generated at the boundary of the substrate 22 is suppressed.
  • each photoelectric conversion section 35 is electrically isolated by a pixel isolation layer 39 that is configured by the p-type semiconductor regions and the element isolation section 31 that is formed inside the pixel isolation layer 39.
  • the pixel isolation layer 39 is provided in the substrate 22 in a grid so as to define each photoelectric conversion section 35, and is formed from the back surface of the substrate 22 to a depth that reaches a p-well layer 43 (to be described later) that is formed by a source and drain region 40 of a pixel transistor Tr1.
  • the pixel transistor Tr1 is configured by a source and drain region 40 which is provided on the substrate 22 and a gate electrode 41 which is provided on the front surface side of the substrate 22 through a gate insulation film 42.
  • the source and drain region 40 is formed by an n-type semiconductor region which is formed by n-type impurities being injected into the p-well layer 43 formed on the front surface side of the substrate 22 at a high concentration.
  • a transfer transistor, an amplifier transistor, a reset transistor, a selection transistor or the like can be formed as the pixel transistor Tr1 that drives the pixels 2, but in Fig. 3, among the pixel transistors Tr1, only a transfer transistor is indicated as a representative example.
  • the element isolation section 31 is configured by a film (hereinafter referred to as a fixed charge film 28) that is embedded inside a groove section 27 that is formed in a depth direction from the back surface side of the substrate 22 and has a negative fixed charge, an embedded film 29 and a light shielding film 30.
  • the element isolation section 31 is provided in a grid so as to define each pixel 2 and is provided so as to electrically isolate adjacent photoelectric conversion sections 35.
  • the groove section 27 is formed in a depth direction from the back surface side of the substrate 22, and an uneven section 15 is provided on the side wall surface of the groove section 27.
  • the uneven section 15 is provided on opposing side wall surfaces of groove section 27 that are provided between pixels 2 (between photoelectric conversion sections 35) that are adjacent in the horizontal direction and the vertical direction.
  • the side wall surface from the open end of the groove section 27 to the uneven section 15 and the side wall surface from the uneven section 15 to the bottom surface of the groove section 27 are formed in a tapered manner so that the width of the opening thereof becomes gradually smaller.
  • the uneven section 15 is provided so that the width of the opening of the groove section 27 becomes smaller in the depth direction of the substrate 22.
  • the unevenness provided in the groove section 27 is configured with 1 step but a plurality of thereof may be provided.
  • the groove section 27 is formed to a depth that reaches a p-well layer 43 that is formed by a source and drain region 40 of the pixel transistor Tr1, and is formed to a depth that does not reach the source and drain region 40.
  • the groove section 27 is formed to a depth that reaches the p-well layer 43 of the pixel transistor Tr1, but the end portion of substrate 22 on the back surface side of the element isolation section 31 may be formed so as to touch the a p-type semiconductor layer, and the therefore the groove section 27 does not have to be formed to a depth that reaches the p-well layer 43.
  • the groove section 27 is formed in a pixel isolation layer 39 that is formed from the p-type semiconductor layer as in the present embodiment, it is even possible to obtain an effect of insulation through isolation when the groove section 27 does not reach the p-well layer 43.
  • the fixed charge film 28 is formed across the entire surface of the back surface of the substrate 22 in addition to being formed on the side wall surface and the bottom surface of the groove section 27. Additionally, in the following description, the side wall surface and the bottom surface of the groove section 27 are referred to collectively as the "inner wall surface”. It is preferable that the fixed charge film 28 use a material that is capable of enhancing pinning by generating a fixed charge as a result of being deposited on a silicon or similar substrate, and it is possible to use a film made from a material with a high refractive index that has a negative charge or a high dielectric film.
  • a hafnium oxide (HfO 2 ) film, an aluminum oxide (Al 2 O 3 ) film, a zirconium oxide (ZrO 2 ) film, a tantalum oxide (Ta 2 O 5 ) film or a titanium oxide (TiO 2 ) film can be formed.
  • the types of film indicated above have proven records of use in the gate insulation films of insulated gate field effect transistors and the like, and therefore it is possible to form films made from the materials easily since methods for forming films have been established.
  • La 2 O 3 lanthanum oxide
  • Pr 2 O 3 praseodymium oxide
  • CeO 2 cerium oxide
  • Nd 2 O 3
  • the fixed charge film 28 that has a negative fixed charge from a hafnium nitride film, an aluminum nitride film, a hafnium oxynitride film or an aluminum oxynitride film.
  • Silicon (Si) or nitrogen (N) may be added to the material of the fixed charge film 28 that has a negative fixed charge within a range in which the material does not lose the insulation properties thereof.
  • the concentration of the addition can be determined as appropriate within a range in which the insulation properties of the film will not be lost. In this manner, as a result of adding silicon (Si) or nitrogen (N), it is possible to increase the heat resistance and the element performance of ion injection during processing.
  • an antireflective film may be laminated as a high-permittivity material after the negative fixed charge film 28 has been formed.
  • the fixed charge film 28 that has a negative charge is formed on the inner wall surface of the groove section 27 and the back surface of the substrate 22, an inversion layer is formed on a surface that is in contact with the fixed charge film 28.
  • the silicon boundary is pinned by the inversion layer, it is possible to suppress the generation of a dark current.
  • the groove section 27 is formed on the substrate 22, physical damage is caused to the inner wall surface of the groove section 27, and there is a possibility that pinning release will be cause in the peripheral portions of the groove section 27.
  • the embedded film 29 is formed so as to cover the entire surface of the back surface side of the substrate 22 in addition to being embedded in the groove section 27 in which the fixed charge film 28 is formed.
  • the embedded film 29 be formed from a material that has a refractive index that is different from that of the fixed charge film 28, and for example, it is possible to use silicon oxide, silicon nitride, silicon oxynitride or a resin. In addition, it is possible to use a specific material that does not have a positive fixed charge or has a small positive fixed charge in the embedded film 29.
  • the photoelectric conversion sections 35 that configure each pixel are isolated through the embedded film 29.
  • the signal charge since it is unlikely that the signal charge will leak into neighboring pixels, it is possible to reduce the likelihood that an overflowing signal charge will leak into a neighboring photoelectric conversion section 35 in a case in which a signal charge that exceeds a charge saturation amount is generated. For this reason, it is possible to suppress electronic color mixing (the generation of blooming).
  • the two-layered structure of the fixed charge film 28 that is formed on the back surface side that forms the input surface side of the substrate 22 and the embedded film 29 has a role of an antireflective film. As a result of this, it is possible to prevent reflection in the back surface side of the substrate 22 as a result of light input from the back surface side of the substrate 22.
  • the light shielding film 30 is formed in a position that is above the fixed charge film 28 and the embedded film 29 that are formed on the back surface side of the substrate 22 and directly above the groove section 27, and is disposed so as to shield light at the border regions between adjoining pixels 2 (between photoelectric conversion sections 35).
  • the light shielding film 30 formed so that at least a portion thereof is embedded in the embedded film 29 that is embedded in the groove section 27, and in the present embodiment the depth of the embedding thereof is set to be above the open end of the groove section 27 that is provided on the substrate 22.
  • a carbon black that absorbs light may be used in addition to metals such tungsten (W), aluminum (Al) and copper (Cu).
  • the depth of the embedding of the light shielding film 30 is set to be above the open end of the groove section 27 that is provided on the substrate 22, it is possible to suppress deteriorations in image quality and the generation of a dark current that result from the influence of film stress.
  • the light shielding film 30 is formed so that at least a portion thereof is embedded in the embedded film 29 that is embedded in the groove section 27, it is possible to reduce optical color mixing as a result of diagonal input light.
  • the planarizing film 32 is formed over the entire surface of the embedded film 29 that includes the light shielding film 30, and as a result of this, the surface of the back surface side of the substrate 22 is planarized.
  • the material of the planarizing film 32 for example, it is possible to use an organic material such as a resin.
  • the color filter layer 33 is formed on the upper surface of the planarizing film 32, and for example, is formed to correspond to R (red), G (green) and B (blue) for each pixel.
  • light of a predetermined wavelength is transmitted, and the transmitted light is input into the photoelectric conversion section 35 of the substrate 22.
  • the collecting lens 34 is formed on the upper surface of the color filter layer 33. In the collecting lens 34, irradiated light is collected, and the collected light is efficiently input to the photoelectric conversion section 35 through the color filter layer 33.
  • the wiring layer 23 is formed on the front surface side of the substrate 22, and is configured to have wiring 25 that is laminated in a plurality of layers (three layers in the present embodiment) through an interlayer insulation film 24.
  • the pixel transistor Tr1 that configures the pixels 2 is driven through the wiring 25 that is formed in the wiring layer 23.
  • the support substrate 26 is formed on the surface of the wiring layer 23 opposite the side that faces the substrate 22.
  • the support substrate 26 is configured to strengthen the substrate 22 during production stages, and for example, is configured as a silicon substrate.
  • FIGs. 4A to 7H are process drawings that show a method for producing a solid-state imaging device according to the first embodiment of the present disclosure.
  • the wiring layer 23 is formed by alternately forming the interlayer insulation film 24 and the wiring 25 on the front surface of the substrate 22.
  • the impurities of the photoelectric conversion section 35 and the like that are formed on the front surface of the substrate 22 are formed by injecting predetermined impurities from the front surface side of the substrate 22.
  • the gate electrode 41 that is formed from polysilicon for example is formed on the front surface of the substrate 22 in a predetermined region above the gate insulation film 42.
  • contact via holes are formed according to necessity between wiring 25 that is vertically adjacent and between the wiring 25 and the pixel transistor Tr1.
  • the contact via holes form contact holes in the interlayer insulation film 24, and are formed by embedding a predetermined metal material.
  • the support substrate 26 that is formed from a silicon substrate is bonded to the uppermost layer of the wiring layer 23.
  • the substrate 22 is inverted, and the back surface side of the substrate 22 is thinned to a predetermined substrate 22 thickness using a chemical mechanical polishing (CMP) method, dry etching, wet etching or the like.
  • CMP chemical mechanical polishing
  • the method for polishing the substrate 22 may be any one of the abovementioned methods or may be a combination thereof.
  • a groove section 27 of a predetermined depth is formed by selectively dry etching in the depth direction from the back surface side of the substrate 22.
  • the process that forms the groove section 27 forms a hard mask 65 that has a predetermined opening on the back surface side of the substrate 22, and forms the groove section 27 through processes of lithography and dry etching.
  • the depth of the groove section 27 be 0.2 micrometers or more from the back surface of the substrate 22, and it is more preferable that the depth be 1.0 micrometers or more.
  • a width w1 of the opening of the groove section 27 be 0.02 micrometers.
  • Processing of the groove section 27 is made easier by setting the width w1 of the opening of the groove section 27 to be wider, but since spectral characteristics and the charge saturation amount deteriorate in concert with increases in the width w1 of the opening of the groove section 27, it is more preferable that the width w1 of the opening of the groove section 27 be approximately 0.02 micrometers.
  • a film that is used in the hard mask 65 be an SiO 2 film that can form a film at low temperature such as an HDP (High Density Plasma), a P-TEOS (Plasma Tetra Ethyl Oxysilane) or the like that can easily obtain selectivity for the substrate 22 at the time of dry etching for example.
  • a P-SiN SiN film or the like or a resist mask may be used as the hard mask 65.
  • the film thickness of the hard mask 65 be approximately 0.1 micrometers to 0.5 micrometers.
  • a predetermined region above the hard mask 65 forms a photoresist 66, and the width of the opening of the hard mask 65 is widened by etching the hard mask 65 using the photoresist 66 as a mask. That is, a width w2 of the opening of the hard mask 65 that is formed in Fig. 6E is wider than the width w1 of the opening of the hard mask 65 used in Fig. 5D of the previous stage. Additionally, the width w2 of the opening of the hard mask 65 that is formed in Fig. 6E is set to be smaller than a width w3 of the pixel isolation layer 39 that is provided between adjacent photoelectric conversion sections 35.
  • the method for removing a portion of the hard mask 65 that is used in this instance may be a high-temperature baking process.
  • the substrate 22 is dry etched to a predetermined thickness through the hard mask 65 which has been expanded. At this time, etching removal is performed on the substrate 22 up to an extent at which the bottom surface of the groove section 27 that is formed on the substrate 22 reaches the p-well layer 43. In such a case, since the substrate 22 is etched using a hard mask 65 that has a wider opening than that used at the time of the etching in the process of Fig. 5D, an uneven section 15 is formed in the side wall surface of the groove section 27.
  • the uneven section 15 that is provided in the side wall surface of the groove section 27 is configured with one step, in a case in which the forgoing is configured with a plurality of steps of two or more, it is possible to form a plurality of steps in the side wall surface of the groove section 27 by repeating the process of Figs. 6E and 6F.
  • the present embodiment it is possible to form the uneven section 15 by processing the groove section 27 using a process with two steps. As a result of this, it is possible to form the light shielding film 30 that will be described later so that at least a portion thereof is embedded in the embedded film. Furthermore, by arbitrarily setting the depth of the groove section 27, it is possible to control the depth of the embedding of the light shielding film 30.
  • the hard mask 65 that was used in the processing of the groove section 27 is removed, and as shown in Fig. 7G, the fixed charge film 28 is formed so as to cover the inner wall surface of the groove section 27 and the back surface of the substrate 22 using a CVD method, a sputtering method, an ALD method or the like. Thereafter, in addition to forming the embedded film 29 embedded in the groove section 27, the embedded film 29 is also formed on the upper surface of the fixed charge film 28 on the back surface side of the substrate 22.
  • the uneven section 15 is formed in the side wall surface of the groove section 27, and the width of the opening of the open end side of the groove section 27 is formed to be greater than the width of the opening of the bottom surface side of the groove section 27.
  • the light shielding film 30 is formed across the entire upper surface of the embedded film 29, and the light shielding film 30 above the pixels is removed using lithography.
  • a light shielding film 30 that is open over the photoelectric conversion section 35 and shield light between adjoining pixels is formed.
  • the concave section 44 is formed on the front surface in a position that corresponds to the groove section 27 of the embedded film 29. For this reason, a portion of the light shielding film 30 that is provided above the groove section 27 is embedded in the concave section 44 of the embedded film 29.
  • the element isolation section 31 that is configured by the fixed charge film 28, the embedded film 29 and the light shielding film 30 is formed between adjacent pixels 2.
  • the solid-state imaging device 1 shown in Fig. 3 is completed by forming the planarizing film 32, the color filter layer 33 and the collecting lens 34 using common methods.
  • a solid-state imaging device 1 with pixel isolation resulting from the element isolation section 31 that is formed by the embedded film 29 being embedded in the groove section 27 is formed.
  • the photoelectric conversion section 35 of each pixel is isolated by the element isolation section 31 that is formed by the embedded film 29 being embedded in the groove section 27. For this reason, it is possible to further reduce leaked signal charges stored in photoelectric conversion sections 35 to the sides of adjoining photoelectric conversion sections 35 than a case in which the photoelectric conversion sections 35 are isolated using an impurity region only.
  • the abovementioned solid-state imaging device 1 has a light shielding film 30 that is disposed to shield light at the border regions between adjoining pixels 2 (between adjoining photoelectric conversion sections 35), and at least a portion of which is embedded in the embedded film 29. For this reason, the distance between the substrate 22 and the collecting lens 34 of each pixel is reduced, and it is possible to suppress degradations in focusing property. In addition, it is possible to reduce optical color mixing as a result of diagonal input light. Furthermore, for example, in a case in which the depth of the embedding of the light shielding film 30 is set to be above the open end of the groove section 27 that is provided on the substrate 22, it is possible to suppress deteriorations in image quality and the generation of a dark current that result from film stress.
  • FIG. 8 is a cross section configuration drawing of the main portions of a solid-state imaging device according to a comparative example.
  • portions that correspond to Fig. 3 are given the same reference symbols and duplicate description thereof has been omitted.
  • the solid-state imaging device 51 according to the comparative example is an example in which the configurations of a groove section 52 and an element isolation section 53 differ from those of the first embodiment.
  • the groove section 52 has a configuration in which an uneven section 15 is not provided and the element isolation section 53 is configured by a fixed charge film 28 and an embedded film 29 that are formed one by one embedded in the groove section 52.
  • a light shielding film 60 that is provided in the solid-state imaging device 51 according to the comparative example is formed so as to shield light at the border regions between adjoining pixels 2 (between adjoining photoelectric conversion sections 35), and is provided above the element isolation section 53. That is, in the solid-state imaging device 51 according to the comparative example, the light shielding film 60 is not embedded in the embedded film 29.
  • the light shielding film 30 is formed so that at least a portion thereof is embedded in the embedded film 29 that is embedded in the groove section 27. Therefore, it is possible to suppress degradations in focusing property by reducing the distance between the substrate 22 and the collecting lens 34 in comparison with the comparative example.
  • the solid-state imaging device 1 in the solid-state imaging device 1 according to the present embodiment, a configuration in which a portion of the light shielding film 30 embedded in the embedded film 29 is used, but in a case in which the metal material that configures the light shielding film 30 is inserted as far as the substrate 22, there are cases in which deteriorations in image quality and the generation of a dark current that result from film stress occur.
  • the solid-state imaging device 1 according to the present embodiment as shown in Fig. 3, as a result of the groove section 27 that is formed on the back surface side of the substrate 22 being configured to have the uneven section 15, the width of the opening on the deep side of the groove section 27 is smaller than the width of the opening on the shallow side.
  • the narrow side (the deep side of the groove section 27) of the width of the opening of the groove section 27 is reduced by the fixed charge film 28 and the embedded film 29 at the time of embedding the fixed charge film 28 and the embedded film 29 in the groove section 27, the light shielding film 30 that is formed thereafter is not formed in the deep side of the groove section 27.
  • the groove section 27 is formed to a depth that reaches the p-well layer 43 that is formed by the pixel transistor Tr1. For this reason, since the element isolation section 31 electrically isolates adjacent photoelectric conversion sections 35, it is unlikely that signal charges will flow into adjacent pixels. Therefore, it is possible to reduce the likelihood that an overflowing signal charge will leak into a neighboring photoelectric conversion section 35 in a case in which a signal charge that exceeds a charge saturation amount is generated, and it is possible to suppress electronic color mixing (the generation of blooming).
  • Fig. 9 is a cross section configuration drawing of the main portions of a solid-state imaging device according to a comparative example. In Fig. 9, portions that correspond to Fig. 3 are given the same reference symbols and duplicate description thereof has been omitted.
  • the light shielding film 80 is provided above the fixed charge film 28 and the embedded film 29 that are embedded one by one in the groove section 27 that is formed on the back surface side of the substrate 22, and is formed in the same layer as the color filter layer 33. That is, the light shielding film 80 is disposed so as to shield light at the border regions of the color filter layer 33 between adjacent pixels 2. In addition, the light shielding film 80 is formed so that at least a portion thereof is embedded in the embedded film 29 that is embedded in the groove section 27. Furthermore, in the modification example of the present embodiment, the depth of the embedding of the light shielding film 80 is set to above the opening end of the groove section 27 provided in the substrate 22.
  • the color filter layer 33 is formed on the upper surface of the embedded film 29 and in the same layer as the light shielding film 80, and for example, is formed to correspond to R (red), G (green) and B (blue) for each pixel.
  • the color filter layer 33 light of a predetermined wavelength is transmitted, and the transmitted light is input into the photoelectric conversion section 35 of the substrate 22.
  • the photoelectric conversion sections 35 of each pixel are also isolated by the element isolation section 31 in the solid-state imaging device 71 that uses such a configuration, it is possible to suppress electronic color mixing (the generation of blooming).
  • the light shielding film 80 is formed so that at least a portion thereof is embedded in the embedded film 29.
  • the distance between the substrate 22 and the collecting lens 34 of each pixel is reduced, and it is possible to obtain the same effects as those of the present embodiment such as the ability to suppress degradations in focusing property and diagonal input light.
  • FIGS. 10A and 10B are process drawings that show a method for producing a solid-state imaging device according to a modified example.
  • Figs. 10A and 10B portions that correspond to Figs. 4A to 7F are given the same reference symbols and duplicate description thereof has been omitted.
  • the processes up until the groove section 27 is formed are the same as the processes described using Figs. 4A to 7F, the method is described for the processes that take place thereafter.
  • the fixed charge film 28 is formed so as to cover the inner wall surface of the groove section 27 and the back surface of the substrate 22.
  • This fixed charge film 28 is formed in the same manner as that in the first embodiment.
  • the embedded film 29 is also formed on the upper surface of the fixed charge film 28 of the back surface side of the substrate 22.
  • the thickness of the light shielding film 80 that is formed on the upper surface of the embedded film 29 is formed to be the same thickness as the color filter layer 33 that is formed by the following process.
  • the solid-state imaging device 71 that is shown in Fig. 9 is completed by forming the color filter layer 33 using a common method.
  • the solid-state imaging device 71 since light is dispersed by the front surface of the color filter layer 33 for each pixel by isolating the color filter layer 33 with the light shielding film 80, it is possible to collect light even if the collecting lens is not provided. Since the photoelectric conversion sections 35 of each pixel are also isolated by the element isolation section 31 in the solid-state imaging device 71 that uses such a configuration, it is possible to suppress electronic color mixing (the generation of blooming). In addition, since it is possible to collect light even if the collecting lens is not provided, pupil correction is not necessary, and an improvement in spectrum, light focusing and sensitivity can be achieved.
  • the light shielding film 80 is formed so that at least a portion thereof is embedded in the embedded film 29.
  • the distance between the substrate 22 and the collecting lens 34 of each pixel is reduced, and it is possible to obtain the same effects as those of the present embodiment such as the ability to suppress degradations in focusing property and diagonal input light.
  • FIG. 11A a planar layout of the central portion of a region that includes four pixels of the solid-state imaging device according to the first embodiment is shown
  • Fig. 11B a cross section configuration drawing along the line A-B in Fig. 11A is shown
  • Fig. 11C a cross section configuration drawing along the line B-C in Fig. 11A is shown.
  • the cross section along the line A-B that is indicated in Fig. 11A is set as a first cross section and the cross section along the line B-C is set as a second cross section. That is, the first cross section is a cross section that cuts the pixels 2 that are disposed in a two-dimensional matrix in the horizontal direction (or the vertical direction) and the second cross section is a cross section that cuts the pixels 2 in the diagonal direction.
  • the light shielding film 30 forms a shape that is embedded in the embedded film 29 by forming the groove section 27 that has an uneven section 15.
  • the distance between pixels is larger than that of the first cross section that is shown in Fig. 11B.
  • a width w4 of the opening of the groove section 27 is wider than the width w2 of the opening of groove section 27 in first cross section. That being the case, in a case in which the embedded film 29 is formed to conform to the inside of the groove section 27, the depth of the concave portion 44 that is formed on the front surface of the embedded film 29 is deeper in the second cross section than in the first cross section.
  • the depth y2 of the embedding of the light shielding film 30 in the second cross section is deeper than the depth y1 of the embedding of the light shielding film 30 of the first cross section (y1 ⁇ y2).
  • Fig. 12A is a planar layout of the central portion of a region that includes four pixels of the solid-state imaging device according to a second embodiment of the present disclosure.
  • Fig. 12B is a cross section configuration drawing along the line A-B in Fig. 12A and
  • Fig. 12C is a cross section configuration drawing along the line B-C in Fig. 12A.
  • Fig. 13 is a cross section configuration drawing along the line A-B-C in Fig. 12A.
  • a solid-state imaging device 91 of the present embodiment is an example in which the configurations of the groove section that is formed on the substrate 22 and the element isolation section that is formed in the groove section differ from those of the first embodiment. Therefore, in Figs. 12A to 12C and Fig. 13, portions that correspond to Fig. 2 are given the same reference symbols and duplicate description thereof has been omitted.
  • the solid-state imaging device 91 of the present embodiment is a backside-illuminated CMOS solid-state imaging device. Since the overall configuration of the solid-state imaging device 91 of the present embodiment is the same as that of Fig. 1, a drawing thereof has been omitted.
  • the cross section along the line A-B that is indicated in Fig. 12A is set as a first cross section and the cross section along the line B-C is set as a second cross section.
  • an element isolation section 81b in the second cross section is configured by a fixed charge film 28, an embedded film 29 and a light shielding film 90b that are formed one by one embedded in a groove section 87b that is formed in the depth direction from the back surface of the substrate 22.
  • the groove section 87b in the second cross section is formed from the back surface of the substrate 22 in the depth direction, and since for example, the groove section 87b is made to be uniform with a width w5 of the opening of the groove section 87a in the first cross section, the configuration is one in which the uneven section 15 is not provided.
  • the groove section 87a in the first cross section is formed in the depth direction from the back surface side of the substrate 22 in the same manner as the groove section 27 in the solid-state imaging device according to a first embodiment, and is configured to have an uneven section 15 in the side wall surface thereof.
  • the side wall surface from the open end of the groove section 87a to the uneven section 15 and the side wall surface from the uneven section 15 to the bottom surface of the groove section 87a are formed in a tapered manner so that the width of the opening thereof becomes gradually smaller.
  • the groove section 87b is formed in the depth direction from the back surface of the substrate 22, and has a configuration in which the uneven section 15 is not provided.
  • the groove section 87b is formed so that the cross-sectional shape thereof is tapered.
  • the widths w5 of the openings of the groove section 87a in the first cross section and the groove section 87b in the second cross section almost identical by only providing the uneven section 15 in the groove section 87a in the first cross section that is formed on the back surface side of the substrate 22.
  • the element isolation section 81a in the first cross section and the element isolation section 81b in the second cross section uniform, and in addition, the spectrum design is simple since it is possible to make the light shielding performance with respect to light shielding uniform.
  • the light shielding films 90a and 90b are formed above the open ends of the groove section 87a and the groove section 87b that are provided in the substrate 22, it is possible to suppress deteriorations in image quality and the generation of a dark current that result from film stress. In addition to the above, it is possible to obtain the same effects as those of the first embodiment.
  • Figs. 14A to 15D are process drawings that show a method for producing a solid-state imaging device according to the second embodiment of the present disclosure. Additionally, Figs. 14A to 15D are cross section configuration drawings along the line A-B-C of the planar layout in Fig. 11A, the left side in the drawings is set as the cross section (first cross section) between A-B, and the right side is set as the cross section (second cross section) between B-C. Portions that correspond to Figs. 4A to 5C are given the same reference symbols and duplicate description thereof has been omitted. In addition, in the present embodiment, since the processes up until the groove section is formed are the same as the processes described using Figs. 4A to 5C, the method is described from the processes that take place thereafter.
  • second cross section is a region in which a groove section that extends in the horizontal direction of the pixel and a groove section that extends in the vertical direction of the pixel intersect. Therefore, the width w5 of the opening of the groove section 87b that is formed in the second cross section is formed to be wider than the width w1 of the opening of groove section 87a that is formed in the first cross section.
  • a photoresist 66 is formed to have an opening that exposes the hard mask 65 that is provided in the periphery of the open end of the groove section 87a in the first cross section.
  • the width w5 of the opening of the photoresist 66 is set to the same extent as the width w5 of the opening of the groove section 87b in the second cross section that is formed in Fig. 14A.
  • an opening of the width w5 is formed in the hard mask 65 in the second cross section by etching the hard mask 65 through the photoresist 66.
  • the photoresist 66 is formed over the entire surface of the groove.
  • the photoresist 66 is removed, and in the second cross section, the substrate 22 is etched to a predetermined depth through the hard mask 65 of which a portion has been removed.
  • the uneven section 15 is formed on the side wall surface of the groove section 87a in the first cross section only.
  • the width w5 of the opening of the open end side of the groove section 87a in the first cross section becomes the same extent as the width w5 of the opening of the open end side of the groove section 87b in the second cross section.
  • the hard mask 65 that was used in the processing of the groove sections 87a, 87b is removed, and as shown in Fig. 15D, the fixed charge film 28 is formed so as to cover the inner wall surface of the groove sections 87a, 87b and the back surface of the substrate 22.
  • This fixed charge film 28 is formed in the same manner as that of the first embodiment.
  • the embedded film 29 is also formed on the upper surface of the fixed charge film 28 on the back surface side of the substrate 22.
  • the embedded film 29 is formed to substantially conform to the insides of the groove sections 87a, 87b.
  • the widths of the openings of the groove sections 87a, 87b are the same.
  • the amount of the embedding of the embedded film 29 is adjusted to the film thickness that the concave portion 44 above the groove sections 87a, 87b is formed. In this case, the depth of the concave portion 44 that is formed above the groove section 87a and the depth of the concave portion 44 that is formed above the groove section 87b are substantially the same.
  • a light shielding material layer is formed across the entire upper surface of the embedded film 29, and the light shielding material layer above the pixels 2 is removed using lithography.
  • a light shielding films 90a and 90b that are open over the photoelectric conversion section 35 and thatshield light between adjoining pixels 2 are formed.
  • the solid-state imaging device 91 shown in Fig. 13 is completed by forming the planarizing film 32, the color filter layer 33 and the collecting lens 34 using common methods.
  • a solid-state imaging device 91 in which the uneven section 15 is provided in the groove section 87a in the first cross section only, and the respective widths w5 of the openings of the groove sections 87a, 87b in the first cross section and the second cross section are substantially the same, is formed. Further, as a result of this, the amount of the embedding of the embedded film is substantially the same in the groove sections 87a, 87b. Therefore, it is possible to make the depth y1 that the light shielding film 90a is embedded in the embedded film 29 of the groove section 87a and the depth y2 that the light shielding film 90b is embedded in the embedded film 29 of the groove section 87b uniform.
  • the element isolation section 81a in the first cross section and the element isolation section 81b in the second cross section uniform, and in addition, the spectrum design is simple since it is possible to make the light shielding performance with respect to light shielding uniform.
  • the light shielding films 90a and 90b are formed above the opening end of the groove section 87a and 87b provided on the substrate 22, it is possible to suppress deteriorations in image quality and the generation of a dark current that result from film stress. In addition to the above, it is possible to obtain the same effects as those of the first embodiment.
  • the light shielding films 90a and 90b are formed above the opening ends of the groove sections 87a and 87b that are provided on the substrate 22, but the foregoing may be formed embedded below the opening ends. In this case, it is possible to achieve a reduction in film stress by adjusting the light shielding films so that the foregoing are not embedded below the opening ends of the groove section 87a and 87b that are provided on the substrate 22.
  • Fig. 16A is a planar layout of a semiconductor chip.
  • Fig. 16B is a cross section configuration drawing along the line XVIB-XVIB of the guard ring provided in the semiconductor chip.
  • Fig. 16C is a cross section configuration drawing along the line XVIC-XVIC of the guard ring.
  • portions that correspond to Figs. 12B and 12C are given the same reference symbols and duplicate description thereof has been omitted.
  • the structure of the element isolation sections 81a and 81b in the solid-state imaging device 91 of the present embodiment is provided in a portion of a guard ring 96 of a semiconductor chip 95.
  • a cross section along the line XVIB-XVIB of Fig. 16A cuts the guard ring in the horizontal direction (or the vertical direction) and a cross section along the line XVIC-XVIC cuts the guard ring in the diagonal direction.
  • the cross section along the line XVIB-XVIB that is indicated in Fig. 16A is set as a first cross section and the cross section along the line XVIC-XVIC is set as a second cross section.
  • An element isolation section 81a that is used in the present embodiment is provided in the first cross section (between XVIB-XVIB), and an element isolation section 81b that is used in the present embodiment is provided in the second cross section (between B-B). As a result of this, it is possible to obtain a crack prevention effect.
  • Fig. 17 is a planar layout of the central portion of a region that includes four pixels of the solid-state imaging device according to a third embodiment of the present disclosure.
  • Fig. 18 is a cross section configuration drawing along the line XVIII-XVIII in Fig. 17. In Fig. 18, portions that correspond to Fig. 3 are given the same reference symbols and duplicate description thereof has been omitted.
  • a solid-state imaging device 101 of the present embodiment is a backside-illuminated CMOS solid-state imaging device. Since the overall configuration of the solid-state imaging device 101 of the present embodiment is the same as that of Fig. 1, a drawing thereof has been omitted.
  • the solid-state imaging device 101 of the present embodiment is an example in which the configurations of a groove section 107 and an element isolation section 111 differ from those of the solid-state imaging device 1 according to the first embodiment.
  • the groove section 107 is formed from the back surface of the substrate 22 in the depth direction.
  • the element isolation section 111 is configured by a fixed charge film 28 and an embedded film 29 that are formed one by one embedded in the groove section 107 that is formed from the back surface of the substrate 22 in the depth direction.
  • a light shielding film 100 provided above the open end of the groove section 107 that is provided on the substrate 22, and is formed embedded in the embedded film 29.
  • the light shielding film 100 is formed above the open end of the groove section 107 provided on the substrate 22, and embedded in the embedded film 29. As a result of this, it is possible to obtain the same effects as those of the first embodiment such as the ability to reduce optical color mixing as a result of diagonal input light.
  • Figs. 19A to 20D are process drawings that show a method for producing a solid-state imaging device according to the third embodiment of the present disclosure. Additionally, Figs. 19A to 20D are cross sections along the lines XIX-XIX and XX-XX of the planar layout in Fig. 17. In Figs. 19A to 20D, portions that correspond to Figs. 4A to 5C are given the same reference symbols and duplicate description thereof has been omitted. In the present embodiment, since the processes up until the groove section is formed are the same as the processes described using Figs. 4A to 5C, the method is described from the processes that take place thereafter.
  • a groove section 107 of a predetermined depth is formed at the border of each pixel of the substrate 22, that is, in a portion in which the pixel isolation layer 39 is formed by selectively etching from the back surface of the substrate 22 in the depth direction.
  • the process that forms the groove section 107 forms a hard mask 65 that has a predetermined opening on the back surface side of the substrate 22, and forms the groove section 107 by dry etching through the hard mask 65.
  • the depth of the groove section 107 is formed in the same manner as that of the first embodiment.
  • the hard mask 65 that was used in the processing of the groove section 107 is removed, and the fixed charge film 28 is formed so as to cover the inner wall surface of the groove section 107 and the back surface of the substrate 22.
  • This fixed charge film 28 is formed in the same manner as that of the first embodiment.
  • the embedded film 29 is also formed on the upper surface of the fixed charge film 28 on the back surface side of the substrate 22.
  • a concave portion 108 is formed in the embedded film 29 above the open end of the groove section 107 by lithography or dry etching for example.
  • a light shielding material layer is formed across the entire upper surface of the embedded film 29, and the light shielding material layer other than the light shielding material layer that is formed inside the groove section 107 is removed by etch back.
  • the light shielding film 100 is only formed inside the groove section 107.
  • the solid-state imaging device 101 shown in Fig. 18 is completed by forming the color filter layer 33.
  • the light shielding film 100 is formed above the open end of the groove section 107 that is provided on the substrate 22 and embedded in the embedded film 29.
  • FIG. 21 is a cross section configuration drawing of the main portions of a solid-state imaging device according to a modification example.
  • portions that correspond to Fig. 9 are given the same reference symbols and duplicate description thereof has been omitted.
  • the light shielding film 110 is formed above the fixed charge film 28 and the embedded film 29 that are embedded one by one in the groove section 107 that is formed on the back surface side of the substrate 22, and is formed in the same layer as the color filter layer 33.
  • the light shielding film 110 is disposed so as to shield light at the border regions between adjacent pixels 2 (between adjoining photoelectric conversion sections 35).
  • the light shielding film 110 is provided above the open end of the groove section 107 provided on the substrate 22, and is formed embedded in the embedded film 29.
  • the color filter layer 33 is formed on the upper surface of the embedded film 29 and in the same layer as the light shielding film 110, and for example, is formed to correspond to R (red), G (green) and B (blue) for each pixel.
  • the color filter layer 33 light of a predetermined wavelength is transmitted, and the transmitted light is input into the photoelectric conversion section 35 of the substrate 22.
  • FIG. 22 is a cross section configuration drawing of an electronic apparatus according to a fourth embodiment of the present disclosure.
  • An electronic apparatus 131 of the present embodiment includes a solid-state imaging device 134, an optical lens 132, a mechanical shutter 133, a drive circuit 136 and a signal processing circuit 135.
  • the electronic apparatus 131 of the present embodiment shows an embodiment of a case in which the abovementioned solid-state imaging device 1 in the first embodiment of the present disclosure is used in an electronic apparatus (a camera) as the solid-state imaging device 134.
  • the optical lens 132 provides images of image light (input light) from a photographic subject on an imaging surface of the solid-state imaging device 134. As a result of this, a corresponding signal charge is stored inside the solid-state imaging device 134 for a fixed period.
  • the mechanical shutter 133 controls the light irradiation periods and the light shielding periods of the solid-state imaging device 134.
  • the drive circuit 136 supplies a drive signal that controls the transfer operation of the solid-state imaging device 134.
  • the signal transfer of the solid-state imaging device 134 is performed as a result of the drive signal (timing signal) that is supplied from the drive circuit 136.
  • the signal processing circuit 135 performs various signal processes. An image signal on which signal processing has been performed is recorded in a recording medium such as memory or is output to a monitor.
  • the solid-state imaging device 134 of the electronic apparatus 131 electronic color mixing (suppression of blooming) due to the element isolation section that is formed in a deep position.
  • the electronic apparatuses 131 in which the solid-state imaging device 134 can be applied are not limited to cameras, and application in digital cameras, and imaging apparatuses such as camera modules for mobile apparatuses of mobile phones and the like is also possible.
  • the present disclosure has been described by showing embodiments thereof in the abovementioned first to fourth embodiments, but the present disclosure is not limited thereto, and various modifications are possible provided they are within a range that does not deviate from the object of the disclosure.
  • a solid-state imaging device including a substrate, a plurality of photoelectric conversion sections that are provided on the substrate, a groove section that has an uneven section provided such that the width of the opening thereof becomes smaller in the depth direction of the substrate, and an element isolation section which is provided between adjacent photoelectric conversion sections and includes an embedded film which is embedded in the groove section so as to cover the inner wall surface of the groove section and a light shielding film which is provided directly above the groove section and at least a portion of which is embedded in the embedded film.
  • the solid-state imaging device according to (1) in which the element isolation section is formed in a grid so as to surround each photoelectric conversion section.
  • the solid-state imaging device according to any one of (1) to (4), in which the light shielding film is disposed so as to shield light at the border regions between adjoining photoelectric conversion sections, and the depth at which the light shielding film is embedded in embedded films that are positioned between photoelectric conversion sections that are adjacent in the horizontal direction and the vertical direction becomes substantially the same as the depth at which the light shielding film is embedded in embedded films that are positioned between photoelectric conversion sections that are adjacent in the diagonal direction.
  • (6) The solid-state imaging device according to any one of (1) to (5), in which a film that is contact with the inner wall surface of the groove section has a fixed charge.
  • the solid-state imaging device includes a color filter layer that is disposed on top of the substrate for each pixel, and the light shielding film is provided so as to define the color filter layer for each pixel.
  • the solid-state imaging device according to any one of (1) to (7), in which the film that has a fixed charge is formed using hafnium oxide, aluminum oxide, zirconium oxide, tantalum oxide, titanium oxide, lanthanum oxide, praseodymium oxide, cerium oxide, neodymium oxide, promethium oxide, samarium oxide, europium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, holmium oxide, erbium oxide, thulium oxide, ytterbium oxide, lutetium oxide, yttrium oxide, hafnium nitride, aluminum nitride, hafnium oxynitride or aluminum oxynitride.
  • a method for producing a solid-state imaging device including step of forming a plurality of photoelectric conversion sections on the substrate, a step of forming a groove section that has an uneven section provided such that the width of the opening thereof becomes smaller in the depth direction of the substrate between adjacent photoelectric conversion sections, and a step of forming an element isolation section which includes an embedded film which is embedded in the groove section so as to cover the inner wall surface of the groove section and a light shielding film which is provided directly above the groove section and at least a portion of which is embedded in the embedded film.
  • An electronic apparatus including a solid-state imaging device that includes a substrate, a plurality of photoelectric conversion sections that are provided on the substrate, a groove section that has an uneven section provided such that the width of the opening thereof becomes smaller in the depth direction of the substrate, and an element isolation section which is provided between adjacent photoelectric conversion sections and includes an embedded film which is embedded in the groove section so as to cover the inner wall surface of the groove section and a light shielding film which is provided directly above the groove section and at least a portion of which is embedded in the embedded film, and a signal processing circuit that processes output signals that are output by the solid-state imaging device.
  • a solid-state imaging device comprising: a substrate; a plurality of pixels formed in the substrate; a plurality of grooves formed in the substrate, wherein the grooves are located in pixel isolation regions between adjacent pixels, and wherein the grooves extend from a first surface of the substrate towards a second surface of the substrate; and an embedded film that extends into the grooves, and wherein at least one of: 1) at least some of the grooves include a first stage nearer the first surface of the substrate and a second stage nearer the second surface of the substrate, wherein the first and second stages are defined by walls of the grooves, wherein the first stage is wider than the second stage, and wherein a step is present between the first and second stages; and 2) the device further includes a light shielding film adjacent the first surface of the substrate that overlies the grooves, and wherein at least a portion of the light shielding film is embedded in the embedded film that extends into the grooves.
  • the film that is in contact with the walls of the grooves is a fixed charge film;
  • the grooves include a first stage nearer the first surface of the substrate and a second stage nearer the second surface of the substrate, wherein the first and second stages are defined by walls of the grooves, wherein the first stage is wider than the second stage, and wherein a step is present between the first and second stages.
  • the grooves having the first profile and the grooves having the second profile include first and second stages, and wherein the at least the first stage of the first profile is wider than the first stage of the second profile.
  • the device includes a light shielding film adjacent the first surface of the substrate that overlies the grooves, and wherein at least a portion of the light shielding film is embedded in the embedded film that extends into the grooves.
  • the grooves having the second profile include a first stage nearer the first surface of the substrate and a second stage nearer the second surface of the substrate, and wherein the light shielding film is embedded in the embedded film by a first distance with respect to grooves having the first profile and a second distance with respect to grooves having the second profile.
  • the embedded film has a first width with respect to grooves having the first profile and a second distance with respect to grooves having the second profile.
  • the device includes a light shielding film adjacent the first surface of the substrate that overlies the grooves, and wherein at least a portion of the light shielding film is embedded in the embedded film that extends into the grooves.
  • the embedded film is formed from a material that has a refractive index that is different from that of the fixed charge film.
  • the embedded film is formed from at least one of silicon oxide, silicon nitride, silicon oxynitride, and a resin.
  • the embedded film is formed from a material that has a small positive fixed charge.
  • An electronic apparatus comprising: a solid-state imaging device; and a signal processor which receives signal from the solid-state imaging device, the solid-state imaging device comprising: a substrate; a plurality of pixels formed in the substrate; a plurality of grooves formed in the substrate, wherein the grooves are located between adjacent pixels, and wherein the grooves extend from a first surface of the substrate towards a second surface of the substrate; a film that extends into and contacts walls of the grooves and that lies on the first surface of the substrate; and an embedded film that extends into the grooves and that is in contact with the film that extends into and contacts walls of the grooves and that lies on the first surface of the substrate, and wherein at least one of: 1) at least some of the grooves include a first stage nearer the first surface of the substrate and a second stage nearer the second surface of the substrate, wherein the first stage is wider than the second stage; and 2) the device further includes a light shielding film adjacent the first surface of the substrate that overlies the grooves, and wherein
  • the film that extends into and contacts walls of the grooves is formed from at least one of a hafnium oxide, an aluminum oxide, a zirconium oxide, a tantalum oxide, a titanium oxide , lanthanum oxide, praseodymium oxide, cerium oxide, neodymium oxide, promethium oxide, samarium oxide, europium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, holmium oxide, erbium oxide, thulium oxide, ytterbium oxide, lutetium oxide and yttrium oxide.
  • a method of producing a solid-state imaging device comprising: forming a plurality of photoelectric conversion sections in a first substrate; forming a wiring layer on a front surface of the first substrate; forming a second substrate on the wiring layer; forming a groove section from a back surface of the first substrate; forming a dielectric film, wherein the dielectric film covers walls of the groove and the back surface of the first substrate; forming an embedded film over the dielectric film; forming a light shielding film at least over the embedded film in the groove; ; and forming at least one of: 1) an uneven section in the groove section, where at least one step is formed in the groove section; and 2) a buried portion of the light shielding film in the embedded film.

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  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
PCT/JP2013/004534 2012-08-03 2013-07-25 Solid-state imaging device, method for producing solid-state imaging device and electronic apparatus Ceased WO2014020871A1 (en)

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KR1020207017435A KR102237324B1 (ko) 2012-08-03 2013-07-25 고체 촬상 장치, 고체 촬상 장치의 제조 방법 및 전자 기기
US14/417,590 US9748296B2 (en) 2012-08-03 2013-07-25 Solid-state imaging device, method for producing solid-state imaging device and electronic apparatus
CN201380039862.9A CN104508821B (zh) 2012-08-03 2013-07-25 固态成像装置、制造固态成像装置的方法和电子设备
KR1020157002058A KR102126095B1 (ko) 2012-08-03 2013-07-25 고체 촬상 장치, 고체 촬상 장치의 제조 방법 및 전자 기기
US15/656,873 US10229947B2 (en) 2012-08-03 2017-07-21 Solid-state imaging device, method for producing solid-state imaging device and electronic apparatus
US16/265,634 US10748949B2 (en) 2012-08-03 2019-02-01 Solid-state imaging device, method for producing solid-state imaging device and electronic apparatus

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US9748296B2 (en) 2017-08-29
US10229947B2 (en) 2019-03-12
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