WO2014015458A1 - 一种带有防止金属扩散保护层的复合衬底 - Google Patents

一种带有防止金属扩散保护层的复合衬底 Download PDF

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Publication number
WO2014015458A1
WO2014015458A1 PCT/CN2012/079009 CN2012079009W WO2014015458A1 WO 2014015458 A1 WO2014015458 A1 WO 2014015458A1 CN 2012079009 W CN2012079009 W CN 2012079009W WO 2014015458 A1 WO2014015458 A1 WO 2014015458A1
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Prior art keywords
layer
gan
substrate
composite substrate
single crystal
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PCT/CN2012/079009
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English (en)
French (fr)
Inventor
孙永健
张国义
童玉珍
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东莞市中镓半导体科技有限公司
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Priority to PCT/CN2012/079009 priority Critical patent/WO2014015458A1/zh
Priority to US14/380,070 priority patent/US9276165B2/en
Priority to EP12881591.7A priority patent/EP2824719A4/en
Priority to KR1020147016163A priority patent/KR101652919B1/ko
Priority to JP2015523359A priority patent/JP6017035B2/ja
Publication of WO2014015458A1 publication Critical patent/WO2014015458A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/20—Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403—AIII-nitrides
    • C30B29/406—Gallium nitride
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24777—Edge feature

Definitions

  • the present invention relates to a substrate for epitaxial growth of GaN, and more particularly to an efficient composite substrate with a metal diffusion preventing layer. Background technique
  • III/V nitrides dominated by GaN and InGaN and AlGaN are semiconductor materials of recent interest, with a 1.9-6.2 eV continuously variable direct band gap, excellent physical and chemical stability, and high saturation electron mobility. Etc. characteristics make it the most preferred material for optoelectronic devices such as lasers, light-emitting diodes, and the like.
  • the epitaxial film of the GaN-based LED is generally grown on a substrate such as sapphire substrate, SiC or Si due to the lack of a GaN substrate.
  • the epitaxial growth technology of GaN material systems is basically based on heterogeneous heteroepitaxial technology.
  • the main problems are: 1. Due to the large lattice mismatch and thermal stress mismatch between GaN and sapphire, the misfit dislocation of 10 9 cm _ 2 is caused, which seriously affects the crystal quality and reduces the luminous efficiency of the LED. And the service life; 2.
  • Sapphire is an insulator.
  • the resistivity at room temperature is greater than ⁇ ⁇ , so that it is impossible to fabricate a vertical structure.
  • the ⁇ -type and ⁇ -type electrodes can be fabricated on the upper surface of the epitaxial layer. Therefore, the effective light-emitting area is reduced, and the photolithography and etching processes in the device preparation are increased, so that the utilization rate of the material is lowered. 3.
  • the thermal conductivity of the sapphire is not good, and the thermal conductivity at 100 ° C is about 0.25 W. /cm K, which has a great influence on the performance of GaN-based devices, especially in large-area high-power devices, the heat dissipation problem is very prominent; 4.
  • the crystal constant is the closest to GaN lattice constant
  • the lattice mismatch is small, but also heteroepitaxial, there are also misfit dislocations and thermal misfit dislocations, and SiC lining
  • the bottom cost is expensive and there are significant difficulties in the application of GaN-based LED devices.
  • the Si substrate is also a GaN-based epitaxial substrate that has been studied in recent years.
  • the lattice mismatch of Si substrate and GaN is larger than that of sapphire substrate, and the Si substrate is cubic crystal orientation, and GaN is hexagonal crystal. This increases the difficulty of epitaxial GaN material on it.
  • the GaN layer grown on the Si substrate faces serious problems such as cracking, and the growth thickness is hard to exceed 4 ⁇ m. Therefore, for crystal epitaxy, both the theoretical theory of epitaxial growth and the history of semiconductor epitaxial technology have proved that homoepitaxial epitaxy is the best choice.
  • people began to develop GaN single crystal substrate preparation technology the emergence of GaN single crystal substrate, GaN epitaxial regression of homoepitaxial growth, can improve the crystal quality of epitaxial GaN crystal, and better thermal conductivity of GaN crystal
  • the conductive characteristics enable LED epitaxial wafers epitaxially grown using GaN substrates to be directly fabricated into vertical structure LED devices, thereby improving the performance of the device under high current injection.
  • the object of the present invention is to provide a high-efficiency composite substrate which can be directly used for growing GaN epitaxial wafers, which not only needs the homogenous epitaxy required for GaN epitaxy, but also improves the crystal quality, and can directly prepare vertical structure LEDs, and can be greatly reduced.
  • the cost, and at the same time effectively avoid the pollution problem caused by the diffusion and volatilization of the metal material during the high temperature growth of MOCVD to the experimental equipment.
  • the composite substrate for GaN growth of the present invention comprises a thermally conductive layer and a GaN single crystal layer on the thermally conductive layer, characterized in that at least a side wall of the composite substrate is coated with a protective layer for preventing metal diffusion.
  • the composite substrate of the present invention comprises a substrate body composed of at least two layers of material and a protective layer for preventing metal diffusion which does not completely enclose the substrate body (which is required to expose the surface of the GaN single crystal layer for GaN growth).
  • the composite substrate first comprises a thermal conductive layer 2 on which a layer of GaN single crystal 1 is bonded, and an outer layer of the metal diffusion preventing protective layer 3 which is not completely wrapped. .
  • the above thermally conductive layer has a thickness of from 10 ⁇ m to 3000 ⁇ m, preferably from 50 ⁇ m to 400 ⁇ m.
  • the material selected for the thermally conductive layer needs to satisfy the following characteristics: (1) The melting point exceeds 1000 ° C, or it can be substantially maintained at 1000 ° C; (2) It has high thermal conductivity and electrical conductivity.
  • the thermally conductive layer material may be selected from elemental metals or alloys or quasi-alloys, such as metal W, metal Ni, metal Mo, metal Pd, metal Au, metal Cr, etc., or any two or two of the above metals.
  • the thermally conductive material may also be a Si crystal, a SiC crystal or an AlSi crystal or the like.
  • the GaN layer on the thermally conductive layer has a thickness of from 0.1 ⁇ m to 100 ⁇ m, preferably from 1 ⁇ m to 20 ⁇ m. GaN The layer exists in a single crystal form.
  • the thermally conductive conductive material is connected to the GaN crystal by rigid or flexible bonding. If the bond is a rigid van der Waals force bond, the thermal expansion coefficient of the material of the thermally conductive conductive layer is required to be close to that of GaN, where the similarity means that the thermal expansion coefficient is within 10%, and the thermally conductive material and GaN are conductive. There is no medium between the crystals. It is also possible to bond the thermally conductive layer to the GaN layer via a flexible medium.
  • the medium is required to have a melting point of more than 1000 ° C, and has a certain ductility, which can relax the stress, preferably an AuAu bond having a thickness of 0.5 ⁇ m to 5 ⁇ m, or a metal W, Pd or M. Wait for high temperature metal bonding.
  • the metal medium bonding having the above thickness can relax the thermal mismatch stress between the GaN and the thermally conductive layer due to the difference in thermal expansion coefficient. Therefore, the flexible medium bonding method is used, and the thermal expansion coefficient of the thermally conductive layer is not required. Same and similar to GaN.
  • the composite substrate of the present invention has a protective layer structure design that is not completely wrapped and that prevents metal diffusion.
  • the selection of the protective layer material has the following requirements: First, the material needs to withstand no decomposition or melting within 1100 ° C; Second, the material cannot be metal, and cannot be volatile. Preferred materials thereof are Si0 2 , Si 3 N 4 SiC, GaN or A1N.
  • the protective layer has a thickness of from 20 nm to 5 ⁇ m, preferably from 100 nm to 2 ⁇ m.
  • the protective layer is designed to be incompletely wrapped, and the package is mainly composed of the following six types:
  • the protective layer 3 only wraps the sidewall of the composite substrate, as shown in FIG. 2;
  • the protective layer 3 covers both the sidewalls of the composite substrate and is wrapped around the surface of the surface of the GaN layer 1 by a distance of 1 - 10 mm, preferably covering a surface of the surface of the GaN layer 1 by a width of 1 - 5 mm, as shown in FIG. ;
  • the protective layer 3 covers both the side wall of the composite substrate and is wrapped around the edge of the bottom surface of the thermally conductive layer 2 by a distance of l-10 mm, preferably wrapped around the bottom edge of the thermally conductive layer 2 by a width of 1 - 5 mm, as shown in FIG.
  • the protective layer 3 covers both the sidewall of the composite substrate and is wrapped around the surface edge of the GaN layer 1 and the edge of the bottom surface of the thermally conductive layer 2, which is 1-10 mm wide, preferably wrapping the surface edge of the GaN layer 1 and conducting heat.
  • An area of the bottom surface of the conductive layer 2 that is l-5 mm wide, as shown in FIG. 5;
  • the protective layer 3 covers both the sidewalls of the composite substrate and covers the entire bottom surface of the thermally conductive layer 2, as shown in FIG.
  • the sixth layer covers both the sidewalls of the composite substrate, and covers the entire bottom surface of the thermally conductive layer 2 and the surface of the surface of the GaN layer by a depth of l-10 mm, wherein the width of the region is preferably 1-5 mm, as shown in FIG. Show.
  • the design of the metal diffusion protection layer is particularly important.
  • the main body of the composite substrate according to the present invention has a multilayer structure including at least a GaN layer and a thermally conductive layer double layer structure, which are connected by a bonding layer.
  • the thermally conductive layer used in the present invention is preferably made of a metal material including metal W, metal Ni, metal Mo, metal Pd, metal Au, metal Cr or the like, or an alloy thereof.
  • the material used in the bonding layer is mostly AuAu. Combined with high temperature metal bonding such as metal W, Pd or Ni. Some of these metallic materials, especially gold, are highly diffuse elements at high temperatures.
  • GaN epitaxial wafer epitaxy needs to be performed in high precision metal organic vapor phase epitaxy (MOCVD) equipment.
  • MOCVD metal organic vapor phase epitaxy
  • the diffusion of these metals can cause contamination of the reaction chamber of the device, thereby damaging the device, which brings great difficulties to the application of the composite substrate. Therefore, the design of an external protective layer that prevents high-temperature diffusion of metals is particularly important.
  • the first four protection design schemes in the present invention are mainly used to prevent the diffusion property of the metal material selected by the thermally conductive conductive layer from being strong, and the metal material diffusion of the bonding layer is seriously caused.
  • the fifth and sixth schemes are mainly used to prevent the diffusion of the metal material selected from the thermally conductive layer and the metal material of the bonding layer to cause serious problems.
  • the second, sixth, and sixth protective layer structures are designed to protect the surface of the GaN surface primarily to prevent GaN edge cracking during growth.
  • the composite substrate may further have a reflective layer located inside, bottom or bottom surface of the GaN single crystal layer, and the bottom surface of the GaN single crystal layer refers to a connection between the GaN single crystal layer and the thermally conductive layer one side.
  • the reflective layer may be located at a bonding layer between the thermally conductive layer and the GaN layer near one end of the GaN layer (ie, between the bonding layer and the GaN layer), as shown in FIG. 7; or in the GaN layer, as shown in FIG. Shown. If the reflective layer is located at one end of the bonding layer adjacent to the GaN layer, the reflective layer may be a metal reflective layer such as a metal reflective layer such as Pd or Cr. If the reflective layer is located inside the GaN layer or at the bottom of the GaN layer, the reflective layer may be a periodic or quasi-periodic structure having a grating or photonic lattice structure, as shown in FIG.
  • the grating structure refers to a micron-scale periodic structure
  • the photonic lattice structure refers to a nano-scale periodic structure, which may be periodic conical protrusions or pits, truncated protrusions or pits. , cylindrical protrusions or dimples, triangular pyramidal protrusions or dimples, or other periodic protrusions or dimples of any shape.
  • Fig. 5 shows a periodic structure of a triangular pyramid pit, and (b) shows a periodic structure of a cylindrical pit.
  • the microstructural period of the micron- or nano-scale periodic structure may be from 10 nm to 50 ⁇ m, preferably from 200 nm to 10 ⁇ m.
  • w and d represent the maximum width and depth of the pit, respectively, and A represents the structural period, where A > w.
  • the grating structure refers to a micron-order periodic structure
  • the photonic lattice structure refers to a nano-scale periodic structure, which may be a periodic conical protrusion or a pit, a truncated protrusion or a pit, Cylindrical protrusions or dimples, triangular pyramidal protrusions or dimples, or other periodic protrusions or dimples of any shape.
  • Fig. 10 shows a periodic structure of a triangular pyramid pit
  • (b) shows a periodic structure of a cylindrical pit.
  • the structure period of the micro- or nano-scale periodic structure may be 10 ⁇ 50 ⁇ , preferably 200 ⁇ 10 ⁇ .
  • w and d represent the maximum width and depth of the pit, respectively, and A represents the structural period, where A > w.
  • the micron- or nano-scale periodic structure as a reflective layer is usually made of a material having a high temperature resistance (melting point above 1000 ° C) and a refractive index different from that of GaN, for example, Si0 2 , SiN, etc. can pass through a crystal mode.
  • the material grown or grown in a film-forming manner forms a periodic structure embedded in the GaN single crystal layer. Since these materials and GaN have different refractive indices, an effective total reflection interface is formed, and the periodic structure effectively increases the average refractive index of the interface.
  • the periodic structure at the bottom of the GaN layer is not formed of a material different from GaN, but only a periodic pattern formed on the bottom surface of the GaN layer, and such a periodic pattern can also function as a reflective layer.
  • the reflective layer design plays a very important role in the GaN-based device epitaxially grown using the composite substrate of the present invention.
  • the composite substrate of the present invention can be directly used for epitaxial growth of GaN epitaxial wafers, and further, a vertical structure LED device is prepared. Compared with traditional technology, it has very obvious advantages.
  • the growth of the prior art sapphire substrate is compared.
  • the sapphire substrate is the most commonly used substrate for GaN epitaxial wafer growth.
  • the sapphire substrate is not electrically conductive and non-conductive. It is difficult to prepare vertical structure LED devices for GaN grown on sapphire substrates, and most of them are prepared as planar structure LEDs, which is not conducive to heat dissipation. , cannot be prepared as a high power device.
  • the sapphire substrate is a hetero-substrate with GaN, the growth quality of GaN is limited, and it is impossible to prepare a high-quality GaN epitaxial wafer.
  • the composite substrate of the present invention has significant advantages over sapphire substrates.
  • the composite substrate has a GaN layer. Therefore, the GaN epitaxial wafer grown on the composite substrate belongs to homoepitaxial growth, which can significantly improve the crystal quality of the grown GaN epitaxial wafer, thereby improving the internal quantum efficiency.
  • the use of the thermally conductive layer in the composite substrate enables the GaN epitaxial wafer grown by the composite substrate to be directly fabricated into a vertical structure LED device according to the conventional chip process, without being restricted by the substrate being unable to conduct heat conduction and conduction, and Limits increase the efficiency of the device.
  • the GaN epitaxial wafers grown on the substrate are heteroepitaxial, which is not conducive to the quality of the grown GaN crystal.
  • the epitaxial growth of GaN grown thereon requires the insertion of a plurality of layers of AlGaN to adjust the stress, and the thickness of GaN grown thereon is difficult to exceed 3-4 ⁇ m.
  • SiC lining Although the bottom is similar to the lattice constant of the GaN crystal, it is difficult to be widely used in GaN-based high-power LED devices because the SiC crystal itself is very difficult to prepare and has a high cost.
  • the composite substrate of the present invention has the main advantage that the composite substrate belongs to homoepitaxial growth, and can improve the crystal quality of the GaN epitaxial wafer, thereby obtaining a wider application.
  • the GaN single crystal substrate is a homoepitaxial substrate with respect to the GaN single crystal substrate, and is homogenously epitaxial with the composite substrate of the present invention, and the epitaxial growth of the two substrates can be greatly improved.
  • GaN crystal quality compared with the high cost of the GaN single crystal substrate, the composite substrate of the present invention uses a raw material which is a cheaper heat conductive conductive material and has a thickness of only one to one quarter of a thickness of the GaN single crystal substrate. The price is much lower than that of the GaN single crystal substrate, so it has a broader application prospect.
  • the use of the protective layer effectively avoids the contamination problem of the experimental equipment caused by the diffusion of the thermally conductive layer, the bonding layer and/or the reflective layer of the metallic material during the high temperature growth of the MOCVD.
  • FIG. 1 is a schematic structural view of a composite substrate of the present invention.
  • FIG. 2 is a schematic view showing the structure of a composite substrate sidewall wrap preventing metal diffusion protective layer.
  • Fig. 3 is a schematic view showing the structure of the side wall of the composite substrate and a part of the surface covering metal diffusion preventing layer.
  • FIG. 4 is a structural schematic view of a side wall of a composite substrate and a portion of a bottom surface of the composite substrate to prevent metal diffusion protection.
  • Fig. 5 is a schematic view showing the structure of the side wall of the composite substrate and a part of the surface and the bottom surface of the metal diffusion preventing protective layer.
  • Fig. 6 is a schematic view showing the structure of the side wall of the composite substrate and a part of the surface and the entire bottom surface of the metal diffusion preventing protective layer.
  • Figure 7 is a schematic view showing the structure of the reflective layer in the composite substrate bonding layer near the GaN-end.
  • Figure 8 is a schematic view showing the structure of the reflective layer in the GaN layer of the composite substrate.
  • Figure 9 is a schematic diagram of the periodic structure of a reflective layer grating or a photonic lattice.
  • Fig. 10 is a schematic view showing the periodic structure in which the reflective layer is in the shape of a triangular pyramid pit (a) or a cylindrical pit (b).
  • Figure 11 is a schematic diagram of the LED active layer illuminating stereoscopic light exiting angle and the surface emitting light cone.
  • FIG. 12 is a flow chart of fabricating a GaN/WCu composite substrate having a reflective layer structure and a sidewall having a protective layer in a GaN layer, in which: (a) is a second step of GaN on a 4 micron GaN/sapphire substrate. Schematic diagram of preparing a Si0 2 periodic reflection layer; (b) is a schematic diagram of continuing to grow GaN to GaN to a total thickness of 10 ⁇ m by using HVPE technology in the third step; (c) is obtained in the fourth step after being processed in Si On the substrate Schematic diagram of the structure of the GaN layer of the reflective layer structure; (d) is a schematic structural view of the finally obtained GaN/WCu composite substrate.
  • Figure 13 is a schematic view showing the step of bonding the Si substrate by 502 glue and laser-peeling the sapphire substrate in the fourth step of the first embodiment.
  • Fig. 14 is a view showing the steps of the fifth step of the high temperature bonding and the high temperature dropping of the Si substrate in the first embodiment.
  • Figure 15 is a schematic view showing the structure of a GaN/MoCu composite substrate prepared in Example 2.
  • Figure 16 is a flow chart showing the fabrication of a GaN/MoCu composite substrate having a metal reflective layer in Example 3, wherein: (a) is a third step of vapor-depositing a Pd metal reflection on a GaN single crystal layer bonded to a Si substrate. A schematic diagram of the structure obtained by the layer; (b) is a schematic structural view of a GaN/MoCu composite substrate having a Pd metal reflective layer and coated with a protective layer by NiNi bonding.
  • FIG. 17 is a flow chart of a composite substrate in which a Si substrate van der Waals bonded GaN layer is formed in Embodiment 4, wherein: (a) is a third step of preparing a Si0 2 cylindrical period on a GaN surface of a GaN/sapphire substrate. Schematic diagram of the structure; (b) is the schematic diagram of the fourth step of making the reflective layer and continuing to grow GaN to GaN to a total thickness of 50 ⁇ m by HVPE technology; (c) is the fifth step of forming sapphire/GaN by Van der Waals bonding Schematic diagram of the Si structure; (d) is a schematic diagram of the sixth step of obtaining a GaN/Si composite substrate by laser lift-off.
  • Figure 18 is a schematic view showing the structure of a GaN/SiC composite substrate prepared in Example 5.
  • Figure 19 is a schematic view showing the structure of a GaN/AISi composite substrate prepared in Example 6.
  • Figure 20 is a schematic view showing the structure of a GaN/WCu composite substrate prepared in Example 7.
  • Example 1 WCu metal substrate AuAu bonded GaN layer metal composite substrate
  • a 4 inch thick GaN single crystal epitaxial wafer 1 was grown using a 2 inch 430 micrometer thick flat sapphire substrate 6 using MOCVD techniques well known to those skilled in the art.
  • a layer of 1 ⁇ m thick Si0 2 is grown on the surface of the GaN single crystal grown by PECVD.
  • the GaN surface is exposed at the pitch of the conical pattern. This periodic structure can be used as a reflective layer.
  • the above GaN single crystal in which the reflective layer structure is prepared is continuously grown to a total thickness of 10 ⁇ m to GaN by using the HVPE technique well known to those skilled in the art, as shown in Fig. 12(b).
  • the GaN surface of the above-mentioned grown GaN single crystal is bonded to a 2-inch 400-micron single crystal Si substrate 7 using 502 quick-drying glue, and the Si substrate 7 is used as a transfer supporting substrate, and then passed through the present.
  • the laser lift-off technique well known to those skilled in the art peels off the sapphire substrate, leaving only the GaN single crystal bonded to the Si substrate.
  • the transfer and lift-off process is as shown in Fig. 13, and the obtained Si substrate is provided.
  • the structure of the GaN layer of the reflective layer structure is as shown in Fig. 12(c).
  • the fifth step 1 ⁇ m of Au is vapor-deposited simultaneously on the GaN surface of the GaN single crystal on the Si substrate and the surface of the WCu alloy substrate. It was then bonded together at a pressure of 5 tons at 300 ° C for 15 minutes. After the bonding is completed, the 502 quick-drying glue is carbonized at a high temperature, so the connection between the Si substrate and the GaN/WCu composite substrate is automatically separated, as shown in FIG.
  • a SiO 2 film protective layer having a thickness of 500 nm is grown on the front, back, and sides of the substrate by PECVD, and then the sidewall of the substrate is protected by using a photoresist, and the substrate is etched away using a BOE solution.
  • the SiO 2 surface and the bottom SiO 2 film leave only the sidewall protection portion.
  • a composite substrate as shown in Fig. 12 (d) is obtained by surface cleaning, and the substrate comprises a 150 ⁇ m thick WCu alloy metal substrate 2, and the mass ratio of W to Cu is 15% to 85%. Bonded by AuAu bonding to a 10 micron thick GaN single crystal.
  • the bonding layer 4 Au has a thickness of 2 ⁇ m.
  • the substrate has a 500 nm thick SiO 2 side protective layer 3 which is designed as described in the first aspect of the invention.
  • a reflective layer pattern 5' is included at about 4 microns of the GaN layer 1 near the bonding layer 4.
  • the pattern structure is shown in Fig. 12, which is a conical SiO 2 pattern layer structure having a period of 3 ⁇ m, a height of 1 ⁇ m, and a bottom diameter of 2.5 ⁇ m.
  • Example 2 Metal composite substrate of AuCu bonded GaN layer on MoCu metal substrate
  • a 4 micron thick GaN single crystal epitaxial wafer was grown using a 2 inch 430 micron thick flat sapphire substrate using MOCVD techniques well known to those skilled in the art.
  • a 1 ⁇ m thick SiO 2 film is grown on the surface of the grown GaN single crystal by PECVD, and a thin layer of SiO 2 is prepared by photolithography and dry etching techniques well known to those skilled in the art.
  • a conical periodic structure with a period of 3 microns, a bottom diameter of 2.5 microns, and a height of 1 micron, see Figure 12 (a).
  • Conical graphics The GaN surface is exposed at a distance. This periodic structure can be used as a reflective layer.
  • the above GaN single crystal in which the reflective layer structure is prepared is continuously grown to a total thickness of 10 ⁇ m to GaN single crystal using a HVPE technique well known to those skilled in the art, see Fig. 12(b).
  • the GaN face of the above-mentioned grown GaN single crystal was bonded to a 2-inch 400-micron single crystal Si substrate using a 502 quick-drying adhesive, and a Si substrate was used as a transfer supporting substrate.
  • the sapphire substrate is then stripped off by laser lift-off techniques well known to those skilled in the art, leaving only the GaN single crystal bonded to the Si substrate.
  • Preparation Process As shown in Figure 13, the prepared product is shown in Figure 12 (c).
  • the fifth step 1 ⁇ m of Au is vapor-deposited simultaneously on the GaN surface of the GaN single crystal on the Si substrate and the surface of the MoCu alloy substrate. It was then bonded together at a pressure of 5 tons at 300 ° C for 15 minutes. After the bonding is completed, the 502 quick-drying adhesive is carbonized at a high temperature, so that the connection between the Si substrate and the GaN/WCu composite substrate is automatically separated.
  • a Si 3 N 4 thin film protective layer having a thickness of 2 ⁇ m is grown on the front side and the side surface of the substrate by PECVD, and then the substrate sidewall and the GaN surface edge are protected by a photoresist in a range of 5 mm.
  • the remaining portion of the substrate GaN surface and the entire bottom surface of the Si 3 N 4 film were etched away using the BOE solution leaving only the sidewalls and the 5 mm portion of the GaN surface edge.
  • a composite substrate as shown in Fig. 15 having a 150 ⁇ m thick MoCu alloy metal substrate 2 having a mass ratio of Mo to Cu of 20% to 80% can be obtained. Bonded to a layer of 10 ⁇ m thick GaN single crystal 1 by AuAu bonding.
  • the bonding layer 4 Au has a thickness of 2 ⁇ m.
  • the substrate has a thickness of 2 microns and a side surface portion of the Si 3 N 4 protective layer 3, the protective layer of the invention is designed SUMMARY The second design.
  • a reflective layer pattern 5' is included at about 4 microns of the GaN layer 1 near the bonding layer 4.
  • the pattern structure is a conical SiO 2 pattern layer structure with a period of 3 micrometers, a height of 1 micrometer, and a bottom diameter of 2.5 micrometers.
  • Example 3 MoCu metal substrate NiNi bonded GaN layer metal composite substrate
  • a 4 micron thick GaN single crystal epitaxial wafer was grown using a 2 inch 430 micron thick flat sapphire substrate using MOCVD techniques well known to those skilled in the art.
  • the GaN surface of the above-mentioned grown GaN single crystal is bonded to a 2-inch 400-micron single crystal Si substrate using a 502 fast-drying adhesive, and the Si substrate is used as a transfer supporting substrate, and then through the prior art.
  • the laser lift-off technique known to the person strips off the sapphire substrate leaving only the GaN single crystal bonded to the Si substrate, see Figure 13.
  • a reflective layer 5 200 nm of Pd metal is deposited as a reflective layer 5 on the GaN surface of the GaN single crystal on the Si substrate, as shown in Fig. 16 (a).
  • the GaN single crystal on the Si substrate on which the reflective layer is evaporated is deposited on the reflective layer and the MoCu alloy lining
  • the bottom surface was simultaneously vapor-deposited with 2 ⁇ m of Ni, and then bonded together at 85 ° C under a pressure of 15 tons for 15 minutes.
  • the bonding process is shown in Fig. 14.
  • the 502 quick-drying adhesive is carbonized at a high temperature, so the connection between the Si substrate and the GaN/WCu composite substrate is automatically separated.
  • a Si 3 N 4 thin film protective layer having a thickness of 50 ⁇ m is grown on the front side and the side surface of the substrate by PECVD, and then the substrate sidewall and the bottom surface of the MoCu substrate are 5 mm in thickness using a photoresist. Protection, using the BOE solution to etch away the remaining portion of the substrate GaN surface and the entire bottom surface of the Si 3 N 4 film leaving only the sidewalls and the 5 mm portion of the bottom edge of the MoCu substrate.
  • a composite substrate as shown in Fig. 16 (b) is obtained by surface cleaning, and the substrate comprises a 150 ⁇ m thick MoCu alloy metal substrate 2, and the mass ratio of Mo to Cu is 20% to 80%. Bonded together by a MNi bond and a layer of 4 ⁇ m thick GaN single crystal 1 .
  • the bonding layer 4 Ni has a thickness of 4 ⁇ m.
  • the substrate has a 50 nm thick side and a partial bottom Si 3 N 4 protective layer 3, which is designed as a third design as described in the Summary of the Invention.
  • a layer of Pd metal reflective layer 5 is included adjacent to the bonding layer 4 of the GaN layer 1.
  • Example 4 Composite substrate of a van der Waals bonded GaN layer on a Si substrate
  • a 4 micron thick GaN single crystal epitaxial wafer was grown using a 2 inch 430 micron thick flat sapphire substrate using MOCVD techniques well known to those skilled in the art.
  • the above GaN single crystal is continuously grown to a total thickness of 46 ⁇ m from GaN to GaN single crystal using the HVPE technique well known to those skilled in the art.
  • a 1 ⁇ m thick SiO 2 film is grown on the surface of the grown GaN single crystal by PECVD, and a thin layer of SiO 2 is prepared by photolithography and dry etching techniques well known to those skilled in the art.
  • the period is 3 micrometers
  • the bottom diameter is 2 micrometers
  • the cylindrical periodic structure 5' is 1 micron high, as shown in Fig. 17 (a).
  • the GaN surface is exposed at the pitch of the cylindrical pattern. This periodic structure can be used as a reflective layer.
  • the above-mentioned GaN single crystal in which the reflective layer structure is prepared is continuously grown using HVPE technology to a total thickness of GaN to GaN single crystal of 50 ⁇ m, as shown in Fig. 17 (b).
  • the prepared GaN crystal having a reflective layer structure and a 400 micron thick Si wafer are bonded together at a temperature of 900 ° C under a pressure of 20 tons and a direct van der Waals bond for 30 minutes to form a sapphire/
  • a structural sample such as GaN/Si is shown in Figure 17 (c)
  • the sapphire substrate is stripped off by a laser lift-off technique well known to those skilled in the art, leaving only the GaN/Si bonded composite substrate structure.
  • the thickness of the front side and the side of the substrate are grown to 5 ⁇ m using PECVD technology.
  • the SiO 2 film protective layer is then protected with a photoresist to cover the substrate sidewalls and the GaN surface and the bottom surface of the Si substrate by 5 mm.
  • the BOE solution is used to etch away the substrate GaN surface and the rest of the Si substrate underside and throughout.
  • the bottom SiO 2 film leaves only the sidewalls and the GaN surface and the 5 mm portion of the bottom surface of the Si substrate.
  • a composite substrate as shown in Fig. 17 (d) which comprises a 400 ⁇ m thick Si single crystal substrate 7, bonded by van der Waals force and a layer of 50 ⁇ m thick.
  • the GaN single crystal 1 is bonded together.
  • the substrate has a 5 micron thick side and a portion of the GaN surface and a Si substrate bottom surface SiO 2 protective layer 3, the protective layer design being a fourth design as described in the Summary of the Invention.
  • a reflective layer pattern 5' is included at 4 microns near the bonding surface of the GaN layer 1.
  • the pattern structure is a cylindrical Si0 2 pattern layer structure with a period of 3 micrometers, a height of 1 micrometer, and a bottom-bottom diameter of 2 micrometers.
  • Example 5 Composite substrate of SiC substrate PdPd bonded GaN layer
  • a 4 micron thick GaN single crystal epitaxial wafer was grown using a 2 inch 430 micron thick flat sapphire substrate using MOCVD techniques well known to those skilled in the art.
  • a 1 ⁇ m thick SiO 2 film is grown on the surface of the grown GaN single crystal by PECVD, and a thin layer of SiO 2 is prepared by photolithography and dry etching techniques well known to those skilled in the art.
  • a conical periodic structure with a period of 3 microns, a bottom diameter of 2.5 microns, and a height of 1 micron, see Figure 12 (a).
  • the GaN surface is exposed at the pitch of the conical pattern. This periodic structure can be used as a reflective layer.
  • the above GaN single crystal in which the reflective layer structure is prepared is continuously grown to a total thickness of 10 ⁇ m using HVPE technology well known to those skilled in the art, as shown in Fig. 12 (b).
  • the GaN surface of the above-mentioned grown GaN single crystal is bonded to a 2-inch 400-micron single crystal Si substrate using 502 fast-drying adhesive, and the Si substrate is used as a transfer supporting substrate, and then through the prior art.
  • the laser lift-off technique known to the person peels off the sapphire substrate, leaving only the GaN single crystal bonded to the Si substrate, as shown in FIG.
  • the fifth step 1 ⁇ m of Pd was simultaneously evaporated on the GaN surface of the GaN single crystal on the Si substrate and the surface of the SiC substrate of 200 ⁇ m thick. It was then bonded together at 800 ° C under a pressure of 8 tons over 15 minutes. After the bonding is completed, the 502 quick-drying glue is carbonized at a high temperature, and therefore, the connection between the Si substrate and the GaN/SiC composite substrate is automatically separated.
  • a SiO 2 film protective layer having a thickness of 500 nm is grown on the front side and the side surface of the substrate by PECVD, and then the substrate sidewall and the SiC substrate are all protected by a photoresist, and the BOE solution is used. The SiO 2 film on the surface of the substrate GaN is etched away leaving only the sidewalls and the entire bottom portion of the SiC substrate.
  • a composite substrate as shown in FIG. 18 can be obtained by surface cleaning, and the substrate includes a layer of 200 ⁇ m thick.
  • the SiC single crystal substrate 8 is bonded by a PdPd bond and a 10 ⁇ m thick GaN single crystal 1 .
  • the bonding layer 4 Pd has a thickness of 2 ⁇ m.
  • the substrate has a 500 nm thick side and a full bottom SiO 2 protective layer 3, which is designed as a fifth design as described in the Summary of the Invention.
  • a reflective layer pattern 5' is included at about 4 microns of the GaN layer 1 near the bonding layer 4.
  • the pattern structure is a conical SiO 2 pattern layer structure with a period of 3 micrometers, a height of 1 micrometer, and a bottom diameter of 2.5 micrometers.
  • Example 6 Composite substrate of AuSi substrate AuAu bonded GaN layer
  • a 6-micron thick GaN single crystal epitaxial wafer was grown using a 2 inch 430 micron thick flat sapphire substrate using MOCVD techniques well known to those skilled in the art.
  • a 1 ⁇ m thick SiO 2 film is grown on the surface of the grown GaN single crystal by PECVD, and a thin layer of SiO 2 is prepared by photolithography and dry etching techniques well known to those skilled in the art.
  • a cylindrical periodic structure with a period of 3 microns, a bottom diameter of 2 microns, and a height of 1 micron, see Figure 17 (a).
  • the GaN surface is exposed at the pitch of the cylindrical pattern. This periodic structure can be used as a reflective layer.
  • the above GaN single crystal in which the reflective layer structure is prepared is continuously grown to a total thickness of 10 ⁇ m using HVPE technology well known to those skilled in the art, as shown in Fig. 17 (b). .
  • the sapphire substrate is stripped off by a laser lift-off technique well known to those skilled in the art, leaving only the GaN/AISi bonded composite substrate structure.
  • a SiO 2 film protective layer having a thickness of up to 500 nm is grown on the front side and the side of the substrate by PECVD, and then the substrate sidewall, the entire bottom surface of the AlSi substrate, and the GaN surface edge 2 are formed using a photoresist.
  • the SiO 2 film of the GaN surface of the substrate portion is etched away using the BOE solution, leaving only the entire bottom surface of the sidewall AlSi substrate and the 2 mm portion of the GaN surface edge.
  • a composite substrate as shown in Fig. 19 having a 200 ⁇ m thick AlSi single crystal substrate 9 having an Al composition of 30% and a Si composition of 70% was obtained. Bonded to a layer of 10 ⁇ m thick GaN single crystal 1 by AuAu bonding.
  • the bonding layer 4 Au has a thickness of 4 ⁇ m.
  • the substrate has a 500 nm thick side and a full bottom surface and a GaN surface edge 2 mm SiO 2 protective layer 3, the protective layer design being a sixth design as described in the Summary of the Invention.
  • a reflective layer pattern 5' is included at about 4 microns of the GaN layer adjacent to the bonding layer 4.
  • the pattern structure is a cylindrical SiO 2 pattern layer structure having a period of 3 micrometers, a height of 1 micrometer, and a bottom diameter of 2 micrometers.
  • Example 7 Non-reflective layer composite substrate of WCu metal substrate AuAu bonded GaN layer
  • a 4 micron thick GaN single crystal epitaxial wafer was grown using a 2 inch 430 micron thick flat sapphire substrate using MOCVD techniques well known to those skilled in the art.
  • the above GaN single crystal is continuously grown to a total thickness of 10 ⁇ m from GaN to GaN single crystal using the HVPE technique well known to those skilled in the art.
  • the GaN surface of the above-mentioned grown GaN single crystal is bonded to a 2-inch 400-micron single crystal Si substrate using 502 fast-drying adhesive, and the Si substrate is used as a transfer supporting substrate, and then through the prior art.
  • the laser lift-off technique known to the person peels off the sapphire substrate, leaving only the GaN single crystal bonded to the Si substrate.
  • the fourth step 1 ⁇ m of Au was vapor-deposited simultaneously on the GaN surface of the GaN single crystal on the Si substrate and the surface of the WCu alloy substrate, and then bonded together at 300 ° C under a pressure of 5 tons for 15 minutes. After the bonding is completed, the 502 quick-drying adhesive is carbonized at a high temperature, so that the connection between the Si substrate and the GaN/WCu composite substrate is automatically separated.
  • a SiO 2 film protective layer having a thickness of up to 500 nm is grown on the front side and the side of the substrate by PECVD, and then the substrate sidewall, the entire bottom surface of the WCu substrate, and the GaN surface edge 2 are grown using a photoresist.
  • the SiO 2 film of the GaN surface of the substrate portion was etched away using the BOE solution, leaving only the entire bottom surface of the sidewall WCu substrate and the 2 mm portion of the GaN surface edge.
  • a composite substrate as shown in Fig. 20 was obtained by surface cleaning, and the substrate comprises a 150 ⁇ m thick WCu alloy metal substrate 2, and the mass ratio of W to Cu was 15% to 85%. Bonded to a 10 ⁇ m thick GaN single crystal 1 by AuAu bonding.
  • the bonding layer 4 Au has a thickness of 2 ⁇ m.
  • the substrate has a 500 nm thick side and a full bottom surface and a GaN surface edge 2 mm SiO 2 protective layer 3, the protective layer design being a sixth design as described in the Summary of the Invention.

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Abstract

提供了一种带有防止金属扩散保护层的复合衬底，包括一熔点大于1000°C的导热导电层（2）和位于该导热导电层（2）上的GaN单晶层（1），至少在复合衬底的侧壁包裹有防止金属扩散的保护层（3）。该复合衬底既兼顾了GaN外延所需要的同质外延，提高了晶体质量，又可以直接制备垂直结构LED，且大幅降低了成本，同时有效避免了金属材料在MOCVD高温生长时的扩散挥发给实验设备带来的污染问题。

Description

技术领域
本发明涉及用于 GaN外延生长的衬底， 特别涉及一种带有防止金属扩散保护层的 高效复合衬底。 背景技术
以 GaN和 InGaN、 AlGaN为主的 III/V氮化物是近年来备受关注的半导体材料， 其 1.9-6.2eV连续可变的直接带隙， 优异的物理、 化学稳定性， 高饱和电子迁移率等等 特性， 使其成为激光器、 发光二极管等等光电子器件的最优选材料。
然而对于现在的 GaN基半导体材料器件来讲， 由于缺少 GaN衬底， 通常 GaN基 LED的外延膜主要是生长在蓝宝石衬底、 SiC或 Si等衬底上。 到目前为止， GaN材料 体系的外延生长技术， 基本是基于大失配的异质外延技术。 应用最为广泛， 专利保护 最多的， 主要是蓝宝石衬底的异质外延技术。其主要问题是： 1. 由于 GaN和蓝宝石之 间有较大的晶格失配和热应力失配，由此造成 109cm_2的失配位错，严重影响晶体质量， 降低 LED的发光效率和使用寿命； 2. 蓝宝石是绝缘体， 常温下电阻率大于 ΙΟ^Ω η, 这样就无法制作垂直结构的器件， 通常只能在外延层上表面制作 Ν型和 Ρ型电极。 因 此使有效发光面积减小， 同时增加了器件制备中的光刻和刻蚀工艺过程， 使材料的利 用率降低； 3. 蓝宝石的导热性能不好，在 100°C热导率约为 0.25 W/cm K,这对于 GaN 基器件的性能影响很大， 特别是在大面积大功率器件中， 散热问题非常突出； 4. 在 GaN—基激光器（LD) 的制作中， 由于蓝宝石硬度很高， 并且蓝宝石晶格与 GaN晶格 之间存在一个 30度的夹角， 所以难于获得 InGaN LD外延层的解理面， 也就不能通过 解理的方法得到 InGaN— LD的腔面。
而对于 SiC衬底来说，虽然其晶体常数与 GaN晶格常数最为相近，晶格失配较小， 但同样是异质外延， 同样存在失配位错及热失配位错， 且 SiC衬底造价昂贵， 在 GaN 基 LED器件的应用中存在明显困难。 Si衬底也是近些年开始研究的 GaN基外延衬底， 然而 Si衬底与 GaN的晶格失配度相较蓝宝石衬底还要大， 并且 Si衬底为立方晶向， GaN为六方晶向，这更增加了在其上外延 GaN材料的困难，目前在 Si衬底生长的 GaN 层面临开裂等严重问题， 生长厚度很难超过 4微米。 因此， 对于晶体外延而言， 无论从外延生长的理论上， 还是半导体外延技术的发 展历史， 都已经证明， 同质外延是最佳选择。 近期， 人们开始开发 GaN单晶衬底制备 技术， GaN单晶衬底的出现， 使得 GaN外延回归了同质外延， 可以很好地提高外延 GaN晶体的晶体质量， 并且， GaN晶体较好的导热导电特性， 使得使用 GaN衬底外延 的 LED外延片可以直接制备为垂直结构 LED器件， 从而提高了器件在大电流注入下 的性能。 然而， GaN单晶衬底高昂的价格直接制约了其在 LED器件的应用。 目前， 一 片 2英寸 GaN单晶衬底价格可以达到 2000美金， 而目前市场一片 2英寸高功率 LED 外延片的价格不超过 100美金， 这样的巨大成本完全限制了 GaN单晶衬底在 LED市 场的应用。 发明内容
本发明的目的在于提供一种可以直接用于生长 GaN外延片的高效复合衬底， 既要 兼顾 GaN外延所需要的同质外延， 提高晶体质量， 又可以直接制备垂直结构 LED, 且 要大幅降低了成本， 同时有效避免金属材料在 MOCVD高温生长时的扩散挥发给实验 设备带来的污染问题。
本发明用于 GaN 生长的复合衬底， 包括一导热导电层和位于该导热导电层上的 GaN单晶层， 其特征在于， 至少在复合衬底的侧壁包裹有防止金属扩散的保护层。
本发明的复合衬底包含至少两层材料构成的衬底主体以及一层未完全包裹衬底主 体 （需要露出用于 GaN生长的 GaN单晶层表面） 的防止金属扩散的保护层。 如图 1 所示， 该复合衬底首先包括一层导热导电层 2， 在该导热导电衬底上键合一层 GaN单 晶 1， 另包含一层未完全包裹的外部防止金属扩散保护层 3。
上述导热导电层厚度为 10微米〜 3000微米， 优选为 50微米〜 400微米。 该导热 导电层所选材料需满足以下特征： （1 )熔点超过 1000°C， 或在 1000°C下可以基本保持 固态； （2) 具有较高的导热特性和导电特性。
按以上要求， 该导热导电层材料可以选择一些单质金属或合金或准合金， 例如金 属 W， 金属 Ni， 金属 Mo， 金属 Pd， 金属 Au， 金属 Cr等， 或以上金属的任意两种或 两种以上的合金，或以上一种、两种或两种以上金属与 Cu的合金，如 WCu合金、 MoCu 合金以及 MCu合金等等材料。 该导热导电材料还可以为 Si晶体、 SiC晶体或 AlSi晶 体等。
在导热导电层上的 GaN层厚度为 0.1微米〜 100微米，优选 1微米〜 20微米。 GaN 层以单晶形式存在。
该导热导电材料与 GaN晶体之间通过刚性或柔性键合方式连接。此键合若为刚性 的范德瓦尔兹力的键合， 则需要导热导电层材料的热胀系数与 GaN相近， 这里的相近 是指热胀系数差别在 10%以内， 且导热导电材料和 GaN晶体间没有任何介质。 也可以 是通过柔性介质将导热导电层与 GaN层键合在一起。 若为柔性介质键合， 则需要该介 质拥有超过 1000°C的熔点， 并且具有一定延展性， 可以弛豫应力， 优选厚度为 0.5微 米〜 5微米的 AuAu键合， 或金属 W、 Pd或 M等高温金属键合。具有上述厚度的金属 介质键合， 可以弛豫 GaN和导热导电层之间由于热涨系数不同所带来的热失配应力， 因此， 使用柔性介质键合方式， 无需导热导电层的热胀系数与 GaN相同和相近。
本发明的复合衬底具有未完全包裹的外部防止金属扩散的保护层结构设计。 该保 护层材料的选取有以下几个要求： 第一， 该材料需可承受 1100°C以内不分解、不熔化； 第二， 该材料不可使用金属， 不能具有挥发性。 其优选材料为 Si02、 Si3N4 SiC、 GaN 或 A1N等。 该保护层的厚度为 20纳米〜 5微米， 优选为 100纳米〜 2微米。 该保护层 设计为不完全包裹方式， 其包裹方式主要有以下六种：
第一种. 该保护层 3只包裹复合衬底的侧壁， 如图 2所示；
第二种. 该保护层 3既包裹复合衬底侧壁，同时包裹到 GaN层 1表面边缘 l-10mm 宽的区域， 优选包裹 GaN层 1表面边缘 l-5mm宽的区域， 如图 3所示；
第三种. 该保护层 3 既包裹复合衬底侧壁， 同时包裹到导热导电层 2 底面边缘 l-10mm宽的区域， 优选包裹导热导电层 2底面边缘 l-5mm宽的区域， 如图 4所示； 第四种. 该保护层 3既包裹复合衬底侧壁， 同时包裹到 GaN层 1表面边缘及导热 导电层 2底面边缘 l-10mm宽的区域， 优选包裹 GaN层 1表面边缘和导热导电层 2底 面边缘 l-5mm宽的区域， 如图 5所示；
第五种. 该保护层 3既包裹复合衬底侧壁， 同时包裹导热导电层 2全部底面， 如 图 1所示；
第六种. 该保护层 3既包裹复合衬底侧壁， 同时包裹导热导电层 2全部底面以及 GaN层表面边缘 l-10mm宽的区域， 其中该区域宽度优选为 l-5mm， 如图 6所示。
该防止金属扩散保护层设计尤为重要。本发明所述的复合衬底的主体为多层结构， 至少包括 GaN层和导热导电层双层结构， 它们之间通过键合层连接。 如前所述， 本发 明所使用的导热导电层优选材料均为金属材料， 其中包括金属 W， 金属 Ni， 金属 Mo， 金属 Pd， 金属 Au， 金属 Cr等， 或其合金。 同样， 键合层使用的材料也多为 AuAu键 合， 或金属 W、 Pd或 Ni等高温金属键合。 这些金属材料中， 有些金属材料， 尤其是 金， 在高温下是扩散性很强的元素。 GaN外延片外延需要在高精密的金属有机气相外 延设备 （MOCVD) 设备中进行。 而这些金属扩散会引起设备反应腔室污染， 从而损 坏设备， 给复合衬底应用带来很大的困难。 因此， 防止金属高温扩散的外部保护层设 计尤为重要。
选择一定厚度的保护层可以有效防止复合衬底在高温时的金属成分扩散。 本发明 中的前四种保护设计方案主要用来防止导热导电层选取的金属材料扩散性质不强， 而 键合层的金属材料扩散严重引起的问题。 第五种和第六种方案主要用来防止导热导电 层选取的金属材料及键合层的金属材料均扩散严重引起问题。 而第二种、 第四种及第 六种保护层结构中针对 GaN表面部分保护的设计， 主要是为了防止生长过程中， GaN 边缘破裂的问题。
进一步的， 该复合衬底内还可具有一反射层， 该反射层位于 GaN单晶层的内部、 底部或底面， 所述 GaN单晶层的底面是指 GaN单晶层与导热导电层连接的一面。 该 反射层可位于导热导电层与 GaN层之间的键合层靠近 GaN层一端 （即键合层与 GaN 层之间）， 如图 7所示； 也可以是位于 GaN层内， 如图 8所示。 若该反射层位于键合 层靠近 GaN层一端， 则该反射层可以为金属反射层， 如 Pd， Cr等金属反射层。 若该 反射层位于 GaN层内部或 GaN层底部， 该反射层可以是具有光栅或光子晶格结构的 周期性或准周期性结构， 如图 9所示。
所述光栅结构是指微米级的周期性结构， 所述光子晶格结构是指纳米级的周期性 结构， 这些周期性结构可以是周期性的圆锥形突起或凹坑、 圆台形突起或凹坑、 圆柱 形突起或凹坑、 三角锥形突起或凹坑， 或者是其他任意形状的周期性突起或凹坑。 如 图 5所示， 其中 （a)显示了一种三角锥凹坑周期性结构， （b)显示了一种圆柱凹坑周 期性结构。 这种微米级或纳米级周期性结构的结构周期可以为 10nm〜50微米， 优选 200nm〜10微米。 图 5中， w和 d分别代表凹坑的最大宽度和深度， A代表结构周期， 其中 A> w。
所述光栅结构是指微米级的周期性结构， 所述光子晶格结构是指纳米级的周期性 结构， 这些周期性结构可以是周期性圆锥形突起或凹坑、 圆台形突起或凹坑、 圆柱形 突起或凹坑、 三角锥形突起或凹坑， 或者是其他任意形状的周期性突起或凹坑。 如图 10所示， 其中 （a)显示了一种三角锥凹坑周期性结构， （b)显示了一种圆柱凹坑周期 性结构。 这种微米级或纳米级周期性结构的结构周期可以为 10ηιη〜50μιη， 优选 200ηιη〜10μιη。 图 10中， w和 d分别代表凹坑的最大宽度和深度， A代表结构周期， 其中 A> w。
作为反射层的微米级或纳米级周期性结构通常是由耐高温 （熔点在 1000°C以上） 的， 折射率与 GaN不同的材料制作而成的， 例如以 Si02、 SiN等能够通过晶体方式生 长或镀膜方式生长的材料形成周期性结构， 嵌于 GaN单晶层内。 由于这些材料和 GaN 折射率不同， 从而形成有效的全反射界面， 且周期性结构有效提高了界面的平均折射 率。
在一些情况下， 位于 GaN层底部的周期性结构并非由不同于 GaN的材料形成， 而 仅仅是在 GaN层底面形成的周期性图形， 这样的周期性图形也能起到反射层的作用。
该反射层设计对于用本发明所述复合衬底外延生长的 GaN基器件具有非常重要的 作用。 通常在其上外延的发光器件， 有源层发光会向 360度出射， 如图 11所示。 若没 有该反射层设计， 而该发光材料近 40%射向导热导电层方向的光都会被衬底吸收而不 能出射， 因此， 采用带有反射层设计的衬底材料以将光提取效率提高至少 30%以上。 本发明所述复合衬底可以直接用于 GaN外延片外延生长， 并进而制备垂直结构 LED器件。 与传统技术相比， 其有非常明显的优点。
首先， 对比现有技术的蓝宝石衬底生长。 现今蓝宝石衬底是 GaN外延片生长的最 常用衬底， 然而， 蓝宝石衬底不导电不导热， 在蓝宝石衬底生长的 GaN很难制备垂直 结构 LED器件， 大多制备为平面结构 LED, 不利于散热， 无法制备为高功率器件。 另 外， 蓝宝石衬底由于和 GaN为异质衬底， GaN生长质量受到限制， 无法制备高质量的 GaN外延片。
本发明的复合衬底相较蓝宝石衬底有明显优势。一方面，复合衬底有一层 GaN层， 因此， 在复合衬底生长 GaN外延片属于同质外延生长， 可以明显提高生长 GaN外延 片的晶体质量， 从而提高内量子效率。 两一方面， 复合衬底中导热导电层的使用， 可 以使利用复合衬底生长的 GaN外延片直接按传统芯片工艺制备为垂直结构 LED器件， 而不受衬底无法导热导电的制约， 更大限度提高了器件的效率。
其次， 相对于现有技术的 Si衬底生长和 SiC衬底生长。 这两种衬底虽然由于其导 热导电性， 在其衬底生长的 GaN外延片都可以直接制备垂直结构 LED, 但两者均为异 质外延， 不利于生长的 GaN晶体质量提高。 尤其是 Si衬底， 在其上生长的 GaN外延 需要插入多层 AlGaN调节应力， 且在其上生长的 GaN厚度很难超过 3-4微米。 SiC衬 底虽然和 GaN晶体晶格常数较为相近，但由于 SiC晶体本身制备非常困难，造价很高， 所以很难被广泛应用在 GaN基高功率 LED器件。 本发明所述复合衬底相对这两种衬 底， 主要优势体现在复合衬底属于同质外延生长， 可以很好的提高 GaN外延片的晶体 质量， 从而获得更广阔的应用。
再次， 相对于 GaN单晶衬底而言， GaN单晶衬底为同质外延衬底， 与本发明所述 复合衬底同为同质外延， 应用该两种衬底的外延生长可以大幅提高 GaN晶体质量。 但 是相较 GaN单晶衬底高昂的造价， 本发明所述复合衬底使用原材料为更为廉价的导热 导电材料和厚度仅为 GaN单晶衬底四百分之一到四分之一的厚度，价格远远低于 GaN 单晶衬底， 因此具有更广阔的应用前景。
最后， 保护层的使用有效避免了金属材料的导热导电层、 键合层和 /或反射层在 MOCVD高温生长时的金属扩散挥发给实验设备带来的污染问题。
附图说明
图 1是本发明复合衬底的结构示意图。
图 2是复合衬底侧壁包裹防止金属扩散保护层的结构示意图。
图 3是复合衬底侧壁及部分表面包裹防止金属扩散保护层的结构示意图。
图 4是复合衬底侧壁及部分底面包裹防止金属扩散保护层的结构示意图。
图 5是复合衬底侧壁及部分表面和底面包裹防止金属扩散保护层的结构示意图。 图 6 是复合衬底侧壁及部分表面及整体底面包裹防止金属扩散保护层的结构示意 图。
图 7是反射层位于复合衬底键合层靠近 GaN—端的结构示意图。
图 8是反射层位于复合衬底 GaN层内的结构示意图。
图 9是反射层光栅或光子晶格周期性结构示意图。
图 10是反射层为三角锥凹坑 （a) 或圆柱凹坑 （b) 形状的周期性结构示意图。 图 11是 LED有源层发光立体出光角以及表面出光光锥的示意图。
图 12是实施例 1制作 GaN层内具有反射层结构且侧壁具有保护层的 GaN/WCu 复合衬底的流程图，其中： （a)是第二步在 4微米 GaN/蓝宝石衬底的 GaN面制备 Si02 周期反射层的示意图； （b) 是第三步制作反射层后利用 HVPE技术继续生长 GaN至 GaN总厚度达到 10微米的示意图； （c) 是第四步加工后得到了位于 Si衬底上的具有 反射层结构的 GaN层结构示意图； （d) 是最后获得的 GaN/WCu复合衬底的结构示意 图。
图 13是实施例 1第四步通过 502胶粘接 Si衬底及激光剥离蓝宝石衬底的步骤示 意图。
图 14是实施例 1第五步高温键合以及 Si衬底高温脱落步骤示意图。
图 15是实施例 2制备的 GaN/MoCu复合衬底结构示意图。
图 16是实施例 3制作具有金属反射层的 GaN/MoCu复合衬底的流程图，其中： （a) 是第三步在粘结于 Si衬底上的 GaN单晶层上蒸镀 Pd金属反射层所得结构的示意图； (b) 是通过 NiNi键合获得具有 Pd金属反射层， 并包覆了保护层的 GaN/MoCu复合 衬底的结构示意图。
图 17是实施例 4制作 Si衬底范德瓦尔兹键合 GaN层的复合衬底的流程图，其中： ( a) 是第三步在 GaN/蓝宝石衬底的 GaN面制备 Si02圆柱形周期结构的示意图； （b) 是第四步制作反射层后利用 HVPE技术继续生长 GaN至 GaN总厚度达到 50微米的示 意图； （c)是第五步通过范德瓦尔兹键合形成蓝宝石 /GaN/Si结构的示意图； （d)是第 六步通过激光剥离获得 GaN/Si复合衬底的示意图。
图 18是实施例 5制备的 GaN/SiC复合衬底结构示意图。
图 19是实施例 6制备的 GaN/AISi复合衬底结构示意图。
图 20是实施例 7制备的 GaN/WCu复合衬底结构示意图。
图中：
1 GaN层， 2 导热导电层， 3—保护层， 4一键合层， 5—反射层， 5'—反射层图 形结构， 6—蓝宝石衬底， 7— Si衬底， 8— SiC单晶衬底， 9 AlSi单晶衬底。 具体实施方式
下面结合附图， 通过实施例对本发明进行详细描述， 但这并非是对本发明的限制， 本领域技术人员根据本发明的基本思想， 可以做出各种修改或改进， 只要不脱离本发 明的基本思想， 均在本发明的范围之内。
实施例 1 : WCu金属衬底 AuAu键合 GaN层的金属复合衬底
第一步， 使用 2英寸 430微米厚的平板蓝宝石衬底 6， 利用本领域技术人员所熟 知的 MOCVD技术生长 4微米厚的 GaN单晶外延片 1。
第二步， 利用 PECVD技术在上述生长的 GaN单晶表面生长一层 1微米厚的 Si02 薄膜， 并利用本领域技术人员所熟知的光刻以及干法刻蚀技术将 Si02薄层制备成周期 为 3微米， 底径 2.5微米， 高 1微米的圆锥形周期结构 5'， 如图 12 (a)所示。 圆锥图 形间距处要露出 GaN表面。 这一周期性结构即可以作为反射层使用。
第三步， 将制备好反射层结构的上述 GaN单晶继续使用本领域技术人员所熟知的 HVPE技术生长 GaN至 GaN单晶总厚度达到 10微米， 如图 12 (b) 所示。
第四步， 将上述生长好的 GaN单晶的 GaN面使用 502快干胶粘接到 2英寸 400 微米的单晶 Si衬底 7上，使用 Si衬底 7做转移支撑衬底，再通过本领域技术人员所熟 知的激光剥离技术将蓝宝石衬底剥离掉， 只剩下粘接在 Si衬底上的 GaN单晶， 转移 及剥离过程如图 13所示， 得到的位于 Si衬底上的具有反射层结构的 GaN层结构如图 12 (c) 所示。
第五步， 在 Si衬底上的 GaN单晶的 GaN面和 WCu合金衬底表面同时蒸镀 1微 米的 Au。 然后在 300°C， 压力 5吨下， 通过 15分钟键合在一起。 键合完毕后， 502快 干胶会在高温下碳化， 因此， Si衬底和 GaN/WCu复合衬底的连接会自动分离， 如图 14所示。
第六步， 使用 PECVD 技术将该衬底的正面、 反面以及侧面均生长厚度达到 500 纳米的 Si02薄膜保护层， 然后使用光刻胶将衬底侧壁保护， 使用 BOE溶液刻蚀掉衬 底 GaN表面以及底面的 Si02薄膜， 只留下侧壁保护部分。
最后通过表面清洗可以得到如图 12 (d) 所示的复合衬底， 该衬底包括一层 150 微米厚的 WCu合金金属衬底 2， W和 Cu的质量比为 15%比 85%。 通过 AuAu键合和 一层 10微米厚的 GaN单晶键合在一起。该键合层 4 Au厚度为 2微米。该衬底具有 500nm 厚 Si02侧面保护层 3， 该保护层设计如发明内容所述第一种设计方案。在 GaN层 1靠 近键合层 4约 4微米处包括一层反射层图形结构 5'。该图形结构如图 12所示， 为周期 3微米、 高度 1微米、 底径 2.5微米的圆锥形 Si02图形层结构。 实施例 2: MoCu金属衬底 AuAu键合 GaN层的金属复合衬底
第一步， 使用 2英寸 430微米厚的平板蓝宝石衬底， 利用本领域技术人员所熟知 的 MOCVD技术生长 4微米厚的 GaN单晶外延片。
第二步， 利用 PECVD技术在上述生长的 GaN单晶表面生长一层 1微米厚的 Si02 薄膜， 并利用本领域技术人员所熟知的光刻以及干法刻蚀技术将 Si02薄层制备成周期 为 3微米， 底径 2.5微米， 高 1微米的圆锥形周期结构， 参见图 12 (a)。 圆锥图形间 距处要露出 GaN表面。 这一周期性结构即可以作为反射层使用。
第三步， 将制备好反射层结构的上述 GaN单晶继续使用本领域技术人员所熟知的 HVPE技术生长 GaN至 GaN单晶总厚度达到 10微米， 参见图 12 (b)。
第四步， 将上述生长好的 GaN单晶的 GaN面使用 502快干胶粘接到 2英寸 400 微米的单晶 Si衬底上，使用 Si衬底做转移支撑衬底。再通过本领域技术人员所熟知的 激光剥离技术将蓝宝石衬底剥离掉， 只剩下粘接在 Si衬底上的 GaN单晶。 制备过程 如图 13所示， 制备产品如图 12 ( c) 所示。
第五步， 在 Si衬底上的 GaN单晶的 GaN面和 MoCu合金衬底表面同时蒸镀 1微 米的 Au。 然后在 300°C， 压力 5吨下， 通过 15分钟键合在一起。 键合完毕后， 502快 干胶会在高温下碳化， 因此， Si衬底和 GaN/WCu复合衬底的连接会自动分离。
第六步， 使用 PECVD技术将该衬底的正面反面以及侧面均生长厚度达到 2微米 的 Si3N4薄膜保护层， 然后使用光刻胶将衬底侧壁及 GaN表面边缘 5毫米范围保护， 使用 BOE溶液刻蚀掉衬底 GaN表面其余部分以及整个底面的 Si3N4薄膜，只留下侧壁 及 GaN表面边缘 5毫米部分。
最后通过表面清洗可以得到如图 15所示的复合衬底，该衬底包括一层 150微米厚 的 MoCu合金金属衬底 2， Mo和 Cu的质量比为 20%比 80%。 通过 AuAu键合和一层 10微米厚的 GaN单晶 1键合在一起。 该键合层 4 Au厚度为 2微米。 该衬底具有 2微 米厚侧面及部分表面 Si3N4保护层 3， 该保护层设计如发明内容所述第二种设计方案。 在 GaN层 1靠近键合层 4约 4微米处包括一层反射层图形结构 5'。该图形结构为周期 3微米， 高度 1微米， 底径 2.5微米的圆锥形 Si02图形层结构。 实施例 3: MoCu金属衬底 NiNi键合 GaN层的金属复合衬底
第一步， 使用 2英寸 430微米厚的平板蓝宝石衬底， 利用本领域技术人员所熟知 的 MOCVD技术生长 4微米厚的 GaN单晶外延片。
第二步， 将上述生长好的 GaN单晶的 GaN面使用 502快干胶粘接到 2英寸 400 微米的单晶 Si衬底上，使用 Si衬底做转移支撑衬底，再通过本领域技术人员所熟知的 激光剥离技术将蓝宝石衬底剥离掉， 只剩下粘接在 Si衬底上的 GaN单晶， 参见图 13。
第三步， 在 Si衬底上的 GaN单晶的 GaN面蒸镀 200nm Pd金属作为反射层 5， 如 图 16 ( a) 所示。
第四步， 将蒸镀好反射层的在 Si衬底上的 GaN单晶在反射层上和 MoCu合金衬 底表面同时蒸镀 2微米的 Ni， 然后在 800°C， 压力 15吨下， 通过 15分钟键合在一起， 键合工艺参见图 14。键合完毕后， 502快干胶会在高温下碳化，因此， Si衬底和 GaN/WCu 复合衬底的连接会自动分离。
第五步， 使用 PECVD技术将该衬底的正面反面以及侧面均生长厚度达到 50微米 的 Si3N4薄膜保护层，然后使用光刻胶将衬底侧壁及 MoCu衬底底面边缘 5毫米范围保 护， 使用 BOE溶液刻蚀掉衬底 GaN表面其余部分以及整个底面的 Si3N4薄膜， 只留下 侧壁及 MoCu衬底底面边缘 5毫米部分。
最后通过表面清洗可以得到如图 16 (b) 所示的复合衬底， 该衬底包括一层 150 微米厚的 MoCu合金金属衬底 2， Mo和 Cu的质量比为 20%比 80%。 通过 MNi键合 和一层 4微米厚的 GaN单晶 1键合在一起。该键合层 4 Ni厚度为 4微米。该衬底具有 50纳米厚侧面及部分底面 Si3N4保护层 3，该保护层设计如发明内容所述第三种设计方 案。 在 GaN层 1靠近键合层 4处包括一层 Pd金属反射层 5。 实施例 4: Si衬底范德瓦尔兹键合 GaN层的复合衬底
第一步， 使用 2英寸 430微米厚的平板蓝宝石衬底， 利用本领域技术人员所熟知 的 MOCVD技术生长 4微米厚的 GaN单晶外延片。
第二步，将上述 GaN单晶继续使用本领域技术人员所熟知的 HVPE技术生长 GaN 至 GaN单晶总厚度达到 46微米。
第三步， 利用 PECVD技术在上述生长的 GaN单晶表面生长一层 1微米厚的 Si02 薄膜， 并利用本领域技术人员所熟知的光刻以及干法刻蚀技术将 Si02薄层制备成周期 为 3微米， 底径 2微米， 高 1微米的圆柱形周期结构 5'， 如图 17 (a) 所示。 圆柱图 形间距处要露出 GaN表面。 这一周期性结构即可以作为反射层使用。
第四步， 将制备好反射层结构的上述 GaN单晶继续使用 HVPE技术生长 GaN至 GaN单晶总厚度达到 50微米， 如图 17 (b) 所示。
第五步， 将上述制备好的具有反射层结构的 GaN晶体与 400微米厚的 Si片通过 900°C， 20 吨压力下， 30 分钟直接范德瓦尔兹键合粘结在一起， 形成蓝宝石 /GaN/Si 这样的结构样品， 如图 17 (c) 所示
第六步， 通过本领域技术人员所熟知的激光剥离技术将蓝宝石衬底剥离掉， 只剩 下 GaN/Si键合的复合衬底结构。
第七步， 使用 PECVD技术将该衬底的正面反面以及侧面均生长厚度达到 5微米 的 Si02薄膜保护层， 然后使用光刻胶将衬底侧壁及 GaN表面和 Si衬底底面边缘 5毫 米范围保护， 使用 BOE溶液刻蚀掉衬底 GaN表面和 Si衬底底面其余部分以及整个底 面的 Si02薄膜， 只留下侧壁及 GaN表面和 Si衬底底面边缘 5毫米部分。
最后通过表面清洗可以得到如图 17 ( d ) 所示的复合衬底， 该衬底包括一层 400 微米厚的 Si单晶衬底 7， 通过范德瓦尔兹力键合和一层 50微米厚的 GaN单晶 1键合 在一起。 该衬底具有 5微米厚侧面及部分 GaN表面和 Si衬底底面 Si02保护层 3， 该 保护层设计如发明内容所述第四种设计方案。在 GaN层 1靠近键合面 4微米处包括一 层反射层图形结构 5'。 该图形结构为周期 3微米， 高度 1微米， 下底底径 2微米圆柱 形 Si02图形层结构。 实施例 5: SiC衬底 PdPd键合 GaN层的复合衬底
第一步， 使用 2英寸 430微米厚的平板蓝宝石衬底， 利用本领域技术人员所熟知 的 MOCVD技术生长 4微米厚的 GaN单晶外延片。
第二步， 利用 PECVD技术在上述生长的 GaN单晶表面生长一层 1微米厚的 Si02 薄膜， 并利用本领域技术人员所熟知的光刻以及干法刻蚀技术将 Si02薄层制备成周期 为 3微米， 底径 2.5微米， 高 1微米的圆锥形周期结构， 参见图 12 ( a)。 圆锥图形间 距处要露出 GaN表面。 这一周期性结构即可以作为反射层使用。
第三步， 将制备好反射层结构的上述 GaN单晶继续使用本领域技术人员所熟知的 HVPE技术生长 GaN至 GaN单晶总厚度达到 10微米， 参见图 12 ( b)。
第四步， 将上述生长好的 GaN单晶的 GaN面使用 502快干胶粘接到 2英寸 400 微米的单晶 Si衬底上，使用 Si衬底做转移支撑衬底，再通过本领域技术人员所熟知的 激光剥离技术将蓝宝石衬底剥离掉， 只剩下粘接在 Si衬底上的 GaN单晶， 如图 13所 示。
第五步， 在 Si衬底上的 GaN单晶的 GaN面和 200微米厚的 SiC衬底表面同时蒸 镀 1微米的 Pd。 然后在 800°C， 压力 8吨下， 通过 15分钟键合在一起。 键合完毕后， 502快干胶会在高温下碳化， 因此， Si衬底和 GaN/SiC复合衬底的连接会自动分离。 第六步， 使用 PECVD技术将该衬底的正面反面以及侧面均生长厚度达到 500纳米的 Si02薄膜保护层， 然后使用光刻胶将衬底侧壁和 SiC衬底全部底面保护， 使用 BOE溶 液刻蚀掉衬底 GaN表面的 Si02薄膜， 只留下侧壁和 SiC衬底全部底面部分。
最后通过表面清洗可以得到如图 18所示的复合衬底，该衬底包括一层 200微米厚 的 SiC单晶衬底 8， 通过 PdPd键合和一层 10微米厚的 GaN单晶 1键合在一起。 该键 合层 4 Pd厚度为 2微米。 该衬底具有 500纳米厚侧面及全部底面 Si02保护层 3， 该保 护层设计如发明内容所述第五种设计方案。在 GaN层 1靠近键合层 4约 4微米处包括 一层反射层图形结构 5'。 该图形结构为周期 3微米， 高度 1微米， 底径 2.5微米的圆 锥形 Si02图形层结构。 实施例 6: AlSi衬底 AuAu键合 GaN层的复合衬底
第一步， 使用 2英寸 430微米厚的平板蓝宝石衬底， 利用本领域技术人员所熟知 的 MOCVD技术生长 6微米厚的 GaN单晶外延片。
第三步， 利用 PECVD技术在上述生长的 GaN单晶表面生长一层 1微米厚的 Si02 薄膜， 并利用本领域技术人员所熟知的光刻以及干法刻蚀技术将 Si02薄层制备成周期 为 3微米， 底径 2微米， 高 1微米的圆柱形周期结构， 参见图 17 (a)。 圆柱图形间距 处要露出 GaN表面。 这一周期性结构即可以作为反射层使用。
第四步， 将制备好反射层结构的上述 GaN单晶继续使用本领域技术人员所熟知的 HVPE技术生长 GaN至 GaN单晶总厚度达到 10微米， 参见图 17 (b)。 .
第五步， 在上述的蓝宝石 /GaN单晶的 GaN面和 200微米厚的 AlSi衬底表面同时 蒸镀 1微米的 Au。 然后在 300°C， 压力 5吨下， 通过 15分钟键合在一起。
第六步， 通过本领域技术人员所熟知的激光剥离技术将蓝宝石衬底剥离掉， 只剩 下 GaN/AISi键合的复合衬底结构。
第七步， 使用 PECVD技术将该衬底的正面反面以及侧面均生长厚度达到 500纳 米的 Si02薄膜保护层， 然后使用光刻胶将衬底侧壁、 AlSi衬底全部底面以及 GaN表 面边缘 2毫米范围保护， 使用 BOE溶液刻蚀掉衬底部分 GaN表面的 Si02薄膜， 只留 下侧壁 AlSi衬底全部底面以及 GaN表面边缘 2毫米部分。
最后通过表面清洗可以得到如图 19所示的复合衬底，该衬底包括一层 200微米厚 的 AlSi单晶衬底 9， A1组分为 30%， Si组分为 70%。 通过 AuAu键合和一层 10微米 厚的 GaN单晶 1键合在一起。 该键合层 4 Au厚度为 4微米。 该衬底具有 500纳米厚 侧面及全部底面以及 GaN表面边缘 2毫米 Si02保护层 3，该保护层设计如发明内容所 述第六种设计方案。 在 GaN层靠近键合层 4约 4微米处包括一层反射层图形结构 5'。 该图形结构为周期 3微米， 高度 1微米， 底径 2微米的圆柱形 Si02图形层结构。 实施例 7: WCu金属衬底 AuAu键合 GaN层的无反射层复合衬底
第一步， 使用 2英寸 430微米厚的平板蓝宝石衬底， 利用本领域技术人员所熟知 的 MOCVD技术生长 4微米厚的 GaN单晶外延片。
第二步，将上述 GaN单晶继续使用本领域技术人员所熟知的 HVPE技术生长 GaN 至 GaN单晶总厚度达到 10微米。
第三步， 将上述生长好的 GaN单晶的 GaN面使用 502快干胶粘接到 2英寸 400 微米的单晶 Si衬底上，使用 Si衬底做转移支撑衬底，再通过本领域技术人员所熟知的 激光剥离技术将蓝宝石衬底剥离掉， 只剩下粘接在 Si衬底上的 GaN单晶。
第四步， 在 Si衬底上的 GaN单晶的 GaN面和 WCu合金衬底表面同时蒸镀 1微 米的 Au， 然后在 300°C， 压力 5吨下， 通过 15分钟键合在一起。 键合完毕后， 502快 干胶会在高温下碳化， 因此， Si衬底和 GaN/WCu复合衬底的连接会自动分离。
第五步， 使用 PECVD技术将该衬底的正面反面以及侧面均生长厚度达到 500纳 米的 Si02薄膜保护层， 然后使用光刻胶将衬底侧壁、 WCu衬底全部底面以及 GaN表 面边缘 2毫米范围保护， 使用 BOE溶液刻蚀掉衬底部分 GaN表面的 Si02薄膜， 只留 下侧壁 WCu衬底全部底面以及 GaN表面边缘 2毫米部分。
最后通过表面清洗可以得到如图 20所示的复合衬底，该衬底包括一层 150微米厚 的 WCu合金金属衬底 2， W和 Cu的质量比为 15%比 85%。通过 AuAu键合和一层 10 微米厚的 GaN单晶 1键合在一起。 该键合层 4 Au厚度为 2微米。 该衬底具有 500纳 米厚侧面及全部底面以及 GaN表面边缘 2毫米 Si02保护层 3，该保护层设计如发明内 容所述第六种设计方案。

Claims

权利 要求 书
1. 一种用于 GaN生长的复合衬底， 包括一导热导电层和位于该导热导电层上的 GaN 单晶层， 其中所述导热导电层的熔点大于 iooo°c， 其特征在于， 至少在复合衬底 的侧壁包裹有防止金属扩散的保护层，所述保护层的材料为非金属，不具有挥发性， 且在 1100°C以内不分解也不熔化。
2. 如权利要求 1所述的复合衬底， 其特征在于， 所述保护层的材料为 Si02、 Si3N4 SiC、 GaN或 A1N。
3. 如权利要求 1或 2所述的复合衬底， 其特征在于， 所述保护层包裹区域为下列六种 之一： 1 ) 仅包裹复合衬底的侧壁； 2) 包裹复合衬底的侧壁和所述 GaN单晶层表 面边缘 l-10mm 宽的区域； 3 ) 包裹复合衬底的侧壁和所述导热导电层底面边缘 l-10mm宽的区域 ; 4)包裹复合衬底的侧壁，以及所述 GaN单晶层表面边缘 l-10mm 宽的区域和所述导热导电层底面边缘 l-10mm宽的区域； 5 ) 包裹复合衬底的侧壁 和所述导热导电层的全部底面； 6) 包裹复合衬底的侧壁， 以及所述导热导电层的 全部底面和所述 GaN单晶层层表面边缘 l-10mm宽的区域。
4. 如权利要求 1或 2所述的复合衬底， 其特征在于， 所述保护层的厚度为 20纳米〜 5 微米， 优选为 100纳米〜 2微米。
5. 如权利要求 1或 2所述的复合衬底， 其特征在于， 所述导热导电层的厚度为 10微 米〜 3000微米， 优选为 50微米〜 400微米； 所述 GaN单晶层的厚度为 0.1微米〜 100微米， 优选为 1微米〜 50微米。
6. 如权利要求 1或 2所述的复合衬底， 其特征在于， 所述导热导电层的材料选自金属 W、 Ni、 Mo、 Pd、 Au和 Cr中一种或多种的合金， 或者是这些金属中的一种或多 种与 Cu的合金， 或者是 Si晶体、 SiC晶体或 AlSi晶体。
7. 如权利要求 1或 2所述的复合衬底， 其特征在于， 所述导热导电层与 GaN单晶层 之间具有一柔性介质键合层。
8. 如权利要求 1或 2所述的复合衬底，其特征在于，所述复合衬底内还具有一反射层， 该反射层位于 GaN单晶层的内部、 底部或底面， 所述 GaN单晶层的底面是指 GaN 单晶层与导热导电层连接的一面。
9. 如权利要求 8所述的复合衬底， 其特征在于， 所述反射层是位于 GaN单晶层底面 的金属反射层， 或者是位于 GaN单晶层的内部或底部的具有光栅或光子晶格结构 的周期性结构层。
10. 如权利要求 1或 2所述的复合衬底，其特征在于，所述导热导电层上依次是键合层、 反射层和 GaN单晶层。
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