WO2014010623A1 - Method of inspection of chip electronic components and inspection device - Google Patents

Method of inspection of chip electronic components and inspection device Download PDF

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Publication number
WO2014010623A1
WO2014010623A1 PCT/JP2013/068857 JP2013068857W WO2014010623A1 WO 2014010623 A1 WO2014010623 A1 WO 2014010623A1 JP 2013068857 W JP2013068857 W JP 2013068857W WO 2014010623 A1 WO2014010623 A1 WO 2014010623A1
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chip electronic
inspection
electronic component
chip
electronic components
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PCT/JP2013/068857
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French (fr)
Japanese (ja)
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央人 林
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株式会社ヒューモラボラトリー
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Priority to CN201380032830.6A priority Critical patent/CN104487855A/en
Priority to KR1020147036034A priority patent/KR102168907B1/en
Priority to JP2014524835A priority patent/JP6370707B2/en
Publication of WO2014010623A1 publication Critical patent/WO2014010623A1/en

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/01—Subjecting similar articles in turn to test, e.g. "go/no-go" tests in mass production; Testing objects at points as they pass through a testing station
    • G01R31/013—Testing passive components
    • G01R31/016—Testing of capacitors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices

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  • a test voltage having the same or substantially the same frequency is applied to each chip capacitor (chip electronic component) from each tester. Then, by detecting the current value of the current generated in each chip capacitor by the application of the test voltage with each tester, the test object is based on the voltage value of the test voltage and the detected current value. The capacitance (electrical characteristics) of each chip capacitor is inspected. In addition, the frequency of the voltage applied from each inspection device to the chip electronic component was initially the same. However, when a voltage of the same frequency is applied to a chip electronic component from a plurality of testers arranged in close proximity, interference occurs between the frequencies of the voltages applied from each tester to each chip electronic component.
  • a group of through holes is arranged on a disk so as to form eight rows of concentric circles, and a total of four pairs of electrodes are inspected for chip electronic components held in the four rows of through holes near the outer periphery of the disc.
  • the inspection of the chip electronic components held in the four rows of through holes close to the central axis of the disk is performed by the inspection device B including a total of four pairs of electrode terminals.
  • FIG. 1 is a perspective view showing a configuration example of a chip capacitor (an example of a chip electronic component) to be inspected.
  • the chip capacitor 19 shown in FIG. 1 includes a capacitor main body 21 made of a dielectric and a pair of electrodes 22a and 22b provided at both ends thereof.
  • the chip capacitor 19 is a chip ceramic capacitor using ceramic as a dielectric.
  • the capacitor main body is made of ceramic, and has a plurality of electrode layers that extend alternately and parallel to each other from the electrodes 22a and 22b.
  • the chip electronic component such as the chip capacitor 19 that is particularly effective in using the chip electronic component inspection method and inspection apparatus of the present invention has a width of 0.3 mm or less and a length of 0.6 mm or less. It is an extremely minute chip electronic component.
  • two or more through holes 11a capable of temporarily accommodating chip electronic components (for example, chip capacitors) in a plate-like material are formed at positions close to each other.
  • the pair of electrode terminals 12a and 12b, and the pair of electrode terminals 12a and 12b disposed at positions close to both openings of the through holes 11a of the chip electronic component holding plate 11.
  • Each of the testers 14a and 14b is electrically connected to each other, and the controller 15 is electrically connected to each tester so as to supply signals related to the electrical energy and the test process to each tester. ing.
  • an electrostatic capacity (electrical property) inspection device is used as each of the electrical property inspection devices 14a and 14b of the chip electronic component.
  • the controller 15 overlaps the timing of applying the inspection voltage to each of the chip electronic components accommodated in the two or more through holes 11 a of the chip electronic component holding plate 11. It is characterized in that a control system 15a is provided for controlling so as not to occur.
  • control system means that “a program that makes it possible to control so that the timing of voltage application to each of the chip capacitors housed in two or more through holes of the chip electronic component holding plate does not overlap each other is recorded.
  • chip electronic component inspection apparatus 10 there are three chip electronic components (chip capacitors) that are electrically connected to one inspection device.
  • Three chip capacitors 19a, 19b, and 19c are electrically connected to the tester 14a via the switch 23a.
  • three chip capacitors 19d, 19e, and 19f are electrically connected to the tester 14b via the switch 23b.
  • the configuration of the chip electronic component inspection apparatus 80 shown in FIG. 8 is that there is one chip electronic component (chip capacitor) electrically connected to one inspection device, and the control target of the controller 25 is each inspection.
  • the configuration of the chip electronic component inspection apparatus shown in FIG. 6 is the same as that of the chip electronic component inspection apparatus shown in FIG.
  • a single chip capacitor 19a is electrically connected to the tester 14a without using the switch as described above.
  • One chip capacitor 19b is electrically connected to the tester 14b without using the switch as described above.
  • a test voltage having the same or substantially the same frequency is applied to each chip electronic component.
  • a test voltage By detecting the current value generated by the chip electronic component in each tester, a test method that comprises examining the electrical characteristics of each chip electronic component to be inspected.
  • the inspection voltage is applied to each chip capacitor from each of the inspection devices 14a and 14b at a time when they do not overlap each other.
  • the electrical characteristics (for example, the capacitance of the chip capacitor) of a large number of chip electronic components can be increased at high speed (short time) using two or more inspection devices.
  • the electronic component inspected by the chip electronic component inspection method (or inspection apparatus) of the present invention is preferably a component having a pair of electrodes on opposite surfaces.
  • the types of chip electronic components to be measured and the electrical characteristics to be measured do not necessarily correspond one-to-one.
  • the capacitance of a chip electronic component other than the above-described chip capacitor (specifically, a capacitor appearing in an equivalent circuit of the chip electronic component other than the chip capacitor) can be measured.
  • the capacitance of the chip varistor can be measured.
  • “disposing two or more chip electronic components to be inspected at positions close to each other” means “including at least two chip electronic components disposed at positions close to each other. This means that two or more chip electronic components to be inspected are arranged.
  • the inspection voltage is applied to each of two or more chip electronic components to be inspected from each of the inspectors 14a and 14b that are independent (separate). If the testers independent of each other are not used (one tester is used), the problem is that the electrical signals of the chip capacitors detected by each tester interfere with each other as described above (the problem to be solved by the present invention). It is because it does not produce.
  • the controller 15 performs the same control as the above control. To do.
  • the period S 1 is a period required from when the signal is supplied to the switch 23a until the switch 24a is closed (hereinafter referred to as “switch operating period”). That is, the switch 24a is closed at time t 11, and the electrically conductive state.
  • periods S 2 , S 3 , S 4 , S 5 , and S 6 are switch operation periods of the switches 24 b , 24 c, 24 d, 24 e, and 24 f, respectively.
  • the chip electronic component inspection method of the present invention after each of the inspection devices finishes applying the inspection voltage to each chip electronic component (eg, chip capacitor), the voltage value of the inspection voltage and the above Before determining the electrical characteristics of the chip electronic component based on the current value of the current of the chip electronic component detected by applying the inspection voltage, the chip electronic different from the above from the inspection device different from the above is determined. It is preferable to start applying the inspection voltage to the component. As a result, the time required for inspecting all of the chip electronic components to be inspected is shortened as compared with the case where two or more chip electronic components are inspected in order with one inspection device.
  • the inspection voltage value of the inspection voltage and the above Before determining the electrical characteristics of the chip electronic component based on the current value of the current of the chip electronic component detected by applying the inspection voltage, the chip electronic different from the above is determined. It is preferable to start applying the inspection voltage to the component. As a result, the time required for inspecting all of the chip electronic components to be inspected is shortened as compared with the case where
  • the tester 14a for example, the chip capacitor 19a, to start the application of the inspection voltage at time t 11, and It terminates the application of the inspection voltage at time t 12.
  • Tester 14a then has a voltage value of the test voltage of the, based on the current value of the current generated by the application of the inspection voltage at chip capacitor 19a, the capacitance of the chip capacitor at time t 13 (electrical Characteristics).
  • the tester 14a in a period P 12 (hereinafter referred to as "electrical testing period") between said time t 11 and time t 13, usually between the time t 12 and the time t 13 In the period, based on the voltage value and the current value, for example, the capacitance is determined by data processing (calculation processing).
  • Periods P 22 , P 32 , P 42 , P 52 , and P 62 are electrical characteristic inspection periods of the chip capacitors 19b, 19c, 19d, 19e, and 19f, respectively.

Abstract

[Problem] To provide a method of inspection, with high speed and high accuracy, of the electrical characteristics of a large quantity of chip electronic components, using two or more inspection elements. [Solution] A method of inspection of chip electronic components in which inspection of the electrical characteristics of the chip electronic components that are the subject of inspection is performed, including: a step of electrically connecting mutually independent inspection elements to these respective chip electronic components, in a condition in which two or more chip electronic components to be inspected, that are manufactured so as to show prescribed identical electrical characteristics in accordance with respective identical standards are arranged in mutually adjacent fashion; and a step of applying inspection voltages mutually having the same or substantially the same frequency to respective chip electronic components from the inspection elements and detecting by the inspection elements the current values generated by the chip electronic components by application of this inspection voltage, characterised in that application of the inspection voltage from the inspection elements to the chip electronic components is performed in mutually non-overlapping periods.

Description

チップ電子部品の検査方法および検査装置Chip electronic component inspection method and inspection apparatus
　本発明は、大量のチップ電子部品を高速で検査する方法および装置に関する。 The present invention relates to a method and apparatus for inspecting a large number of chip electronic components at high speed.
　携帯電話、液晶テレビ、ゲーム機に代表される電気製品の生産量の増加にともない、このような電気製品に組み込まれるチップ電子部品の生産量が著しく増加している。チップ電子部品としては、チップキャパシタ（チップコンデンサとも呼ばれる）、チップ抵抗器（チップバリスタを含む）、およびチップインダクタが広く知られている。 With the increase in the production volume of electrical products such as mobile phones, LCD TVs, and game machines, the production volume of chip electronic components incorporated in such electrical products has increased remarkably. As chip electronic components, chip capacitors (also called chip capacitors), chip resistors (including chip varistors), and chip inductors are widely known.
　チップ電子部品、例えば、チップキャパシタは、極めて小さなサイズを有し、一回の製造ロットで数万～数十万個という大量のチップキャパシタが作製される。 Chip electronic components, such as chip capacitors, have an extremely small size, and a large number of chip capacitors of tens of thousands to hundreds of thousands are produced in one production lot.
　チップ電子部品が組み込まれる電気製品のチップ電子部品の欠陥に起因する不良品率を下げるため、大量に製造されるチップ電子部品について全数検査が行なわれるのが一般的である。例えば、チップキャパシタについては、その全数について静電容量等の電気特性の検査が行われる。 In order to reduce the defective product rate due to defects in chip electronic components of electrical products in which chip electronic components are incorporated, it is common to perform 100% inspection of chip electronic components manufactured in large quantities. For example, all of the chip capacitors are inspected for electrical characteristics such as capacitance for all of them.
　従来は、大量のチップ電子部品の電気特性を高速に検査するための方法としては、それぞれ同一の規格に基づいて所定の同一の電気特性を示すように製造された二以上の検査対象のチップ電子部品を互いに近接して配置した状態で該チップ電子部品のそれぞれに互いに独立した検査器を電気的に接続する工程、そして各検査器から、それぞれのチップ電子部品に互いに同一もしくは略同一の周波数を持つ検査用電圧を印加し、この検査用電圧の印加により各チップ電子部品にて発生する電流値を各検査器で検出する工程を含む、検査対象の各チップ電子部品の電気特性の検査を行う検査方法が利用されている。この検査方法の実施には、例えば、多数の透孔が形成された円盤（チップ電子部品保持板）を備えたチップ電子部品検査装置が一般的に用いられる。円盤には、それぞれ検査対象のチップ電子部品を収容する多数の透孔が設けられている。円盤の隣接する透孔は、互いに近接した位置に形成されている。この円盤を回転させ、それぞれの透孔にチップ電子部品を収容させ、この状態で、円盤の径方向に並ぶ複数個のチップ電子部品を一組として、検査器によりチップ電子部品の電気特性が検査される。 Conventionally, as a method for inspecting electrical characteristics of a large number of chip electronic components at high speed, two or more chip electronic devices to be inspected manufactured so as to exhibit predetermined identical electrical characteristics based on the same standard are used. A step of electrically connecting independent testers to each of the chip electronic components in a state where the components are arranged close to each other, and each chip electronic component having the same or substantially the same frequency to each chip electronic component. Inspecting the electrical characteristics of each chip electronic component to be inspected, including the step of detecting the current value generated in each chip electronic component by applying the inspection voltage and detecting the current value generated in each chip electronic component by each inspector Inspection methods are used. For example, a chip electronic component inspection apparatus including a disk (chip electronic component holding plate) in which a large number of through holes are formed is generally used for performing this inspection method. The disk is provided with a large number of through holes for receiving chip electronic components to be inspected. The adjacent through holes of the disk are formed at positions close to each other. This disk is rotated, and chip electronic components are accommodated in the respective through holes. In this state, a plurality of chip electronic components arranged in the radial direction of the disk are used as a set, and the electrical characteristics of the chip electronic components are inspected by an inspection device. Is done.
　チップ電子部品の検査装置は一般に、上記円盤（チップ電子部品保持板）、この円盤の各透孔の両開口部に近接した位置に配置される一対の電極端子、一対の電極端子のそれぞれに電気的に接続されている検査器、そして各検査器に電気エネルギーと検査処理とに関する信号を供給するように各検査器に電気的に接続されている制御器から構成される。そして上記の検査器から電極端子を介して、二以上の透孔に収容されたチップ電子部品のそれぞれに検査用電圧を印加して、その検査用電圧の印加により各チップ電子部品にて発生する電流値を各検査器で検出することによって、検査対象の各チップ電子部品の電気特性の検査が行なわれる。 In general, an inspection apparatus for chip electronic components is electrically connected to each of the disk (chip electronic component holding plate), a pair of electrode terminals disposed at positions close to both openings of each through hole of the disk, and the pair of electrode terminals. And a controller electrically connected to each tester so as to supply signals relating to the electrical energy and the test process to each tester. Then, an inspection voltage is applied to each of the chip electronic components accommodated in the two or more through holes from the inspection device via the electrode terminals, and is generated in each chip electronic component by the application of the inspection voltage. By detecting the current value with each inspection device, the electrical characteristics of each chip electronic component to be inspected are inspected.
　例えば、上記の各検査器としてチップキャパシタの静電容量の検査器を用いる場合、各検査器から、それぞれのチップキャパシタ（チップ電子部品）に互いに同一もしくは略同一の周波数を持つ検査用電圧を印加し、この検査用電圧の印加により各チップキャパシタにて発生する電流の電流値を各検査器で検出することにより、上記検査用電圧の電圧値と検出した電流の電流値とに基づき、検査対象の各チップキャパシタの静電容量（電気特性）の検査が行なわれる。なお、各検査器からチップ電子部品に印加される電圧の周波数については当初は互いに同一とされていた。しかしながら、近接配置された複数の検査器から同一の周波数の電圧をチップ電子部品に印加すると、各検査器からそれぞれのチップ電子部品に印加される電圧の周波数間で干渉が起こり、その結果、検査結果に不具合が発生しやすいことが見出された。従って、近年では、各検査器からチップ電子部品に印加する電圧の周波数を僅かにずらす（同一とはせずに略同一とする）ことも行われている。チップキャパシタの静電容量の検査器としては、例えば、市販の静電容量測定器（代表例、キャパシタンス・メータ：Ｅ４９８１Ａ、アジレント・テクノロジー（株）製）を用いることができる。 For example, in the case where a chip capacitor electrostatic capacity tester is used as each of the above testers, a test voltage having the same or substantially the same frequency is applied to each chip capacitor (chip electronic component) from each tester. Then, by detecting the current value of the current generated in each chip capacitor by the application of the test voltage with each tester, the test object is based on the voltage value of the test voltage and the detected current value. The capacitance (electrical characteristics) of each chip capacitor is inspected. In addition, the frequency of the voltage applied from each inspection device to the chip electronic component was initially the same. However, when a voltage of the same frequency is applied to a chip electronic component from a plurality of testers arranged in close proximity, interference occurs between the frequencies of the voltages applied from each tester to each chip electronic component. It has been found that the results are prone to defects. Therefore, in recent years, the frequency of the voltage applied from each tester to the chip electronic component is also slightly shifted (rather than being the same, but substantially the same). For example, a commercially available capacitance measuring device (typical example, capacitance meter: E4981A, manufactured by Agilent Technologies, Inc.) can be used as a capacitance inspection device for chip capacitors.
　特許文献１には、多数の電気回路部品（例、チップ電子部品）を試験（検査）し、そして試験結果に従って電気回路部品を分類する電気回路部品ハンドラーが開示されている。この電気回路部品ハンドラーは、多数の部品台（透孔）が設けられたディスク状の試験プレート（チップ電子部品保持板）、試験プレートの各部品台に近接した位置に配置される上側接点及び下側接点（一対の電極端子）、そして各接点に電気的に接続されているテスタ（検査器）を備えている。上記試験プレートは、その中心と外周縁との間に直径方向に互いに間隔をあけて４台の部品台の列を、周方向に７２備えている。この試験プレートを回転させ、その部品台（透孔）に電気回路部品を収容した状態で、各列の部品台に収容した複数個の電気回路部品を一組として、電気回路部品の試験が行なわれる。 Patent Document 1 discloses an electric circuit component handler that tests (inspects) a large number of electric circuit components (eg, chip electronic components) and classifies the electric circuit components according to the test results. This electric circuit component handler includes a disk-shaped test plate (chip electronic component holding plate) provided with a large number of component tables (through holes), upper contacts and lower contacts arranged at positions close to each component table of the test plate. A side contact (a pair of electrode terminals) and a tester (inspector) electrically connected to each contact are provided. The test plate is provided with a row of four parts tables 72 in the circumferential direction with a space in the diameter direction between the center and the outer periphery. The test plate is rotated, and the electrical circuit components are tested by using a plurality of electrical circuit components accommodated in each row of the component tables in a state where the electrical circuit components are accommodated in the component tables (through holes). It is.
特表２０００―５０１１７４号公報Special Table 2000-501174
　前述のように、従来より、大量のチップ電子部品の電気特性を高速に検査するため、二台以上の検査器を用いて、円盤状チップ電子部品保持板に保持された複数のチップ電子部品の電気特性を同時に（互いに重複する時期に）検査することは知られている。 As described above, conventionally, in order to inspect the electrical characteristics of a large number of chip electronic components at a high speed, a plurality of chip electronic components held on a disk-shaped chip electronic component holding plate are used by using two or more inspection devices. It is known to test electrical properties simultaneously (when they overlap each other).
　しかしながら、本発明者の研究によると、近年一般的に利用されつつある極度に小さい（例えば、幅が０．３ｍｍ程度で、そして長さが０．６ｍｍ程度のサイズ、あるいはさらに小さなサイズ）のチップ電子部品の検査に際しては、近接して配置された複数のチップ電子部品の電気特性を、複数の検査器を用いて二個もしくはそれ以上、同時に検査すると、各検査器からチップ電子部品に印加される電圧の周波数をずらすといった周波数間の干渉を防ぐ手段を用いた場合であっても、電気特性の検査結果の精度が低下することが判明した。 However, according to the research of the present inventor, an extremely small chip (for example, a width of about 0.3 mm and a length of about 0.6 mm, or a smaller size) that has been generally used in recent years. When inspecting electronic components, if two or more electrical characteristics of a plurality of chip electronic components arranged close to each other are inspected simultaneously using a plurality of inspectors, each inspector applies to the chip electronic components. Even when a means for preventing interference between frequencies such as shifting the frequency of the voltage to be used is used, it has been found that the accuracy of the inspection result of the electrical characteristics is lowered.
　本発明者がさらに研究を進めた結果、上記のように電気特性の検査の精度が低下する原因は、例えば、互いに近接して配置された二個以上の極度に小さいサイズのチップ電子部品の電気特性を検出するため、互いに独立した検査器のそれぞれから、それぞれのチップ電子部品に互いに同一もしくは略同一の周波数を持つ検査用電圧を互いに重複する時期に印加した場合、非常に近接した状態で配置された極度に小さいサイズのチップ電子部品の一方にて発生する電気信号（電圧や電流）に、隣接配置された他方のチップ電子部品にて発生する電気信号（電圧や電流）に基づき発生するノイズが混入する（各々のチップ電子部品にて発生する電気信号が互いに干渉する）ことにあることを見出した。 As a result of further research by the inventor, the cause of the decrease in the accuracy of the electrical property inspection as described above is, for example, that the electrical properties of two or more extremely small sized chip electronic components arranged in close proximity to each other In order to detect the characteristics, when test voltages having the same or substantially the same frequency are applied to each chip electronic component from each of the independent testers at the time of overlapping, they are arranged in close proximity. Noise generated based on an electrical signal (voltage or current) generated in one of the adjacent chip electronic components disposed adjacent to the electrical signal (voltage or current) generated in one of the extremely small chip electronic components. Has been found to be mixed (electrical signals generated in each chip electronic component interfere with each other).
　本発明の課題は、二台もしくはそれ以上の検査器を用いて大量のチップ電子部品（特に極度に小さなサイズのチップ部品）の電気特性を高速且つ高精度にて検査する方法を提供することにある。本発明の課題はまた、二台もしくはそれ以上の検査器を用いて大量のチップ電子部品（特に極度に小さなサイズのチップ部品）の電気特性を高速且つ高精度にて検査する装置を提供することにもある。 An object of the present invention is to provide a method for inspecting electrical characteristics of a large number of chip electronic components (particularly extremely small size chip components) at high speed and with high accuracy using two or more inspection devices. is there. Another object of the present invention is to provide an apparatus for inspecting the electrical characteristics of a large number of chip electronic components (particularly extremely small size chip components) at high speed and with high accuracy using two or more inspection devices. There is also.
　本発明は、それぞれ同一の規格に基づいて所定の同一の電気特性を示すように製造された二以上の検査対象のチップ電子部品を互いに近接して配置した状態で該チップ電子部品のそれぞれに互いに独立した検査器を電気的に接続する工程、そして各検査器から、それぞれのチップ電子部品に互いに同一もしくは略同一の周波数を持つ検査用電圧を印加し、この検査用電圧の印加により各チップ電子部品にて発生する電流値を各検査器で検出する工程を含む、検査対象の各チップ電子部品の電気特性の検査を行うチップ電子部品の検査方法であって、各検査器からの各チップ電子部品への検査用電圧の印加を互いに重複することのない時期に行うことを特徴とするチップ電子部品の検査方法にある。 According to the present invention, two or more chip electronic components to be inspected manufactured so as to exhibit predetermined identical electrical characteristics based on the same standard are arranged in close proximity to each other. A process of electrically connecting independent testers, and a test voltage having the same or substantially the same frequency is applied to each chip electronic component from each tester, and each chip electronic is applied by applying this test voltage. A chip electronic component inspection method for inspecting electrical characteristics of each chip electronic component to be inspected, comprising a step of detecting a current value generated in the component by each inspection device, wherein each chip electronic from each inspection device A chip electronic component inspection method is characterized in that the inspection voltage is applied to the component at a time when they do not overlap each other.
　本発明のチップ電子部品の検査方法の好ましい態様は、次の通りである。
（１）上記チップ電子部品が、円盤上に互いに間隔を以て四列以上の同心円を形成するように配置された透孔の群を備え、中心軸の周りに回転可能に基台に軸支されているチップ電子部品保持板、ただし、各列の透孔は、中心軸から半径方向に延びる直線上にある、の透孔の群に保持された状態にあり、チップ電子部品への検査用電圧の印加が、中心軸から半径方向に延びる直線上にある透孔の群について互いに重複することのない時期に順次行われる。 A preferred aspect of the chip electronic component inspection method of the present invention is as follows.
(1) The chip electronic component includes a group of through holes arranged so as to form four or more concentric circles spaced apart from each other on a disk, and is supported on a base so as to be rotatable around a central axis. However, the through-holes in each row are held in a group of through-holes on a straight line extending in the radial direction from the central axis, and the inspection voltage to the chip electronic components is The application is sequentially performed at a time when the groups of the through holes on the straight line extending in the radial direction from the central axis do not overlap each other.
（２）透孔の群が六列の同心円を形成するように円盤上に配置され、円盤の外周に近い三列の透孔の群に保持されたチップ電子部品の検査が合計三対の電極端子を備えた検査器Ａにより行われ、そして円盤の中心軸に近い三列の透孔群に保持されたチップ電子部品の検査が合計三対の電極端子を備えた検査器Ｂにより行われる。 (2) A group of through holes is arranged on a disk so as to form six rows of concentric circles, and a total of three pairs of electrodes are inspected for chip electronic components held in a group of three rows of through holes close to the outer periphery of the disc The inspection of the chip electronic components held in the three rows of through holes close to the central axis of the disk is performed by the inspection device B having a total of three pairs of electrode terminals.
（３）透孔の群が八列の同心円を形成するように円盤上に配置され、円盤の外周に近い四列の透孔の群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ａにより行われ、そして円盤の中心軸に近い四列の透孔群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ｂにより行われる。 (3) A group of through holes is arranged on a disk so as to form eight rows of concentric circles, and a total of four pairs of electrodes are inspected for chip electronic components held in the four rows of through holes near the outer periphery of the disc. The inspection of the chip electronic components held in the four rows of through holes close to the central axis of the disk is performed by the inspection device B including a total of four pairs of electrode terminals.
（４）透孔の群が十二列の同心円を形成するように円盤上に配置され、円盤の外周に近い四列の透孔の群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ａにより行われ、円盤の中心軸に近い四列の透孔の群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ｂにより行われ、そして上記の外周側に近い四列の透孔の群と中心軸に近い四列の透孔の群との間にある四列の透孔の群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ｃにより行われる。
　なお、透孔の群は九列の同心円を形成するように円盤上に配置されていてもよく、その場合には、各々三対の電極端子を備えた三つの検査器を用いて同様の検査が行われる。 (4) A total of four pairs of inspections of chip electronic components are arranged on the disk so that the groups of through holes form twelve rows of concentric circles and held in the four rows of through holes near the outer periphery of the disk. The inspection of the chip electronic components held in the group of four rows of through holes close to the central axis of the disk is performed by the inspection device B having a total of four pairs of electrode terminals. In addition, the inspection of the chip electronic components held in the four rows of through-hole groups between the four rows of through-holes close to the outer peripheral side and the four rows of through-holes close to the central axis is totaled This is performed by an inspection device C having four pairs of electrode terminals.
The group of through holes may be arranged on a disk so as to form nine rows of concentric circles. In that case, a similar inspection is performed using three inspection devices each having three pairs of electrode terminals. Is done.
（５）検査されるチップ電子部品が、対向する表面に一対の電極を備えた部品である。 (5) The chip electronic component to be inspected is a component having a pair of electrodes on opposite surfaces.
（６）検査されるチップ電子部品がチップキャパシタである。 (6) The chip electronic component to be inspected is a chip capacitor.
（７）検査される電気特性が静電容量である。 (7) The electrical property to be inspected is capacitance.
　なお、上記の本発明の検査方法において、上記の「二以上の検査対象のチップ電子部品を互いに近接した位置に配置する」とは、「互いに近接した位置に配置された少なくとも二個のチップ電子部品を含むように、二以上の検査対象のチップ電子部品を配置する」ことを意味する。 In the above-described inspection method of the present invention, the above-mentioned “disposing two or more chip electronic components to be inspected at positions close to each other” means “at least two chip electrons disposed at positions close to each other”. This means that two or more chip electronic components to be inspected are arranged so as to include the components.
　また、上記の「互いに近接した位置」とは、「二個のチップ電子部品のそれぞれに電気的に接続した互いに独立した（別々の）検査器から、それぞれのチップ電子部品に電気特性検査用の互いに同一もしくは略同一の周波数を持つ検査用電圧を互いに重複する時期に印加した場合に、一方のチップ電子部品にて発生する電気信号（電圧や電流）に、他方のチップ電子部品にて発生する電気信号（電圧や電流）に基づき発生するノイズが混入する（各々のチップ電子部品にて発生する電気信号間で干渉が発生する）位置」を意味する。 The above-mentioned “positions close to each other” means “from an independent (separate) tester electrically connected to each of the two chip electronic components to each chip electronic component for electrical property test. When inspection voltages having the same or substantially the same frequency are applied at the time of overlapping each other, an electrical signal (voltage or current) generated in one chip electronic component is generated in the other chip electronic component. It means a position where noise generated based on an electric signal (voltage or current) is mixed (interference occurs between electric signals generated in each chip electronic component).
　本発明はまた、板状材料にチップ電子部品を一時的に収容することができる二以上の透孔が互いに近接した位置に形成されてなるチップ電子部品保持板、該チップ電子部品保持板の各透孔の両開口部に近接した位置に配置されている一対の電極端子、該一対の電極端子のそれぞれに電気的に接続されている検査器、そして各検査器に電気エネルギーと検査処理とに関する信号を供給するように各検査器に電気的に接続されている制御器を含み、各検査器から電極端子を介して、二以上の透孔に収容されたチップ電子部品のそれぞれに、互いに同一もしくは略同一の周波数を持つ検査用電圧を所定の時期に印加して、その検査用電圧の印加により各チップ電子部品にて発生する電流値を各検査器で検出できるようにされているチップ電子部品検査装置であって、該制御器に、チップ電子部品保持板の二以上の透孔に収容されたチップ電子部品のそれぞれへの検査用電圧印加の時期が互いに重複しないように制御する制御システムが備えられていることを特徴とするチップ電子部品の検査装置にもある。 The present invention also provides a chip electronic component holding plate in which two or more through holes capable of temporarily accommodating the chip electronic component in the plate-like material are formed at positions close to each other, and each of the chip electronic component holding plate A pair of electrode terminals arranged at positions close to both openings of the through hole, an inspection device electrically connected to each of the pair of electrode terminals, and electric energy and inspection processing for each inspection device A controller that is electrically connected to each tester so as to supply a signal is supplied to each of the chip electronic components housed in the two or more through holes from each tester via the electrode terminals. Alternatively, a chip voltage is applied so that an inspection voltage having substantially the same frequency is applied at a predetermined time, and a current value generated in each chip electronic component by the application of the inspection voltage can be detected by each inspection device. parts A control system that controls the controller so that the timings of application of the inspection voltage to each of the chip electronic components housed in the two or more through holes of the chip electronic component holding plate do not overlap each other There is also an inspection apparatus for chip electronic components, which is provided.
　なお、上記の本発明の検査装置において、上記の「二以上の透孔が互いに近接した位置に形成される」とは、「二以上の透孔に収容した二以上の検査対象のチップ電子部品が互いに近接した位置に配置されるような位置に、上記二以上の透孔が形成される」ことを意味する。 In the above-described inspection apparatus of the present invention, “the two or more through holes are formed at positions close to each other” means that “two or more chip electronic components to be inspected accommodated in the two or more through holes”. Means that the two or more through-holes are formed at a position where they are arranged in close proximity to each other.
　本発明の検査方法を実施することにより、二台もしくはそれ以上の検査器を用いて大量のチップ電子部品の電気特性を高速（短時間）に且つ高精度にて検査することができる。
　本発明の検査装置を用いることにより、二台もしくはそれ以上の検査器を用いて大量のチップ電子部品の電気特性を高速（短時間）に且つ高精度にて検査することができる。 By carrying out the inspection method of the present invention, it is possible to inspect the electrical characteristics of a large number of chip electronic components at high speed (in a short time) and with high accuracy using two or more inspection devices.
By using the inspection apparatus of the present invention, it is possible to inspect electric characteristics of a large number of chip electronic components at high speed (short time) and with high accuracy using two or more inspection devices.
検査対象のチップ電子部品の一例であるチップキャパシタの構成例を示す斜視図である。It is a perspective view which shows the structural example of the chip capacitor which is an example of the chip | tip electronic component of a test object. 本発明の検査方法を実施するために好ましく用いることができるチップ電子部品検査装置の構成例を示す正面図である。It is a front view which shows the structural example of the chip | tip electronic component inspection apparatus which can be preferably used in order to implement the inspection method of this invention. 図２の検査装置１０のチップ電子部品収容部３１を、チップ電子部品保持板１１の透孔の群の配置そして各透孔に保持（収容）されるチップ電子部品の挙動を周方向に沿って示す拡大断面図である。The chip electronic component accommodating portion 31 of the inspection apparatus 10 of FIG. 2 is arranged along the circumferential direction of the arrangement of the through holes of the chip electronic component holding plate 11 and the behavior of the chip electronic components held (accommodated) in the respective through holes. It is an expanded sectional view shown. 図２の検査装置１０のチップ電子部品検査部３２を、チップ電子部品保持板１１の円盤上に径方向に延びるように配置された透孔の群に保持（収容）されているチップ電子部品（１９ａ、１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆの合計六個）の各々に検査器の電極を近接配置させた状態で示す拡大断面図である。The chip electronic component inspection unit 32 of the inspection apparatus 10 of FIG. 2 is held (accommodated) in a group of through holes arranged to extend in the radial direction on the disk of the chip electronic component holding plate 11 ( 19 a, 19 b, 19 c, 19 d, 19 e, and 19 f) are enlarged sectional views showing a state in which the electrodes of the inspection device are arranged close to each other. 図２の検査装置１０のチップ電子部品排出部３３にて検査済みのチップ電子部品を排出させる様子を示す拡大断面図である。It is an expanded sectional view which shows a mode that the chip | tip electronic component inspected by the chip | tip electronic component discharge part 33 of the test | inspection apparatus 10 of FIG. 図２の検査装置１０において、制御器１５、検査器１４ａ、１４ｂ、そしてチップ電子部品保持板１１の円盤上に径方向に延びるように配置された透孔の群に保持（収容）されているチップ電子部品（１９ａ、１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆの合計六個）の電気的な接続状態を概略的に示すブロック図である。In the inspection apparatus 10 of FIG. 2, the controller 15, the inspection devices 14 a and 14 b, and the chip electronic component holding plate 11 are held (accommodated) in a group of through holes arranged to extend in the radial direction. It is a block diagram which shows roughly the electrical connection state of a chip electronic component (a total of six pieces of 19a, 19b, 19c, 19d, 19e, and 19f). 図６のブロック図に対応する各部品間の電気的な接続状態を概略的に示す電気回路図である。FIG. 7 is an electric circuit diagram schematically showing an electrical connection state between components corresponding to the block diagram of FIG. 6. 本発明の検査方法を実施するために用いることができるチップ電子部品検査装置の基本構成について、その電気的な接続状態を概略的に示すブロック図である。It is a block diagram which shows roughly the electrical connection state about the basic composition of the chip electronic component inspection apparatus which can be used in order to implement the inspection method of the present invention. 本発明のチップ電子部品の検査方法において、各検査器から各チップ電子部品に検査用電圧を印加する時期を示す図である。It is a figure which shows the time which applies the voltage for a test | inspection to each chip electronic component from each test | inspection device in the test | inspection method of the chip electronic component of this invention. 従来のチップ電子部品の検査方法において、各検査器から各チップ電子部品に検査用電圧を印加する時期を示す図である。It is a figure which shows the time which applies the voltage for a test | inspection from each test | inspection device to each chip electronic component in the conventional inspection method of a chip electronic component.
　先ず、本発明のチップ電子部品の検査方法を実施するために用いることができる検査装置の構成例について、添付の図面を参照しながら説明する。 First, a configuration example of an inspection apparatus that can be used to carry out the chip electronic component inspection method of the present invention will be described with reference to the accompanying drawings.
　図１は、検査対象のチップキャパシタ（チップ電子部品の一例）の構成例を示す斜視図である。図１のチップキャパシタ１９は、誘電体からなるキャパシタ本体２１とその両端に設けられた一対の電極２２ａ、２２ｂから構成されている。チップキャパシタ１９は、誘電体としてセラミックを用いたチップセラミックキャパシタである。キャパシタ本体は、セラミックから形成されていて、その内部に電極２２ａ、２２ｂの各々から交互に且つ互いに平行に延びる複数の電極層を備えている。本発明のチップ電子部品の検査方法および検査装置の使用が特に有効なチップキャパシタ１９などのチップ電子部品は、幅が０．３ｍｍもしくはそれ以下、そして長さが０．６ｍｍもしくはそれ以下のような極度に微小のチップ電子部品である。 FIG. 1 is a perspective view showing a configuration example of a chip capacitor (an example of a chip electronic component) to be inspected. The chip capacitor 19 shown in FIG. 1 includes a capacitor main body 21 made of a dielectric and a pair of electrodes 22a and 22b provided at both ends thereof. The chip capacitor 19 is a chip ceramic capacitor using ceramic as a dielectric. The capacitor main body is made of ceramic, and has a plurality of electrode layers that extend alternately and parallel to each other from the electrodes 22a and 22b. The chip electronic component such as the chip capacitor 19 that is particularly effective in using the chip electronic component inspection method and inspection apparatus of the present invention has a width of 0.3 mm or less and a length of 0.6 mm or less. It is an extremely minute chip electronic component.
　図２は、本発明の検査方法を実施するために用いることができるチップ電子部品検査装置の構成例を示す正面図である。図３は、図２の検査装置１０のチップ電子部品収容部３１をチップ電子部品保持板１１の周方向に沿って示す拡大断面図である。図４は、図２の検査装置１０のチップ電子部品検査部３２をチップ電子部品保持板１１の直径方向に沿って切断した拡大断面図である。図５は、図２の検査装置１０のチップ電子部品排出部３３をチップ電子部品保持板１１の直径方向に沿って切断した拡大断面図である。図６は、図２の検査装置１０の電気的な接続状態を概略的に示すブロック図である。そして図７は、図２の検査装置１０の電気的な接続状態を概略的に示す電気回路図である。 FIG. 2 is a front view showing a configuration example of a chip electronic component inspection apparatus that can be used for carrying out the inspection method of the present invention. FIG. 3 is an enlarged cross-sectional view showing the chip electronic component housing portion 31 of the inspection apparatus 10 of FIG. 2 along the circumferential direction of the chip electronic component holding plate 11. FIG. 4 is an enlarged cross-sectional view of the chip electronic component inspection unit 32 of the inspection apparatus 10 of FIG. 2 cut along the diameter direction of the chip electronic component holding plate 11. FIG. 5 is an enlarged cross-sectional view of the chip electronic component discharge portion 33 of the inspection apparatus 10 of FIG. 2 cut along the diameter direction of the chip electronic component holding plate 11. FIG. 6 is a block diagram schematically showing an electrical connection state of the inspection apparatus 10 of FIG. FIG. 7 is an electric circuit diagram schematically showing an electrical connection state of the inspection apparatus 10 of FIG.
　図２～図７に示すチップ電子部品検査装置１０は、板状材料にチップ電子部品（例えば、チップキャパシタ）を一時的に収容することができる二以上の透孔１１ａが互いに近接した位置に形成されてなるチップ電子部品保持板１１、チップ電子部品保持板１１の各透孔１１ａの両開口部に近接した位置に配置されている一対の電極端子１２ａ、１２ｂ、一対の電極端子１２ａ、１２ｂのそれぞれに電気的に接続されている検査器１４ａ、１４ｂ、そして各検査器に電気エネルギーと検査処理とに関する信号を供給するように各検査器に電気的に接続されている制御器１５から構成されている。 In the chip electronic component inspection apparatus 10 shown in FIGS. 2 to 7, two or more through holes 11a capable of temporarily accommodating chip electronic components (for example, chip capacitors) in a plate-like material are formed at positions close to each other. Of the chip electronic component holding plate 11, the pair of electrode terminals 12a and 12b, and the pair of electrode terminals 12a and 12b disposed at positions close to both openings of the through holes 11a of the chip electronic component holding plate 11. Each of the testers 14a and 14b is electrically connected to each other, and the controller 15 is electrically connected to each tester so as to supply signals related to the electrical energy and the test process to each tester. ing.
　制御器１５が各検査器に供給する電気エネルギーに関する信号は、各検査器が各チップキャパシタに印加する検査用電圧に関する信号であり、その代表例としては、検査用電圧の印加の開始を指示する信号が挙げられる。 The signal relating to the electrical energy supplied from the controller 15 to each inspection device is a signal relating to the inspection voltage applied to each chip capacitor by each inspection device, and a representative example thereof instructs the start of application of the inspection voltage. Signal.
　制御器１５が各検査器に供給する検査処理に関する信号は、各検査器による各チップキャパシタの電気特性の検査に関する信号であり、その代表例としては、各検査器からの検査用電圧の印加により各チップキャパシタにて発生する電流の電流値の検出の開始を指示する信号が挙げられる。 The signal relating to the inspection process supplied to each inspection device by the controller 15 is a signal relating to the inspection of the electrical characteristics of each chip capacitor by each inspection device. As a typical example, by applying an inspection voltage from each inspection device. A signal instructing the start of detection of the current value of the current generated in each chip capacitor may be mentioned.
　チップ電子部品検査装置１０は、検査器１４ａ、１４ｂのそれぞれから電極端子１２ａ、１２ｂを介して、二以上の透孔１１ａに収容されたチップ電子部品（例えば、図４に示すチップキャパシタ１９ａ、１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆ）のそれぞれに、互いに同一（もしくは略同一）の周波数を持つ検査用電圧を所定の時期に印加して、その検査用電圧の印加により各チップ電子部品にて発生する電流値を各検査器で検出できるように構成されている。 The chip electronic component inspection apparatus 10 includes chip electronic components (for example, chip capacitors 19a and 19b shown in FIG. 4) accommodated in two or more through holes 11a from the inspection devices 14a and 14b via the electrode terminals 12a and 12b, respectively. , 19c, 19d, 19e, and 19f), test voltages having the same (or substantially the same) frequency are applied to each chip electronic component at a predetermined time, and are generated in each chip electronic component by applying the test voltage. The current value to be detected can be detected by each inspection device.
　検査装置１０では、例えば、チップ電子部品の電気特性の検査器１４ａ、１４ｂのそれぞれとして、例えば、静電容量（電気特性）の検査器が用いられている。 In the inspection apparatus 10, for example, an electrostatic capacity (electrical property) inspection device is used as each of the electrical property inspection devices 14a and 14b of the chip electronic component.
　そして上記チップ電子部品検査装置１０は、前記の制御器１５に、チップ電子部品保持板１１の二以上の透孔１１ａに収容されたチップ電子部品のそれぞれへの検査用電圧印加の時期が互いに重複しないように制御する制御システム１５ａが備えられていることに特徴がある。 In the chip electronic component inspection apparatus 10, the controller 15 overlaps the timing of applying the inspection voltage to each of the chip electronic components accommodated in the two or more through holes 11 a of the chip electronic component holding plate 11. It is characterized in that a control system 15a is provided for controlling so as not to occur.
　上記「制御システム」とは、「チップ電子部品保持板の二以上の透孔に収容されたチップキャパシタのそれぞれへの電圧印加の時期が互いに重複しないように制御することを可能にするプログラムが記録された電子計算機」を意味する。 The above “control system” means that “a program that makes it possible to control so that the timing of voltage application to each of the chip capacitors housed in two or more through holes of the chip electronic component holding plate does not overlap each other is recorded. Means an "electronic computer".
　図６及び図７に示すチップ電子部品検査装置１０では、一つの検査器に電気的に接続されるチップ電子部品（チップキャパシタ）が三つである。検査器１４ａには、切替器２３ａを介して三個のチップキャパシタ１９ａ、１９ｂ、１９ｃが電気的に接続される。そして検査器１４ｂには、切替器２３ｂを介して三個のチップキャパシタ１９ｄ、１９ｅ、１９ｆが電気的に接続される。 In the chip electronic component inspection apparatus 10 shown in FIGS. 6 and 7, there are three chip electronic components (chip capacitors) that are electrically connected to one inspection device. Three chip capacitors 19a, 19b, and 19c are electrically connected to the tester 14a via the switch 23a. Then, three chip capacitors 19d, 19e, and 19f are electrically connected to the tester 14b via the switch 23b.
　そして上記の制御器１５が備える制御システムは、各検査器からの各チップ電子部品（チップキャパシタ）への検査用電圧印加の時期が全て、互いに重複しないように、各検査器を制御する。 The control system provided in the controller 15 controls each inspector so that the inspection voltage application timing from each inspector to each chip electronic component (chip capacitor) does not overlap each other.
　図８は、本発明の検査方法を実施するために好ましく用いることができるチップ電子部品検査装置の基本構成について、その電気的な接続状態を概略的に示すブロック図である。 FIG. 8 is a block diagram schematically showing an electrical connection state of a basic configuration of a chip electronic component inspection apparatus that can be preferably used for carrying out the inspection method of the present invention.
　図８に示すチップ電子部品検査装置８０の構成は、一つの検査器に電気的に接続されるチップ電子部品（チップキャパシタ）が一つであること、そして制御器２５の制御の対象が各検査器のみである（上記の切替器を含まない）こと以外は図６に示すチップ電子部品検査装置の構成と同様である。 The configuration of the chip electronic component inspection apparatus 80 shown in FIG. 8 is that there is one chip electronic component (chip capacitor) electrically connected to one inspection device, and the control target of the controller 25 is each inspection. The configuration of the chip electronic component inspection apparatus shown in FIG. 6 is the same as that of the chip electronic component inspection apparatus shown in FIG.
　検査器１４ａには、上記のような切替器を用いることなく、一個のチップキャパシタ１９ａが電気的に接続されている。そして検査器１４ｂには、上記のような切替器を用いることなく、一個のチップキャパシタ１９ｂが電気的に接続されている。 A single chip capacitor 19a is electrically connected to the tester 14a without using the switch as described above. One chip capacitor 19b is electrically connected to the tester 14b without using the switch as described above.
　このように、チップ電子部品検査装置は、一つの（各々の）検査器に電気的に接続されるチップ電子部品が一つである構成を有していてもよい。但し、使用する検査器の数を少なくして、これにより検査装置の製造コストを低くするためには、一つの検査器に電気的に接続されるチップ電子部品が二以上であることが好ましい。 As described above, the chip electronic component inspection apparatus may have a configuration in which one chip electronic component is electrically connected to one (each) inspection device. However, in order to reduce the number of inspection devices used and thereby reduce the manufacturing cost of the inspection device, it is preferable that two or more chip electronic components are electrically connected to one inspection device.
　次に、本発明のチップ電子部品の検査方法を、図２～図７に示す検査装置１０を用い、そして図１に示すチップキャパシタ１９の検査を行なう場合を代表例として説明する。 Next, a method for inspecting a chip electronic component according to the present invention will be described using a case where the inspection apparatus 10 shown in FIGS. 2 to 7 is used and the chip capacitor 19 shown in FIG. 1 is inspected as a representative example.
　本発明のチップ電子部品の検査方法は、同一の規格によりそれぞれ所定の同一の電気特性を示すように製造された二以上の検査対象のチップ電子部品を互いに近接した位置に配置し（具体的には、例えば、円盤状チップ電子保持板の径方向に直線上に配置した、図４、図６、そして図７に示すチップキャパシタ１９ａ、１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆ）、互いに独立した検査器１４ａ、１４ｂを、検査器１４ａが、チップキャパシタ１９ａ、１９ｂ、１９ｃを検査し、検査器１４ｂがチップキャパシタ１９ｄ、１９ｅ、１９ｆを検査するように、各チップキャパシタに電気的に接続した後、各検査器から、それぞれのチップ電子部品に互いに同一もしくは略同一の周波数を持つ検査用電圧を印加し、この検査用電圧の印加により各チップ電子部品にて発生する電流値を各検査器で検出することによって、検査対象の各チップ電子部品の電気特性を検査することを含む検査方法である。 In the chip electronic component inspection method of the present invention, two or more chip electronic components to be inspected manufactured so as to exhibit predetermined identical electrical characteristics according to the same standard are arranged at positions close to each other (specifically, For example, the chip capacitors 19a, 19b, 19c, 19d, 19e, and 19f shown in FIGS. 4, 6, and 7 arranged in a straight line in the radial direction of the disk-shaped chip electronic holding plate are inspected independently of each other. After electrically connecting the testers 14a, 14b to each chip capacitor so that the tester 14a inspects the chip capacitors 19a, 19b, 19c and the tester 14b inspects the chip capacitors 19d, 19e, 19f, From each tester, a test voltage having the same or substantially the same frequency is applied to each chip electronic component. By applying this test voltage, By detecting the current value generated by the chip electronic component in each tester, a test method that comprises examining the electrical characteristics of each chip electronic component to be inspected.
　そして、本発明のチップ電子部品の検査方法は、各検査器からの各チップ電子部品（チップキャパシタ）への検査用電圧の印加を互いに重複することのない時期に実施することに特徴がある。 The chip electronic component inspection method of the present invention is characterized in that the inspection voltage is applied to each chip electronic component (chip capacitor) from each inspection device at a time when they do not overlap each other.
　図９は、本発明のチップ電子部品の検査方法において、各検査器から各チップキャパシタ（チップ電子部品）に検査用電圧を印加する時期を示す図である。図９に記入した横軸は時間を表している。以下では、図７及び図９を参照しながら説明を行なう。 FIG. 9 is a diagram showing the timing for applying a test voltage from each tester to each chip capacitor (chip electronic component) in the chip electronic component testing method of the present invention. The horizontal axis written in FIG. 9 represents time. Hereinafter, description will be made with reference to FIGS. 7 and 9.
　検査器１４ａは、時間ｔ11から時間ｔ12までの期間Ｐ11において、チップキャパシタ１９ａに検査用電圧を印加する。また同様に、検査器１４ａは、時間ｔ21から時間ｔ22までの期間Ｐ21において、チップキャパシタ１９ｂに検査用電圧を印加する。そして同様に、検査器１４ａは、時間ｔ31から時間ｔ32までの期間Ｐ31において、チップキャパシタ１９ｃに検査用電圧を印加する。 Tester 14a in a period P 11 from the time t 11 to time t 12, to apply a test voltage to the chip capacitor 19a. Similarly, the tester 14a in a period P 21 from the time t 21 to time t 22, to apply the test voltage to the chip capacitor 19b. And similarly, the tester 14a in a period P 31 from the time t 31 to time t 32, to apply a test voltage to the chip capacitor 19c.
　検査器１４ｂは、時間ｔ41から時間ｔ42までの期間Ｐ41において、チップキャパシタ１９ｄに検査用電圧を印加する。また同様に、検査器１４ｂは、時間ｔ51から時間ｔ52までの期間Ｐ51において、チップキャパシタ１９ｅに検査用電圧を印加する。そして同様に、検査器１４ｂは、時間ｔ61から時間ｔ62までの期間Ｐ61において、チップキャパシタ１９ｆに検査用電圧を印加する。 Tester 14b in the period P 41 from the time t 41 to time t 42, to apply a test voltage to the chip capacitor 19d. Similarly, tester 14b in the period P 51 from the time t 51 to time t 52, to apply a test voltage to the chip capacitor 19e. And similarly, the tester 14b in the period P 61 from the time t 61 to time t 62, to apply a test voltage to the chip capacitor 19f.
　そして、上記の期間Ｐ11において、検査器１４ａから、チップキャパシタ１９ａに検査用電圧を印加し、この検査用電圧の印加によりチップキャパシタ１９ａにて発生する電流値を検査器１４ａで検出することによって、検査対象のチップキャパシタ１９ａの電気特性（上記検査装置１０を用いる場合には静電容量）が検査される。 Then, in the period P 11 , a test voltage is applied to the chip capacitor 19a from the tester 14a, and a current value generated in the chip capacitor 19a by the application of the test voltage is detected by the tester 14a. The electrical characteristics of the chip capacitor 19a to be inspected (capacitance when the inspection apparatus 10 is used) are inspected.
　同様にして、上記の期間Ｐ21、Ｐ31、Ｐ41、Ｐ51、Ｐ61の各々において、チップキャパシタ１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆの各々の電気特性（静電容量）が検査される。 Similarly, in each of the above periods P 21, P 31, P 41 , P 51, P 61, chip capacitor 19b, 19c, 19d, 19e, electric characteristics of each of 19f (capacitance) is examined .
　図９に示すように、本発明のチップ電子部品の検査方法では、検査器１４ａ、１４ｂの各々からの、各チップキャパシタへの検査用電圧の印加を互いに重複することのない時期に実施する。 As shown in FIG. 9, in the chip electronic component inspection method according to the present invention, the inspection voltage is applied to each chip capacitor from each of the inspection devices 14a and 14b at a time when they do not overlap each other.
　このため、例えば、期間Ｐ11にて検査用電圧が印加されるチップキャパシタ１９ａにて発生する電気信号（電圧や電流）に、期間Ｐ41にて検査用電圧が印加される別のチップキャパシタ１９ｄにて発生する電気信号（電圧や電流）に基づき発生するノイズが混入すること、すなわち各々のチップキャパシタに発生する電気信号が互いに干渉することはない。 Thus, for example, the electrical signal generated by the chip capacitor 19a which test voltage in the period P 11 is applied (voltage or current), another chip capacitor 19d to test voltage in the period P 41 is applied The noise generated based on the electric signal (voltage or current) generated in the circuit is not mixed, that is, the electric signals generated in the respective chip capacitors do not interfere with each other.
　従って、本発明のチップ電子部品の検査方法を実施することにより、二台以上の検査器を用いて大量のチップ電子部品の電気特性（例えば、チップキャパシタの静電容量）を高速（短時間）に且つ高精度にて検査することができる。 Therefore, by carrying out the chip electronic component inspection method of the present invention, the electrical characteristics (for example, the capacitance of the chip capacitor) of a large number of chip electronic components can be increased at high speed (short time) using two or more inspection devices. In addition, it is possible to inspect with high accuracy.
　本発明のチップ電子部品の検査方法（あるいは検査装置）で検査される電子部品は、対向する表面に一対の電極を備えた部品であることが好ましい。 The electronic component inspected by the chip electronic component inspection method (or inspection apparatus) of the present invention is preferably a component having a pair of electrodes on opposite surfaces.
　検査される電子部品の代表例としては、チップキャパシタ、チップ抵抗器（チップバリスタを含む）、およびチップインダクタが挙げられる。検査される電子部品は、チップキャパシタであることが特に好ましい。 Typical examples of electronic components to be inspected include chip capacitors, chip resistors (including chip varistors), and chip inductors. The electronic component to be inspected is particularly preferably a chip capacitor.
　本発明のチップ電子部品の検査方法（あるいは検査装置）で検査される電子部品の電気特性は、チップ電子部品に印加する検査用電圧（交番電圧）の電圧値と、この検査用電圧の印加によりチップ電子部品にて発生する電流（交流電流）の電流値とに基づき決定することのできる電気特性を意味する。 The electrical characteristics of an electronic component to be inspected by the chip electronic component inspection method (or inspection apparatus) of the present invention are determined by the voltage value of the inspection voltage (alternating voltage) applied to the chip electronic component and the application of this inspection voltage. It means electrical characteristics that can be determined based on the current value of the current (alternating current) generated in the chip electronic component.
　このような電気特性の代表例としては、静電容量（キャパシタンス）、インダクタンス、インピーダンス、アドミタンスなどが挙げられる。 Typical examples of such electrical characteristics include capacitance (capacitance), inductance, impedance, admittance, and the like.
　なお、上記の測定対象のチップ電子部品の種類と、測定する電気特性とは、必ずしも一対一に対応している訳ではない。例えば、上記のチップキャパシタ以外のチップ電子部品について（詳細には、チップキャパシタ以外のチップ電子部品の等価回路に表れるキャパシタについて）、その静電容量を測定することもできる。例えば、チップバリスタの静電容量を測定することもできる。 Note that the types of chip electronic components to be measured and the electrical characteristics to be measured do not necessarily correspond one-to-one. For example, the capacitance of a chip electronic component other than the above-described chip capacitor (specifically, a capacitor appearing in an equivalent circuit of the chip electronic component other than the chip capacitor) can be measured. For example, the capacitance of the chip varistor can be measured.
　検査対象の二以上のチップ電子部品としては、所定の同一の電気特性を示すように同一の規格に従って製造されたものが用いられる。 As the two or more chip electronic components to be inspected, those manufactured in accordance with the same standard so as to exhibit predetermined identical electrical characteristics are used.
　従って、上記の検査対象の二以上のチップ電子部品は、同一の製造ロットのものであることが多いが、このような同一の製造ロットのチップ電子部品に、別のロットのチップ電子部品が混合されたものであってもよい。但し、両者の製造ロットのチップ電子部品は、互いに同一の電気特性を示すように同一の規格に従って製造されたもの（通常は、互いに同一の製品として販売することを目的として製造されたもの）である。 Accordingly, the two or more chip electronic components to be inspected are often of the same production lot, but the chip electronic components of another lot are mixed with the chip electronic components of the same production lot. It may be what was done. However, the chip electronic components of both production lots are manufactured in accordance with the same standard so as to exhibit the same electrical characteristics (usually manufactured for the purpose of selling as the same product). is there.
　二以上の検査対象のチップ電子部品を、例えば、検査装置１０のチップ電子部品保持板１１の二以上の透孔１１ａのそれぞれに収容することにより、互いに近接した位置に配置することができる。 By accommodating two or more chip electronic components to be inspected in each of the two or more through holes 11a of the chip electronic component holding plate 11 of the inspection apparatus 10, for example, they can be arranged at positions close to each other.
　前記のように、上記の「二以上の検査対象のチップ電子部品を互いに近接した位置に配置する」とは、「互いに近接した位置に配置された少なくとも二個のチップ電子部品を含むように、二以上の検査対象のチップ電子部品を配置する」ことを意味する。 As described above, “disposing two or more chip electronic components to be inspected at positions close to each other” means “including at least two chip electronic components disposed at positions close to each other. This means that two or more chip electronic components to be inspected are arranged.
　上記の「互いに近接した位置」は、「二個の検査対象のチップ電子部品の距離が１００ｍｍ以下となる位置」であることが好ましく、「二個の検査対象のチップ電子部品の距離が５０ｍｍ以下となる位置」であることが更に好ましく、「二個の検査対象のチップ電子部品の距離が３０ｍｍ以下となる位置」であることが特に好ましい。何れの態様においても、二個の検査対象のチップ電子部品の距離は１ｍｍ以上であることが更に好ましい。 The “position close to each other” is preferably a “position where the distance between the two chip electronic components to be inspected is 100 mm or less”, and the distance between the two chip electronic components to be inspected is 50 mm or less. Is more preferable, and “a position at which the distance between two chip electronic components to be inspected is 30 mm or less” is particularly preferable. In any aspect, it is more preferable that the distance between the two chip electronic components to be inspected is 1 mm or more.
　二以上の検査対象のチップ電子部品には、互いに独立した（別々の）検査器１４ａ、１４ｂの各々から検査用電圧が付与される。互いに独立した検査器を用いない（一台の検査器を用いる）のであれば、前記のように各検査器で検出する各チップキャパシタの電気信号が互いに干渉するとの問題（本発明の解決課題）を生じないからである。 The inspection voltage is applied to each of two or more chip electronic components to be inspected from each of the inspectors 14a and 14b that are independent (separate). If the testers independent of each other are not used (one tester is used), the problem is that the electrical signals of the chip capacitors detected by each tester interfere with each other as described above (the problem to be solved by the present invention). It is because it does not produce.
　二以上の検査対象のチップ電子部品には、各検査器から、互いに同一もしくは略同一の周波数を持つ検査用電圧が印加される。 The inspection voltage having the same or substantially the same frequency is applied from each inspection device to two or more chip electronic components to be inspected.
　二以上の検査対象のチップ電子部品に印加される検査用電圧が互いに略同一であるとは、それぞれの検査用電圧の周波数が、そのうちの最も低い周波数より高く、かつ１．１倍以下、好ましくは１．０５倍以下の周波数であることを意味する。 The fact that the inspection voltages applied to two or more chip electronic components to be inspected are substantially identical to each other means that the frequency of each inspection voltage is higher than the lowest frequency and not more than 1.1 times, preferably Means that the frequency is 1.05 times or less.
　なお、前記の図７及び図９に示すように、チップ電子部品検査装置１０が、期間Ｐ11において、チップキャパシタ１９ａに検査用電圧を印加することを可能とするため、制御器１５は以下のような制御を行なう。 Incidentally, as shown in FIGS. 7 and 9 of the chip electronic component testing apparatus 10 is, in the period P 11, in order to make it possible to apply a test voltage to the chip capacitor 19a, the controller 15 following Such control is performed.
　先ず、制御器１５は、切替器２３ａに、時間ｔ0において、チップキャパシタ１９ａに電気的に接続されている開閉器２４ａを閉じ（電気的に導通状態とし）、開閉器２４ｂ、２４ｃを開く（電気的に非導通状態とする）ように指示する信号を供給する。次いで、制御器１５は、検査器１４ａに、時間ｔ11において、検査用電圧の印加の開始を指示する信号（電気エネルギーに関する信号）、そしてチップキャパシタ１９ａにて発生する電流の電流値の検出の開始を指示する信号（検査処理に関する信号）を供給する。 First, the controller 15, the switch 23a, at time t 0, to close the switch 24a which is electrically connected to the chip capacitor 19a (the electrically conductive state), open switch 24b, a 24c ( A signal instructing to be in an electrically non-conductive state is supplied. Then, the controller 15, the tester 14a, at time t 11, (signal to electrical energy) instruction signal to start the application of the inspection voltage, and the detected current value of the current generated by the chip capacitor 19a A signal for instructing the start (a signal related to the inspection process) is supplied.
　また、制御器１５は、切替器２３ｂに、時間ｔ0において、チップキャパシタ１９ｄに電気的に接続されている開閉器２４ｄを閉じ（電気的に導通状態とし）、開閉器２４ｅ、２４ｆを開く（電気的に非導通状態とする）ように指示する信号を供給する。次いで、制御器１５は、検査器１４ｂに、時間ｔ41において、検査用電圧の印加の開始を指示する信号、そしてチップキャパシタ１９ｄにて発生する電流の電流値の検出の開始を指示する信号を供給する。 Further, the controller 15, the switch 23b, at time t 0, to close the switch 24d which is electrically connected to the chip capacitor 19d (the electrically conducting state), the switch 24e, opening the 24f ( A signal instructing to be in an electrically non-conductive state is supplied. Then, the controller 15, the tester 14b, at time t 41, the signal instructing the start of application of the test voltage, and a signal instructing the start of detection of the current value of the current generated by the chip capacitor 19d Supply.
　なお、期間Ｐ11における検査器１４ａからのチップキャパシタ１９ａへの検査用電圧の印加と、期間Ｐ41における検査器１４ｂからのチップキャパシタ１９ｄへの検査用電圧の印加とを、互いに重複することのない時期に実施するため、チップキャパシタ１９ａへの検査用電圧の印加を終了する時間ｔ12から期間Ｄが経過したのちの時間ｔ41において、チップキャパシタ１９ｄへの検査用電圧の印加を開始している。 Note that the application of the test voltage to the chip capacitor 19a from the tester 14a in the period P 11, and applying the test voltage to the chip capacitor 19d from the inspection unit 14b in the period P 41, of that overlap each other to implement the absence period, at time t 41 the after period D from the time t 12 to end the application of the test voltage to the chip capacitor 19a has passed, and starts to apply the test voltage to the chip capacitor 19d Yes.
　そして同様にして、チップキャパシタ１９ｄ、チップキャパシタ１９ｂ、チップキャパシタ１９ｅ、チップキャパシタ１９ｃ、そしてチップキャパシタ１９ｆに検査用電圧を印加することを可能とするため、制御器１５は上記の制御と同様の制御を行なう。 Similarly, in order to make it possible to apply a test voltage to the chip capacitor 19d, the chip capacitor 19b, the chip capacitor 19e, the chip capacitor 19c, and the chip capacitor 19f, the controller 15 performs the same control as the above control. To do.
　なお、期間Ｓ1は、上記信号を切替器２３ａに供給してから開閉器２４ａが閉じるまでに必要な期間（以下「開閉器動作期間」という）である。すなわち、開閉器２４ａは、時間ｔ11において閉じ、そして電気的に導通状態となる。同様に期間Ｓ2、Ｓ3、Ｓ4、Ｓ5、Ｓ6は、それぞれ開閉器２４ｂ、２４ｃ、２４ｄ、２４ｅ、２４ｆの開閉器動作期間である。 The period S 1 is a period required from when the signal is supplied to the switch 23a until the switch 24a is closed (hereinafter referred to as “switch operating period”). That is, the switch 24a is closed at time t 11, and the electrically conductive state. Similarly, periods S 2 , S 3 , S 4 , S 5 , and S 6 are switch operation periods of the switches 24 b , 24 c, 24 d, 24 e, and 24 f, respectively.
　そして本発明のチップ電子部品の検査方法では、上記の各検査器が、各チップ電子部品（例、チップキャパシタ）への検査用電圧の印加を終了したのち、上記検査用電圧の電圧値と上記検査用電圧を印加して検出した上記チップ電子部品の電流の電流値とに基づき、このチップ電子部品の電気特性を決定する前に、上記とは別の検査器から上記とは別のチップ電子部品への検査用電圧の印加を始めることが好ましい。これにより、一台の検査器で二以上のチップ電子部品を順番に検査する場合と比較して、検査対象のチップ電子部品の全てを検査するために必要とされる時間が短くなる。 In the chip electronic component inspection method of the present invention, after each of the inspection devices finishes applying the inspection voltage to each chip electronic component (eg, chip capacitor), the voltage value of the inspection voltage and the above Before determining the electrical characteristics of the chip electronic component based on the current value of the current of the chip electronic component detected by applying the inspection voltage, the chip electronic different from the above from the inspection device different from the above is determined. It is preferable to start applying the inspection voltage to the component. As a result, the time required for inspecting all of the chip electronic components to be inspected is shortened as compared with the case where two or more chip electronic components are inspected in order with one inspection device.
　図７及び図９に示すように、上記のチップ電子部品検査装置１０を用いる場合、検査器１４ａは、例えば、チップキャパシタ１９ａに対して、時間ｔ11において検査用電圧の印加を開始し、そして時間ｔ12において検査用電圧の印加を終了する。次いで検査器１４ａは、上記の検査用電圧の電圧値と、この検査用電圧の印加によりチップキャパシタ１９ａにて発生する電流の電流値とに基づき、時間ｔ13においてチップキャパシタの静電容量（電気特性）を決定する。 As shown in FIGS. 7 and 9, when using the chip electronic component testing apparatus 10 described above, the tester 14a, for example, the chip capacitor 19a, to start the application of the inspection voltage at time t 11, and It terminates the application of the inspection voltage at time t 12. Tester 14a then has a voltage value of the test voltage of the, based on the current value of the current generated by the application of the inspection voltage at chip capacitor 19a, the capacitance of the chip capacitor at time t 13 (electrical Characteristics).
　このように、検査器１４ａは、上記の時間ｔ11と時間ｔ13との間の期間Ｐ12（以下「電気特性検査期間」という）において、通常は時間ｔ12と時間ｔ13との間の期間にて、上記の電圧値と電流値とに基づき、例えば、データ処理（演算処理）により静電容量を決定する。なお、期間Ｐ22、Ｐ32、Ｐ42、Ｐ52、Ｐ62は、それぞれチップキャパシタ１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆの電気特性検査期間である。 Thus, the tester 14a in a period P 12 (hereinafter referred to as "electrical testing period") between said time t 11 and time t 13, usually between the time t 12 and the time t 13 In the period, based on the voltage value and the current value, for example, the capacitance is determined by data processing (calculation processing). Periods P 22 , P 32 , P 42 , P 52 , and P 62 are electrical characteristic inspection periods of the chip capacitors 19b, 19c, 19d, 19e, and 19f, respectively.
　そして、上記のように検査器１４ａが、時間ｔ12においてチップキャパシタ１９ａへの検査用電圧の印加を終了したのち、時間ｔ13において上記電圧値と電流値とに基づきキャパシタの静電容量（電気特性）を決定する前に、具体的には時間ｔ41において、上記とは別の検査器１４ｂから上記とは別のチップキャパシタ１９ｄへの検査用電圧の印加を始めている。 The tester 14a as described above, after the completion of the application of the test voltage to the chip capacitor 19a at time t 12, the capacitance of the capacitor based on the above voltage and current values at time t 13 (electrical before determining the characteristics), the time specifically t 41, has begun to apply the test voltage to another chip capacitor 19d to the above from a different tester 14b from the above.
　すなわち、チップキャパシタ１９ａへの検査用電圧の印加を終了する時間ｔ12と、次のチップキャパシタ１９ｄへの検査用電圧の印加を開始する時間ｔ41との間の期間Ｄは、上記時間ｔ12と検査器１４ａがチップキャパシタ１９ａの静電容量を決定する時間ｔ13との間の期間よりも短いことが好ましい。 That is, the period D between the time t 12 when the application of the inspection voltage to the chip capacitor 19a is finished and the time t 41 when the application of the inspection voltage to the next chip capacitor 19d is started is the time t 12. And a period between the time t 13 when the tester 14a determines the capacitance of the chip capacitor 19a is preferably shorter.
　同様に、上記の検査器１４ｂが、時間ｔ42においてチップキャパシタ１９ｄへの検査用電圧の印加を終了したのち、時間ｔ43においてチップキャパシタ１９ｄの静電容量を決定する前に、具体的には時間ｔ21において、上記とは別の検査器１４ａから上記とは別のチップキャパシタ１９ｂへの検査用電圧の印加を始めている。そして以降も同様の手順により、チップキャパシタ１９ｅ、チップキャパシタ１９ｃ、そしてチップキャパシタ１９ｆへの検査用電圧の印加を始めている。 Similarly, the above-mentioned tester 14b is, after the completion of the application of the test voltage to the chip capacitor 19d at time t 42, prior to determining a capacitance of the chip capacitor 19d at time t 43, specifically, at time t 21, it has begun to apply the test voltage to another chip capacitor 19b to the above from a different tester 14a and the. Thereafter, application of the inspection voltage to the chip capacitor 19e, the chip capacitor 19c, and the chip capacitor 19f is started in the same procedure.
　図１０は、従来のチップ電子部品の検査方法において、合計で６個のチップ電子部品１９ａ、１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆを検査する場合に、各検査器から各チップキャパシタ（チップ電子部品）に検査用電圧を印加する時期を示す図である。図１０に記入した横軸は時間を表している。 FIG. 10 shows a case where a total of six chip electronic components 19a, 19b, 19c, 19d, 19e, and 19f are inspected by a conventional chip electronic component inspection method. It is a figure which shows the time which applies the voltage for a test | inspection to). The horizontal axis entered in FIG. 10 represents time.
　検査器１４ａは、時間ｔ11から時間ｔ12までの期間Ｐ11において、チップキャパシタ１９ａに検査用電圧を印加する。また同様に、検査器１４ａは、時間ｔ21から時間ｔ22までの期間Ｐ21において、チップキャパシタ１９ｂに検査用電圧を印加する。そして同様に、検査器１４ａは、時間ｔ31から時間ｔ32までの期間Ｐ31において、チップキャパシタ１９ｃに検査用電圧を印加する。 Tester 14a in a period P 11 from the time t 11 to time t 12, to apply a test voltage to the chip capacitor 19a. Similarly, the tester 14a in a period P 21 from the time t 21 to time t 22, to apply the test voltage to the chip capacitor 19b. And similarly, the tester 14a in a period P 31 from the time t 31 to time t 32, to apply a test voltage to the chip capacitor 19c.
　検査器１４ｂは、時間ｔ41から時間ｔ42までの期間Ｐ41において、チップキャパシタ１９ｄに検査用電圧を印加する。また同様に、検査器１４ｂは、時間ｔ51から時間ｔ52までの期間Ｐ51において、チップキャパシタ１９ｅに検査用電圧を印加する。そして同様に、検査器１４ｂは、時間ｔ61から時間ｔ62までの期間Ｐ61において、チップキャパシタ１９ｆに検査用電圧を印加する。 Tester 14b in the period P 41 from the time t 41 to time t 42, to apply a test voltage to the chip capacitor 19d. Similarly, tester 14b in the period P 51 from the time t 51 to time t 52, to apply a test voltage to the chip capacitor 19e. And similarly, the tester 14b in the period P 61 from the time t 61 to time t 62, to apply a test voltage to the chip capacitor 19f.
　図１０を用いて説明する従来のチップ電子部品の検査方法で、二以上の検査器を用いる目的は、二個のチップキャパシタ（チップ電子部品）に互いに重複する時期に検査用電圧を印加して、チップキャパシタの静電容量を二個ずつ同時に検査することにより検査時間を短くすることである。 In the conventional chip electronic component inspection method described with reference to FIG. 10, the purpose of using two or more inspection devices is to apply a test voltage to two chip capacitors (chip electronic components) at a time when they overlap each other. The inspection time is shortened by simultaneously inspecting the capacitance of each chip capacitor two by two.
　例えば、期間Ｐ11における検査器１４ａからのチップキャパシタ１９ａへの検査用電圧の印加と、期間Ｐ41における検査器１４ｂからのチップキャパシタ１９ｄへの検査用電圧の印加とを、互いに重複する時期に実施することにより、高速（短時間）での検査を実現している。 For example, the application of the test voltage to the chip capacitor 19a from the tester 14a in the period P 11, and applying the test voltage to the chip capacitor 19d from the inspection unit 14b in the period P 41, in time to overlap each other By implementing it, inspection at high speed (short time) is realized.
　但し、前記のように、例えば、期間Ｐ11にて検査用電圧が印加されるチップキャパシタ１９ａにて発生する電気信号（電圧や電流）に、期間Ｐ41にて検査用電圧が印加されるチップキャパシタ１９ｄにて発生する電気信号（電圧や電流）に基づき発生するノイズが混入する。また、チップキャパシタ１９ｄにて発生する電気信号にも、チップキャパシタ１９ａにて発生する電気信号に基づき発生するノイズが混入する。すなわち各々のチップキャパシタにて発生する電気信号が互いに干渉する。同様に、チップキャパシタ１９ｂ、１９ｅにて発生する電気信号もまた互いに干渉し、またチップキャパシタ１９ｃ、１９ｆにて発生する電気信号もまた互いに干渉する。 However, the chip as described above, for example, the electrical signal generated by the chip capacitor 19a which test voltage in the period P 11 is applied (voltage or current), the test voltage in the period P 41 applied Noise generated based on an electrical signal (voltage or current) generated in the capacitor 19d is mixed. In addition, noise generated based on the electrical signal generated in the chip capacitor 19a is also mixed in the electrical signal generated in the chip capacitor 19d. That is, the electrical signals generated in each chip capacitor interfere with each other. Similarly, electrical signals generated by the chip capacitors 19b and 19e also interfere with each other, and electrical signals generated by the chip capacitors 19c and 19f also interfere with each other.
　従って、従来のチップ電子部品の検査方法では、二台もしくはそれ以上の検査器を用いて二以上のチップキャパシタの電気特性を高速（短時間）にて検査することは可能である。例えば、図１０に示すように、６個のチップキャパシタを時間ｔ0と時間ｔ1との間の期間（時間）にて検査することができる。しかしながら、上記のように各チップキャパシタで発生する電気信号が互いに干渉するため、各々のチップキャパシタの電気特性の検査の精度は低下する。 Therefore, in the conventional method for inspecting chip electronic components, it is possible to inspect the electrical characteristics of two or more chip capacitors at high speed (in a short time) using two or more inspectors. For example, as shown in FIG. 10, six chip capacitors can be inspected in a period (time) between time t 0 and time t 1 . However, since the electrical signals generated in each chip capacitor interfere with each other as described above, the accuracy of the inspection of the electrical characteristics of each chip capacitor is lowered.
　これに対して、本発明のチップ電子部品の検査方法では、図９に示すように、例えば、６個のチップキャパシタを時間ｔ0と時間ｔ2との間の期間（時間）にて検査する。従って、上記の従来のチップ電子部品の検査方法と比較して、本発明のチップ電子部品の検査方法では検査に必要な時間は長くなる（時間ｔ2＞時間ｔ1）。しかしながら、本発明のチップ電子部品の検査方法では、検査対象のチップキャパシタへの検査用電圧の印加を、互いに重複することのない時期に実施するため、上記のように各チップキャパシタで発生する電気信号が互いに干渉することがない。このため、本発明の検査方法を実施することにより、上記従来のチップ電子部品の検査方法と比較すると検査時間は若干長くなるものの、二台以上の検査器を用いて大量のチップキャパシタ（チップ電子部品）の電気特性を高速（短時間）に高精度にて検査することができる。 On the other hand, in the chip electronic component inspection method of the present invention, as shown in FIG. 9, for example, six chip capacitors are inspected in a period (time) between time t 0 and time t 2. . Therefore, compared with the above-described conventional chip electronic component inspection method, the chip electronic component inspection method of the present invention requires a longer time for inspection (time t 2 > time t 1 ). However, in the chip electronic component inspection method of the present invention, since the inspection voltage is applied to the chip capacitors to be inspected at a time when they do not overlap each other, the electricity generated in each chip capacitor as described above. Signals do not interfere with each other. For this reason, the inspection method of the present invention makes the inspection time slightly longer than the above-described conventional inspection method for chip electronic components. However, a large number of chip capacitors (chip electronics) are used by using two or more inspection devices. The electrical characteristics of the component can be inspected at high speed (short time) with high accuracy.
　以下では、本発明のチップ電子部品の検査方法を実施するために用いられる検査装置（本発明のチップ電子部品の検査装置）の構成と好ましい実施態様とについて、詳細に説明する。 Hereinafter, the configuration and preferred embodiments of an inspection apparatus (chip electronic component inspection apparatus of the present invention) used for implementing the chip electronic component inspection method of the present invention will be described in detail.
　図２に示すチップ電子部品検査装置１０が備えるチップ電子部品保持板１１は、その形状に特に制限はないが、通常は円盤状の形状に設定される。 The chip electronic component holding plate 11 included in the chip electronic component inspection apparatus 10 shown in FIG. 2 is not particularly limited in shape, but is usually set in a disk shape.
　チップ電子部品保持板１１の二以上の透孔１１ａは、チップ電子部品保持板の表面に、複数の同心円上で、この同心円を等分割した位置に配置される。 The two or more through holes 11a of the chip electronic component holding plate 11 are arranged on the surface of the chip electronic component holding plate on a plurality of concentric circles at positions where the concentric circles are equally divided.
　チップ電子部品検査装置１０では、チップ電子部品保持板１１の中心と周縁との間にて直径方向に並ぶ合計で６個の透孔に収容された６個のチップ電子部品毎に、チップキャパシタの電気特性の検査が行なわれる。チップ電子部品保持板１１の中心と周縁との間にて直径方向に並ぶ透孔の数は、２～２０個の範囲内にあることが好ましく、４～１２個の範囲内にあることが更に好ましい。 In the chip electronic component inspection apparatus 10, a chip capacitor is provided for each of the six chip electronic components accommodated in a total of six through holes arranged in the diameter direction between the center and the peripheral edge of the chip electronic component holding plate 11. Inspection of electrical characteristics is performed. The number of through holes arranged in the diametrical direction between the center and the periphery of the chip electronic component holding plate 11 is preferably in the range of 2 to 20, and more preferably in the range of 4 to 12. preferable.
　チップ電子部品保持板１１は、基台４１に、例えばベース板４５、そして中心軸４２を介して回転可能に設置（固定）されていて、その背面側に配設された回転駆動装置４３を作動させることにより、中心軸４２の周囲を間欠的に回転する。なお、チップ電子部品保持板１１が「間欠的に回転する」とは、チップ電子部品保持板１１の回転方向（回転の周方向）に互いに隣接する二個の透孔の各々と、チップ電子部品保持板１１の回転の中心位置とを結ぶ二本の直線が形成する角度（鋭角）毎に回転することを意味する。 The chip electronic component holding plate 11 is rotatably installed (fixed) on the base 41 via, for example, a base plate 45 and a central shaft 42, and operates a rotation driving device 43 disposed on the back side thereof. As a result, the periphery of the central axis 42 rotates intermittently. Note that “the chip electronic component holding plate 11 rotates intermittently” means that each of the two through holes adjacent to each other in the rotation direction (circumferential direction of rotation) of the chip electronic component holding plate 11 and the chip electronic component. It means that it rotates at every angle (acute angle) formed by two straight lines connecting the center position of rotation of the holding plate 11.
　チップ電子部品保持板１１の透孔のそれぞれには、チップ電子部品収容部３１において、検査対象のチップキャパシタ（チップ電子部品）が、その電気特性を検査するため、一時的に収容される。 In each of the through holes of the chip electronic component holding plate 11, a chip capacitor (chip electronic component) to be inspected is temporarily accommodated in the chip electronic component accommodating portion 31 in order to inspect its electrical characteristics.
　図３に示すように、チップ電子部品収容部３１には、上記チップ電子部品保持板１１の前方側（図３にて左側）に、チップ電子部品保持カバー４４が配設されている。チップ電子部品保持板１１の後方側（図３にて右側）には、ベース板４５が配設されている。ベース板４５には、それぞれチップ電子部品保持板１１の側の表面にて開口する複数の気体排出通路４５ａが形成されている。各々の気体排出通路は、気体排出装置（代表例、真空ポンプ）４６に接続されている。気体排出装置４６を作動させると、気体排出通路４５ａから気体が排出され、チップ電子部品保持板１１とベース板４５との間の間隙が減圧された状態になる（大気圧よりも小さな圧力になる）。 As shown in FIG. 3, a chip electronic component holding cover 44 is disposed in the chip electronic component housing portion 31 on the front side (left side in FIG. 3) of the chip electronic component holding plate 11. A base plate 45 is disposed on the rear side (right side in FIG. 3) of the chip electronic component holding plate 11. The base plate 45 is formed with a plurality of gas discharge passages 45a that open on the surface on the chip electronic component holding plate 11 side. Each gas discharge passage is connected to a gas discharge device (typical example, vacuum pump) 46. When the gas discharge device 46 is operated, the gas is discharged from the gas discharge passage 45a, and the gap between the chip electronic component holding plate 11 and the base plate 45 is reduced (the pressure is lower than the atmospheric pressure). ).
　そして、チップ電子部品保持板１１を、図３に記入した矢印４９が示す方向に間欠的に回転させながら、チップ電子部品供給装置（図２：４７）によりチップ電子部品保持カバー４４の内側にチップキャパシタ１９を供給し、気体排出装置４６を作動させてチップ電子部品保持板１１とベース板４５との間の間隙を減圧状態にする。これにより、チップ電子部品保持板１１の各々の透孔１１ａにチップキャパシタが一時的に収容される。なお、チップ電子部品保持板１１とベース板４５との間の間隙は減圧された状態にあるため、チップ電子部品保持板１１に収容されたチップキャパシタ１９が、図３にて最も上の気体排出通路４５ａよりも上方の位置に移動した場合にも、チップキャパシタ１９が透孔１１ａから出て落下することはない。 Then, while the chip electronic component holding plate 11 is intermittently rotated in the direction indicated by the arrow 49 in FIG. 3, the chip electronic component supply device (FIG. 2: 47) inserts the chip inside the chip electronic component holding cover 44. The capacitor 19 is supplied, and the gas discharge device 46 is operated to reduce the gap between the chip electronic component holding plate 11 and the base plate 45. As a result, the chip capacitors are temporarily accommodated in the respective through holes 11 a of the chip electronic component holding plate 11. Since the gap between the chip electronic component holding plate 11 and the base plate 45 is in a depressurized state, the chip capacitor 19 accommodated in the chip electronic component holding plate 11 has the top gas discharge in FIG. Even when the chip capacitor 19 moves to a position above the passage 45a, the chip capacitor 19 does not come out of the through hole 11a and fall.
　上記のチップ電子部品保持板１１の間欠的な回転移動により、チップ電子部品保持板の透孔に収容されたチップキャパシタは、図２及び図４に示すチップ電子部品検査装置１０のチップ電子部品検査部３２に送られる。 The chip capacitor housed in the through hole of the chip electronic component holding plate by the intermittent rotational movement of the chip electronic component holding plate 11 described above is the chip electronic component inspection of the chip electronic component inspection apparatus 10 shown in FIGS. Sent to the unit 32.
　図４に示すように、各チップキャパシタを、その電気特性の検査器に電気的に接続するため、チップ電子部品保持板の各透孔１１ａの両開口部に近接した位置には、一対の電極端子１２ａ、１２ｂが配置されている。 As shown in FIG. 4, in order to electrically connect each chip capacitor to a tester for its electrical characteristics, a pair of electrodes are provided at positions close to both openings of each through hole 11a of the chip electronic component holding plate. Terminals 12a and 12b are arranged.
　電極端子１２ａは、その周囲に配設された電気的に絶縁性の筒体５１を介して、ベース板４５に固定されている。電極端子１２ａ及びベース板４５のチップ電子部品保持板１１の側の表面は、一つの平滑な平面が形成されるように、例えば、研磨加工が施される。 The electrode terminal 12a is fixed to the base plate 45 via an electrically insulating cylinder 51 disposed around the electrode terminal 12a. The surface of the electrode terminal 12a and the base plate 45 on the chip electronic component holding plate 11 side is subjected to, for example, polishing so that one smooth plane is formed.
　電極端子１２ｂは、電極端子支持板５３に固定されている。電極端子支持板５３は、直動駆動装置（図２：５４）に固定されている。 The electrode terminal 12 b is fixed to the electrode terminal support plate 53. The electrode terminal support plate 53 is fixed to a linear drive device (FIG. 2: 54).
　上記直動駆動装置を作動させ、電極端子支持板５３をチップ電子部品保持板１１の側に移動させることにより、電極端子支持板５３に支持された各電極端子１２ｂもまた、チップ電子部品保持板１１の側に移動する。これにより、各チップキャパシタは、電極端子１２ａ、１２ｂの間に挟まれる。従って、各チップキャパシタの電極２２ａは電極端子１２ａに電気的に接続され、そして電極２２ｂは電極端子１２ｂに電気的に接続される。これにより、各チップキャパシタは、一対の電極端子１２ａ、１２ｂを介して、各検査器に電気的に接続される。 Each of the electrode terminals 12b supported by the electrode terminal support plate 53 is also moved by moving the electrode terminal support plate 53 toward the chip electronic component holding plate 11 by operating the linear drive device. Move to the 11 side. As a result, each chip capacitor is sandwiched between the electrode terminals 12a and 12b. Accordingly, the electrode 22a of each chip capacitor is electrically connected to the electrode terminal 12a, and the electrode 22b is electrically connected to the electrode terminal 12b. Thereby, each chip capacitor is electrically connected to each tester via the pair of electrode terminals 12a and 12b.
　なお、一対の電極端子が配置されるチップ電子部品保持板の各透孔の両開口部に「近接した位置」とは、各透孔にチップ電子部品が収容されたときに、各電極端子が各チップ電子部品に電気的に接続される位置、あるいは各電極端子が移動可能な構成とされている場合には、各電極端子を移動させることにより各チップ電子部品に電気的に接続させることが可能な位置を意味する。 The “position close to” both openings of each through hole of the chip electronic component holding plate on which the pair of electrode terminals are arranged means that each electrode terminal is placed when the chip electronic component is accommodated in each through hole. When each electrode is electrically connected to each chip electronic component or each electrode terminal is configured to be movable, each chip electronic component can be electrically connected by moving each electrode terminal. Means a possible position.
　そして、チップ電子部品検査部３２では、チップ電子部品保持板１１の直径方向に一列に並ぶ６個のチップキャパシタ１９ａ、１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆ毎に、上記の本発明の検査方法に従って、その電気特性が検査される。 In the chip electronic component inspection unit 32, the six chip capacitors 19a, 19b, 19c, 19d, 19e, and 19f arranged in a line in the diameter direction of the chip electronic component holding plate 11 are each subjected to the inspection method of the present invention. The electrical properties are inspected.
　図７に示すチップ電子部品検査装置１０が備える検査器１４ａ、１４ｂは、静電容量の検査器である。検査器１４ａ、１４ｂはそれぞれ、電源５５、電圧計５６、そして電流計５７を備えている。電源５５にて発生した検査用電圧は、切替器２３ａ又は切替器２３ｂを介して、各チップキャパシタに印加される。検査用電圧の電圧値は電圧計５６により測定される。検査用電圧の付与により各チップキャパシタにて発生する電流の電流値は電流計５７により測定される。上記電圧値及び電流値を高精度にて測定するため、各検査器には、増幅器５８と電気抵抗器５９とが備えられている。 7. The testers 14a and 14b included in the chip electronic component test apparatus 10 shown in FIG. 7 are capacitance testers. Each of the testers 14a and 14b includes a power supply 55, a voltmeter 56, and an ammeter 57. The inspection voltage generated by the power supply 55 is applied to each chip capacitor via the switch 23a or the switch 23b. The voltage value of the inspection voltage is measured by a voltmeter 56. The current value of the current generated in each chip capacitor by applying the inspection voltage is measured by an ammeter 57. In order to measure the voltage value and the current value with high accuracy, each tester is provided with an amplifier 58 and an electrical resistor 59.
　なお、図２に示すチップ電子部品検査装置のチップ電子部品検査部３２の周方向に、別の検査器（上記検査器１４ａ、１４ｂとは別の電気特性を検査する検査器）に電気的に接続する一対の電極端子を更に配設することもできる。 In addition, in the circumferential direction of the chip electronic component inspection unit 32 of the chip electronic component inspection apparatus shown in FIG. 2, it is electrically connected to another inspection device (an inspection device for inspecting electrical characteristics different from the inspection devices 14a and 14b). A pair of electrode terminals to be connected may be further provided.
　電気特性を検査したチップキャパシタは、チップ電子部品保持板１１の間欠的な回転移動により、図２及び図５に示すチップ電子部品検査装置１０のチップ電子部品排出部３３に送られる。 The chip capacitor whose electrical characteristics have been inspected is sent to the chip electronic component discharge unit 33 of the chip electronic component inspection apparatus 10 shown in FIGS. 2 and 5 by the intermittent rotational movement of the chip electronic component holding plate 11.
　図５に示すように、チップ電子部品排出部３３には、上記チップ電子部品保持板１１の前方側（図５にて下側）に、複数個の透孔６１ａが形成されたチューブ支持カバー６１が配設されている。チューブ支持カバー６１の透孔６１ａの各々には、チップキャパシタ（例えば、チップキャパシタ１９ａ）の通路を構成するチューブ６２が接続される。但し、図２においては、チューブ支持カバー６１の透孔６１ａの各々に接続されるチューブ６２のうちの一部のチューブのみを記入してある。 As shown in FIG. 5, in the chip electronic component discharge portion 33, a tube support cover 61 in which a plurality of through holes 61a are formed on the front side (lower side in FIG. 5) of the chip electronic component holding plate 11 is formed. Is arranged. Each of the through holes 61a of the tube support cover 61 is connected to a tube 62 constituting a passage of a chip capacitor (for example, the chip capacitor 19a). However, in FIG. 2, only some of the tubes 62 connected to each of the through holes 61 a of the tube support cover 61 are shown.
　また、チップ電子部品保持板１１の後方側（図５にて上側）に配置されたベース板４５には、それぞれチップ電子部品保持板１１の側の表面にて開口する複数の気体供給通路４５ｂが形成されている。各々の気体供給通路４５ｂは、加圧気体供給装置６３に接続されている。 In addition, a plurality of gas supply passages 45b opened on the surface on the chip electronic component holding plate 11 side are provided on the base plate 45 disposed on the rear side (upper side in FIG. 5) of the chip electronic component holding plate 11. Is formed. Each gas supply passage 45 b is connected to a pressurized gas supply device 63.
　加圧気体供給装置６３を作動させると、気体供給通路４５ｂに加圧気体が供給され、例えば、チップ電子部品保持板１１の透孔１１ａに収容されたチップキャパシタ１９ａに加圧気体が噴射される。これにより、チップキャパシタは、チューブ６２に排出される。 When the pressurized gas supply device 63 is operated, the pressurized gas is supplied to the gas supply passage 45b, and for example, the pressurized gas is injected into the chip capacitor 19a accommodated in the through hole 11a of the chip electronic component holding plate 11. . Thereby, the chip capacitor is discharged to the tube 62.
　例えば、上記のチップキャパシタ１９ａは、図２に示すチューブ支持カバー６１に形成された複数個の透孔６１ａのうち、最も外周側にある合計で１０個の透孔６１ａを通過する。この１０個の透孔６１ａは、それぞれチューブ６２を介してチップ電子部品収容容器６４に接続されている。 For example, the chip capacitor 19a passes through a total of ten through holes 61a on the outermost side among the plurality of through holes 61a formed in the tube support cover 61 shown in FIG. The ten through holes 61a are connected to the chip electronic component storage container 64 through the tubes 62, respectively.
　従って、上記のチップキャパシタ１９ａは、上記のチューブ支持カバー６１の１０個の透孔６１ａに接続された合計で１０本のチューブ６２の何れかを介して、検査した電気特性に応じたチップ電子部品収容容器６４に収容される。 Therefore, the chip capacitor 19a is connected to the ten through holes 61a of the tube support cover 61, and the chip electronic component according to the electrical characteristics inspected through any of the ten tubes 62 in total. It is stored in the storage container 64.
　１０　チップ電子部品検査装置
　１１　チップ電子部品保持板
　１１ａ　透孔
　１２ａ、１２ｂ　電極端子
　１４ａ、１４ｂ　検査器
　１５　制御器
　１５ａ　制御システム
　１９、１９ａ、１９ｂ、１９ｃ、１９ｄ、１９ｅ、１９ｆ　チップキャパシタ
　２１　キャパシタ本体
　２２ａ、２２ｂ　電極
　２３ａ、２３ｂ　切替器
　２４ａ、２４ｂ、２４ｃ、２４ｄ、２４ｅ、２４ｆ　開閉器
　２５　制御器
　３１　チップ電子部品収容部
　３２　チップ電子部品検査部
　３３　チップ電子部品排出部
　４１　基台
　４２　中心軸
　４３　回転駆動装置
　４４　チップ電子部品保持カバー
　４５　ベース板
　４５ａ　気体排出通路
　４５ｂ　気体供給通路
　４６　気体排出装置
　４７　チップ電子部品供給装置（パーツフィーダ）
　４９　チップ電子部品保持板の回転方向を示す矢印
　５１　筒体
　５２　電極支持板
　５３　電極端子支持板
　５４　直動駆動装置
　５５　電源
　５６　電圧計
　５７　電流計
　５８　増幅器
　５９　電気抵抗器
　６１　チューブ支持カバー
　６１ａ　透孔
　６２　チューブ
　６３　加圧気体供給装置
　６４　チップ電子部品収容容器
　８０　チップ電子部品検査装置 DESCRIPTION OF SYMBOLS 10 Chip electronic component inspection apparatus 11 Chip electronic component holding | maintenance board 11a Through- hole 12a, 12b Electrode terminal 14a, 14b Inspection device 15 Controller 15a Control system 19, 19a, 19b, 19c, 19d, 19e, 19f Chip capacitor 21 Capacitor main body 22a , 22b Electrode 23a, 23b Switcher 24a, 24b, 24c, 24d, 24e, 24f Switch 25 Controller 31 Chip electronic component storage unit 32 Chip electronic component inspection unit 33 Chip electronic component discharge unit 41 Base 42 Central shaft 43 Rotation Drive device 44 Chip electronic component holding cover 45 Base plate 45a Gas discharge passage 45b Gas supply passage 46 Gas discharge device 47 Chip electronic component supply device (part feeder)
49 Arrow indicating the rotation direction of the chip electronic component holding plate 51 Cylindrical body 52 Electrode support plate 53 Electrode terminal support plate 54 Direct acting drive device 55 Power supply 56 Voltmeter 57 Ammeter 58 Amplifier 59 Electric resistor 61 Tube support cover 61a Through hole 62 Tube 63 Pressurized gas supply device 64 Chip electronic component container 80 Chip electronic component inspection device

Claims (9)

  1. 　それぞれ同一の規格に基づいて所定の同一の電気特性を示すように製造された二以上の検査対象のチップ電子部品を互いに近接して配置した状態で該チップ電子部品のそれぞれに互いに独立した検査器を電気的に接続する工程、そして各検査器から、それぞれのチップ電子部品に互いに同一もしくは略同一の周波数を持つ検査用電圧を印加し、この検査用電圧の印加により各チップ電子部品にて発生する電流値を各検査器で検出する工程を含む、検査対象の各チップ電子部品の電気特性の検査を行うチップ電子部品の検査方法であって、各検査器からの各チップ電子部品への検査用電圧の印加を互いに重複することのない時期に行うことを特徴とするチップ電子部品の検査方法。 Inspectors independent of each other in each of the chip electronic components in a state in which two or more chip electronic components to be inspected manufactured so as to exhibit predetermined identical electrical characteristics based on the same standard are arranged close to each other The test voltage having the same or substantially the same frequency is applied to each chip electronic component from each tester, and generated by each test electronic component by applying this test voltage. A method of inspecting chip electronic components for inspecting electrical characteristics of each chip electronic component to be inspected, including a step of detecting a current value to be detected by each inspector, and inspecting each chip electronic component from each inspector A method for inspecting a chip electronic component, wherein application voltages are applied at a time when they do not overlap each other.
  2. 　上記チップ電子部品が、円盤上に互いに間隔を以て四列以上の同心円を形成するように配置された透孔の群を備え、中心軸の周りに回転可能に基台に軸支されているチップ電子部品保持板、ただし、各列の透孔は、中心軸から半径方向に延びる直線上にある、の透孔の群に保持された状態にあり、チップ電子部品への検査用電圧の印加が、中心軸から半径方向に延びる直線上にある透孔の群について互いに重複することのない時期に順次行われる請求項１に記載のチップ電子部品の検査方法。 The chip electronic component includes a group of through-holes arranged so as to form four or more concentric circles spaced apart from each other on a disk, and the chip electronic is pivotally supported on a base so as to be rotatable around a central axis The component holding plate, however, the through-holes in each row are held in a group of through-holes on a straight line extending in the radial direction from the central axis, and the application of the inspection voltage to the chip electronic component is performed, 2. The method for inspecting a chip electronic component according to claim 1, wherein the group of through-holes on a straight line extending in the radial direction from the central axis is sequentially performed at a time when they do not overlap each other.
  3. 　透孔の群が六列の同心円を形成するように円盤上に配置され、円盤の外周に近い三列の透孔の群に保持されたチップ電子部品の検査が合計三対の電極端子を備えた検査器Ａにより行われ、そして円盤の中心軸に近い三列の透孔群に保持されたチップ電子部品の検査が合計三対の電極端子を備えた検査器Ｂにより行われる請求項２に記載のチップ電子部品の検査方法。 A group of through-holes are arranged on a disk so as to form six rows of concentric circles, and inspection of chip electronic components held in a group of three rows of through-holes close to the outer periphery of the disc has a total of three pairs of electrode terminals. 3. The inspection of the chip electronic components held in the three rows of through holes close to the central axis of the disk is performed by the inspection device B having a total of three pairs of electrode terminals. The inspection method of the chip electronic component as described.
  4. 　透孔の群が八列の同心円を形成するように円盤上に配置され、円盤の外周に近い四列の透孔の群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ａにより行われ、そして円盤の中心軸に近い四列の透孔群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ｂにより行われる請求項２に記載のチップ電子部品の検査方法。 A group of through-holes are arranged on a disk so as to form eight rows of concentric circles, and inspection of chip electronic components held in a group of four rows of through-holes close to the outer periphery of the disc has a total of four pairs of electrode terminals. The inspection of the chip electronic components held in the four rows of through holes close to the central axis of the disk is performed by the inspection device B having a total of four pairs of electrode terminals. The inspection method of the chip electronic component as described.
  5. 　透孔の群が十二列の同心円を形成するように円盤上に配置され、円盤の外周に近い四列の透孔の群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ａにより行われ、円盤の中心軸に近い四列の透孔の群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ｂにより行われ、そして上記の外周側に近い四列の透孔の群と中心軸に近い四列の透孔の群との間にある四列の透孔の群に保持されたチップ電子部品の検査が合計四対の電極端子を備えた検査器Ｃにより行われる請求項２に記載のチップ電子部品の検査方法。 A group of through-holes are arranged on a disk so as to form twelve rows of concentric circles, and inspection of chip electronic components held in a group of four rows of through-holes close to the outer periphery of the disc has a total of four pairs of electrode terminals. The inspection of the chip electronic components held in the group of four rows of through holes close to the central axis of the disk is performed by the inspection device B having a total of four pairs of electrode terminals. A total of four pairs of inspections of chip electronic components held in a group of four rows of through-holes between a group of four rows of through-holes close to the outer peripheral side and a group of four rows of through-holes close to the central axis The method for inspecting a chip electronic component according to claim 2, which is performed by an inspection device C having an electrode terminal.
  6. 　検査されるチップ電子部品が、対向する表面に一対の電極を備えた部品である請求項１に記載のチップ電子部品の検査方法。 2. The chip electronic component inspection method according to claim 1, wherein the chip electronic component to be inspected is a component having a pair of electrodes on opposite surfaces.
  7. 　検査されるチップ電子部品がチップキャパシタである請求項１に記載のチップ電子部品の検査方法。 2. The chip electronic component inspection method according to claim 1, wherein the chip electronic component to be inspected is a chip capacitor.
  8. 　検査される電気特性が静電容量である請求項２に記載のチップ電子部品の検査方法。 3. The chip electronic component inspection method according to claim 2, wherein the electrical property to be inspected is capacitance.
  9. 　板状材料にチップ電子部品を一時的に収容することができる二以上の透孔が互いに近接した位置に形成されてなるチップ電子部品保持板、該チップ電子部品保持板の各透孔の両開口部に近接した位置に配置されている一対の電極端子、該一対の電極端子のそれぞれに電気的に接続されている検査器、そして各検査器に電気エネルギーと検査処理とに関する信号を供給するように各検査器に電気的に接続されている制御器を含み、各検査器から電極端子を介して、二以上の透孔に収容されたチップ電子部品のそれぞれに、互いに同一もしくは略同一の周波数を持つ検査用電圧を所定の時期に印加して、その検査用電圧の印加により各チップ電子部品にて発生する電流値を各検査器で検出できるようにされているチップ電子部品検査装置であって、該制御器に、チップ電子部品保持板の二以上の透孔に収容されたチップ電子部品のそれぞれへの検査用電圧印加の時期が互いに重複しないように制御する制御システムが備えられていることを特徴とするチップ電子部品の検査装置。 A chip electronic component holding plate in which two or more through holes capable of temporarily accommodating chip electronic components in a plate-like material are formed at positions close to each other, and both openings of each through hole of the chip electronic component holding plate A pair of electrode terminals arranged at positions close to the unit, an inspector electrically connected to each of the pair of electrode terminals, and a signal relating to electrical energy and inspection processing to each inspector Each of the chip electronic components housed in the two or more through-holes through the electrode terminals from the respective inspection devices through the electrode terminals. Is a chip electronic component inspection apparatus in which each inspection device can detect a current value generated in each chip electronic component by applying an inspection voltage having a predetermined time and applying the inspection voltage. The controller is provided with a control system for controlling the timing of applying the test voltage to each of the chip electronic components accommodated in the two or more through holes of the chip electronic component holding plate so as not to overlap each other. An inspection apparatus for chip electronic components.
PCT/JP2013/068857 2012-07-10 2013-07-10 Method of inspection of chip electronic components and inspection device WO2014010623A1 (en)

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