WO2013141287A1 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- WO2013141287A1 WO2013141287A1 PCT/JP2013/058028 JP2013058028W WO2013141287A1 WO 2013141287 A1 WO2013141287 A1 WO 2013141287A1 JP 2013058028 W JP2013058028 W JP 2013058028W WO 2013141287 A1 WO2013141287 A1 WO 2013141287A1
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Definitions
- the present invention relates to a semiconductor device, and more particularly, to a semiconductor device having a power semiconductor element used in every scene from power generation and transmission to efficient use of energy and regeneration, and a method for manufacturing the same.
- Power modules are spreading in various products from industrial equipment to home appliances and information terminals, and power modules mounted on home appliances are particularly required to be small and highly reliable.
- a power module is provided with a metal base plate that generates heat and dissipates this heat because the power semiconductor element contained in the power module handles a high voltage and a large current.
- an electrode terminal through which a high voltage and a large current pass needs to secure an insulation distance from the base plate.
- Patent Document 1 and Patent Document 2 disclose a power module in which an electrode is disposed on the upper surface of a module and a base plate is disposed on an opposed lower surface, and a circuit portion is resin-sealed by a transfer mold method. .
- the package can be reduced in size as compared with the case where the electrodes are arranged on the side surfaces.
- the power module is also required to have a package form applicable to a SiC semiconductor which is likely to become a mainstream in the future because of its high operating temperature and excellent operating efficiency.
- the power module is formed by the sealing work by the transfer mold method.
- the electrode in order to reliably expose the electrode on the upper surface of the power module, it is necessary to position the electrode with respect to the transfer mold die with extremely high accuracy.
- a method in which the electrode is made springy and the electrode is pressed against the mold, or a method in which the electrode is exposed to the outside after sealing has been proposed.
- Patent Document 3 proposes a power module structure using a bowl-shaped metal plate.
- the connection is made by soldering, the sealing resin is likely to be softened and deformed, but no countermeasure is described.
- the bowl-shaped metal plate has a side wall whose height is higher than that of the encapsulating sealing resin, the insulating distance from the electrode is reduced by exposing the metal at the apex of the side wall. . Therefore, there is a problem that a housing for holding an electrode having excellent insulating properties is required or the package becomes large. Furthermore, peeling due to a difference in thermal expansion coefficient between the side wall and the sealing resin is likely to occur, and there is a problem that the insulating property deteriorates over time. Thus, quality degradation also becomes a problem in the power module of Patent Document 3.
- the present invention has been made to solve such problems, and an object of the present invention is to provide a semiconductor device and a method for manufacturing the same, in which there is no damage to the components in the semiconductor device and no deterioration in the quality of the semiconductor device. .
- a semiconductor device includes a tray having a concave storage portion, a circuit portion having a semiconductor element and a wiring member, and being injected and stored in the storage portion.
- a sealing resin for potting and sealing the top of the side wall of the tray and the circuit part, and a part of the wiring member is exposed as an external electrode on the top surface of the sealing resin, and the sealing resin Has a heat resistant temperature exceeding the melting point of the solder joining the tray to the cooler, It is characterized by that.
- the external electrode is exposed and the sealing resin is injected into the storage portion of the tray in which the circuit portion is stored, and the circuit portion is potted and sealed. Therefore, a semiconductor device in which the external electrode is exposed on the upper surface of the sealing resin can be manufactured. At this time, since it is not a transfer mold method, the semiconductor element and the substrate are not stressed or damaged, and the external electrode Is exposed in advance, and processing such as bending of the external electrode is not performed after sealing, so that quality degradation of the semiconductor device does not occur.
- the heat resistance temperature of the sealing resin is higher than that of the solder that joins the tray and the cooler, strength deterioration and dielectric strength deterioration due to thermal softening and deformation due to thermal history during soldering are reduced. It becomes possible to suppress.
- the sealing resin is formed higher than the tray, the top of the metal tray side wall is covered with the sealing resin, and the tray side wall close to the electrode for high current is compared to the other side wall of the tray. Is formed low. Thereby, it is possible to ensure a large insulation distance between the metal tray and the electrode. Therefore, a housing is unnecessary and it is possible to suppress an increase in package size.
- FIG. 3 is a cross-sectional view taken along a line AA shown in FIG.
- FIG. 3 is a cross-sectional view taken along a line BB shown in FIG.
- FIG. 6 is a cross-sectional view taken along a line CC shown in FIG.
- FIG. 6 is a perspective view which shows a part of structure of the semiconductor device in Embodiment 2 of this invention, specifically, a tray and a lead frame.
- FIG. 8 is a perspective view showing a state in which a tie bar of a lead frame is bent in the semiconductor device shown in FIG. 7. It is a perspective view which shows a part of structure of the semiconductor device in Embodiment 3 of this invention, specifically, shows a multi-piece tray. It is a figure which shows an example of a structure of the semiconductor device in Embodiment 4 of this invention. It is a figure which shows another example of a structure of the semiconductor device in Embodiment 4 of this invention. It is a figure which shows another example of a structure of the semiconductor device in Embodiment 4 of this invention. It is a figure which shows the other example of a structure of the semiconductor device in Embodiment 4 of this invention.
- FIG. 12A is a perspective view showing a state in which a part of the side wall of the tray is bent in the semiconductor device shown in FIG. 12B.
- FIG. 12B is a perspective view showing a state in which a part of the side wall of the tray is bent in the semiconductor device shown in FIG. 12B.
- Embodiment 1 FIG. A semiconductor device 101 according to the first embodiment of the present invention will be described with reference to FIGS.
- a power module power semiconductor device
- a large current about 100 A to about 800 A
- the semiconductor device 101 is not limited to this. May be a semiconductor device that handles normal voltages and currents other than high voltages and large currents.
- the semiconductor device 101 includes a tray 10, a circuit unit 60, and a sealing resin 70 as basic components.
- the tray 10 is formed into a concave tray shape by pressing an aluminum plate having a thickness of 1 mm, and includes a bottom surface 11, a low side wall 12 having a low height, and a high side wall 13 having a high height.
- a concave accommodating portion 15 that accommodates the circuit portion 60 is formed by the bottom surface 11, the low side wall 12, and the high side wall 13.
- the high side walls 13 that form the storage portion 15 are a pair of side walls that face each other and extend in the first direction 91, respectively, and are higher than the low side walls 12. Further, the upper end portion of each high side wall 13 is bent to form a flange portion 13a, and through holes 14 penetrating the flange portion 13a are formed at both ends of the flange portion 13a in the first direction 91. .
- the low side walls 12 forming the storage portion 15 are disposed opposite to each other between the high side walls 13 along the second direction 92 perpendicular to the first direction 91, and are lower in height than the high side walls 13. It is the formed side wall.
- the circuit unit 60 includes a semiconductor element and a wiring member.
- the semiconductor element includes a diode 30 and an IGBT (Insulated Gate Bipolar Transistor) 31, and the wiring member includes a bus bar 40, external electrodes 41 to 43, leads 44, signal electrodes 45, solder, and the like.
- IGBT Insulated Gate Bipolar Transistor
- the heat sink 20 made of Cu is mounted on the bottom surface 11 of the tray 10 via an insulating sheet 55, and the diode 30 and the IGBT 31 are joined to each other by the solder 51.
- a Cu bus bar 40 is disposed and joined by solder 52.
- a part of the bus bar 40 extends as the external electrodes 41 and 43 in the thickness direction 101 a (FIG. 3) of the semiconductor device 101, and the other part of the bus bar 40 serves as the lead 44 by the heat sink 20 and the solder 53. It is joined.
- the external electrode 42 is joined to the heat sink 20.
- a wire bond 54 is joined to the signal electrode 45 from the gate electrode 32 of the IGBT 31 or the like.
- the external electrodes 41 and 43 corresponding to power electrodes that are connected to the IGBT 31 and handle high voltage and large current are arranged on the side of the low side wall 12 that forms the storage section 15 of the tray 10. Yes.
- the creepage distance between the power electrode and the metal tray 10, that is, the low side wall 12 is created by forming the low side wall 12 on the tray 10 and associating the power electrode with the low side wall 12. It can be ensured and high insulation can be achieved.
- the circuit part 60 having such a configuration is accommodated in the accommodating part 15 of the tray 10 via the insulating sheet 55 as described above. Thereafter, a silicone gel 71 constituting the sealing resin 70 is injected into the storage portion 15 to seal the circuit portion 60, and a potting sealant 72 that also forms the sealing resin 70 is provided on the storage portion 15.
- the whole of 15 is filled.
- the potting sealing resin 72 may be injected into the storage portion 15 so as to substantially coincide with the flange portion 13a corresponding to the top of the high side wall 13 of the tray 10.
- the flange portion 13a may be covered and injected into the storage portion 15 beyond the height of the flange portion 13a.
- the insulation between the flange portion 13a and the external electrode 41 and the like can be further ensured.
- the external electrodes 41 to 43 and the signal electrode 45 are exposed from the surface of the potting sealant 72 as shown in FIG. Further, the pipe-like spacer 16 is bonded to the through hole 14 of the tray 10, and the tray 10 having the circuit portion 60 can be fixed with screws through the through hole 14 and the spacer 16.
- the circuit unit 60 accommodated in the storage unit 15 of the tray 10 is potted and sealed with the sealing resin 70, and at this time, the surface of the sealing resin 70 is exposed.
- the external electrodes 41 to 43 and the signal electrode 45 are extended. Therefore, according to the semiconductor device 101, since the electrode is not pressed at the time of sealing, there is no possibility that the semiconductor element or the substrate to which the electrode is bonded is damaged, and the electrode is processed after the sealing. Therefore, there is no possibility of quality deterioration of the semiconductor device due to dielectric breakdown or moisture absorption.
- Cu is used as the heat sink 20 on which the semiconductor element such as the IGBT 31 is mounted.
- another metal such as Al or a ceramic substrate such as AlN may be used.
- Cu is used for the bus bar 40, the external electrode 41, and the like, a Ni—Fe alloy or Al may be used. In this case, the same effect as Cu can be obtained.
- a spring terminal or a press-fit terminal may be used instead of the Cu plate, and this configuration can provide the same effect as that of the Cu plate.
- an Al plate is used as the tray 10, but a metal tray such as Cu, Fe—Ni alloy, or stainless steel may be used. In this case, the same effect as that of Al can be obtained. Furthermore, when a power element with a small calorific value or a normal element is used as a semiconductor element, a resinous tray such as a fluororesin or PET may be used. In this case, the same effect as Al can be obtained. it can.
- the metal tray 10 by forming the metal tray 10 using a solderable material such as Cu, Ni, or tin (Sn plated steel), or by performing metallization that can be soldered on the surface of the material such as aluminum.
- the tray 10 can be soldered to the cooler, and further reliability can be improved.
- the sealing resin 70 has a heat resistance temperature higher than the melting point of the solder in the soldered portion.
- the silicone gel 71 and the potting sealant 72 are used as the sealing resin 70.
- the present invention is not limited to this, and the silicone gel 71 is omitted by using a highly permeable potting sealant. In this case, the same effect can be obtained.
- a cylindrical protrusion 17 may be formed on a part of the bottom surface 11 of the tray 10.
- the protrusion 17 can be used as an opening for fixing with screws when the semiconductor device 101 after potting sealing is incorporated into a device. Therefore, when the semiconductor device 101 is incorporated into a device, reliable fixing can be achieved, and reliability can be improved.
- Embodiment 2 FIG.
- the bus bar 40, the signal electrode 45, and the like use individual members.
- the lead frame 80 is integrally formed by a frame 81 and a tie bar 82 that form 80.
- the configuration of the semiconductor device 101 is not changed.
- An opening 83 is formed in the lead frame 80, and the lead frame 80 can be positioned with respect to the tray 10 using the through hole 14 of the tray 10.
- the lead frame 80 in a state where the lead frame 80 is attached to the tray 10, the diode 30 and the active surface of the IGBT 31 soldered to the heat sink 20 provided in the storage unit 15 of the tray 10, and A predetermined portion such as the bus bar 40 of the lead frame 80 is soldered.
- the tie bar 82 portion having the external electrodes 41 to 43 and the signal electrode 45 in the lead frame 80 is bent along the thickness direction 101a.
- the parts such as the bus bar 40 of the circuit part 60 and the lead frame 80 are potted and sealed together with the sealing resin 70 with respect to the storage part 15 as described above.
- the sealing resin 70 with respect to the storage part 15 as described above.
- the above-described effects exhibited by the semiconductor device 101 in the first embodiment can be obtained.
- the semiconductor device 102 by using the lead frame 80, it is possible to collectively arrange electrodes with respect to the semiconductor elements and the like, so that the productivity of the semiconductor device can be improved and each electrode can be improved. It is also possible to improve the positional accuracy.
- Embodiment 3 a form in which one storage portion 15 is formed for one tray 10 is disclosed.
- one tray 10-2 has a plurality of circuit units 60, that is, a plurality of storage units 15 arranged in parallel along the first direction 91. It is configured to be stowable. That is, the high side wall 13 of the multi-tray tray 10-2 has a length capable of storing a plurality of circuit portions 60 in parallel along the first direction 91, and the low side wall of the tray 10-2. 12 are arranged at a plurality of locations in the first direction 91 so as to face each other on the bottom surface 11 of the tray 10-2.
- the low side wall 12 is manufactured by pressing the bottom surface 11 into a convex shape.
- the tray 10-2 is capable of accommodating four circuit portions 60, that is, four accommodating portions 15 are illustrated, but the number of accommodating portions is not limited to four, can do.
- Each tray 10-2 configured in this manner contains the above-described circuit sections 60 in the respective storage sections 15, and these are collectively sealed with the sealing resin 70 by the above-described method. Is done.
- the configuration of the circuit unit 60 and the positional relationship between the power electrode of the circuit unit 60 and the low side wall 12 of the tray 10-2 are the same as described above, and the circuit unit 60 potting sealing method Is the same as described above. That is, the semiconductor device 103 according to the third embodiment is the same as the semiconductor device 101 according to the first embodiment except that the tray 10-2 is different from the tray 10.
- the tray 10-2 is cut at the cutting portion 18 which is located corresponding to the low side wall 12 and extends in the second direction 92. By this cutting, a plurality of circuit units 60 are separated from one tray 10-2.
- the effect obtained by the semiconductor device 101 according to the first embodiment can be obtained.
- the productivity of the semiconductor device can be further improved by using the multi-piece tray 10-2.
- the low side wall 12 is formed by pressing the continuous flat bottom surface 11, the low side wall 12 can be easily manufactured as compared with the case where the low side wall 12 is individually formed like the tray 10. The height can be easily optimized, and therefore there is an advantage that it is easy to secure a creepage distance between the power electrode and the low side wall 12.
- each modification described in the first embodiment can be applied to the semiconductor device 103 in the third embodiment, and the configuration of the second embodiment can also be applied.
- the operation of separating the tie bar 82 from the external electrodes 41 to 43 and the signal electrode 45 after sealing is performed either before or after the above individualization. You can go there.
- the plurality of trays are used in a connected state without being cut, and the external electrodes 41 to 43 are arranged so as to extend over the plurality of trays. It becomes possible to contribute to the improvement of the assembling property and the miniaturization due to the capacity increase and the common use of the electrode terminals.
- FIG. 10A to 10D, 11A, and 11B are schematic views of the semiconductor device 104 according to the fourth embodiment of the present invention.
- the top 10a of the side wall of the tray 10 is covered with a sealing resin so that the insulation distance of the external electrodes 41 to 43 with respect to the metal tray 10 is ensured.
- the ceramic substrate 201 in which the diode 30 and the IGBT 31 are joined to the conductor layer 202 of the ceramic substrate 201 by the solder 51 is joined to the storage portion 15 of the metal tray 10 by the soldering portion 56. ing.
- bus bar 40 One end of the bus bar 40 is joined to the diode 30 and the IGBT 31 by the solder 52, and the other end extends to the outside as the external electrodes 41 and 43.
- a wire bond 50 is joined to the signal electrode 45 from the gate electrode 32 of the IGBT or the like.
- the storage portion 15 of the tray 10 covering the circuit portion 60 is sealed with a direct potting sealing resin 72, and at this time, the tray 10 is sealed so as to cover the upper surface of the side wall top 10a.
- the side wall top 10 a corresponds to at least the side wall top of the high side wall 13 among the low side wall 12 and the high side wall 13.
- a metal tray 10 is joined to the cooler 90 by a soldering portion 57.
- the soldering portion 57 forms a fillet (wetting up) portion 57 a having a sufficient height with respect to the low side wall 12 and the high side wall 13 of the tray 10, and the solder thickness of the soldering portion 57 on the bottom surface 11 of the tray 10. It is desirable that it is wetted to a height of 200% or more.
- the potting sealing resin 72 has a heat resistant temperature higher than the melting point of the solder of the soldering portion 57.
- a metal or resin dam material 62 may be provided on the top surface of the side wall top 10a of the tray 10 as shown in FIG. 10B.
- the dam material 62 By providing the dam material 62, the high side wall 13 of the tray 10 can be made higher and the side wall top 10a can be reliably sealed.
- the top 10a of the side wall of the tray may be folded inward of the storage unit 15. In this way, by bending the side wall top 10a to the inside of the storage portion 15, the direct potting sealing resin 72 can be injected to the outside completely covering the side wall top 10a. Further, the solder fillet 57a may be covered.
- the circuit unit 60 has the same configuration as that of the semiconductor device 101 according to the first embodiment. Therefore, the semiconductor device produced by the semiconductor device 101 according to the first embodiment. It is possible to obtain an effect that there is no damage to the internal components and deterioration of the quality of the semiconductor device. Furthermore, in the semiconductor device 104 of the fourth embodiment, an insulation distance between the side wall top 10a of the tray 10 and the external electrodes 41 to 43 can be secured.
- a resin electrode support member 411 that supports the external electrode 41 is manufactured, and at least the top of the side wall of the low side wall 12 among the low side wall 12 and the high side wall 13 of the metal tray 10. It can also be arranged so as to fit into the part.
- the external electrodes 41 to 43 can be positioned with respect to the tray 10 by injecting the potting sealing resin 72 into the storage portion 15 of the tray 10 and sealing it.
- the tray 10 includes a metal base plate 210 that forms the tray, an insulating sheet 55 with a metal substrate 212, and a claw member 211.
- An insulating sheet 55 having a substrate 212 is placed, and the peripheral four sides of the insulating sheet 55 are sandwiched between metal claw members 211 and fixed to the base plate 210.
- the base plate 210 having the insulating sheet 55, the claw member 211, and the metal substrate 212 is bent around the claw member 211 as shown in FIG.
- the diode 30, the external electrode 41, etc. are mounted on the metal substrate 212, and the potting sealing resin 72 is injected and sealed.
- the base plate 210 and the insulating sheet 55 are integrally formed and used as the metal tray 10, so that the structure can be simplified and highly reliable.
- the claw member 211 sandwiches the outer peripheral portion of the insulating sheet 55, it is possible to prevent the insulating sheet 55 from being deformed and peeled when the base plate 210 and the claw member 211 are formed into a tray mold. It becomes possible.
- Embodiment 5 the semiconductor device 105 according to the fifth embodiment of the present invention will be described.
- the external electrodes 41 to 43 are arranged on the side of the low side wall 12 of the tray 10 in order to secure an insulation distance between the metal tray 10 and the external electrodes 41 to 43.
- a new tray 215 is used to secure the insulation distance by bending the side wall. This will be described in detail below.
- the metal tray 215 is formed into a tray shape by, for example, pressing a thin copper plate having a thickness of 0.5 mm.
- each side wall corresponding to the four sides of the tray 215 has the same height without being high or low.
- the side wall 216 adjacent to the external electrodes 41 to 43 has a cut 216a in a U shape so that it can be bent.
- the Cu heat sink 20 is mounted on the tray 215 via the insulating sheet 55, and the diode 30 and the IGBT 31 are joined to each other by the solder 51.
- a Cu bus bar 40 is disposed on the upper portion, and is joined to the active surfaces of the diode 30 and the IGBT 31 by solder 52.
- a part of the bus bar 40 extends in the vertical direction as the external electrodes 41 and 43, and a part is joined as a lead 44 by the heat sink 20 and the solder 53.
- the external electrode 42 is bonded to the heat sink 20.
- a wire bond 50 is joined to the signal electrode 45 from the gate electrode 32 of the IGBT 31 or the like. As shown in FIG.
- the circuit portion 60 configured as described above is injected with a potting sealing resin 72 and sealed as a whole, and the external electrodes 41 to 43 are exposed from the potting sealing resin 72. Become.
- the tray 215 is soldered to the cooler 90 using the solder 57.
- the side wall 216 of the tray 215 located on the side of the external electrodes 41 to 43 is moved outside the tray 215 along the cut line 216a, that is, the external electrodes 41 to 43.
- the semiconductor device 105 is manufactured by bending in a direction away from the semiconductor device 105. With this configuration, an insulation distance between the external electrodes 41 to 43 and the side wall 216 can be secured.
- the semiconductor device 105 in the fifth embodiment as in each of the above-described embodiments, it is possible to obtain an effect that there is no damage to the components in the semiconductor device and no deterioration in the quality of the semiconductor device.
- the side wall 216 may form a slit so thin that the potting sealing resin 72 does not leak, or after resin sealing, the side wall 216 may be removed along the cut 216a. Moreover, you may apply
- the tray 215 made of Cu is used, but the same effect can be obtained by using a metal material such as an Fe—Ni alloy or tin plate. Further, in the case of a power element having a relatively small calorific value, the same effect as described above can be obtained even if the side wall 216 is formed in a resin tray such as a fluororesin or PET. Further, although the heat sink 20 made of Cu is used, the same effect as described above can be obtained by using other metals such as Al and ceramic substrates such as AlN. Furthermore, although Cu is used for the bus bar 40, the external electrode 41, and the like, the same effect can be obtained by using a Ni—Fe alloy and Al.
- silicone gel and the potting sealing resin 72 were used here, the same effect is acquired even if a silicone gel is abbreviate
- plate material was used as the external electrode 41 and the signal electrode 45, the same effect is acquired even if it uses a spring terminal and a press fit terminal, for example.
- Embodiment 6 FIG. Next, with reference to FIG. 13A and FIG. 13B, the semiconductor device 106 in Embodiment 6 of this invention is demonstrated. Also in the semiconductor device 106 of the sixth embodiment, new trays 220 and 222 are used. That is, as shown in FIG. 13A, the metal tray 220 has a fixing portion 221 that protrudes to the inside of the tray 220 at one or a plurality of locations in the upper portion of the peripheral edge portion. The other configuration is the same as that of the semiconductor device 101 in the first embodiment, for example.
- This fixing part 221 acts as follows. That is, for example, the ceramic substrate 201 or the like on which the circuit unit 60 is formed is mounted on the storage unit 15 of the tray 220, and then the fixing unit 221 is bent inward so Solder and fix.
- the independent conductor layer 202a is an independent conductor layer that is not electrically connected to the conductor layer 202 formed on the surface of the ceramic substrate 201 and soldered with the IGBT 31 or the like.
- a metal tray 222 as shown in FIG. 13B can be used.
- the tray 222 has horizontal slits 223 at the four corners thereof, and has bent portions 222a formed by bending the corners of the tray 222 inward.
- the bent portion 222a corresponds to an example of a fixed portion, and the method for forming the bent portion 222a is not limited to this.
- Such a bent portion 222a can reinforce the bonding between the tray 220 and the ceramic substrate 201 by being connected to the conductor layer 202a in the same manner as the fixing portion 221 described above.
- Embodiment 7 FIG. Next, with reference to FIG. 14A and FIG. 14B, the semiconductor device 107 in Embodiment 7 of this invention is demonstrated. Also in the semiconductor device 107 of the seventh embodiment, a new tray 225 is used. The circuit unit 60 loaded in the storage unit 15 of the tray 225 is the same as that in each of the above-described embodiments, and a description thereof is omitted here.
- the metal tray 225 has protrusions 226 that form, for example, corrugated irregularities on the cooler surface 225a that is located on the opposite side of the storage unit 15 and faces the cooler.
- a cooler 227 having a concavo-convex portion 227 a that engages with the protrusion 226 is provided.
- the tray 225 and the cooler 227 are fixed to each other by meshing the protrusion 226 of the tray 225 and the uneven portion 227a of the cooler 227, for example, by caulking the cooler 227.
- Such fixing enables fixing and heat dissipation similar to soldering.
- a refrigerant passage 228a through which a refrigerant flows may be formed using a jacket 228 that can be joined to the tray 225 without refrigerant leakage.
- the refrigerant for example, water can be used.
- the protrusions 226 on the tray 225 are positioned in the refrigerant passage 228a and function as cooling fins, so that the cooling of the circuit unit 60 can be further enhanced.
- the semiconductor device 107 according to the seventh embodiment can form a semiconductor device integrated with the cooler.
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Abstract
Description
また、封止後に電極を曲げる等の加工を施した場合、電極と封止樹脂との間に隙間の発生等が起こり、絶縁破壊や吸湿によるパワーモジュールの品質劣化が懸念される。
また、桶状の金属板は、内包する封止樹脂よりも高さの大きな側壁を有すると記載されているが、側壁の頂点の金属が露出していることにより電極との絶縁距離が小さくなる。よって、絶縁性に優れた電極保持用のハウジングが必要であったり、パッケージが大きくなるという問題がある。さらに側壁と封止樹脂との熱膨張係数差による剥離が生じやすく、絶縁性が経年劣化するという問題もある。
このように特許文献3のパワーモジュールにおいても品質劣化が問題となる。
即ち、本発明の一態様における半導体装置は、凹状の収納部を有するトレイと、上記収納部に収容され、半導体素子及び配線用部材を有する回路部と、上記収納部に注入され、収容されている上記回路部及び上記トレイの側壁頂上部をポッティング封止する封止樹脂と、を備え、上記配線用部材の一部は、上記封止樹脂の上面に外部電極として露出し、上記封止樹脂は、上記トレイを冷却器に接合するはんだの融点を超える耐熱温度を有する、
ことを特徴とする。
図1から図4を参照して、本発明の実施の形態1における半導体装置101について説明する。ここでは半導体装置101として、高電圧(約200V~約1200V)及び大電流(約100A~約800A)を扱うパワーモジュール(電力半導体装置)を例に採るが、これに限定されず、半導体装置101は、高電圧及び大電流以外の通常の電圧及び電流を扱う半導体装置であってもよい。
トレイ10は、本実施形態では一例として1mm厚のアルミニウム板をプレス加工して凹状のトレイ形状に作製され、底面11と、高さの低い低側壁12と、高さの高い高側壁13とを有する。これらの底面11、低側壁12、及び高側壁13にて、回路部60を収容する凹状の収納部15が形成される。
また、収納部15を形成する低側壁12は、第1方向91に直角な第2方向92に沿って高側壁13間にて互いに対向して配置され、高側壁13に比べて高さを低く形成した側壁である。
ここでポッティング封止樹脂72は、例えば、図3に示すようにトレイ10の高側壁13における頂上部に相当するフランジ部13aと高さでほぼ一致するように収納部15に注入してもよいし、図4に示すように、フランジ部13aを覆いフランジ部13aの高さを超えて収納部15に注入してもよい。図4に示すように、フランジ部13aを覆いポッティング封止樹脂72を配置した場合、フランジ部13aと外部電極41等との間の絶縁性をより確保することができる。
よって半導体装置101によれば、封止の際に電極が押圧される形態ではないことから、電極が接合されている半導体素子や基板が損傷する可能性はなく、また、封止後に電極の加工を施す必要もないことから、絶縁破壊や吸湿による半導体装置の品質劣化の可能性もない。
また、バスバー40や外部電極41等にCuを用いたが、Ni-Fe合金やAlを用いても良く、この場合もCuと同様の効果を得ることができる。
また、外部電極41~43及び信号電極45について、Cu板材に代えて、スプリング端子やプレスフィット端子を用いても良く、この構成でもCu板材の場合と同様の効果を得ることができる。
このようにトレイ10と冷却器とをはんだ付けする場合には、封止樹脂70は、はんだ付け部分におけるはんだの融点よりも高い耐熱温度を有している。
上述の実施の形態1では、バスバー40や信号電極45等は、それぞれ個別の部材を用いているが、本実施の形態2の半導体装置102では、これらは、図7に示すように、リードフレーム80を形成する枠81やタイバー82によって、リードフレーム80と一体的に形成している。その他の構成について、上述の半導体装置101の構成に変更はない。
このようなリードフレーム80を用いた場合、トレイ10にリードフレーム80が取り付けられた状態において、トレイ10の収納部15に設けられたヒートシンク20にはんだ接合されたダイオード30及びIGBT31の能動面と、リードフレーム80のバスバー40等の所定箇所とをはんだ接合する。
折り曲げ後、上述したように収納部15に対して封止樹脂70にて回路部60及びリードフレーム80のバスバー40等の部分を共にポッティング封止する。
そして、封止後、外部電極41~43や信号電極45からタイバー82を切り離すことで、外部電極41~43や信号電極45について個別の電極形成が可能となる。
上述の各実施形態では、一つのトレイ10に対して一つの収納部15を形成した形態を開示した。図9に示すように、この実施の形態3の半導体装置103では、一つのトレイ10-2は、第1方向91に沿って複数の回路部60を、つまり複数の収納部15を並列して収納可能なように構成されている。つまり、多数個取りのトレイ10-2の高側壁13は、第1方向91に沿って回路部60を複数個、並列して収納可能な長さを有し、かつトレイ10-2の低側壁12は、トレイ10-2の底面11において、互いに対向して第1方向91における複数箇所に配置される。本実施形態3において、低側壁12は、底面11を凸状にプレス加工して作製されている。
尚、図9では、トレイ10-2は、4つの回路部60を収容可能に、つまり4つの収納部15を図示するが、収容可能数は、4つに限定するものではなく、複数個とすることができる。
図10Aから図10D、図11A及び図11Bには、本発明の実施の形態4における半導体装置104の概略図を示している。この実施の形態4における半導体装置104では、トレイ10の側壁の頂上部10aを封止樹脂で覆い、金属製のトレイ10に対する外部電極41~43の絶縁距離を確保するよう構成している。
図10Aに示すように、金属製のトレイ10の収納部15には、セラミック基板201の導体層202に、はんだ51によってダイオード30及びIGBT31を接合したセラミック基板201が、はんだ付け部56によって接合されている。バスバー40は、その一端がダイオード30及びIGBT31とはんだ52によって接合され、その他端が外部電極41、43として外部へ延伸している。また、信号電極45には、IGBTのゲート電極32などからワイヤボンド50が接合されている。
さらにこのような金属製のトレイ10は、冷却器90に対してはんだ付け部57によって接合される。はんだ付け部57は、トレイ10の低側壁12及び高側壁13に対して十分な高さのフィレット(ぬれ上がり)部57aを形成しており、トレイ10の底面11におけるはんだ付け部57のはんだ厚の200%以上の高さまでぬれ上がっていることが望ましい。
また、このような作製工程順から、ポッティング封止樹脂72は、はんだ付け部57のはんだの融点よりも高い耐熱温度を有している。
次に、図12Aから図12Cを参照して、本発明の実施の形態5における半導体装置105について説明する。実施の形態1等では、金属製のトレイ10と外部電極41~43との間の絶縁距離を確保するためトレイ10の低側壁12側に外部電極41~43を配置している。これに対し本実施の形態5の半導体装置105では、新たなトレイ215を用いて、その側壁を折り曲げることで絶縁距離を確保する。以下に詳しく説明する。
このように構成することで、外部電極41~43と側壁216との絶縁距離を確保することができる。勿論、実施の形態5における半導体装置105においても上述の各実施形態と同様に、半導体装置内の構成部分の損傷及び半導体装置の品質劣化がないという効果を得ることができる。
また、側壁216以外の側壁の側壁頂上部に、実施の形態4で説明したようなダム材を塗布してもよい。これによりポッティング封止樹脂72を側壁頂上部を覆ってより高く注入することができる。
また、ここではシリコーンゲル及びポッティング封止樹脂72を用いたが、浸透性の高いポッティング封止剤を用いればシリコーンゲルを省略しても同様の効果が得られる。
また、Cu板材を外部電極41及び信号電極45として用いたが、例えばスプリング端子及びプレスフィット端子を用いても同様の効果が得られる。
次に、図13A及び図13Bを参照して、本発明の実施の形態6における半導体装置106について説明する。本実施の形態6の半導体装置106でも、新たなトレイ220、222を用いる。
即ち、図13Aに示すように、金属製のトレイ220は、周縁部の上部の一又は複数箇所に、トレイ220の内側へ突設した固定部221を有する。尚、その他の構成は、例えば実施の形態1における半導体装置101と同じである。
次に、図14A及び図14Bを参照して、本発明の実施の形態7における半導体装置107について説明する。本実施の形態7の半導体装置107でも、新たなトレイ225を用いる。尚、トレイ225の収納部15に装填される回路部60は、上述の各実施形態におけるものに同じであり、ここでの説明を省略する。
本発明は、添付図面を参照しながら好ましい実施形態に関連して充分に記載されているが、この技術の熟練した人々にとっては種々の変形や修正は明白である。そのような変形や修正は、添付した請求の範囲による本発明の範囲から外れない限りにおいて、その中に含まれると理解されるべきである。
又、2012年3月22日に出願された、日本国特許出願No.特願2012-65161号の明細書、図面、特許請求の範囲、及び要約書の開示内容の全ては、参考として本明細書中に編入されるものである。
13 高側壁、15 収納部、17 突起、18 切断部、
30 ダイオード、31 IGBT、40 バスバー、41、43 外部電極、
55 絶縁シート、60 回路部、70 封止樹脂、72 ポッティング封止樹脂、
80 リードフレーム、91 第1方向、92 第2方向、
101~107 半導体装置、
210 ベース板、211 爪部材、212 金属基板、216 側壁、
221,222a 固定部、226 突起、227 冷却器、227a 凹凸部、
228 ジャケット、228a 冷媒用通路、228b 底面、231 電極支持部材。
Claims (14)
- 凹状の収納部を有するトレイと、
上記収納部に収容され、半導体素子及び配線用部材を有する回路部と、
上記収納部に注入され、収容されている上記回路部及び上記トレイの側壁頂上部をポッティング封止する封止樹脂と、を備え、
上記配線用部材の一部は、上記封止樹脂の上面に外部電極として露出し、
上記封止樹脂は、上記トレイを冷却器に接合するはんだの融点を超える耐熱温度を有する、
ことを特徴とする半導体装置。 - 上記トレイは、上記外部電極の内、高電圧大電流を扱う電力用電極に近い側壁が、その他の側壁に比較して低く形成されている、請求項1記載の半導体装置。
- 上記トレイは、上記収納部を形成する、高側壁と低側壁とを有し、上記高側壁は、その延在方向である第1方向に沿って上記回路部を複数組、並列して収容する長さを有し、
上記低側壁は、互いに対向して上記第1方向における複数箇所に配置され、ポッティング封止された各回路部を個片化する切断部となる、請求項1又は2記載の半導体装置。 - 上記トレイに取り付け可能なフレームであり、上記外部電極を含む上記配線用部材を一体的に形成したリードフレームをさらに備え、このリードフレームを上記トレイに取り付けた状態で封止樹脂が上記収納部に注入される、請求項1から3のいずれか1項に記載の半導体装置。
- 上記トレイは、上記収納部の底面に筒状の突起をさらに有する、請求項1から4のいずれか1項に記載の半導体装置。
- 上記トレイの側壁頂上部に取り付けられ、上記外部電極を支持する電極支持部材をさらに有する、請求項1に記載の半導体装置。
- 上記トレイは、金属製のベース板と、このベース板に載置され金属基板を有する絶縁シートと、載置した絶縁シートを上記ベース板に固定する金属製の爪部材とを有し、上記ベース板を凹状に成形して形成される、請求項1に記載の半導体装置。
- 上記トレイは、収納部に上記封止樹脂を注入後に折り曲げ可能な側壁を有する、請求項1に記載の半導体装置。
- 上記トレイは、トレイ上部に形成されて上記収納部に収容した上記回路部を固定する固定部をさらに有する、請求項1に記載の半導体装置。
- 凹状の収納部を有するトレイと、
上記収納部に収容され、半導体素子及び配線用部材を有する回路部と、
上記収納部に注入され、収容されている上記回路部及び上記トレイの側壁頂上部をポッティング封止する封止樹脂と、
上記トレイに取り付けられる冷却器と、を備え、
上記配線用部材の一部は、上記封止樹脂の上面に外部電極として露出し、
上記トレイは、冷却器側に対向する冷却器面に突起を有する、
ことを特徴とする半導体装置。 - 上記冷却器は、トレイの上記突起と係合する凹凸部を有し、上記突起と上記凹凸部とを噛み合わせて上記トレイに取り付けられる、請求項10に記載の半導体装置。
- 上記冷却器は、トレイの上記冷却器面との間に冷媒用通路を形成する底面を有するジャケット形状である、請求項10に記載の半導体装置。
- 凹状の収納部を有するトレイと、上記収納部に収容される半導体素子及び配線用部材を有する回路部とを備えた半導体装置であり、上記トレイは、複数の上記収納部を第1方向に並列して配置するサイズ及び形状を有する、半導体装置の製造方法であって、
それぞれの収納部に上記回路部をそれぞれ収容した後、各収納部に一括して封止樹脂を注入することで各回路部をポッティング封止し、このとき、各回路部における上記配線用部材の一部を上記封止樹脂の上面に外部電極として露出させ、
上記封止後、上記第1方向に直角な第2方向に沿って上記収納部毎に上記トレイを切断して、ポッティング封止された各回路部を個片化する、
ことを特徴とする半導体装置の製造方法。 - 上記半導体装置は、さらに、上記トレイに取り付け可能なフレームであり、上記外部電極を含む上記配線用部材を一体的に形成したリードフレームを備え、
このリードフレームを上記トレイに取り付けた状態で上記半導体素子とのはんだ接合を行ってそれぞれの上記回路部を形成し、
封止樹脂をそれぞれの収納部に一括注入してぞれぞれの上記回路部を封止し、
上記封止後、上記個片化の前又は後にて、上記外部電極以外の上記リードフレームを切断する、請求項13に記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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JP2014506264A JP5936679B2 (ja) | 2012-03-22 | 2013-03-21 | 半導体装置 |
CN201380006323.5A CN104067387B (zh) | 2012-03-22 | 2013-03-21 | 半导体装置及其制造方法 |
KR1020147025468A KR101581610B1 (ko) | 2012-03-22 | 2013-03-21 | 반도체 장치 및 그 제조 방법 |
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KR101581610B1 (ko) | 2016-01-11 |
DE112013001612T5 (de) | 2015-01-29 |
JP5936679B2 (ja) | 2016-06-22 |
JPWO2013141287A1 (ja) | 2015-08-03 |
DE112013001612B4 (de) | 2022-05-12 |
US9236316B2 (en) | 2016-01-12 |
US20150021750A1 (en) | 2015-01-22 |
KR20140131959A (ko) | 2014-11-14 |
CN104067387A (zh) | 2014-09-24 |
CN104067387B (zh) | 2016-12-14 |
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