WO2013122084A1 - Semi-conducteur d'oxyde et élément de jonction comprenant celui-ci - Google Patents

Semi-conducteur d'oxyde et élément de jonction comprenant celui-ci Download PDF

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WO2013122084A1
WO2013122084A1 PCT/JP2013/053357 JP2013053357W WO2013122084A1 WO 2013122084 A1 WO2013122084 A1 WO 2013122084A1 JP 2013053357 W JP2013053357 W JP 2013053357W WO 2013122084 A1 WO2013122084 A1 WO 2013122084A1
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oxide semiconductor
type
semiconductor film
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substrate
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岩田　昇
真 和泉
高橋　明
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シャープ株式会社
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • C23C14/086—Oxides of zinc, germanium, cadmium, indium, tin, thallium or bismuth
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02551—Group 12/16 materials
    • H01L21/02554—Oxides
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/032—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors

Definitions

  • the present invention relates to a p-type oxide semiconductor containing Cu and a semiconductor junction element containing an oxide semiconductor.
  • Non-Patent Document 1 regarding the characteristics of a crystalline Cu 2 O thin film produced by using a reactive DC sputtering method, crystal grains grow by increasing the substrate temperature during thin film growth, and high carrier mobility is exhibited. It is described that it is obtained.
  • an n-type transparent oxide semiconductor composed of oxides of indium, gallium, and zinc is known to exhibit a high carrier mobility of around 10 cm 2 / Vsec when grown at room temperature. Since the semiconductor does not require a heat treatment process and can be formed on a substrate having low heat resistance such as a resin substrate, it is being actively applied to a channel layer of a thin film transistor (TFT). .
  • TFT thin film transistor
  • Patent Document 1 discloses that a thin film transistor including a channel layer having a double layer structure including a lower layer made of Ga—In—Zn—O and an upper layer having a lower carrier concentration than the lower layer has a low carrier density. It is described that the channel layer can be prevented from being deteriorated in characteristics by doping the upper layer with a carrier acceptor such as Cu as an example.
  • Patent Document 2 an oxide film containing one kind of transition metal selected from the group consisting of niobium (Nb) and tantalum (Ta) and copper (Cu) is scattered by sputtering or pulse laser irradiation. It is disclosed that a p-type high conductivity can be obtained in an oxide film formed by this method.
  • Non-Patent Document 1 describes that the carrier mobility of a p-type Cu oxide sample manufactured at room temperature (300 K) without performing substrate heating is as small as less than 1 cm 2 / Vsec. In order to obtain a higher mobility than this, it is necessary to heat the substrate during the growth of the thin film. For this reason, it is difficult to form a thin film having a high carrier mobility exceeding 1 cm 2 / Vsec with respect to a substrate having low heat resistance such as a resin substrate. Further, when the substrate temperature during the thin film growth is increased in order to obtain a high carrier mobility, the crystal grains of the Cu oxide are coarsened accordingly, and the roughness of the thin film surface is increased.
  • Patent Document 1 The thin film transistor disclosed in Patent Document 1 is obtained by adding Cu to an n-type Ga—In—Zn—O thin film for the purpose of increasing plasma resistance. Therefore, Patent Document 1 does not describe that the manufactured sample is p-type. That is, the addition of Cu to n-type Ga—In—Zn—O only reduces the carrier (conducting electron) density, and the semiconductor carrier type after the addition remains n-type. If the layer to which Cu is added is p-type, a depletion layer is formed at the interface between this layer and the stacked n-type Ga—In—Zn—O (lower layer). The change in the conductance of the layer is reduced.
  • Patent Document 1 does not disclose or suggest how a p-type oxide semiconductor can be formed. Accordingly, there is no description regarding the pn junction element.
  • Patent Document 2 an oxide thin film obtained by mixing one kind of transition metal selected from the group consisting of niobium (Nb) and tantalum (Ta) with copper (Cu) is p-type, and has a microcrystalline structure. It is described that it is an aggregate, an amorphous state including microcrystals, or an amorphous state. Patent Document 2 discusses the conductivity of this oxide thin film, but does not mention carrier mobility, and it is unclear whether high carrier mobility can be achieved. Moreover, in 1st Embodiment of patent document 2, in order to obtain high electroconductivity, the board
  • the surface square root roughness is as large as about 24 nm ([0039]).
  • an oxide thin film formed at room temperature is described ([0055] and thereafter).
  • this oxide thin film has a low visible light transmittance of about 40% or less at a wavelength of 500 nm or more and 800 nm or less ([0057]). It is described that heating the oxide thin film greatly contributes to enhancing the conductivity and the visible light transmittance ([0058]).
  • the substrate temperature at the time of thin film formation is increased or a thin film formed at room temperature is used. Heating is necessary, and as a result, the roughness of the substrate surface increases.
  • One object of the present invention is to provide a p-type oxide semiconductor that has high carrier mobility, visible light transmittance, high surface flatness, and can be formed on a substrate with low heat resistance. .
  • the oxide semiconductor of the present invention is an oxide semiconductor containing Cu, and the oxide semiconductor further contains In and Ga as metal elements, and the carrier type is p-type.
  • the oxide semiconductor of the present invention may contain Zn as a metal element.
  • an oxide semiconductor mainly composed of Cu it becomes possible to produce a p-type oxide semiconductor exhibiting high carrier mobility while suppressing the growth of crystal grains, the surface roughness is small, and the heat resistance of a resin substrate or the like is reduced. It is possible to provide a p-type oxide semiconductor that can be formed over a substrate with low property and has transparency in the visible light region.
  • the ratio of Cu in the whole metal element in the oxide semiconductor is preferably 42 at% to 92 at%.
  • the oxide semiconductor preferably contains Cu as a main component.
  • the proportion of Cu in the entire metal element in the oxide semiconductor is 57 at% to 81 at% when In, Ga, and Zn are included as the metal element, and In and When Ga is contained but Zn is not contained, it is preferably 57 at% to 85 at%.
  • a carrier density of a level that can be confirmed to be p-type by Hall effect measurement is obtained, and an amorphous or microcrystalline or a p-type oxide semiconductor in a state in which these are mixed is obtained. It becomes possible to provide.
  • the total ratio of In, Ga, and Zn or the total ratio of In and Ga (when Zn is not included) in the entire metal element in the oxide semiconductor is 8 at% or more. Is preferred.
  • the oxide semiconductor of the present invention includes Be, Na, Mg, Al, Si, Ca, Sc, Ti, V, Ni, Ge, Y, Zr, Nb, Mo, Sn, Ba, Hf, Ta, W, and One or more additional elements selected from the group consisting of Pb may be further included.
  • the oxide semiconductor of the present invention is preferably in an amorphous state, a microcrystalline state, or a state in which these are mixed.
  • the oxide semiconductor of the present invention has a wavelength range of 420 nm to 900 nm when In, Ga, and Zn are included as metal elements, and a wavelength range of 490 nm to 900 nm when In and Ga are not included as metal elements. It preferably has a transmittance of 40% or more.
  • the semiconductor junction element of the present invention includes the above oxide semiconductor and an n-type semiconductor that is in contact with the oxide semiconductor indirectly or directly through an insulator.
  • the diode element of the present invention includes this semiconductor junction element and a pair of electrodes capable of energizing a pn junction formed by the oxide semiconductor and the n-type semiconductor.
  • the photovoltaic element of the present invention includes the semiconductor junction element and a pair of electrodes for taking out the photovoltaic power generated by photoelectric conversion in the semiconductor junction element.
  • a semiconductor junction element of the present invention includes the above oxide semiconductor and an insulator that is in direct contact with the oxide semiconductor.
  • the transistor element of the present invention includes the semiconductor junction element, a pair of electrodes for flowing a current in the oxide semiconductor, and a gate electrode for applying a voltage to the insulator.
  • the n-type semiconductor preferably contains at least In and Ga among In, Ga, and Zn.
  • the insulator contains at least In and Ga among In, Ga and Zn.
  • diode element or a transistor element having a pn junction or a pin junction high transparency with visible light, low surface roughness, and high
  • a diode element or a transistor element exhibiting carrier mobility can be formed over a substrate having low heat resistance such as resin.
  • An oxide semiconductor manufacturing method is an oxide semiconductor containing Cu, wherein the oxide semiconductor further contains In, Ga, and Zn as metal elements, and the carrier type is p-type.
  • a p-type oxide semiconductor is formed as a thin film.
  • the oxide semiconductor manufacturing method according to the present invention is an oxide semiconductor containing Cu, wherein the oxide semiconductor further contains In and Ga as metal elements, and the carrier type is p-type.
  • a p-type oxide semiconductor is formed as a thin film.
  • a p-type oxide semiconductor that exhibits high carrier mobility exceeding 2 cm 2 / Vsec even when formed at room temperature while suppressing crystal grain growth can be obtained.
  • This oxide semiconductor has high uniformity in the film surface direction due to low surface roughness, and is less likely to cause pinholes in the film thickness direction, resulting in low leakage current.
  • a p-type oxide semiconductor that can be formed on a substrate having low heat resistance such as an oxide resin substrate and has high transparency in the visible light region. Therefore, high transparency can be obtained even in a semiconductor junction element using the same.
  • FIG. 1 is a schematic diagram illustrating a configuration of an oxide semiconductor according to a first embodiment of the present invention. It is the schematic which shows the structure of the oxide semiconductor which concerns on 2nd Embodiment of this invention. It is the schematic which shows the structure of the diode element provided with the pn junction which concerns on 3rd Embodiment of this invention. It is the schematic which shows the structure of the diode element provided with the pin junction which concerns on 3rd Embodiment of this invention. It is the schematic which shows another example of a structure of the diode element provided with the pn junction which concerns on 3rd Embodiment of this invention.
  • FIG. 6 is an AFM image of a surface in Example 3 of the present invention, (a) is an as-depo.
  • the state, (b) is the observation result of the state after annealing at 200 ° C. for 1 hour in the atmosphere.
  • FIG. 6 is an AFM image of a surface in Example 4 of the present invention, (a) is an as-depo.
  • the state, (b) is the observation result of the state after annealing at 200 ° C. for 1 hour in the atmosphere. It is an AFM image of the surface in the comparative example 2 of this invention, (a) is as-depo.
  • the state, (b) is the observation result of the state after annealing at 200 ° C. for 1 hour in the atmosphere.
  • the graph which shows the measurement result of the arithmetic mean roughness ( Ra ) of each sample which set the composition ratio of Cu to 42at%, 57at%, 81at%, 92at%, 100at% in the sample containing Cu, In, Ga, and Zn. It is.
  • the measurement results of the arithmetic average roughness (R a ) of each sample in which the composition ratio of Cu is 42 at%, 57 at%, 78 at%, 85 at%, 92 at%, and 100 at% are shown. It is a graph.
  • State (b) is the measurement result of the state after annealing at 200 ° C. for 1 hour in the atmosphere.
  • samples containing Cu, In, Ga, and Zn carriers obtained from Hall effect measurement of each sample in which the composition ratio of Cu was 42 at%, 57 at%, 74%, 78%, 81 at%, 92 at%, and 100 at% It is a graph which shows a density. It is a graph which shows the carrier mobility obtained by the Hall effect measurement of each sample which made the composition ratio of Cu 74%, 81at%, 92at%, 100at% in the sample containing Cu, In, Ga, and Zn.
  • An oxide semiconductor film 11 according to this embodiment shown in FIG. 1 is formed as a thin film on a substrate 12.
  • the oxide semiconductor film 11 is p-type and is made of an oxide semiconductor containing only Cu, In, Ga, and Zn as metal elements.
  • the oxide semiconductor film 11 is amorphous, microcrystalline, or a mixture of amorphous and microcrystalline.
  • the content of Cu, In, Ga and Zn is desirably 42 at 92 to 92 at%, as will be described in the examples described later, when the sum of these four elements is 100 at%. It is particularly desirable that it is 57 at% to 81 at%.
  • the element amounts of In, Ga, and Zn when the sum of In, Ga, and Zn is 100 at%, In is from 5 at% to 90 at%, Ga is from 10 at% to 80 at%, and Zn is from 5 at% to 90 at%. % Is desirable.
  • the content of oxygen in these metal materials is not limited as long as the oxide semiconductor film 11 exhibits p-type characteristics, and is an oxide of the above four metal elements.
  • Ratio determined by Cu 2 O, In 2 O 3 , Ga 2 O 3 and ZnO (O is 1 element with respect to Cu 2 element, O is 3 elements with 2 elements of In, 3 elements with 2 elements of Ga and 3 elements with O) ,
  • One element of Zn and one element of O) is preferably set within a range of 20 at% up and down from this value.
  • O is 1.5 elements for 3 elements of Cu
  • O is 1.5, 1.5, 1 element for 1 element of each of In, Ga, and Zn
  • Cu 26.1 In 8.7 Ga 8.7 Zn 8.7 O 47.8 is obtained.
  • the oxygen content is preferably within the range of 20 at% above and below this value.
  • the oxide semiconductor film 11 has a transmittance of 40% or more in a wavelength range of 420 nm to 900 nm which is a visible light region.
  • the oxide semiconductor film 11 is formed by a DC (Direct Current) or RF (Radio Frequency) sputtering method, a CVD (Chemical Vapor Deposition) method, a PLD (Pulsed Laser Deposition) method, or an MBE (Molecular). It can be formed by using a known thin film forming method represented by a beam epitaxy (IBE) method or an IBS (Ion Beam Sputtering) method.
  • the material source used in the thin film forming method may be an oxide or a metal body containing Cu, In, Ga, and Zn each alone or in plural. Regardless of whether the material source is an oxide or a metal body, a method for depositing the oxide semiconductor film 11 on the substrate 12 is a method in which an oxide is deposited on the substrate in a vacuum or in a rare gas. And a method of depositing on the substrate 12 while oxidizing the metal in a gas atmosphere containing oxygen. According to these methods, the heat treatment process is not required, and the oxide semiconductor film 11 can be formed over a substrate having low heat resistance such as a resin substrate. Alternatively, the oxide semiconductor film 11 may be obtained by oxidizing the deposited oxide thin film or metal thin film by performing heat treatment in an atmosphere containing oxygen after the film formation.
  • the oxide semiconductor film 11 In order to make the oxide semiconductor film 11 a p-type (majority carriers are holes) semiconductor, it is necessary to suppress the generation of conduction electrons that are the origin of the n-type semiconductor as much as possible. In an In—Ga—Zn—O system that does not contain Cu, it is known that conduction electrons are generated due to oxygen deficiency. From this point of view, when manufacturing the oxide semiconductor film 11, it is important to prevent oxygen vacancies from being generated in the oxide semiconductor film 11 as much as possible. Therefore, it is important that at least oxygen vacancies be suppressed and oxygen contained in the material source, in the gas atmosphere during deposition, or in the heat treatment atmosphere after deposition to contain majority carriers as holes. It is.
  • an oxide thin film containing In, Ga, and Zn other than Cu (In—Ga—Zn—O: n that generates conduction electrons accompanying oxygen vacancies) in a gas atmosphere for forming the oxide semiconductor film 11 of this embodiment.
  • the carrier density (electron density) of the n-type semiconductor is lower than the hole density of the oxide semiconductor film 11 obtained by adding Cu. It is important to set so that More desirably, the electron density is set to 1 ⁇ 10 11 cm ⁇ 3 or less when an In—Ga—Zn—O thin film is formed in a gas atmosphere for forming the oxide semiconductor film 11.
  • oxide semiconductor film 11 of this embodiment is manufactured using a sputtering method.
  • the sputtering target a metal target containing one or more of Cu, In, Ga, and Zn, or an oxide target is used.
  • the substrate 12 is mounted in the sputtering apparatus, and a rare gas or an oxygen gas typified by Ar gas is introduced into the apparatus alone or both.
  • the oxide semiconductor film 11 is formed by introducing only a rare gas, the sputtering target is entirely made of oxide, or in the case of a metal body, an oxygen gas is deposited after a thin film is deposited on the substrate 12. Heat treatment is performed in an atmosphere containing
  • the amount of rare gas and oxygen gas introduced there are no particular limitations on the amount of rare gas and oxygen gas introduced, but in the case where heat treatment in an oxygen gas atmosphere is not performed after the oxide semiconductor film 11 is deposited, the oxide is oxidized as described above. An amount of oxygen gas capable of suppressing oxygen vacancies is introduced so that the semiconductor film 11 becomes a p-type semiconductor (so that majority carriers become holes).
  • the reactivity with the oxygen gas may be increased by heating the substrate 12 as necessary.
  • the substrate heating temperature in this case is determined according to the heat resistance of the substrate 12 to be applied.
  • the oxide semiconductor film 11 after deposition is heat-treated in a vacuum or in a rare gas or oxygen gas for the purpose of suppressing oxygen vacancies or improving the material uniformity in the thin film as necessary. It doesn't matter.
  • the finally formed oxide semiconductor film 11 only needs to contain Cu, In, Ga, and Zn as metal elements.
  • the oxide semiconductor film 11 contains nitrogen as an element other than metal elements. It doesn't matter.
  • the ratio of nitrogen to oxygen is 1 or less in the form of substituting oxygen in Cu 2 O, In 2 O 3 , Ga 2 O 3 and ZnO which are oxides of the above four metal elements. Is desirable.
  • the oxide semiconductor film 11 as a modified example includes Be, Na, Mg, Al, Si, Ca, Sc, Ti, V, Ni, Ge, and Y as metal elements other than Cu, In, Ga, and Zn. , Zr, Nb, Mo, Sn, Ba, Hf, Ta, W, and one or more additive elements selected from the group consisting of Pb may be included.
  • the proportion of the additive element in the entire metal element is preferably less than 50 at%, as will be described in Examples described later.
  • the oxide semiconductor film 11 ′ according to this embodiment shown in FIG. 2 is formed as a thin film on the substrate 12 as in the first embodiment.
  • the oxide semiconductor film 11 ′ is p-type similar to that in Embodiment 1, but is formed of an oxide semiconductor containing only Cu, In, and Ga as metal elements. That is, in comparison with the first embodiment, the structure does not include Zn. Also in this embodiment, the oxide semiconductor film 11 ′ is in an amorphous state, a microcrystalline state, or an amorphous state and a microcrystalline state are mixed.
  • the content of Cu, In, and Ga is desirably 42 at 92 to 92 at%, as will be described later in the examples when the sum of these four elements is 100 at%. It is particularly desirable that it be 57 at% to 85 at%.
  • the element amounts of In and Ga are preferably 20 to 90 at% for In and 10 to 80 at% for Ga when the sum of In and Ga is 100 at%.
  • the oxygen content in these metal materials is not limited as long as the oxide semiconductor film 11 ′ exhibits p-type characteristics, and is not necessarily limited to the above-described oxides of the four metal elements.
  • a ratio determined by certain Cu 2 O, In 2 O 3 , and Ga 2 O 3 (O is 1 element with respect to Cu 2 element, O is 3 elements with 2 elements of In, and O is 3 with 2 elements of Ga) It is desirable that the reference ratio is (element)) within the range of 20 at% above and below this value.
  • this is expressed as at%, Cu 25.0 In 12.5 Ga 12.5 O 50.0 is obtained.
  • the oxygen content is preferably within the range of 20 at% above and below this value.
  • the oxide semiconductor film 11 ′ has a transmittance of 25% or more in a wavelength range of 420 nm to 900 nm, which is a visible light region, and a transmittance of 40% or more in a wavelength range of 490 nm to 900 nm.
  • the oxide semiconductor film 11 ′ is formed by a DC (Direct Current) or RF (Radio Frequency) sputtering method, a CVD (Chemical Vapor Deposition) method, a PLD (Pulsed Laser Deposition) method, an MBE (Molecular Beam, or a Molecular Beam I method). It can be formed using a known thin film forming method represented by the Ion Beam Sputtering method.
  • the material source used in the above thin film forming method may be an oxide or a metal body each containing Cu, In, and Ga alone or plurally. Regardless of whether the material source is an oxide or a metal body, a method of depositing the oxide semiconductor film 11 ′ on the substrate 12 is to deposit the oxide on the substrate in a vacuum or in a rare gas. Either a method or a method of depositing on a substrate 12 while oxidizing a metal in a gas atmosphere containing oxygen can be employed. According to these methods, the heat treatment process is not required, and the oxide semiconductor film 11 can be formed over a substrate having low heat resistance such as a resin substrate. Alternatively, the oxide semiconductor film 11 ′ may be obtained by oxidizing the deposited oxide thin film or metal thin film by heat treatment in an atmosphere containing oxygen after film formation.
  • the oxide semiconductor film 11 ′ In order to make the oxide semiconductor film 11 ′ a p-type (majority carrier is a hole) semiconductor, it is necessary to suppress generation of conduction electrons that are the origin of the n-type semiconductor as much as possible, as in the first embodiment. Become. In an In—Ga—O system that does not contain Cu, it is known that conduction electrons are generated due to oxygen deficiency. From this point of view, in manufacturing the oxide semiconductor film 11 ′, it is important to prevent oxygen vacancies from being generated in the oxide semiconductor film 11 ′ as much as possible. Therefore, it is important that at least oxygen vacancies be suppressed and oxygen contained in the material source, in the gas atmosphere during deposition, or in the heat treatment atmosphere after deposition to contain majority carriers as holes. It is.
  • an oxide thin film containing In and Ga other than Cu (In—Ga—O: n-type that generates conduction electrons accompanying oxygen vacancies) in a gas atmosphere for forming the oxide semiconductor film 11 ′ of this embodiment
  • the carrier density (electron density) of the n-type semiconductor is lower than the hole density of the oxide semiconductor film 11 ′ obtained by adding Cu. It is important to set so that More desirably, the electron density is set to 1 ⁇ 10 11 cm ⁇ 3 or less when an In—Ga—O thin film is formed in a gas atmosphere for forming the oxide semiconductor film 11 ′.
  • a specific example of manufacturing the oxide semiconductor film 11 ′ of this embodiment by using a sputtering method is as follows.
  • the sputtering target a metal target containing single or plural Cu, In, and Ga, or an oxide target is used.
  • the substrate 12 is mounted in the sputtering apparatus, and a rare gas or an oxygen gas typified by Ar gas is introduced into the apparatus alone or both.
  • the oxide semiconductor film 11 ′ is formed by introducing only a rare gas
  • the sputtering target is entirely made of oxide, or in the case of a metal body, oxygen is deposited after a thin film is deposited on the substrate 12. Heat treatment is performed in an atmosphere containing gas.
  • the reactivity with oxygen gas may be increased by heating the substrate 12 as necessary, as in the first embodiment.
  • the substrate heating temperature in this case is determined according to the heat resistance of the substrate 12 to be applied.
  • the oxide semiconductor film 11 ′ after deposition is subjected to heat treatment in a vacuum or in a rare gas or oxygen gas for the purpose of suppressing oxygen vacancies or improving the material uniformity in the thin film as necessary. You can go.
  • the manufacturing method described here is merely an example, and any other method may be used as long as the p-type oxide semiconductor film 11 ′ is obtained.
  • the finally formed oxide semiconductor film 11 ′ only needs to contain only Cu, In, and Ga as metal elements.
  • the oxide semiconductor film 11 ′ contains nitrogen as an element other than metal elements. It doesn't matter.
  • the ratio of nitrogen to oxygen is 1 or less in the form of substituting oxygen of Cu 2 O, In 2 O 3 and Ga 2 O 3 which are oxides of the above three metal elements. Is desirable.
  • the oxide semiconductor film 11 ′ as a modified example includes Be, Na, Mg, Al, Si, Ca, Sc, Ti, V, Ni, Ge, and other metal elements other than Cu, In, Ga, and Zn.
  • One or more additive elements selected from the group consisting of Y, Zr, Nb, Mo, Sn, Ba, Hf, Ta, W, and Pb may be included.
  • the proportion of the additive element in the entire metal element is preferably less than 50 at%, as will be described in Examples described later.
  • the diode element according to this embodiment is formed by bonding the p-type oxide semiconductor film 11 or 11 ′ and the n-type semiconductor film 13 shown in the first and second embodiments. This diode element will be described with reference to FIG.
  • the diode element 21 shown in FIG. 3 includes an n-type semiconductor film 13 formed on the substrate 12 and a p-type oxide semiconductor film 11 or 11 ′ formed on the n-type semiconductor film 13. . Further, the diode element 21 is formed with electrodes 14 and 15 that can be energized with respect to the pn junction formed by the n-type semiconductor film 13 and the oxide semiconductor film 11 or 11 '.
  • “can be energized” means that any one of flowing a current, giving a potential difference, and taking out the photovoltaic power generated in the pn junction can be made to the pn junction. Means.
  • the substrate 12 may be made of a crystalline material for epitaxially growing the n-type semiconductor film 13 thereon.
  • the substrate 12 may be a glass substrate or a resin substrate. Further, the substrate 12 may have conductivity.
  • the material of the n-type semiconductor film 13 is not particularly limited.
  • Si or Ge and further, one or more element types of Group III Al, Ga, and In and Group V N, P
  • An oxide semiconductor mainly containing —Ga—Zn—O or a semiconductor in which part of oxygen in these oxide semiconductors is replaced with nitrogen can be used.
  • the substrate 12 itself may be formed of the n-type semiconductor film 13.
  • the n-type semiconductor film 13 is formed as a thin film on the substrate 12, in the formation, similarly to the formation of the oxide semiconductor film 11, DC (Direct Current) or RF (Radio Frequency) sputtering method, CVD (Chemical).
  • DC Direct Current
  • RF Radio Frequency
  • CVD Chemical
  • the film thickness is not necessarily limited, but for example, the film thickness is 5 nm to 3 ⁇ m.
  • the p-type oxide semiconductor films 11 and 11 ′ according to this embodiment are manufactured by the same manufacturing method as that described in Embodiments 1 and 2, respectively.
  • the film thicknesses of the oxide semiconductor films 11 and 11 ′ are preferably 5 nm to 3 ⁇ m, for example.
  • the electrodes 14 and 15 are for energizing a pn junction that is a stacked structure of the n-type semiconductor film 13 and the p-type oxide semiconductor film 11 or 11 ′, and obtaining a diode effect. It is desirable to use a material capable of ohmic contact with each of the n-type semiconductor film 13 and the p-type oxide semiconductor film 11 or 11 ′. Specifically, it is represented by C, Al, Ti, Cr, Co, Ni, Cu, Nb, Mo, Ru, Pd, Ag, In, Sn, Hf, Ta, W, Os, Ir, Pt, and Au. Elements, compounds of these elements, and silicon compounds, oxides, and nitrides of these elements can be used.
  • An example of the manufacturing procedure of the diode element 21 composed of the pn junction shown in FIG. 3 is as follows. First, the n-type semiconductor film 13 is formed on the substrate 12 with a film thickness of 5 nm to 3 ⁇ m. Subsequently, the p-type oxide semiconductor film 11 or 11 ′ is formed on the n-type semiconductor film 13 with a thickness of 5 nm to 3 ⁇ m. Further, by using a known lithography method or etching method, a part of the p-type oxide semiconductor film 11 or 11 ′ is removed to expose the n-type semiconductor film 13, and the electrode 14 is formed on the n-type semiconductor film 13. Electrodes 15 are formed on the p-type oxide semiconductor film 11 or 11 ′, respectively.
  • the diode element 22 shown in FIG. 4 is a modification of the diode element 21 shown in FIG.
  • the diode element 22 is a pin junction element in which the insulator film 16 is formed between the p-type oxide semiconductor film 11 or 11 ′ and the n-type semiconductor film 13.
  • the p-type oxide semiconductor film Electrodes 14 and 15 are formed for 11 or 11 'and the n-type semiconductor film 13, respectively.
  • the insulator film 16 is, for example, an intrinsic semiconductor having a carrier density of 1 ⁇ 10 11 cm ⁇ 3 or less in the semiconductor, a metal or semiconductor oxide, nitride, specifically, for example, Si oxide or nitride, Al oxide Or it consists of nitride, Hf oxide, etc., and it is desirable that the film thickness is 1 nm or more and 5 ⁇ m or less.
  • the insulator 16 is formed using an intrinsic semiconductor, a material that can be used for the p-type oxide semiconductor film 11 or 11 ′ and the n-type semiconductor film 13 is manufactured without supplying a dopant, or In the case where carriers are generated due to oxygen vacancies like an n-type oxide semiconductor, it can be formed by supplying oxygen necessary for suppressing the generation of carriers.
  • the oxide semiconductor film 11 or 11 ′ showing the p-type, the insulator film 16, and the n-type semiconductor are shown.
  • Electrodes 14 and 15 that can be energized with respect to the pin junction constituted by the film 13 are provided.
  • the energization possible here means that, like the diode element 21 of the pn structure, any one of flowing a current, applying a potential difference to the pin junction, and taking out the photovoltaic power generated at the pin junction is possible.
  • DC Direct Current
  • RF Radio Frequency
  • a known thin film forming method such as a CVD (Chemical Vapor Deposition) method, a PLD (Pulsed Laser Deposition) method, an MBE (Molecular Beam Epitaxy) method, or an IBS (Ion Beam Sputtering) method can be used.
  • the insulator 16 is formed on the n-type semiconductor film 13 in the manufacturing procedure of the diode element 21 having the pn junction shown in FIG. A thickness of 1 nm to 5 ⁇ m is formed, and subsequently, a p-type oxide semiconductor film 11 or 11 ′ is formed. Further, the n-type semiconductor film 13 is exposed by removing a part of the insulator 16 together with the p-type oxide semiconductor film 11 or 11 ′ using a known lithography method or etching method. An electrode 14 is formed on the electrode 13, and an electrode 15 is formed on the oxide semiconductor film 11 or 11 ′ indicating p-type.
  • the n-type semiconductor film 13 is formed on the substrate 12 in the production of the diode elements 21 and 22 has been described, but an n-type semiconductor material may be applied to the substrate 12 itself. In this case, the n-type semiconductor film 13 need not be formed. Therefore, when the diode element 21 shown in FIG. 3 is formed, the p-type oxide semiconductor film 11 or 11 ′ may be formed directly on the substrate 12. When the diode element 22 having the pin junction shown in FIG. 4 is formed, the insulator 16 and the p-type oxide semiconductor film 11 or 11 ′ may be formed on the substrate 12.
  • the electrode 14 may be formed on the back surface of the substrate 12. Even if the substrate 12 is not conductive, a through hole may be formed in the substrate 12 and the electrode 14 may be formed from the back surface of the substrate 12.
  • the order of formation of the semiconductor thin film on the substrate 12 is not necessarily the n-type semiconductor film 13 formed first, the p-type oxide semiconductor film 11 or 11 ′ is formed first, The n-type semiconductor film 13 may be formed thereon.
  • the order of formation when the diode element 22 having a pin junction is formed is the order of the oxide semiconductor film 11 or 11 ′ indicating p-type, the insulator 16, and the n-type semiconductor film 13.
  • Each of the p-type oxide semiconductor film 11 or 11 ′ and the n-type semiconductor film 13 is not necessarily formed as a single layer.
  • the oxide semiconductor film 11 or 11 ′ and the n-type semiconductor film 13 are not necessarily formed. May be formed by stacking a plurality of layers having different carrier densities.
  • the oxide semiconductor film 11 or 11 ′ exhibiting p-type may be the oxide semiconductor film 11 or 11 ′ in which a plurality of layers having different material configurations are stacked within the range described in Embodiments 1 and 2.
  • a film in which at least the oxide semiconductor film 11 or 11 ′ described in Embodiments 1 and 2 is stacked and a p-type semiconductor different from the oxide semiconductor film 11 or 11 ′ is stacked may be used.
  • the oxide semiconductor film 11 described in Embodiment 1 and the oxide semiconductor 11 ′ described in Embodiment 2 may be stacked.
  • the insulator 16 and the electrodes 14 and 15 may be a laminate of a plurality of layers.
  • Each of the diode elements 21 and 22 described in this embodiment has a pn junction or a pin junction in which a p-type oxide semiconductor film 11 or 11 ′ and an n-type semiconductor film 13 are formed.
  • the present invention is not limited to the shapes shown in FIGS. 3 and 4 as long as the electrodes 14 and 15 that can be energized with respect to the pn junction or the pin junction are formed.
  • another conductive film, semiconductor film, or insulator film is interposed between the oxide semiconductor film 11 or 11 ′ exhibiting p-type and the electrode 14 or between the n-type semiconductor film 13 and the electrode 15. It doesn't matter.
  • FIG. 5 shows a diode element 21 ′ in which two stages of pn junctions are stacked.
  • a stacked body of a p-type semiconductor 101 and an n-type semiconductor 103 is formed between a substrate 12 and an n-type semiconductor film 13. Therefore, a pnpn structure is formed in the diode element 21 '.
  • FIG. 6 shows a diode element 22 'in which two pin junctions are stacked.
  • a stacked body of a p-type semiconductor 101, an insulator film 106 and an n-type semiconductor 103 is formed between the substrate 12 and the n-type semiconductor film 13. Therefore, a pinpin structure is formed in the diode element 22 '.
  • Examples of the p-type semiconductor 101 include Si and Ge, as well as one or more element types of Group III Al, Ga and In and one or more elements of Group V N, P, As and Sb.
  • the materials that can be used for the n-type semiconductor film 13 and the insulator film 16 described above can be used for the n-type semiconductor 103 and the insulator film 106.
  • the positional relationship between the n-type and p-type semiconductors may be reversed, and another semiconductor layer and / or insulator layer is sandwiched between pn junctions or pin junctions stacked in two stages. It does not matter. Further, the stacked pn junction or pin junction is not limited to two stages, and may have a multi-stage stacked structure.
  • This embodiment mode is a thin film transistor 31 (TFT: Thin Film Transistor) using the oxide semiconductor film 11 or 11 ′ described in Embodiment Modes 1 and 2, which will be described with reference to FIG.
  • TFT Thin Film Transistor
  • a p-type oxide semiconductor film 11 or 11 ′ as a channel layer and an insulator 16 are stacked over the substrate 12, and the oxide semiconductor film 11 or 11 ′ In this MOS transistor, a drain electrode 17 and a source electrode 18 are formed, and a gate electrode 19 is formed on the insulator 16.
  • a voltage is applied to the gate electrode 19 to change the conductance of the oxide semiconductor film 11 or 11 ′ that is a channel layer, thereby controlling the amount of current flowing between the drain and the source. .
  • the same material as that described in Embodiments 1 to 3 can be applied to the oxide semiconductor film 11 or 11 ′, the substrate 12, and the insulator 16, and the oxide semiconductor film 11 is the same as in Embodiment 3.
  • the film thickness is desirably 5 nm to 3 ⁇ m, for example.
  • the film thickness of the insulator 16 is desirably 1 nm or more and 5 ⁇ m or less, for example.
  • the materials shown in the electrodes 14 and 15 described in Embodiment 3 can be applied. Specifically, C, Al, Ti, Cr, Metal represented by Co, Ni, Cu, Nb, Mo, Ru, Pd, Ag, In, Hf, Ta, W, Os, Ir, Pt, Au, a compound of these metals, or a silicon compound thereof An oxide or a nitride can be applied.
  • An example of the manufacturing procedure of the thin film transistor 31 shown in FIG. 7 is as follows. First, the oxide semiconductor film 11 or 11 ′ is formed with a thickness of 5 nm to 3 ⁇ m on the substrate 12, and then the insulator 16 is formed with a thickness of 1 nm to 5 ⁇ m. Further, by using a known lithography method or etching method, a part of the insulator 16 is removed to expose the oxide semiconductor film 11 or 11 ′, and the drain electrode 17 and the source are formed on the oxide semiconductor film 11 or 11 ′. An electrode 18 and a gate electrode 19 are formed on the insulator 16.
  • FIG. 7 illustrates a structure in which the oxide semiconductor film 11 or 11 ′ is formed over the substrate 12 and the insulator 16 and the gate electrode 19 are formed over the oxide semiconductor film 11 or 11 ′.
  • the structure in which the body 16 is formed and the oxide semiconductor film 11 or 11 ′ is formed thereon may be used.
  • a conductive material is used as the substrate 12, and the substrate 12 itself is used as the gate electrode 19, or the gate electrode 19 is formed on the opposite side of the surface of the substrate 12 on which the insulator 16 is formed.
  • 12 is used as a gate electrode 19 together with the substrate 12, or through holes are formed in the substrate 12 regardless of whether the substrate 12 is conductive or insulating, and from the side opposite to the surface on which the insulator 16 is formed.
  • the gate electrode 19 reaching the insulator 16 can be formed. Further, an insulating substrate 12 is used, the substrate 12 itself is an insulator 16, and the substrate 12 on which the oxide semiconductor film 11 or 11 ′ is formed is opposite to the surface on which the oxide semiconductor film 11 or 11 ′ is formed.
  • the gate electrode 19 may be formed.
  • the drain electrode 17 and the source electrode 18 are formed on the oxide semiconductor film 11 or 11 ′, and the gate electrode 19 is formed through the insulator 16. Any structure may be used as long as the oxide semiconductor film 11 or 11 ′, the insulator 16, the drain electrode 17, the source electrode 18, and the insulator 16 are each laminated in a plurality of layers. It may be formed.
  • oxide semiconductor film 11 or 11 ′ a plurality of oxide semiconductor films 11 or 11 ′ having different material compositions in the range described in Embodiments 1 and 2 are stacked to form a p-type oxide semiconductor
  • the film 11 or 11 ′ may be used, and the oxide semiconductor film 11 or 11 ′ described in any of Embodiments 1 and 2 and at least another p-type semiconductor may be stacked.
  • Example 1 The p-type oxide semiconductor film 11 described in Embodiment 1 is formed over the substrate 12 by a sputtering method, and an X-ray diffraction (XRD: X) of the manufactured sample (hereinafter referred to as the sample 1) -Ray Diffraction) measurement was performed.
  • XRD X-ray diffraction
  • the sample 1 when the sample 1 was manufactured, a Cu target and an InGaZnO 4 target were used as sputtering target materials, and these two targets were simultaneously subjected to DC in a mixed gas atmosphere containing both argon gas and oxygen gas. Sputtered and deposited on the substrate 12.
  • the deposition rate of the oxide semiconductor film 11 when the sample 1 is manufactured and the oxygen gas flow rate when forming the film are such that oxygen vacancies are generated and the n-type semiconductor is detected when the oxide semiconductor film 11 is manufactured.
  • the film formation rate and the oxygen gas flow rate were adjusted so that no conduction electrons were generated.
  • the carrier density is 1 ⁇ 10 ⁇ 11 cm.
  • the flow rates of argon gas and oxygen gas are 40 sccm and 10 sccm, respectively, and the deposition rate of the oxide semiconductor film 11 is 5.6 ⁇ 10 ⁇ 2 nm / sec.
  • a single crystal Si (100) wafer was used for the substrate 12 of the sample 1. Further, the substrate was not heated when the oxide semiconductor film 11 was formed. The thickness of the oxide semiconductor film 11 was 100 nm.
  • the composition ratio of the oxide semiconductor film 11 in the manufactured sample 1 was the composition ratio of the metal material included in the oxide semiconductor film 11, Cu was 81 at%, and the total of In, Ga, and Zn was 19 at%. .
  • Such a composition ratio may be derived, for example, using an analyzer capable of analyzing the composition of these materials.
  • the film thickness of each material supplied by co-sputtering is measured in advance, and the ratio is calculated. It may be derived based on this.
  • FIG. 8 shows the state of the sample 1 as it was formed (as-depo. State) and the state after annealing at 200 ° C. for 1 hour in the atmosphere after film formation (annealed).
  • the results of X-ray diffraction measurement by the -2 ⁇ method are shown. Note that the peaks (200) and (400) of Si used for the substrate 12 were detected during the measurement, but this range is omitted in FIG.
  • the Cu content is preferably 81 at% or less of the entire metal element.
  • Example 2 The p-type oxide semiconductor film 11 ′ described in Embodiment 2 is formed over the substrate 12 by a sputtering method, and X-ray diffraction (XRD :) is performed on the manufactured sample (hereinafter referred to as sample 2). X-ray Diffraction) measurement was performed.
  • XRD X-ray diffraction
  • sample 2 when the sample 2 is manufactured, a Cu target and an InGaO 3 target are used as a sputtering target material, and these two targets are simultaneously sputtered in a mixed gas atmosphere containing both argon gas and oxygen gas. And deposited on the substrate 12.
  • DC sputtering was performed for the Cu target, and RF sputtering was performed for the InGaO 3 target.
  • the deposition rate of the oxide semiconductor film 11 ′ during the preparation of the sample 2 and the oxygen gas flow rate during the deposition are detected as an n-type semiconductor due to oxygen deficiency when the oxide semiconductor film 11 ′ is formed.
  • the film formation rate and the oxygen gas flow rate were adjusted so as not to generate a certain amount of conduction electrons.
  • the carrier density conducting electron density
  • the flow rates of argon gas and oxygen gas are 40 sccm and 10 sccm, respectively, and the deposition rate of the oxide semiconductor film 11 is 5.6 ⁇ 10 ⁇ 2 nm / sec. did.
  • a single crystal Si (100) wafer was used as the substrate 12 of the sample 2. Further, the substrate was not heated during the formation of the oxide semiconductor film 11 '. The thickness of the oxide semiconductor film 11 ′ was 100 nm.
  • the composition ratio of the oxide semiconductor film 11 ′ in the manufactured sample 2 is the composition ratio of the metal material included in the oxide semiconductor film 11 ′, Cu is 85 at%, and the total of In and Ga is 15 at%. .
  • Such a composition ratio may be derived, for example, using an analyzer capable of analyzing the composition of these materials.
  • the film thickness of each material supplied by co-sputtering is measured in advance, and the ratio is calculated. It may be derived based on this.
  • FIG. 9 shows the state of the sample 2 as it was formed (as-depo. State) and the state after annealing at 200 ° C. for 1 hour in the atmosphere after film formation (annealed).
  • the results of X-ray diffraction measurement by the -2 ⁇ method are shown. Note that the peaks (200) and (400) of Si used for the substrate 12 were detected during measurement, but this range is omitted in FIG.
  • the Cu content may be 85 at% or less of the entire metal element. It turns out to be desirable.
  • Comparative Example 1 As Comparative Example 1, an oxide semiconductor thin film (a sample containing only Cu as a metal material) in which any of In, Ga, and Zn is not added in Samples 1 and 2 shown in Examples 1 and 2 is formed over a substrate 12 ( Hereinafter, the sample was referred to as Comparative Sample 1, and the same X-ray diffraction measurement as in Examples 1 and 2 was performed.
  • the same sputtering apparatus as that used to produce the samples 1 and 2 in Examples 1 and 2 was used, the gas flow rate and film formation rate were the same as those in Examples 1 and 2, and only the Cu target was DC.
  • An oxide semiconductor thin film containing only Cu as a metal element was deposited on the substrate 12 by sputtering.
  • FIG. 10 shows as-depo. The results of X-ray diffraction measurement by the ⁇ -2 ⁇ method are shown for the state and the state after annealing at 200 ° C. for 1 hour in the air after film formation.
  • Example 3 11A and 11B show as-depo.
  • sample 1 shown in Example 1 FIG.
  • FIG. The state and AFM (Atomic Force Microscope) images of the surface after annealing at 200 ° C. for 1 hour in the atmosphere are shown.
  • Each of the AFM images shown in FIGS. 11A and 11B shows the 1 ⁇ m square range of the sample surface.
  • sample 1 first, as-depo. In the state, the surface of the oxide semiconductor film 11 has a very flat shape as shown in FIG. 11A, and the maximum height (R pp ) within the range of 1 ⁇ m square is The arithmetic average roughness (R a ) was as small as 0.16 nm and 1.8 nm. Even after annealing at 200 ° C. for 1 hour in the atmosphere, the maximum height (R pp ) within the 1 ⁇ m square range is 3.6 nm, and the arithmetic average roughness (R a ) is 0.3. A small value of 33 nm was maintained. Thus, in Sample 1, the increase in surface roughness accompanying annealing at 200 ° C. was very small, with an R pp value of less than 2 nm and an Ra value of less than 0.2 nm.
  • the oxide semiconductor film 11 of Sample 1 of Sample 1 As-depo. It can be seen that the surface roughness can be reduced in both the state and the state after annealing at 200 ° C., and further, the increase in the surface roughness accompanying the annealing can be extremely reduced. Thus, when another thin film, specifically, an insulating film or an n-type semiconductor film is formed on the oxide semiconductor film 11, the generation of pinholes is suppressed, and stable element operation is ensured. There exists an effect which can prevent deterioration and an electrical short circuit.
  • Example 4 12 (a) and 12 (b) show as-depo.
  • sample 2 shown in Example 2.
  • FIG. The state and AFM (Atomic Force Microscope) images of the surface after annealing at 200 ° C. for 1 hour in the atmosphere are shown. Note that the AFM images shown in FIGS. 12A and 12B each show a 1 ⁇ m square range of the sample surface.
  • AFM Anatomic Force Microscope
  • the oxide semiconductor film 11 ′ of Sample 2 As described above, in the oxide semiconductor film 11 ′ of Sample 2, as-depo. It can be seen that the surface roughness can be reduced in both the state and the state after annealing at 200 ° C., and further, the increase in the surface roughness accompanying the annealing can be extremely reduced. Accordingly, when another thin film, specifically, an insulating film or an n-type semiconductor film is formed on the oxide semiconductor film 11 ′, generation of pinholes is suppressed, and stable element operation is ensured. The effect which can prevent deterioration and electrical short circuit is produced.
  • Comparative Sample 1 Cu 2 O crystal grains exist, and crystallization is promoted by annealing. Even in the state, the surface roughness is 4 times or more as compared with Samples 1 and 2, and the increase in roughness due to annealing at 200 ° C. is less than 2 nm in R pp value in Samples 1 and 2. On the other hand, this comparative example showed a much larger value of 37 nm.
  • FIG. 14 shows samples 1 and 1 that contain only Cu, In, Ga, and Zn as metal elements and have a Cu composition ratio of 81 at%, and each sample has a Cu composition ratio of 42 at%, 57 at%, and 92 at%.
  • R a arithmetic average roughness
  • the arithmetic average roughness (R a ) is within the range as-depo.
  • both values are smaller than those of the comparative sample 1 in which the Cu composition ratio is 100 at%. Therefore, it has been found that by adding In—Ga—Zn—O, the surface roughness can be reduced, and further, the increase in surface roughness accompanying annealing can be extremely reduced.
  • the ratio of the other three metals (In, Ga, Zn) was changed within the desired composition range of each element described in the first embodiment.
  • the arithmetic average roughness (R a ) was measured, the effect of reducing the surface roughness was confirmed as in this example.
  • the composition ratio of Cu is fixed to 42 at%, 57 at%, and 92 at%, and the other three metals (In, Ga, and Zn) are preferably combined in the desired composition range of each element described in the first embodiment. As a result, the effect of reducing the surface roughness was confirmed for the samples in which the mutual ratio was changed.
  • the arithmetic average roughness (R a ) is within the range as-depo.
  • both values are smaller than those of the comparative sample 1 in which the Cu composition ratio is 100 at%. Therefore, it was found that by adding In—Ga—O, the surface roughness can be reduced, and further, the increase in surface roughness accompanying annealing can be extremely reduced.
  • Example 5 16 (a) and 16 (b) show as-depo.
  • FIG. 16A The results of transmittance measurement using a spectrophotometer for the state (FIG. 16A) and the state after annealing for 1 hour at 200 ° C. in the atmosphere (FIG. 16B) are shown. .
  • a sample containing only Cu, In, Ga, and Zn as metal elements and having a Cu composition ratio of 42 at%, 74 at%, and 92 at% in Sample 1 (total of In, Ga, and Zn is 58 at% and 26 at%, respectively) , 8 at%) of the transmittance measurement results are also shown.
  • a synthetic quartz substrate having a transmittance of 90% or more in a wavelength range of 300 nm to 900 nm is applied as the substrate 12 for any sample, and each sample is further formed thereon.
  • the oxide semiconductor formed with a film thickness of 50 nm was used.
  • the transmittance of the sample 1 is larger than the transmittance of the comparative sample 1 in the entire range from the wavelength of 300 nm to 900 nm, and is more transparent than the comparative sample 1 in the ultraviolet to near infrared region. It was confirmed that an oxide semiconductor thin film having a high thickness could be formed. Further, in the comparative sample 1, the transmittance is greatly reduced from about 22% to about 4% as the wavelength is decreased between the wavelength of 550 nm and 350 nm, whereas in the sample 1, the transmittance is about 40% up to around the wavelength of 400 nm. The transmissivity exceeding 1 was maintained. More specifically, a transmittance exceeding 40% was obtained in the wavelength range of 420 nm or more.
  • the transmittance of Comparative Sample 1 is as-depo. Shown in FIG. The transmittance of the sample 1 was larger than the transmittance of the comparative sample 1 in the entire range from the wavelength of 300 nm to 900 nm even after annealing at 200 ° C. It was confirmed that the oxide semiconductor thin film had higher permeability than Comparative Sample 1. In the comparative sample 1, the transmittance is greatly reduced from a little over 40% to about 10% as the wavelength is decreased between the wavelength of 500 nm and 400 nm, whereas in the sample 1, the as-depo. Similar to the state, a transmittance exceeding 40% was obtained in the vicinity of the wavelength of 400 nm, more specifically in the range of the wavelength of 420 nm or more.
  • sample 1 is as-depo. Regardless of whether it is in the state or after annealing, a transmittance exceeding 40% can be obtained in the wavelength range from 420 nm to 900 nm. was gotten. That is, it became clear that the transmittance from the visible light region to the near ultraviolet region is higher than that of the comparative sample 1.
  • the composition ratio of Cu in the sample 1 is 42 at%, 74 at%, and 92 at%, the as-depo. Shown in FIG. In both the state and after the 200 ° C. annealing shown in FIG. 16B, a higher transmittance than that of the comparative sample 1 can be obtained in the entire wavelength range, and in particular, the composition ratio of Cu is the sample 1 (81 at%). In the case of the following, it was confirmed that transmittance exceeding 40% was obtained in the wavelength range of 420 nm or more. Further, from the results shown in FIGS. 16A and 16B, it has been clarified that the transmittance increases almost monotonously at any wavelength by decreasing the composition ratio of Cu in the oxide semiconductor film. .
  • composition ratio of Cu in each sample total of In, Ga, and Zn is 58 at%, 26 at%, 19 at%, and 8 at%, respectively
  • composition ratio of sample 1 and Cu being 42 at%, 74 at%, and 92 at%, respectively.
  • Example 6 17 (a) and 17 (b) show as-depo.
  • FIG. 17A The results of transmittance measurement using a spectrophotometer for the state (FIG. 17A) and the state after annealing for 1 hour at 200 ° C. in the atmosphere (FIG. 17B) are shown.
  • a sample containing only Cu, In, and Ga as metal elements and having a Cu composition ratio of 42 at%, 57 at%, 78 at%, and 92 at% in Sample 2 (the sum of In and Ga is 58 at%, respectively) , 43 at%, 22 at%, and 8 at%) are also shown.
  • a synthetic quartz substrate having a transmittance of 90% or more in a wavelength range of 300 nm to 900 nm is applied as the substrate 12 for any sample, and each sample is further formed thereon.
  • the oxide semiconductor formed with a film thickness of 50 nm was used.
  • the transmittance of the sample 2 is larger than the transmittance of the comparative sample 1 in the entire range from the wavelength of 300 nm to 900 nm, and is more transparent than the comparative sample 1 in the ultraviolet to near infrared region. It was confirmed that an oxide semiconductor thin film having a high thickness could be formed. Further, in the comparative sample 1, the transmittance is greatly reduced from about 22% to about 4% as the wavelength is decreased between the wavelength of 550 nm and 350 nm, whereas in the sample 2, the transmittance is about 30% up to the vicinity of the wavelength of 400 nm. The transmissivity exceeding 1 was maintained. More specifically, a transmittance exceeding 30% was obtained in the wavelength range of 420 nm or more. Further, a transmittance exceeding 40% was obtained in the wavelength range of 490 nm or more.
  • the transmittance of the comparative sample 1 is as-depo. Shown in FIG.
  • the transmittance of the sample 2 was larger than that of the comparative sample 1 in the entire range from the wavelength of 300 nm to 900 nm even after annealing at 200 ° C. It was confirmed that the oxide semiconductor thin film had higher permeability than Comparative Sample 1.
  • the transmittance is greatly reduced from a little over 40% to about 10% as the wavelength is decreased between the wavelength of 500 nm and 400 nm, whereas in the sample 2, the as-depo.
  • a transmittance of over 30% was obtained in the vicinity of the wavelength of 400 nm, more specifically in the range of the wavelength of 420 nm or more, and a transmittance of over 40% was obtained in the range of the wavelength of 490 nm or more.
  • sample 2 is as-depo. Regardless of whether it is in the state or after annealing, a transmittance exceeding 30% can be obtained in the wavelength range from 420 nm to 900 nm, and a transmittance exceeding 40% can be obtained in the wavelength range from 490 nm to 900 nm. It was. Furthermore, a high transmittance was obtained even at wavelengths shorter than that of Comparative Sample 1. That is, it became clear that the transmittance from the visible light region to the near ultraviolet region is higher than that of the comparative sample 1.
  • the composition ratio of Cu in the sample 2 is 42 at%, 57 at%, and 78 at%
  • the as-depo Shown in FIG. In both the state and after the 200 ° C. annealing shown in FIG. 17B, a higher transmittance than that of the comparative sample 1 can be obtained in the entire wavelength range, particularly when the Cu composition ratio is 78 at% or less It was confirmed that a transmittance exceeding 40% was obtained in the wavelength range of 420 nm or more.
  • Example 7 18 includes only Cu, In, Ga, and Zn as metal elements, and the composition ratio of Cu in Sample 1 and Sample 1 having a composition ratio of Cu of 81 at% is 42 at%, 57 at%, 74%, 78%, For the samples of 92 at% (total of In, Ga and Zn are 58 at%, 43 at%, 26 at%, 22 at%, and 8 at%, respectively), the carrier density obtained from the Hall effect measurement is included in the above six samples. It showed with respect to the composition ratio of Cu.
  • the composition ratio of Cu shown in FIG. 18 is the Cu content included when the sum of the metal elements (Cu, In, Ga, Zn) included in the oxide semiconductor film 11 is 100%. Element ratio (at%).
  • the Hall effect measurement in a present Example was performed using Van der Pauw method.
  • an insulating glass substrate was used as the substrate 12 in any of the samples shown in FIG. Further, in FIG. 18, the sample having a Cu composition ratio of 100 at% (the white point in FIG. 18) is the comparative sample 1 shown in the comparative example 1.
  • the carrier density decreases almost monotonously, and the Cu composition ratio reaches 100 at.
  • the carrier density which was 10 16 cm ⁇ 3 , decreased to 10 9 cm ⁇ 3 when the composition ratio of Cu was 42 at%.
  • FIG. 19 shows carrier mobility obtained by Hall effect measurement for the above sample.
  • the carrier mobility was 2.3 cm 2 / Vsec.
  • the Cu composition ratio was 92 at%, 3.0 cm 2 / Vsec, Cu
  • the composition ratio is 81 at%, it is 6.6 cm 2 / Vsec, and when it is 74 at%, 6.4 to 10.7 cm 2 / Vsec.
  • In—Ga—Zn—O shown in FIG. In the three samples added, as-depo. Although it was in a state, a value larger than that of Comparative Sample 1 was obtained.
  • FIG. 19 shows that the carrier mobility increases monotonously as the Cu composition ratio decreases. This is because, by adding In-Ga-Zn-O, which is amorphous, the entire sample is amorphous, microcrystalline, or a mixture of these, so that the comparative sample 1 is crystalline. This is probably because the scattering at the crystal grain boundary that hinders carrier movement is suppressed.
  • the element ratio of Cu included in the oxide semiconductor film 11 is 42 at% or more and 92 at% or less. In this range, it was possible to realize p-type high carrier mobility as compared with an oxide containing only Cu as a metal material.
  • Example 1 when considered together with the result of the X-ray diffraction measurement shown in Example 1, it is an amorphous material, a microcrystalline material, or a mixture thereof, and is formed at room temperature (as-depo. State). However, in order to obtain characteristics as a p-type semiconductor exhibiting a high carrier mobility exceeding 2 cm 2 / Vsec, it is overlapped with a range where a carrier density of a level that can be confirmed to be p-type by Hall effect measurement results is obtained. In addition, it is particularly desirable that the ratio of Cu in the metal material is 57 at% to 81 at%.
  • Sample 1 containing only Cu, In, Ga, and Zn as metal elements and having a composition ratio of Cu of 81 at% and each sample having a composition ratio of Cu of 42 at%, 57 at%, 74%, 78%, and 92 at% (The total of In, Ga, and Zn is 58 at%, 43 at%, 26 at%, 22 at%, and 8 at%, respectively)
  • the constituent ratio of Cu, for the other three metals (In, Ga, Zn) After fixing the constituent ratio of Cu, for the other three metals (In, Ga, Zn), A number of samples in which the ratios of the respective elements described in the first embodiment were changed within the desired composition range were prepared, and the hole mobility was measured. The degree was confirmed.
  • Comparative Example 3 As Comparative Example 3, a sample in which an oxide semiconductor thin film was formed in a state where the partial pressure ratio of oxygen gas in a mixed gas atmosphere of argon gas and oxygen gas was lowered in the production of Sample 1 shown in Example 1 (hereinafter referred to as “Comparative Example 3”). (Referred to as comparative sample 2).
  • Example 1 when the oxide semiconductor film 11 was manufactured, only an InGaZnO 4 target was sputtered alone so that oxygen vacancies were generated and no conduction electrons were detected to be detected as an n-type semiconductor.
  • the production conditions were adjusted so that when the —Ga—Zn—O thin film was deposited on the substrate 12, the carrier density (conducting electron density) was 1 ⁇ 10 11 cm ⁇ 3 or less.
  • the carrier density conducting electron density
  • Example 1 argon gas and oxygen gas were flowed at 40 sccm and 10 sccm, respectively, but in this comparative example, argon gas and oxygen gas were flowed at 47 sccm and 3 sccm, respectively.
  • the other production methods and conditions were the same as those of Sample 1 of Example 1. Under these conditions, when only an InGaZnO 4 target is sputtered alone and an In—Ga—Zn—O thin film is deposited on the substrate 12, the carrier type is n-type and the carrier density is 2 ⁇ 10. 18 cm ⁇ 3 .
  • Example 2 Under the condition where oxygen vacancies are likely to occur, a Cu target and an InGaZnO 4 target were simultaneously sputtered, and a comparative sample 2 having the same Cu composition ratio as in Example 1 (81 at%) was produced. As a result, the same Hall effect measurement as in Example 7 was performed on Comparative Sample 2, and it was confirmed that the carrier type of the manufactured sample was n-type.
  • the manufacturing conditions are set so that oxygen vacancies are not generated as much as possible in the oxide semiconductor film 11 as described in Example 1. It is important to adjust.
  • Example 8 20 includes only Cu, In, and Ga as metal elements, and the composition ratio of Cu is 42 at%, 57 at%, 78 at%, and 92 at% in Sample 2 and Sample 2 where the composition ratio of Cu is 85 at%.
  • the carrier density obtained from the Hall effect measurement with respect to the sample composition is shown with respect to the composition ratio of Cu contained in the above five samples. It was.
  • the composition ratio of Cu shown in FIG. 20 is that when the sum of the metal elements (Cu, In, Ga) contained in the oxide semiconductor film 11 ′ is 100%, Element ratio (at%).
  • the Hall effect measurement in a present Example was performed using Van der Pauw method.
  • an insulating glass substrate was used as the substrate 12 in any of the samples shown in FIG. Further, in FIG. 20, a sample having a Cu composition ratio of 100 at% (outlined point in FIG. 20) is the comparative sample 1 shown in the comparative example 1.
  • the carrier density decreases almost monotonically, and the Cu composition ratio is 100 at%.
  • the carrier density which was 10 16 cm ⁇ 3 , decreased to 10 9 cm ⁇ 3 when the composition ratio of Cu was 42 at%.
  • FIG. 21 shows the carrier mobility obtained by Hall effect measurement for the above sample.
  • the carrier mobility was 2.3 cm 2 / Vsec, but when the Cu composition ratio was 92 at%, the carrier mobility was 2.8 cm 2 / Vsec, Cu
  • FIG. 21 shows that the carrier mobility increases monotonously as the Cu composition ratio decreases. This is because the addition of In-Ga-O, which is amorphous, makes the entire sample amorphous, microcrystalline, or a mixture of these, and therefore, compared to Comparative Sample 1, which is crystalline. This is considered to be because scattering at the crystal grain boundary that hinders carrier movement is suppressed.
  • the element ratio of Cu contained therein is 42 at% or more and 92 at% or less. In the range, it was possible to realize high carrier mobility in the p-type as compared with the oxide containing only Cu as the metal material.
  • Example 2 when considered together with the result of the X-ray diffraction measurement shown in Example 2, it is an amorphous material, a microcrystalline material, or a mixture thereof, and is formed at room temperature (as-depo. State). However, in order to obtain characteristics as a p-type semiconductor exhibiting a high carrier mobility exceeding 2 cm 2 / Vsec, it is overlapped with a range where a carrier density of a level that can be confirmed to be p-type by Hall effect measurement results is obtained. In addition, it is particularly desirable that the ratio of Cu in the metal material is 57 at% to 85 at%.
  • the sample 1 includes only Cu, In, and Ga as metal elements, and the composition ratio of Cu is 85 at%, and each sample (In, which has a composition ratio of Cu of 42 at%, 57 at%, 78%, and 92 at%).
  • the other two metals In, Ga
  • a number of samples having different ratios in the desired composition range of the elements were prepared and the hole mobility was measured. As a result, a higher hole mobility than that of the comparative sample 1 could be confirmed for all the samples.
  • Comparative Example 4 As a comparative example 4, when the sample 2 shown in the example 2 was manufactured, a sample in which an oxide semiconductor thin film was formed in a state where the partial pressure ratio of the oxygen gas was reduced in the mixed gas atmosphere of argon gas and oxygen gas (hereinafter, (Referred to as comparative sample 3).
  • Example 2 only the InGaO 3 target was sputtered alone so that when the oxide semiconductor film 11 ′ was formed, oxygen vacancies were not generated and conduction electrons that would be detected as an n-type semiconductor were not generated.
  • the manufacturing conditions were adjusted so that when the In—Ga—O thin film was deposited on the substrate 12, the carrier density (conducting electron density) was 1 ⁇ 10 11 cm ⁇ 3 or less. On the other hand, in this comparative example, such adjustment was not performed. Therefore, oxygen vacancies occur in In—Ga—O.
  • Example 2 argon gas and oxygen gas were flowed at 40 sccm and 10 sccm, respectively, but in this comparative example, only argon gas was flowed at 50 sccm without flowing oxygen gas.
  • the other production methods and conditions were the same as those of Sample 2 in Example 2. Under these conditions, when only an InGaO 3 target is sputtered alone and an In—Ga—O thin film is deposited on the substrate 12, the carrier type is n-type and the carrier density is 3 ⁇ 10 18 cm. -3 .
  • Example 2 Under the condition where oxygen vacancies are likely to occur, a Cu target and an InGaO 3 target were simultaneously sputtered, and a comparative sample 3 having the same Cu composition ratio (85 at%) as in Example 2 was produced. As a result, the same Hall effect measurement as in Example 8 was performed on Comparative Sample 3, and it was confirmed that the carrier type of the manufactured sample was n-type.
  • the oxide semiconductor film 11 ′ having a carrier type of p type As described above, in order to obtain the oxide semiconductor film 11 ′ having a carrier type of p type, as shown in Example 2, the oxide semiconductor film 11 ′ is manufactured so that oxygen vacancies are not generated as much as possible. It is important to adjust the conditions.
  • the oxide semiconductor film including only Cu, In, Ga, and Zn as the metal material or including only Cu, In, and Ga is described. As long as the effects of the present invention are exhibited, Cu, In, Ga and Zn, or an additive element other than Cu, In and Ga may be included as the metal material.
  • the carrier type is p-type and 2) only Cu even in a state where the above-described additive element is included. It is necessary that low roughness, high transmittance, and high carrier mobility can be obtained as compared with the above oxides.
  • the presence of Cu oxide responsible for hole generation is important for 1), and the presence of In—Ga—Zn—O or In—Ga—O, which is an amorphous oxide, is important for 2).
  • the ratio of Cu in the whole metal material is 42 at% or more from Examples 7 and 8. From the above Examples 1 to 6, the In, Ga, and It can be seen that the total of Zn, Zn, In, and Ga is desirably 8 at% or more.
  • the composition ratio of the additive element is determined when the ratio of the entire metal element including the additive element and Cu, In, Ga, and Zn, or Cu, In, and Ga is 100 at%. , Preferably less than 50 at%.
  • the element type that can be added is that the band gap of the oxide is larger than that of the Cu oxide from the viewpoint of ensuring high transmittance, and any element that satisfies this condition can be used.
  • Example 9 IV (current-voltage) characteristics were measured for the diode element 21 shown in the third embodiment. Specifically, the IV characteristic shown in FIG. 22 was obtained by energizing the pn junction of the diode element 21 of FIG. 3 in the film thickness direction through the electrodes 14 and 15.
  • a glass substrate is used as the substrate 12
  • an InGaZnO 4 target is used as the n-type semiconductor film 13
  • an In—Ga—Zn—O thin film is formed by DC sputtering in a mixed gas atmosphere of argon and oxygen. Formed.
  • the thickness of the n-type semiconductor film 13 was 50 nm.
  • the carrier density was 2.4 ⁇ 10 18 cm ⁇ 3 and the carrier mobility was 10.1 cm 2 / Vsec.
  • the p-type oxide semiconductor film 11 of Example 1 was formed to a thickness of 50 nm.
  • the direction in which the voltage is positive corresponds to the direction in which the voltage is applied in the forward direction with respect to the pn junction, and the direction in which the voltage is negative (left direction in the drawing) is opposite to the pn junction. This corresponds to the direction in which the voltage is applied in the direction.
  • the p-type oxide semiconductor film 11 and the n-type semiconductor film 13 are energized through the electrodes 14 and 15, a shot is made between the material forming the electrodes 14 and 15 and the sample semiconductor material.
  • the electrodes 14 and 15 were selected so that no key junction was formed (so as to be an ohmic junction). Furthermore, it was confirmed in advance that the junction with the selected electrode material was an ohmic junction with respect to each single-layer film of the oxide semiconductor film 11 and the n-type semiconductor film 13 exhibiting p-type.
  • n-type semiconductor film 13 In this embodiment, In—Ga—Zn—O is used for the n-type semiconductor film 13, but the present invention is not limited to this, and other n-type semiconductor film 13 may be joined.
  • the n-type semiconductor film 13 may be amorphous, microcrystalline, or crystalline.
  • the rectification characteristics were similarly confirmed for the diode element 22 having a pin junction having the configuration shown in FIG.
  • the insulating layer 16 when the In—Ga—Zn—O thin film used for the n-type semiconductor film 13 is formed, the oxygen partial pressure is increased and the carrier density of 10 9 cm ⁇ 3 or less is insulated. Used as layer 16.
  • the film thickness of the insulating layer 16 was 10 nm.
  • the diode element 22 manufactured in this way can be confirmed to have a rectifying characteristic. Further, compared with the diode element 21 having a pn junction shown in FIG. As a result, the results were suppressed.
  • Example 10 In this example, in the diode element 21 described in Embodiment 3, the oxide semiconductor film 11 ′ described in Embodiment 2 is applied to the p-type oxide semiconductor film 11 ′, and IV ( Current-voltage characteristics were measured. Specifically, the IV characteristic shown in FIG. 23 was obtained by energizing the pn junction of the diode element 21 of FIG. 3 in the film thickness direction through the electrodes 14 and 15.
  • a glass substrate is used as the substrate 12
  • an InGaZnO 4 target is used as the n-type semiconductor film 13
  • an In—Ga—Zn—O thin film is formed by DC sputtering in a mixed gas atmosphere of argon and oxygen. Formed.
  • the film thickness of the n-type semiconductor film 13 was 100 nm.
  • the carrier density was 2.1 ⁇ 10 19 cm ⁇ 3 and the carrier mobility was 9.1 cm 2 / Vsec.
  • the p-type oxide semiconductor film 11 ′ of Example 2 was formed to a thickness of 200 nm.
  • the direction in which the voltage is positive corresponds to the direction in which the voltage is applied in the forward direction with respect to the pn junction, and the direction in which the voltage is negative (left direction in the drawing) is opposite to the pn junction. This corresponds to the direction in which the voltage is applied in the direction.
  • the materials and the samples constituting the electrodes 14 and 15 were selected so that no Schottky junction was formed with the semiconductor material (so that an ohmic junction was formed). Further, it was confirmed in advance that the junction with the selected electrode material was an ohmic junction with respect to each of the single-layer films of the p-type oxide semiconductor film 11 ′ and the n-type semiconductor film 13.
  • a clear rectifying characteristic is obtained in the diode element 21 of this example, and the die auto characteristic is obtained by forming a pn junction element using the p-type oxide semiconductor film 11 ′. It was confirmed that it was obtained. That is, by forming such a pn junction and arranging electrodes 14 and 15 that can be energized to the pn junction, it is possible to provide the diode element 21 that exhibits functions such as switching, light emission, or photovoltaic generation. is there.
  • n-type semiconductor film 13 In this embodiment, In—Ga—Zn—O is used for the n-type semiconductor film 13, but the present invention is not limited to this, and other n-type semiconductor film 13 may be joined.
  • the n-type semiconductor film 13 may be amorphous, microcrystalline, or crystalline.
  • the rectification characteristics were similarly confirmed for the diode element 22 having a pin junction having the configuration shown in FIG.
  • the insulating layer 16 In—Ga—O used for forming the oxide semiconductor film 11 ′ is used in a state containing no Cu, and when forming a thin film, the oxygen partial pressure is increased.
  • a carrier density of 10 9 cm ⁇ 3 or less was used as the insulating layer 16.
  • the film thickness of the insulating layer 16 was 10 nm.
  • the diode element 22 manufactured in this way can be confirmed to have a rectifying characteristic. Further, compared with the diode element 21 having a pn junction shown in FIG. As a result, the results were suppressed.
  • the oxide containing Cu is not necessarily incorporated in a monovalent state of Cu. It need not be In the case where microcrystalline matter is generated in the oxide semiconductor film 11, the microcrystalline grain may be a Cu 2 O phase, and may be any one of a CuO phase, Cu, In, Ga, and Zn, or of these An oxide in which a plurality of oxides are combined may be deposited.

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Abstract

La présente invention possède une mobilité élevée de porteurs, une perméabilité à la lumière visible et une planarité de surface élevée, et peut être formée sur un substrat de manière à présenter une faible résistance thermique. Un film semi-conducteur d'oxyde (11) formé sur un substrat (12) contient, comme éléments métalliques, de 42 % à 92 % de Cu, et de l'In et du Ga, ou de l'In, du Ga et du Zn, les porteurs étant du type p.
PCT/JP2013/053357 2012-02-15 2013-02-13 Semi-conducteur d'oxyde et élément de jonction comprenant celui-ci WO2013122084A1 (fr)

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WO2016075927A1 (fr) * 2014-11-11 2016-05-19 出光興産株式会社 Nouveau laminé
DE112017003754T5 (de) 2016-07-26 2019-04-18 Mitsubishi Electric Corporation Halbleitervorrichtung und verfahren zum herstellen einer halbleitervorrichtung
CN110176493A (zh) * 2014-03-31 2019-08-27 株式会社Flosfia 结晶性层叠结构体，半导体装置
CN110249432A (zh) * 2017-02-14 2019-09-17 三菱电机株式会社 电力用半导体装置
WO2022254999A1 (fr) * 2021-06-01 2022-12-08 株式会社パワーフォー Diode à semi-conducteurs

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JP6665536B2 (ja) * 2016-01-12 2020-03-13 株式会社リコー 酸化物半導体
KR102564145B1 (ko) * 2018-11-07 2023-08-07 엘지디스플레이 주식회사 트랜지스터, 전자장치 및 트랜지스터 회로
TWI708424B (zh) 2019-07-04 2020-10-21 國家中山科學研究院 直接平貼式主動頻率選擇表面之開關元件與其製作方法

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EP2786415A4 (fr) * 2011-11-30 2015-07-08 Ricoh Co Ltd Oxyde de type p, composition pour la production d'un oxyde de type p, procédé de production d'un oxyde de type p, élément à semiconducteurs, élément d'affichage, dispositif d'affichage d'image et système
US9536957B2 (en) 2011-11-30 2017-01-03 Ricoh Company, Ltd. P-type oxide, composition for producing p-type oxide, method for producing p-type oxide, semiconductor element, display element, image display device, and system
CN110176493A (zh) * 2014-03-31 2019-08-27 株式会社Flosfia 结晶性层叠结构体，半导体装置
WO2016075927A1 (fr) * 2014-11-11 2016-05-19 出光興産株式会社 Nouveau laminé
JPWO2016075927A1 (ja) * 2014-11-11 2017-08-24 出光興産株式会社 新規な積層体
TWI731844B (zh) * 2014-11-11 2021-07-01 日本商出光興產股份有限公司 積層體
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CN110249432A (zh) * 2017-02-14 2019-09-17 三菱电机株式会社 电力用半导体装置
WO2022254999A1 (fr) * 2021-06-01 2022-12-08 株式会社パワーフォー Diode à semi-conducteurs

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