WO2013121773A1 - 配線構造体およびその製造方法 - Google Patents
配線構造体およびその製造方法 Download PDFInfo
- Publication number
- WO2013121773A1 WO2013121773A1 PCT/JP2013/000750 JP2013000750W WO2013121773A1 WO 2013121773 A1 WO2013121773 A1 WO 2013121773A1 JP 2013000750 W JP2013000750 W JP 2013000750W WO 2013121773 A1 WO2013121773 A1 WO 2013121773A1
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- WIPO (PCT)
- Prior art keywords
- pattern
- layer pattern
- wiring structure
- absorption layer
- insulating layer
- Prior art date
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1275—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by other printing techniques, e.g. letterpress printing, intaglio printing, lithographic printing, offset printing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0104—Properties and characteristics in general
- H05K2201/0129—Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
- H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4685—Manufacturing of cross-over conductors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Definitions
- the present invention relates to a wiring structure capable of fine multilayer wiring using a micro contact printing method and a method for manufacturing the same.
- an insulating layer is applied on the first conductor pattern as shown in FIG. 6 of Patent Document 1 as well as the one conductor pattern as shown in FIG. On top of this, another conductor pattern is also formed.
- the insulating layer is applied to the entire surface of the substrate by a spin coat process or the like, and is not patterned.
- the multilayer wiring structure by the micro contact printing method is manufactured as follows. First, a first conductor pattern layer is formed on a substrate by a microcontact printing method. Next, an insulating layer is applied to the entire surface of the substrate using a spin coat method or the like. Next, a second conductor pattern layer is formed. In some cases, after this, a semiconductor pattern layer is also formed to provide not only a wiring function but also a transistor function.
- Patent Document 2 is disclosed as a method of manufacturing a multilayer wiring structure.
- a step of forming a metal conductor pattern on the surface of a carrier, a step of forming a semi-cured insulating resin layer on the metal conductor pattern forming side of the carrier, a step of curing the insulating resin layer, and an insulating resin A flat wiring board is manufactured by a process of removing carriers from the surface of the layer and the metal conductor pattern, and a multilayer wiring structure is realized by stacking these.
- Patent Document 3 a conductor layer formed on a semi-cured resin on a substrate is flattened by being pushed into the semi-cured resin, and is bonded to a separately prepared substrate with a conductor layer.
- a multilayer wiring structure is disclosed.
- Patent Document 1 a fine and multilayer wiring structure cannot be realized. This is because when a wiring is formed on a substrate having an uneven surface by the microcontact printing method, the wiring pattern cannot be transferred as the wiring becomes finer.
- Patent Documents 2 and 3 although a multilayer wiring structure can be realized, it is necessary to bond a plurality of substrates. Therefore, misalignment occurred between the substrates. With the miniaturization of wiring, the effect of this misalignment has increased, leading to a decrease in manufacturing yield. Furthermore, it is necessary to form a wiring structure on a plurality of substrates in advance, and the alignment and bonding accompanying the bonding of the substrates to each other necessitates complicated processes.
- the first problem is that when an insulating layer is transferred to form a multilayer wiring structure, the insulating layer needs to be thicker than a certain thickness in order to ensure sufficient insulation. As a result, irregularities are formed on the surface to which the upper conductor layer is transferred.
- a fine pattern is transferred to the surface on which the unevenness is formed, there is a problem that it is impossible to achieve both the followability of the transferred surface to the unevenness and the formation of the fine pattern as intended. That is, in the fine pattern, it is necessary to select a plate material having a low elastic modulus in order to ensure followability.
- the convex patterns come into contact with each other, or the ink applied to a portion other than the convex portion (concave portion) is transferred, thereby transferring an unintended pattern. Inevitable.
- the plate has a low modulus of elasticity, if it is not a fine pattern, even if the aspect ratio is low, the distance between the irregularities of the pattern can be sufficiently secured, so that the ink applied to the concaves is prevented from being transferred. Is done.
- the ink is applied in advance to the surface of an ink supply body such as a flat wafer, and the microcontact stamp is brought into contact with the ink supply body so that the convex portion is formed. It is also considered to solve the above-mentioned problem by using an indirect ink application method in which only ink is supplied.
- the ink on the ink supply body may infiltrate into the concave portion of the stamp due to surface tension or the like, and if the ink is sufficiently dried to avoid this, the ink supply itself is impossible. Therefore, this method cannot be selected for a fine pattern.
- Patent Document 1 energy is applied to a specific portion in advance by ashing or the like through a pattern mask on a transfer substrate.
- the surface energy is set high and low, and the portion that is not intended for ink transfer is set to low surface energy in advance, thereby avoiding unintended pattern transfer.
- the distance between the convex portions is sufficiently large with respect to the height difference between the concave and convex portions of the pattern, it is impossible to avoid the ink transfer over the entire concave portion by this method.
- the second problem is that even if the pattern to be transferred is not fine and can be transferred using a stamp having a low elastic modulus in order to ensure followability, a step with a steep angle of a certain level or more is required. After all, it cannot be followed. At the stepped portion, the pattern is broken and a multilayer wiring cannot be formed.
- the third problem is that, when the adhesion between the conductive ink and the insulating ink transferred to the substrate to be transferred is low, delamination occurs during the process between the substrate and each layer in contact with the substrate, resulting in a decrease in yield. That is.
- the object of the present invention is the above-described problem that a fine multilayer wiring structure cannot be realized by the microcontact printing method.
- An object of the present invention is to provide a wiring structure that solves the problem of increasing complexity and realizes a fine multilayer wiring structure by a simple process using a microcontact printing method and a method for manufacturing the same.
- the wiring structure includes a substrate, an uneven absorption layer having an uneven portion on the substrate, a conductive layer pattern on at least the recessed portion of the uneven absorption layer, and at least on the recessed portion straddling the conductive layer pattern and the uneven absorption layer. And an insulating layer pattern.
- a method of manufacturing a wiring structure includes a step of forming a concavo-convex absorption layer on a substrate, a step of forming a conductive layer pattern on the concavo-convex absorption layer, and an insulating layer on the concavo-convex absorption layer and the conductive layer pattern.
- the transfer of the fine wiring pattern is facilitated, the tearing of the wiring pattern is avoided, and the delamination is suppressed.
- a wiring structure realized by a simple process using a contact printing method and a method for manufacturing the same.
- FIG. 1 shows a cross-sectional view of a wiring structure according to an embodiment of the present invention.
- FIG. 2 is a plan view of the wiring structure according to the embodiment of the present invention.
- FIG. 3 is a cross-sectional view of the wiring structure according to the embodiment of the present invention. A section taken along the line A-A 'in FIG. 2 corresponds to FIG. 2 corresponds to FIG. 3.
- 1, 2, and 3 includes a substrate 2 and an uneven absorption layer 3 on the substrate 2.
- the first conductor layer pattern 4 ′ is formed simultaneously with the first conductor layer pattern 4.
- a part of the first conductive layer pattern 4 is covered with an insulating layer pattern 5.
- the first conductive layer pattern 4 and the insulating layer pattern 5 are partially embedded in the uneven absorption layer 3, and the bottom surface of the insulating layer pattern 5 is closer to the substrate 2 than the surface of the uneven absorption layer 3. Yes.
- the level difference between the insulating layer pattern 5 and the surface of the uneven absorption layer 3 is reduced by the amount of the insulating layer pattern 5 embedded in the uneven absorption layer 3, and the flatness is improved.
- the uneven absorption layer 3 is in a semi-cured state during manufacture, the surface thereof is sticky. Therefore, adhesion to the upper conductive pattern 4 (and 4 ') and insulating layer pattern 5 can be secured. In such a state, each layer in contact with the uneven absorption layer 3 is less likely to cause delamination with the uneven absorption layer 3, thereby providing an effect of contributing to an improvement in manufacturing yield.
- FIGS. 4A to 4F a method for manufacturing a wiring structure according to an embodiment of the present invention will be described with reference to FIGS. 4A to 4F. Note that the materials and processes to be employed are not limited to those in the present embodiment as long as the effects of the equivalent invention can be obtained.
- a substrate 2 is prepared.
- the substrate material may be a flexible material such as a resin film or a rigid material such as a printed circuit board. If a flexible substrate is selected, the wiring structure becomes flexible and can be applied to a wearable device, a flexible display, and the like, which is preferable.
- the uneven absorption layer 3 is formed on the substrate 2.
- a thermosetting resin is selected as the material for the uneven absorption layer 3.
- the uneven absorption layer 3 is laminated by a spin coating method or a bar coating method if it is a liquid material, or by a vacuum laminating method if it is a sheet material, and then heated to a semi-cured state (so-called B stage). .
- a semi-cured sheet-like material may be laminated in advance by a vacuum laminating method.
- corrugated absorption layer 3 selects the material which has a thermosetting temperature higher than the sintering temperature and the thermosetting temperature of all the conductor layers and insulation layers laminated
- the thickness of the uneven absorption layer 3 is preferably as thick as possible, but the thickness is determined in consideration of restrictions in mounting on an electronic device or the like to be incorporated.
- the uneven absorption layer 3 must be an insulator because the conductor layer pattern is laminated in the subsequent process.
- a conductor layer pattern is laminated, and when it is partially connected to the conductor layer as a solid pattern to be used for a ground or the like in electrical wiring May be a conductor.
- a conductor may be used if a single layer of an insulating layer is laminated in order to ensure insulation in the subsequent process.
- the first conductor layer pattern 4 (and 4 ') is formed.
- a pattern of a conductor ink in which metal nanoparticles such as silver, copper, gold, and aluminum are dissolved in a solvent using a microcontact printing method or the like is used. Is transferred onto and then sintered.
- the sintering temperature must be equal to or higher than the sintering temperature of the first conductive layer pattern and lower than the thermosetting temperature of the uneven absorption layer 3. Since the surface of the uneven absorption layer 3 is formed flat, the first conductor layer 4 (and 4 ') can be a fine wiring pattern.
- an insulating layer pattern 5 ′ is formed on the first conductor layer 4 as shown in FIG. 4D.
- a pattern of insulating ink in which a precursor of an insulating resin such as polyimide or epoxy is dissolved in a solvent by using a micro contact printing method is covered on the first conductor layer 4 and the first conductor layer 4 ′. It transfers to the part on the uneven
- the temperature for curing must be equal to or higher than the thermal curing temperature of the insulating layer and lower than the thermal curing temperature of the uneven absorption layer 3.
- the first conductor layer pattern 4 and the insulating layer pattern 5 are pressed into the uneven absorption layer 3 under pressure. That is, a temperature at which the uneven absorption layer 3 is semi-cured as a whole while a film or the like subjected to a release treatment is placed on the insulating layer pattern 5 and the pressure is uniformly applied from above with a pressure device or the like.
- a temperature lower than the thermosetting temperature of the uneven absorption layer 3 as described above the uneven absorption layer 3 is given fluidity, and the first conductor layer pattern 4 and the insulating layer pattern 5 are pushed into the uneven absorption layer 3. Thereby, the unevenness
- the uneven absorption layer 3 is cured by heating to a temperature equal to or higher than the thermosetting temperature of the uneven absorption layer 3.
- the unevenness of the insulating layer pattern 5 is fixed in a shape that has been absorbed, and the flatness of the surface is maintained.
- the shape of the uneven absorption layer 3 is as shown in FIG. 4E or FIG. 5A depending on the elastic modulus of the uneven absorption layer 3. If the elastic modulus of the uneven absorption layer 3 is sufficiently low, the first conductor layer pattern 4 and the insulating layer pattern 5 are pushed straight into the uneven absorption layer 3 as shown in FIG. 4E. On the other hand, if the elastic modulus of the concavo-convex absorption layer 3 is high to some extent, the insulating layer pattern 5 spreads to the periphery as shown in FIG. 5A.
- the purpose is to enable transfer of a fine wiring pattern in the process following FIG. 4E or FIG. 5A. Therefore, in any case of FIG. 4E or FIG. And achieve the object of the present invention.
- FIG. 6 shows a thermosetting profile from a semi-cured state of the thermosetting epoxy resin used in the present embodiment.
- the thermosetting resin in the semi-cured state rapidly increases before reaching the thermosetting temperature (180 ° C. in FIG. 6).
- the elastic modulus decreases. Thereafter, when heated at a thermosetting temperature for a certain period of time (about 90 minutes in FIG. 6), the elastic modulus gradually increases, and by subsequent cooling, the elastic modulus finally becomes about an order of magnitude higher than before heating.
- the temperature is maintained at a temperature lower than the thermosetting temperature of the uneven absorption layer 3 (in FIG. 6, for example, around 160 ° C.).
- the flatness of the surface can be improved by pushing in the state in which the elastic modulus of the uneven absorption layer 3 is significantly lowered.
- the second conductor layer pattern 6 is transferred.
- a pattern of a conductive ink in which metal nanoparticles such as silver, copper, gold, and aluminum are dissolved in a solvent is transferred using a microcontact printing method or the like, and then sintered.
- the sintering temperature is equal to or higher than the sintering temperature of the second conductive layer pattern, and may be higher than the thermosetting temperature of the uneven absorption layer 3.
- the materials and processes to be adopted in this process are not limited to those described above.
- the second conductor layer pattern 6 can be a fine wiring pattern. Further, when it is known from the relationship between the physical properties of the uneven absorption layer 3 and the insulating layer pattern 5 that the shape as shown in FIG. 5A is obtained, the first conductor layer pattern 4 is taken into account by taking into account the spread of the insulating layer pattern 5.
- the wiring pattern can be designed so that the second conductor layer pattern 6 is connected.
- the uneven absorption layer 3 can be made of a thermoplastic resin.
- the sintering temperature and the thermosetting temperature of the first conductor layer pattern 4 (and 4 ′) and the insulating layer pattern 5 include the thermosetting temperature of the uneven absorption layer 3.
- the restriction of having to be lower is removed. As a result, there is a special effect that freedom of material selection is increased.
- the unevenness of the surface to which the wiring is transferred is reduced, so that the transfer of the fine wiring pattern is facilitated, and the tearing of the wiring pattern due to the unevenness is suppressed. Furthermore, delamination was suppressed by improving the adhesion between the layers. As a result, the microcontact printing method solved the problem that a fine multilayer wiring structure could not be realized. Furthermore, it is no longer necessary to form a multilayer wiring structure by laminating a plurality of substrates, that is, there is no problem of misalignment or complicated process for laminating a plurality of substrates, and simple using the micro contact printing method. Thus, it is possible to provide a wiring structure and a method for manufacturing the same, which can form a fine multilayer wiring structure in a simple process.
- a substrate A substrate, a concavo-convex absorption layer having a concavo-convex portion on the substrate, a conductive layer pattern on at least a concave portion of the concavo-convex absorption layer, and an insulating layer pattern on at least the concave portion straddling the conductive layer pattern and the concavo-convex absorption layer;
- a wiring structure comprising:
- thermosetting temperature of the first thermosetting resin is higher than the thermosetting temperature of the second thermosetting resin and the sintering temperature of the metal particles.
- thermosetting resin is a polyimide resin or an epoxy resin.
- Appendix 7 The wiring structure according to appendix 1, wherein the uneven absorption layer is a thermoplastic resin.
- (Appendix 8) Forming a concavo-convex absorption layer on a substrate; forming a conductive layer pattern on the concavo-convex absorption layer; forming an insulating layer pattern on the concavo-convex absorption layer and the conductive layer pattern;
- a process for producing a wiring structure comprising: pressing an insulating layer pattern to push the insulating layer pattern and the conductive layer pattern into the uneven absorption layer; and curing the uneven absorption layer.
- the uneven absorption layer is a first thermosetting resin
- the insulating layer pattern is a second thermosetting resin
- the conductive layer pattern is made of metal particles
- the manufacturing method of a wiring structure according to appendix 8 wherein the thermosetting temperature of the first thermosetting resin is higher than the thermosetting temperature of the second thermosetting resin and the sintering temperature of the metal particles.
- Appendix 10 The method for manufacturing a wiring structure according to appendix 9, wherein a temperature of the pushing-in step is lower than a thermosetting temperature of the first thermosetting resin.
- step of forming the uneven absorption layer includes a step of semi-curing the first thermosetting resin at a temperature lower than the thermosetting temperature of the first thermosetting resin.
- the step of forming the conductive layer pattern includes the step of sintering the metal particles at a temperature higher than the sintering temperature of the metal particles and lower than the thermosetting temperature of the first thermosetting resin.
- the step of forming the insulating layer pattern includes curing the second thermosetting resin at a temperature higher than the thermosetting temperature of the second thermosetting resin and lower than the thermosetting temperature of the first thermosetting resin.
- Appendix 14 14. The method for manufacturing a wiring structure according to any one of appendices 9 to 13, wherein the step of curing the uneven absorption layer is equal to or higher than a thermosetting temperature of the first thermosetting resin.
- (Appendix 15) Forming a concavo-convex absorption layer on a substrate; forming a conductive layer pattern on the concavo-convex absorption layer; forming an insulating layer pattern on the concavo-convex absorption layer and the conductive layer pattern;
- a wiring structure comprising: pressing an insulating layer pattern and pressing the insulating layer pattern and the conductive layer pattern into the uneven absorption layer, wherein the uneven absorption layer is a thermoplastic resin. Manufacturing method.
- the present invention relates to a wiring structure capable of fine multilayer wiring using a micro contact printing method and a method for manufacturing the same.
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Abstract
Description
(付記1)
基板と、前記基板上に凹凸部を有する凹凸吸収層と、前記凹凸吸収層の少なくとも凹部上の導電層パターンと、前記導電層パターンと前記凹凸吸収層に跨る少なくとも前記凹部上の絶縁層パターンとを有することを特徴とする配線構造体。
前記凹凸吸収層が第一の熱硬化樹脂であり、前記絶縁層パターンが第二の熱硬化樹脂であり、前記導電層パターンが金属粒子からなることを特徴とする、付記1記載の配線構造体。
前記第一の熱硬化樹脂の熱硬化温度が、前記第二の熱硬化樹脂の熱硬化温度および前記金属粒子の焼結温度よりも高いことを特徴とする、付記2記載の配線構造体。
前記第一の熱硬化樹脂がエポキシ樹脂であることを特徴とする、付記2乃至3の何れか1項記載の配線構造体。
前記第二の熱硬化樹脂がポリイミド樹脂あるいはエポキシ樹脂であることを特徴とする、付記2乃至4の何れか1項記載の配線構造体。
前記金属粒子が銀、銅、金、アルミニウムを有することを特徴とする、付記2乃至5の何れか1項記載の配線構造体。
前記凹凸吸収層が熱可塑性樹脂であることを特徴とする、付記1記載の配線構造体。
基板上に凹凸吸収層を形成する工程と、前記凹凸吸収層上に導電層パターンを形成する工程と、前記凹凸吸収層と前記導電層パターンとの上に絶縁層パターンを形成する工程と、前記絶縁層パターンを加圧して、前記絶縁層パターンと前記導電層パターンとを前記凹凸吸収層に押し込む工程と、前記凹凸吸収層を硬化する工程とを有することを特徴とする、配線構造体の製造方法。
前記凹凸吸収層が第一の熱硬化樹脂であり、前記絶縁層パターンが第二の熱硬化樹脂であり、前記導電層パターンが金属粒子からなり、
前記第一の熱硬化樹脂の熱硬化温度が、前記第二の熱硬化樹脂の熱硬化温度および前記金属粒子の焼結温度よりも高いことを特徴とする、付記8記載の配線構造体の製造方法。
前記押し込む工程の温度が、前記第一の熱硬化樹脂の熱硬化温度よりも低いことを特徴とする、付記9記載の配線構造体の製造方法。
前記凹凸吸収層を形成する工程が、前記第一の熱硬化樹脂を、前記第一の熱硬化樹脂の熱硬化温度よりも低い温度で半硬化する工程を有することを特徴とする、付記9乃至10の何れか1項記載の配線構造体の製造方法。
前記導電層パターンを形成する工程が、前記金属粒子を、前記金属粒子の焼結温度よりも高く前記第一の熱硬化樹脂の熱硬化温度よりも低い温度で焼結する工程を有することを特徴とする、請求項9乃至11の何れか1項記載の配線構造体の製造方法。
前記絶縁層パターンを形成する工程が、前記第二の熱硬化樹脂を、前記第二の熱硬化樹脂の熱硬化温度よりも高く前記第一の熱硬化樹脂の熱硬化温度よりも低い温度で硬化する工程を有することを特徴とする、付記9乃至12の何れか1項記載の配線構造体の製造方法。
前記凹凸吸収層を硬化する工程が、前記第一の熱硬化樹脂の熱硬化温度以上であることを特徴とする、付記9乃至13の何れか1項記載の配線構造体の製造方法。
基板上に凹凸吸収層を形成する工程と、前記凹凸吸収層上に導電層パターンを形成する工程と、前記凹凸吸収層と前記導電層パターンとの上に絶縁層パターンを形成する工程と、前記絶縁層パターンを加圧して、前記絶縁層パターンと前記導電層パターンとを前記凹凸吸収層に押し込む工程とを有し、前記凹凸吸収層が熱可塑性樹脂であることを特徴とする、配線構造体の製造方法。
2 基板
3 凹凸吸収層
4 第一の導体層パターン
5 絶縁層パターン
6 第二の導体層パターン
Claims (10)
- 基板と、前記基板上に凹凸部を有する凹凸吸収層と、前記凹凸吸収層の少なくとも凹部上の導電層パターンと、前記導電層パターンと前記凹凸吸収層に跨る少なくとも前記凹部上の絶縁層パターンとを有することを特徴とする配線構造体。
- 前記凹凸吸収層が第一の熱硬化樹脂であり、前記絶縁層パターンが第二の熱硬化樹脂であり、前記導電層パターンが金属粒子からなることを特徴とする、請求項1記載の配線構造体。
- 前記第一の熱硬化樹脂の熱硬化温度が、前記第二の熱硬化樹脂の熱硬化温度および前記金属粒子の焼結温度よりも高いことを特徴とする、請求項2記載の配線構造体。
- 前記第一の熱硬化樹脂がエポキシ樹脂であることを特徴とする、請求項2乃至3の何れか1項記載の配線構造体。
- 前記凹凸吸収層が熱可塑性樹脂であることを特徴とする、請求項1記載の配線構造体。
- 基板上に凹凸吸収層を形成する工程と、前記凹凸吸収層上に導電層パターンを形成する工程と、前記凹凸吸収層と前記導電層パターンとの上に絶縁層パターンを形成する工程と、前記絶縁層パターンを加圧して、前記絶縁層パターンと前記導電層パターンとを前記凹凸吸収層に押し込む工程と、前記凹凸吸収層を硬化する工程とを有することを特徴とする、配線構造体の製造方法。
- 前記凹凸吸収層が第一の熱硬化樹脂であり、前記絶縁層パターンが第二の熱硬化樹脂であり、前記導電層パターンが金属粒子からなり、
前記第一の熱硬化樹脂の熱硬化温度が、前記第二の熱硬化樹脂の熱硬化温度および前記金属粒子の焼結温度よりも高いことを特徴とする、請求項6記載の配線構造体の製造方法。 - 前記押し込む工程の温度が、前記第一の熱硬化樹脂の熱硬化温度よりも低いことを特徴とする、請求項7記載の配線構造体の製造方法。
- 前記凹凸吸収層を形成する工程が、前記第一の熱硬化樹脂を、前記第一の熱硬化樹脂の熱硬化温度よりも低い温度で半硬化する工程を有することを特徴とする、請求項7乃至8の何れか1項記載の配線構造体の製造方法。
- 基板上に凹凸吸収層を形成する工程と、前記凹凸吸収層上に導電層パターンを形成する工程と、前記凹凸吸収層と前記導電層パターンとの上に絶縁層パターンを形成する工程と、前記絶縁層パターンを加圧して、前記絶縁層パターンと前記導電層パターンとを前記凹凸吸収層に押し込む工程とを有し、前記凹凸吸収層が熱可塑性樹脂であることを特徴とする、配線構造体の製造方法。
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US11406005B2 (en) * | 2018-05-29 | 2022-08-02 | Kyocera Corporation | Substrate for mounting electronic element, electronic device, and electronic module |
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JPH04221879A (ja) * | 1990-12-21 | 1992-08-12 | Meiki Co Ltd | ジャンパー部を有するプリント回路基板およびその製法 |
JP2004039691A (ja) * | 2002-06-28 | 2004-02-05 | Matsushita Electric Ind Co Ltd | Led照明装置用の熱伝導配線基板およびそれを用いたled照明装置、並びにそれらの製造方法 |
JP2008218459A (ja) * | 2007-02-28 | 2008-09-18 | Toyota Motor Corp | 回路基板およびその製造方法 |
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JPH04221879A (ja) * | 1990-12-21 | 1992-08-12 | Meiki Co Ltd | ジャンパー部を有するプリント回路基板およびその製法 |
JP2004039691A (ja) * | 2002-06-28 | 2004-02-05 | Matsushita Electric Ind Co Ltd | Led照明装置用の熱伝導配線基板およびそれを用いたled照明装置、並びにそれらの製造方法 |
JP2008218459A (ja) * | 2007-02-28 | 2008-09-18 | Toyota Motor Corp | 回路基板およびその製造方法 |
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US11406005B2 (en) * | 2018-05-29 | 2022-08-02 | Kyocera Corporation | Substrate for mounting electronic element, electronic device, and electronic module |
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