WO2013040810A1 - 双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法 - Google Patents

双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法 Download PDF

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WO2013040810A1
WO2013040810A1 PCT/CN2011/080515 CN2011080515W WO2013040810A1 WO 2013040810 A1 WO2013040810 A1 WO 2013040810A1 CN 2011080515 W CN2011080515 W CN 2011080515W WO 2013040810 A1 WO2013040810 A1 WO 2013040810A1
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width
layer
photoresist
metal layer
photoresist layer
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PCT/CN2011/080515
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English (en)
French (fr)
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董成才
许哲豪
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深圳市华星光电技术有限公司
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Priority to US13/378,046 priority Critical patent/US20130078801A1/en
Publication of WO2013040810A1 publication Critical patent/WO2013040810A1/zh

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/10—Etching compositions
    • C23F1/14—Aqueous compositions
    • C23F1/16—Acidic compositions
    • C23F1/20—Acidic compositions for etching aluminium or alloys thereof
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/10—Etching compositions
    • C23F1/14—Aqueous compositions
    • C23F1/16—Acidic compositions
    • C23F1/26—Acidic compositions for etching refractory metals
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/44—Compositions for etching metallic material from a metallic material substrate of different composition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor

Definitions

  • the invention relates to the field of semiconductor fabrication, in particular to a method for fabricating a double-step structure gate electrode and a corresponding thin film field effect transistor by two wet etching after lithography using a semi-transparent lithography plate.
  • TFT Thin Film Transistor
  • the gate electrode of a thin film field effect transistor is usually composed of two metal films (such as an aluminum metal film and a molybdenum metal film). But the double metal film is thicker, If a single-step double-layer metal film is formed on the substrate as shown in FIG. 1, the deposition effect on the subsequent layers is disadvantageous.
  • the main method for solving this problem is to etch the aluminum layer 25 narrower than the molybdenum layer 23 during etching.
  • a double step structure as shown in Fig. 2 is formed, so that the gate electrode is changed from a single step structure to a double step structure in the thickness direction.
  • a dry etching is applied once by etching the gate electrode layer. details as follows:
  • an aluminum layer 23 and a molybdenum layer 25 are deposited on the substrate 21, and the photoresist layer 27 is coated to form a photoresist layer pattern having a width W1 by first photolithography;
  • wet etching forms a pattern as shown in FIG. 4;
  • the photoresist layer is peeled off to form a pattern as shown in FIG. 2, and a gate electrode layer 29 having a double step structure is obtained, wherein the aluminum layer 23 has a thickness W1 and the molybdenum layer 25 has a thickness W2;
  • the disadvantage of this method is that the substrate needs to be transferred in different reaction chambers due to different reaction conditions of wet etching and dry etching in the etching process, which increases the manufacturing cost and the difficulty of fabrication.
  • the main object of the present invention is to provide a method for fabricating a double-step structure gate electrode and a corresponding thin film field effect transistor by using a semi-transparent lithography lithography to form a gate electrode by two wet etching to solve the prior art.
  • the manufacturing method of the double-step structure gate electrode and the corresponding thin film field effect transistor is high in manufacturing cost and difficult to manufacture.
  • the invention relates to a method for fabricating a double-step structure gate electrode, comprising the steps of: S10, sequentially depositing a first metal layer, a second metal layer and a photoresist layer on a substrate; S20, using a semi-transparent lithography plate The photoresist layer is patterned such that the thickness of both sides of the photoresist layer is thinner than the thickness of the photoresist layer, and the width of the thick portion in the middle of the photoresist layer is the first width, and the photoresist layer is The width is a second width; S30, performing wet etching to form the first metal layer and the second metal layer together to form a single stepped structure; S40, comparing the two sides of the photoresist layer by photoresist ashing a thin portion is removed; S50, performing wet etching to reduce the width of the second metal layer to the first width; S60, performing a stripping treatment on the photoresist layer; and after step S60, the second metal
  • the invention further relates to a method for fabricating a double-step structure gate electrode, comprising the steps of: S10, sequentially depositing a first metal layer, a second metal layer and a photoresist layer on a substrate; S20, using a semi-transparent lithography plate The photoresist layer is patterned such that the thickness of both sides of the photoresist layer is thinner than the thickness of the photoresist layer, and the width of the thick portion in the middle of the photoresist layer is the first width, and the photoresist layer a width of the second width; S30, performing a wet etching to form the first metal layer and the second metal layer together to form a single stepped structure; S40, etching the two sides of the photoresist layer by photoresist ashing The thinner portion is removed; S50, performing wet etching to reduce the width of the second metal layer to a first width; and S60, performing a stripping treatment on the photoresist layer.
  • the width of the second metal layer is a first width
  • the width of the first metal layer is a second width
  • the middle of the semi-transmissive lithography plate is an opaque layer, and the two sides are semi-transmissive layers, and the width of the semi-transparent lithography plate is a second width.
  • the width of the opaque layer is a first width.
  • the component weight ratio of the wet etching etching liquid is: H3PO4 50%-60%; HNO3 10%-20%; CH3COOH 2%-10%; H2O 20%-30%.
  • the photoresist ashing is to cut the chemical bond of the photoresist in the photoresist layer by ultraviolet light, and use an oxygen active group decomposed by ozone and the light.
  • the engraving reacts to remove the ozone photoresist ashing of the photoresist layer.
  • the temperature of the photoresist ashing is from 80 degrees to 120 degrees.
  • the first metal layer is an aluminum metal layer.
  • the second metal layer is a molybdenum metal layer.
  • the invention also relates to a method for fabricating a thin film field effect transistor, comprising the fabrication of a gate electrode having a double step structure, comprising the steps of: S10, sequentially depositing a first metal layer, a second metal layer and a photoresist layer on the substrate; S20, Patterning the photoresist layer using a semi-transparent lithography plate such that the thickness of both sides of the photoresist layer is thinner than the thickness of the photoresist layer, and the width of the thick portion of the photoresist layer is a width, the width of the entire photoresist layer is a second width; S30, performing a wet etching to form the first metal layer and the second metal layer together form a single stepped structure; S40, by photoresist ashing And removing a thin portion on both sides of the photoresist layer; S50, performing wet etching to reduce a width of the second metal layer to a first width; and S60, performing a stripping treatment on the photo
  • the width of the second metal layer is a first width
  • the width of the first metal layer is a second width
  • the middle of the semi-transmissive lithography plate is an opaque layer
  • the two sides are semi-transmissive layers
  • the width of the semi-transparent lithography plate is a second width.
  • the width of the opaque layer is a first width.
  • the component parts by weight of the wet etching etching solution is: H3PO4 50-60 parts; HNO3 10-20 parts; CH3COOH 2-10 parts; H2O 20-30 parts.
  • the photoresist ashing is to cut a chemical bond of a photoresist in the photoresist layer by ultraviolet light, and use an oxygen active group decomposed by ozone and the photolithography
  • the gel reacts to remove ozone photoresist ashing of the photoresist layer; the photoresist ashing temperature is from 80 degrees to 120 degrees.
  • the first metal layer is an aluminum metal layer
  • the second metal layer is a molybdenum metal layer.
  • the manufacturing cost of the double-step structure gate electrode and the corresponding thin film field effect transistor are high.
  • the method uses a semi-transparent lithography lithography to form a gate electrode by two wet etching processes. During the fabrication process, the substrate does not need to be transferred in different reaction chambers, and the manufacturing cost is low and the fabrication difficulty is small.
  • FIG. 1 is a schematic structural view of a gate electrode of a single-step double-layer metal film of the prior art
  • FIG. 2 is a schematic view showing a manufacturing structure of a gate electrode of a double-step double-layer metal film of the prior art
  • FIG. 3 is a second schematic view showing the structure of a gate electrode of a double-step double-layer metal film of the prior art
  • FIG. 4 is a third schematic view showing the structure of a gate electrode of a double-step double-layer metal film of the prior art
  • FIG. 5 is a schematic view showing a manufacturing structure of a preferred embodiment of a method for fabricating a double-step structure gate electrode according to the present invention
  • FIG. 6 is a second schematic diagram of a manufacturing structure of a preferred embodiment of a method for fabricating a double-step structure gate electrode according to the present invention.
  • FIG. 7 is a third schematic diagram of a manufacturing structure of a preferred embodiment of a method for fabricating a double-step structure gate electrode according to the present invention.
  • FIG. 8 is a fourth schematic diagram of a manufacturing structure of a preferred embodiment of a method for fabricating a double-step structure gate electrode according to the present invention.
  • FIG. 9 is a fifth schematic diagram of a manufacturing structure of a preferred embodiment of a method for fabricating a double-step structure gate electrode according to the present invention.
  • FIG. 10 is a schematic diagram of a manufacturing structure of a preferred embodiment of a method for fabricating a double-step structure gate electrode of the present invention.
  • Figure 11 is a flow chart showing the fabrication of a preferred embodiment of the method for fabricating a double step structure gate electrode of the present invention.
  • the method for fabricating the double-step structure gate electrode of the invention utilizes a semi-transparent lithography plate to pattern the corresponding photoresist layer to achieve the fabrication of the double-step structure gate electrode by two wet etching after lithography, so that The substrate does not need to be transferred in different reaction chambers, and the manufacturing cost is low, and the manufacturing difficulty is small.
  • a preferred embodiment of the method for fabricating the double-step structure gate electrode of the present invention will be described with reference to Figs.
  • a first metal layer 120, a second metal layer 130, and a photoresist layer 140 are sequentially deposited on the substrate 110; then the photoresist layer 140 is patterned using a semi-transparent lithography plate 150, which is semi-transparent.
  • the middle of the lithography plate 150 is an opaque layer, the semi-transmissive layer on both sides (light transmittance is about 50%), and the width of the entire semi-transparent lithography plate 150 is the second width H2, wherein the semi-transparent light
  • the width of the opaque layer of the stencil 150 is the first width H1.
  • the shape of the photoresist layer 140 formed by exposing and developing the photoresist layer 140 using the above-described semi-transmissive lithography plate 150 is as shown in FIG. 6.
  • the intermediate portion of the photoresist layer 140 is thick, and both sides of the photoresist layer 140 are thin.
  • the width of the thick portion in the middle of the photoresist layer 140 is the first width H1, and the width of the entire photoresist layer 140 is the second width H2.
  • the structure as described in FIG. 6 is subjected to wet etching, and the components of the etching solution used for the wet etching are: H3PO4 50-60 parts; HNO3 10-20 parts; CH3COOH 2-10 parts; H2O 20-30 parts.
  • the component parts by weight of the etching solution is preferably: H3PO4 55 parts; HNO3 15 parts; 5 parts of CH3COOH; 25 parts of H2O.
  • the first metal layer 120 (for example, an aluminum metal layer) undergoes the following chemical reaction:
  • the second metal layer 130 (for example, a molybdenum metal layer) undergoes the following chemical reaction:
  • the first metal layer 120 and the second metal layer 130 are formed in a single stepped structure, as shown in FIG.
  • the structure shown in FIG. 7 is subjected to photoresist ashing to remove the photoresist layer 140 having a thinner thickness on both sides, and an ozone photoresist ashing method is employed here.
  • the ultraviolet light of the low-pressure mercury lamp can be used to cut the chemical bond of the photoresist in the photoresist layer 140, and at the same time, the ozone is decomposed, so that the oxygen active group generated by the ozonolysis and the photoresist which is cut off by the chemical bond occur.
  • the reaction produces a gaseous product. This removes the corresponding photoresist layer 140 as shown in FIG.
  • the structure shown in FIG. 8 is again subjected to wet etching, and the components of the etching solution used for the wet etching are: 50 parts by weight of H3PO4; 10-20 parts of HNO3; 2-10 parts of CH3COOH ; H2O 20-30 parts.
  • the component parts by weight of the etching liquid is preferably: 55 parts of H3PO4; 15 parts of HNO3; 5 parts of CH3COOH; and 25 parts of H2O.
  • the second metal layer 130 undergoes the following chemical reaction:
  • the second metal layer 130 is attached to the first metal layer 120, the corresponding second metal layer 130 is preferentially etched without substantially reacting with the first metal layer 120. After the wet etching of the structure shown in FIG. 8, the width of the second metal layer 130 is reduced to the first width H1, as shown in FIG.
  • the photoresist layer 140 is subjected to a lift-off process.
  • the processed structure is as shown in FIG. 10, wherein the width of the first metal layer 120 is the second width H2, and the width of the second metal layer 130 is the first width H1.
  • the double step structure of the gate electrode shown in FIG. 10 is substantially the same as the double step structure of the gate electrode shown in FIG.
  • the method of fabricating the double-step structure gate electrode begins in step 1100, and then executes:
  • Step 1101 sequentially depositing a first metal layer, a second metal layer, and a photoresist layer on the substrate;
  • Step 1102 then patterning the photoresist layer using a semi-transparent lithography plate such that the thickness of both sides of the photoresist layer is thinner than the thickness of the photoresist layer, and the thick portion of the photoresist layer is thicker
  • the width is a first width, and the width of the photoresist layer is a second width;
  • Step 1103 performing a wet etching to form the first metal layer and the second metal layer together to form a single stepped structure
  • Step 1104 removing thinner portions of the photoresist layer by photoresist ashing
  • Step 1105 performing a wet etching to reduce the width of the second metal layer to a first width
  • Step 1106 performing a stripping process on the photoresist layer
  • the manufacturing process of the double-step structure gate electrode of the present invention can be seen from the preferred embodiment shown in FIG. 5 to FIG. 10 and the fabrication process of the double-step structure gate electrode shown in FIG.
  • One wet etching plus one dry etching becomes two wet etchings, so that it is not necessary to transfer in different etching reaction chambers for etching different metal layers of the gate electrode.
  • the manufacturing method of the double-step structure gate electrode of the invention can reduce the manufacturing difficulty and save the manufacturing cost.
  • the invention also relates to a method for fabricating a thin film field effect transistor, comprising the fabrication of a gate electrode having a double step structure, comprising the steps of: S10, sequentially depositing a first metal layer, a second metal layer and a photoresist layer on the substrate; S20, Patterning the photoresist layer using a semi-transparent lithography plate such that the thickness of both sides of the photoresist layer is thinner than the thickness of the intermediate portion of the photoresist layer, and the width of the thick portion of the photoresist layer is a first width, the width of the photoresist layer is a second width; S30, performing a wet etching to form the first metal layer and the second metal layer together to form a single stepped structure; S40, passing the photoresist And removing a thin portion on both sides of the photoresist layer; S50, performing wet etching to reduce a width of the second metal layer to a first width; and S60, performing a stripping treatment
  • the width of the second metal layer is a first width
  • the width of the first metal layer is a second width
  • the middle of the semi-transparent lithography plate is an opaque layer
  • the sides are semi-transparent.
  • the layer, the width of the semi-transparent lithography plate is a second width
  • the width of the opaque layer is a first width.
  • the specific implementation manner and beneficial effects of the method for fabricating the thin film field effect transistor of the present invention are the same as or similar to the specific implementation manner and the beneficial effects of the method for fabricating the double-step structure gate electrode.

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Abstract

提供一种薄膜场效应晶体管的双台阶结构闸电极的制作方法，在基板（110）上依次沉积第一金属层（120）、第二金属层（130）以及光阻层（140）；半透性掩模板（150）的中间为不透光层，两侧为半透光层，使用该半透性掩模板（150）对光阻层（140）进行图形化；进行曝光显影后形成的光阻层（140）两侧较薄的部分和具有第一宽度H1的中间较厚部分，整个光阻层（140）的宽度为第二宽度H2；进行第一湿法刻蚀使所述第一金属层（120）和所述第二金属层（130）一起形成单台阶状结构；通过光阻灰化将所述光阻层（140）两侧较薄的部分去除；进行第二湿法刻蚀使所述第二金属层（130）的宽度减少到所述第一宽度H1；剥离光阻层（140）。

Description

双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法 技术领域
本发明涉及半导体制作领域，特别是一种采用半透性光刻板光刻后通过两次湿法刻蚀制作双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法。
 背景技术
TFT（Thin Film Transistor：薄膜场效应晶体管）的闸电极通常由两层金属膜构成(如铝金属膜和钼金属膜)。但双层金属膜较厚, 如果在基板上如图1所示形成单台阶的双层金属膜, 对后续各层膜的沉积效果不利。目前解决此问题的主要方法是在刻蚀时将铝层25刻蚀得比钼层23窄, 形成如图2所示的双台阶的结构, 使闸电极在厚度方向由单台阶结构变成双台阶结构。
现有技术给出了一种形成双台阶结构的方法：
在刻蚀闸电极层时用一次湿法刻蚀加一次干法刻蚀。具体如下：
1、如图3所示，在基板21上沉积铝层23和钼层25，并涂覆光阻层27，经第一次光刻形成宽厚为W1的光阻层图形；
2、湿法刻蚀形成如图4所示的图形；
3、干法刻蚀后将光阻层剥离，形成如图2所示的图形，得到双台阶结构的闸电极层29，其中铝层23厚度为W1，钼层25厚度为W2；
此方法的缺点在于刻蚀过程中由于湿法刻蚀和干法刻蚀的反应条件不同使得基板需要在不同反应室中转移，增加了制作成本以及制作的难度。
故，有必要提供一种双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法，以解决现有技术所存在的问题。
 技术问题
本发明的主要目的在于提供一种采用半透性光刻板光刻后通过两次湿法刻蚀制作闸电极的双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法，以解决现有技术的双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法的制作成本高以及制作难度大的技术问题。
 技术解决方案
本发明涉及一种双台阶结构闸电极的制作方法，其中包括步骤：S10、在基板上依次沉积第一金属层、第二金属层以及光阻层；S20、使用半透性光刻板对所述光阻层进行图形化使得所述光阻层两侧的厚度比所述光阻层中间的厚度薄，所述光阻层的中间较厚部分的宽度为第一宽度，所述光阻层的宽度为第二宽度；S30、进行湿法刻蚀使所述第一金属层和所述第二金属层一齐形成单台阶状结构；S40、通过光阻灰化将所述光阻层两侧较薄的部分去除；S50、进行湿法刻蚀使所述第二金属层的宽度减少到所述第一宽度；S60、对所述光阻层进行剥离处理；步骤S60后，所述第二金属层的宽度为所述第一宽度，所述第一金属层的宽度为所述第二宽度；所述半透性光刻板的中间为不透光层，两侧为半透光层，所述半透性光刻板的宽度为所述第二宽度，所述不透光层的宽度为所述第一宽度；所述湿法刻蚀的刻蚀液的组分重量份数为：H3PO4 50-60份；HNO3 10-20份；CH3COOH 2-10份；H2O 20-30份；所述光阻灰化为利用紫外光切断所述光阻层中光刻胶的化学键，并使用通过臭氧分解的氧活性基与所述光刻胶发生反应以去除所述光阻层的臭氧光阻灰化；所述光阻灰化的温度为80度至120度；所述第一金属层为铝金属层；所述第二金属层为钼金属层。
本发明还涉及一种双台阶结构闸电极的制作方法，其中包括步骤：S10、在基板上依次沉积第一金属层、第二金属层以及光阻层；S20、使用半透性光刻板对所述光阻层进行图形化使得所述光阻层两侧的厚度比所述光阻层中间的厚度薄，所述光阻层的中间较厚部分的宽度为第一宽度，所述光阻层的宽度为第二宽度；S30、进行湿法刻蚀使所述第一金属层和所述第二金属层一齐形成单台阶状结构；S40、通过光阻灰化将所述光阻层两侧较薄的部分去除；S50、进行湿法刻蚀使所述第二金属层的宽度减少到第一宽度；S60、对所述光阻层进行剥离处理。
在本发明的双台阶结构闸电极的制作方法中，步骤S60后，所述第二金属层的宽度为第一宽度，所述第一金属层的宽度为第二宽度。
在本发明的双台阶结构闸电极的制作方法中，所述半透性光刻板的中间为不透光层，两侧为半透光层，所述半透性光刻板的宽度为第二宽度，所述不透光层的宽度为第一宽度。
在本发明的双台阶结构闸电极的制作方法中，所述湿法刻蚀的刻蚀液的组分重量比为：H3PO4 50%-60%；HNO3 10%-20%；CH3COOH 2%-10%；H2O 20%-30%。
在本发明的双台阶结构闸电极的制作方法中，所述光阻灰化为利用紫外光切断所述光阻层中光刻胶的化学键，并使用通过臭氧分解的氧活性基与所述光刻胶发生反应以去除所述光阻层的臭氧光阻灰化。
在本发明的双台阶结构闸电极的制作方法中，所述光阻灰化的温度为80度至120度。
在本发明的双台阶结构闸电极的制作方法中，所述第一金属层为铝金属层。
在本发明的双台阶结构闸电极的制作方法中，所述第二金属层为钼金属层。
本发明还涉及一种薄膜场效应晶体管的制作方法，其中包括双台阶结构闸电极的制作，包括步骤：S10、在基板上依次沉积第一金属层、第二金属层以及光阻层；S20、使用半透性光刻板对所述光阻层进行图形化使得所述光阻层两侧的厚度比所述光阻层中间的厚度薄，所述光阻层的中间较厚部分的宽度为第一宽度，整个光阻层的宽度为第二宽度；S30、进行湿法刻蚀使所述第一金属层和所述第二金属层一齐形成单台阶状结构；S40、通过光阻灰化将所述光阻层两侧较薄的部分去除；S50、进行湿法刻蚀使所述第二金属层的宽度减少到第一宽度；S60、对所述光阻层进行剥离处理。
在本发明的薄膜场效应晶体管的制作方法中，步骤S60后，所述第二金属层的宽度为第一宽度，所述第一金属层的宽度为第二宽度。
在本发明的薄膜场效应晶体管的制作方法中，所述半透性光刻板的中间为不透光层，两侧为半透光层，所述半透性光刻板的宽度为第二宽度，所述不透光层的宽度为第一宽度。
在本发明的薄膜场效应晶体管的制作方法中，所述湿法刻蚀的刻蚀液的组分重量份数为：H3PO4 50-60份；HNO3 10-20份；CH3COOH 2-10份；H2O 20-30份。
在本发明的薄膜场效应晶体管的制作方法中，所述光阻灰化为利用紫外光切断所述光阻层中光刻胶的化学键，并使用通过臭氧分解的氧活性基与所述光刻胶发生反应以去除所述光阻层的臭氧光阻灰化；所述光阻灰化的温度为80度至120度。
在本发明的薄膜场效应晶体管的制作方法中，所述第一金属层为铝金属层，所述第二金属层为钼金属层。
 有益效果
相较于现有的双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法的制作成本高以及制作难度大的技术问题，本发明的双台阶结构闸电极及相应的薄膜场效应晶体管的制作方法采用半透性光刻板光刻后通过两次湿法刻蚀制作闸电极，制作过程中基板不需要在不同反应室中转移，制作成本低，制作难度小。
 附图说明
图1为现有技术的单台阶双层金属膜的闸电极的结构示意图；
图2为现有技术的双台阶双层金属膜的闸电极的制作结构示意图之一；
图3为现有技术的双台阶双层金属膜的闸电极的制作结构示意图之二；
图4为现有技术的双台阶双层金属膜的闸电极的制作结构示意图之三；
图5为本发明的双台阶结构闸电极的制作方法的优选实施例的制作结构示意图之一；
图6为本发明的双台阶结构闸电极的制作方法的优选实施例的制作结构示意图之二；
图7为本发明的双台阶结构闸电极的制作方法的优选实施例的制作结构示意图之三；
图8为本发明的双台阶结构闸电极的制作方法的优选实施例的制作结构示意图之四；
图9为本发明的双台阶结构闸电极的制作方法的优选实施例的制作结构示意图之五；
图10为本发明的双台阶结构闸电极的制作方法的优选实施例的制作结构示意图之六
图11为本发明的双台阶结构闸电极的制作方法的优选实施例的制作流程图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
在图中，结构相似的单元是以相同标号表示。
本发明的双台阶结构闸电极的制作方法利用半透性光刻板图形化相应的光阻层以达到光刻后只需要通过两次湿法刻蚀即可实现双台阶结构闸电极的制作，使得基板不需要在不同的反应室中转移，制作成本低，制作难度小。本发明的双台阶结构闸电极的制作方法的优选实施例通过图5至图10进行说明。
如图5所示，首先在基板110上依次沉积第一金属层120、第二金属层130以及光阻层140；然后使用半透性光刻板150对光阻层140进行图形化，该半透性光刻板150的中间为不透光层，两侧为半透光层（光透过率约为50%），整个半透性光刻板150的宽度为第二宽度H2，其中半透性光刻板150的不透光层的宽度为第一宽度H1。在使用上述的半透性光刻板150对光阻层140进行曝光显影后形成的光阻层140的形状如图6所示，光阻层140的中间厚，光阻层140的两侧薄，其中光阻层140的中间较厚部分的宽度为第一宽度H1，整个光阻层140的宽度为第二宽度H2。
随后对如图6所述的结构进行湿法刻蚀，湿法刻蚀采用的刻蚀液的组分重量份数为：H3PO4 50-60份；HNO3 10-20份；CH3COOH 2-10份；H2O 20-30份。在本实施例中，刻蚀液的组分重量份数优选为：H3PO4 55份；HNO3 15份；CH3COOH 5份；H2O 25份。刻蚀过程中，第一金属层120（例如为铝金属层）发生如下的化学反应：
Figure PCTCN2011080515-appb-C000001
第二金属层130（例如为钼金属层）发生如下的化学反应：
Figure PCTCN2011080515-appb-C000002
对图6所示的结构进行湿法刻蚀后，使得第一金属层120和第二金属层130一齐形成单台阶状结构，具体如图7所示。
随后对如图7所示的结构进行光阻灰化将两侧厚度较薄的光阻层140去除，这里采用臭氧光阻灰化法。在80-120度的温度下，可利用低压水银灯的紫外光切断光阻层140中光刻胶的化学键，同时使臭氧分解，使得臭氧分解产生的氧活性基和被切断化学键的光刻胶发生反应，生产气态产物。这样将相应的光阻层140去除，如图8所示。
随后对如图8所示的结构再次进行湿法刻蚀，湿法刻蚀采用的刻蚀液的组分重量份数为：H3PO4 50-60份；HNO3 10-20份；CH3COOH 2-10份；H2O 20-30份。在本实施例中，刻蚀液的组分重量份数优选为：H3PO4 55份；HNO3 15份；CH3COOH 5份；H2O 25份。刻蚀过程中，第二金属层130（例如为钼金属层）发生如下的化学反应：
Figure PCTCN2011080515-appb-C000003
由于第二金属层130附着于第一金属层120之上，因此优先将相应的第二金属层130进行了刻蚀，而基本没有与第一金属层120发生反应。对图8所示的结构进行湿法刻蚀后，使得第二金属层130的宽度减少到第一宽度H1，具体如图9所示。
最后对光阻层140进行剥离处理，处理后的结构如图10所示，其中第一金属层120的宽度为第二宽度H2，第二金属层130的宽度为第一宽度H1。从图中可看出，图10所示的闸电极的双台阶结构与图4所示的闸电极的双台阶结构基本相同。
在图11所示的本发明的双台阶结构闸电极的制作方法的优选实施例的制作流程图中，所述双台阶结构闸电极的制作方法开始于步骤1100，随后执行：
步骤1101，在基板上依次沉积第一金属层、第二金属层以及光阻层；
步骤1102，然后使用半透性光刻板对所述光阻层进行图形化使得所述光阻层两侧的厚度比所述光阻层中间的厚度薄，所述光阻层的中间较厚部分的宽度为第一宽度，所述光阻层的宽度为第二宽度；
步骤1103，进行湿法刻蚀使所述第一金属层和所述第二金属层一齐形成单台阶状结构；
步骤1104，通过光阻灰化将所述光阻层两侧较薄的部分去除；
步骤1105，进行湿法刻蚀使所述第二金属层的宽度减少到第一宽度；
步骤1106，对所述光阻层进行剥离处理；
最后该双台阶结构闸电极的制作方法结束于步骤1107。
从图5至图10所示的优选实施例以及图11所示的双台阶结构闸电极的制作流程可以看出本发明的双台阶结构闸电极的制作方法将现有双台阶结构闸电极制作中的一次湿法刻蚀加一次干法刻蚀变为两次湿法刻蚀，使得不需要为了刻蚀闸电极的不同金属层在不同的刻蚀反应室中进行转移。同时，由于干法刻蚀的成本较高，本发明的双台阶结构闸电极的制作方法在降低制作难度的同时还可节省制作成本。
本发明还涉及一种薄膜场效应晶体管的制作方法，其中包括双台阶结构闸电极的制作，包括步骤：S10、在基板上依次沉积第一金属层、第二金属层以及光阻层；S20、使用半透性光刻板对所述光阻层进行图形化使得所述光阻层两侧的厚度比所述光阻层的中间的厚度薄，所述光阻层的中间较厚部分的宽度为第一宽度，所述光阻层的宽度为第二宽度；S30、进行湿法刻蚀使所述第一金属层和所述第二金属层一齐形成单台阶状结构；S40、通过光阻灰化将所述光阻层两侧较薄的部分去除；S50、进行湿法刻蚀使所述第二金属层的宽度减少到第一宽度；S60、对所述光阻层进行剥离处理。
其中步骤S60后，所述第二金属层的宽度为第一宽度，所述第一金属层的宽度为第二宽度；半透性光刻板的中间为不透光层，两侧为半透光层，半透性光刻板的宽度为第二宽度，不透光层的宽度为第一宽度。
本发明的薄膜场效应晶体管的制作方法的具体实施方式和有益效果与上述的双台阶结构闸电极的制作方法的具体实施方式和有益效果相同或相似，具体请参见双台阶结构闸电极的制作方法的具体实施例。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。
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Claims (15)

  1. 一种双台阶结构闸电极的制作方法，其特征在于，包括步骤：
    S10、在基板上依次沉积第一金属层、第二金属层以及光阻层；
    S20、使用半透性光刻板对所述光阻层进行图形化使得所述光阻层两侧的厚度比所述光阻层中间的厚度薄，所述光阻层的中间较厚部分的宽度为第一宽度，所述光阻层的宽度为第二宽度；
    S30、进行湿法刻蚀使所述第一金属层和所述第二金属层一齐形成单台阶状结构；
    S40、通过光阻灰化将所述光阻层两侧较薄的部分去除；
    S50、进行湿法刻蚀使所述第二金属层的宽度减少到所述第一宽度；
    S60、对所述光阻层进行剥离处理；
    步骤S60后，所述第二金属层的宽度为所述第一宽度，所述第一金属层的宽度为所述第二宽度；
    所述半透性光刻板的中间为不透光层，两侧为半透光层，所述半透性光刻板的宽度为所述第二宽度，所述不透光层的宽度为所述第一宽度；
    所述湿法刻蚀的刻蚀液的组分重量份数为：H3PO4 50-60份；HNO3 10-20份；CH3COOH 2-10份；H2O 20-30份；
    所述光阻灰化为利用紫外光切断所述光阻层中光刻胶的化学键，并使用通过臭氧分解的氧活性基与所述光刻胶发生反应以去除所述光阻层的臭氧光阻灰化；
    所述光阻灰化的温度为80度至120度；
    所述第一金属层为铝金属层；
    所述第二金属层为钼金属层。
  2. 一种双台阶结构闸电极的制作方法，其特征在于，包括步骤：
    S10、在基板上依次沉积第一金属层、第二金属层以及光阻层；
    S20、使用半透性光刻板对所述光阻层进行图形化使得所述光阻层两侧的厚度比所述光阻层中间的厚度薄，所述光阻层的中间较厚部分的宽度为第一宽度，所述光阻层的宽度为第二宽度；
    S30、进行湿法刻蚀使所述第一金属层和所述第二金属层一齐形成单台阶状结构；
    S40、通过光阻灰化将所述光阻层两侧较薄的部分去除；
    S50、进行湿法刻蚀使所述第二金属层的宽度减少到所述第一宽度；
    S60、对所述光阻层进行剥离处理。
  3. 根据权利要求2所述的双台阶结构闸电极的制作方法，其特征在于，步骤S60后，所述第二金属层的宽度为所述第一宽度，所述第一金属层的宽度为所述第二宽度。
  4. 根据权利要求2所述的双台阶结构闸电极的制作方法，其特征在于，所述半透性光刻板的中间为不透光层，两侧为半透光层，所述半透性光刻板的宽度为所述第二宽度，所述不透光层的宽度为所述第一宽度。
  5. 根据权利要求2所述的双台阶结构闸电极的制作方法，其特征在于，所述湿法刻蚀的刻蚀液的组分重量份数为：H3PO4 50-60份；HNO3 10-20份；CH3COOH 2-10份；H2O 20-30份。
  6. 根据权利要求2所述的双台阶结构闸电极的制作方法，其特征在于，所述光阻灰化为利用紫外光切断所述光阻层中光刻胶的化学键，并使用通过臭氧分解的氧活性基与所述光刻胶发生反应以去除所述光阻层的臭氧光阻灰化。
  7. 根据权利要求6所述的双台阶结构闸电极的制作方法，其特征在于，所述光阻灰化的温度为80度至120度。
  8. 根据权利要求2所述的双台阶结构闸电极的制作方法，其特征在于，所述第一金属层为铝金属层。
  9. 根据权利要求2所述的双台阶结构闸电极的制作方法，其特征在于，所述第二金属层为钼金属层。
  10. 一种薄膜场效应晶体管的制作方法，其特征在于，包括双台阶结构闸电极的制作，包括步骤：
    S10、在基板上依次沉积第一金属层、第二金属层以及光阻层；
    S20、使用半透性光刻板对所述光阻层进行图形化使得所述光阻层两侧的厚度比所述光阻层中间的厚度薄，所述光阻层的中间较厚部分的宽度为第一宽度，整个光阻层的宽度为第二宽度；
    S30、进行湿法刻蚀使所述第一金属层和所述第二金属层一齐形成单台阶状结构；
    S40、通过光阻灰化将两侧厚度较薄的光阻层去除；
    S50、进行湿法刻蚀使所述第二金属层的宽度减少到所述第一宽度；
    S60、对所述光阻层进行剥离处理。
  11. 根据权利要求10所述的薄膜场效应晶体管的制作方法，其特征在于，
    步骤S60后，所述第二金属层的宽度为所述第一宽度，所述第一金属层的宽度为所述第二宽度。
  12. 根据权利要求10所述的薄膜场效应晶体管的制作方法，其特征在于，所述半透性光刻板的中间为不透光层，两侧为半透光层，所述半透性光刻板的宽度为所述第二宽度，所述不透光层的宽度为所述第一宽度。
  13. 根据权利要求10所述的薄膜场效应晶体管的制作方法，其特征在于，所述湿法刻蚀的刻蚀液的组分重量份数为：H3PO4 50-60份；HNO3 10-20份；CH3COOH 2-10份；H2O 20-30份。
  14. 根据权利要求10所述的薄膜场效应晶体管的制作方法，其特征在于，所述光阻灰化为利用紫外光切断所述光阻层中光刻胶的化学键，并使用通过臭氧分解的氧活性基与所述光刻胶发生反应以去除所述光阻层的臭氧光阻灰化；所述光阻灰化的温度为80度至120度。
  15. 根据权利要求10所述的薄膜场效应晶体管的制作方法，其特征在于，所述第一金属层为铝金属层，所述第二金属层为钼金属层。
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