WO2013021786A1 - Procédé de fabrication de dispositif semi-conducteur - Google Patents

Procédé de fabrication de dispositif semi-conducteur Download PDF

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Publication number
WO2013021786A1
WO2013021786A1 PCT/JP2012/068059 JP2012068059W WO2013021786A1 WO 2013021786 A1 WO2013021786 A1 WO 2013021786A1 JP 2012068059 W JP2012068059 W JP 2012068059W WO 2013021786 A1 WO2013021786 A1 WO 2013021786A1
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thin film
sic substrate
semiconductor device
thickness
nanoparticle
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PCT/JP2012/068059
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English (en)
Japanese (ja)
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博明 岡部
洋介 中西
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三菱電機株式会社
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Priority to JP2013527943A priority Critical patent/JP5734435B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/0485—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608—Silicon carbide

Definitions

  • the present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using a silicon carbide (SiC) semiconductor.
  • SiC silicon carbide
  • SiC silicon carbide
  • the on-resistance of the semiconductor device is determined by the sum of resistance values of paths through which current flows.
  • the on-resistance of the semiconductor device includes a resistance generated by an ohmic electrode that plays a role of connecting the semiconductor and various wirings. Therefore, it is required to form an ohmic electrode having a sufficiently low resistance compared to the resistance of the silicon carbide substrate and the drift layer.
  • an ohmic electrode on SiC there is a method of depositing a metal thin film to be an ohmic electrode on a SiC substrate and irradiating the deposited metal thin film with laser light (see, for example, Patent Documents 1 to 3).
  • a metal thin film is deposited on a SiC substrate and the deposited metal thin film is irradiated with laser light, the metal thin film absorbs the energy of the laser light, and the absorbed energy is changed to heat. With this heat, the metal thin film and SiC are alloyed. Thereby, since the contact between the metal thin film and SiC becomes an ohmic contact, a low-resistance ohmic electrode can be obtained.
  • a second conductivity type impurity doped layer is formed on a first conductivity type silicon carbide substrate, a metal thin film is provided on the formed impurity doped layer, and a metal An ohmic electrode is formed by irradiating laser light from the upper surface of the thin film.
  • a back surface of a semiconductor substrate made of single crystal silicon carbide is polished to form irregularities on the back surface, and then a metal thin film is formed on the back surface of the semiconductor substrate.
  • the ohmic electrode is formed by irradiating the metal thin film with laser light.
  • an ohmic electrode is formed by irradiating a metal thin film with laser light as disclosed in Patent Documents 1 to 3
  • the laser light having an energy density necessary for obtaining a low resistance ohmic electrode is applied on the metal thin film. It is necessary to scan with. Accordingly, the process of irradiating the metal thin film with the laser beam to form the ohmic electrode is performed by a single wafer process in which the substrates are processed one by one. As the substrate becomes larger and the area to be irradiated with laser light becomes larger, the problem of processing time becomes more prominent.
  • the energy density of the laser beam necessary for obtaining a low-resistance ohmic electrode it is conceivable to reduce the energy density of the laser beam necessary for obtaining a low-resistance ohmic electrode. If the energy density of the laser beam necessary for obtaining a low-resistance ohmic electrode can be reduced, the beam diameter of the laser beam can be increased accordingly, so that the processing time by the laser beam irradiation apparatus can be shortened. Can do.
  • Laser light that contributes to the formation of the ohmic electrode is a component of the irradiated laser light that penetrates into the metal thin film and is absorbed and converted into thermal energy.
  • the component of the laser beam reflected on the surface of the metal surface does not contribute to the formation of the ohmic electrode, and is wasted energy.
  • the extent to which the laser beam is reflected on the surface of the metal thin film depends on the reflectance of the metal thin film with respect to the laser beam.
  • the reflectance of the metal thin film with respect to the laser beam is relatively large, and the energy of the reflected laser beam is relatively large among the energy of the irradiated laser beam.
  • an ohmic electrode having a low resistance can be efficiently formed by irradiation with laser light having a relatively low energy density.
  • the energy density of the laser light necessary for forming the low-resistance ohmic electrode can be reduced, so that the laser light beam diameter is increased and the processing time by the laser light irradiation apparatus is shortened accordingly. Can do.
  • the reflectance of the laser beam varies depending on the shape of the surface of the metal thin film. If the surface of the metal thin film has irregularities, the reflectance of the laser beam decreases. For example, as in the technique disclosed in Patent Document 2 described above, when irregularities are formed on the back surface of the semiconductor substrate, irregularities are formed on the surface of the metal thin film, so that it is possible to reduce the reflectance of the laser beam. is there.
  • a strained layer (hereinafter sometimes referred to as “worked strained layer”) is formed on the silicon carbide substrate.
  • the substrate is warped.
  • a grindstone with coarse abrasive grains must be used.
  • the coarser the abrasive grains the deeper the processing strain layer is formed on the silicon carbide substrate, and the greater the warpage of the substrate.
  • the warpage generated in the substrate causes an error in chucking the substrate and cracking the substrate in the subsequent process, hindering smooth substrate conveyance and hindering automation of the semiconductor manufacturing system.
  • the processed strain layer may adversely affect the reliability of the device.
  • the surface of the silicon carbide substrate is processed with ion plasma or the like so that (100% ⁇ reflectance ⁇ transmittance) is 80% or more at the wavelength of the laser beam.
  • a metal thin film is deposited and irradiated with laser light.
  • the laser beam is absorbed only by the metal thin film. Therefore, in the technique disclosed in Patent Document 3, the laser beam necessary for forming a low-resistance ohmic electrode is used. The effect of reducing the energy density cannot be obtained.
  • the metal thin film is nickel, the penetration depth of light having a wavelength of 100 nm to 1500 nm is about 10 nm to 20 nm.
  • An object of the present invention is to provide a semiconductor device manufacturing method capable of forming a low-resistance ohmic electrode by irradiating laser light with as low energy density as possible without impairing reliability.
  • the method for manufacturing a semiconductor device of the present invention includes a nano thin film forming step of forming a nano particle thin film, which is a metal thin film, with metal nanoparticles on one surface in the thickness direction of a silicon carbide substrate, and the nano thin film forming step. And an electrode forming step of forming an ohmic electrode by irradiating the nanoparticle thin film with a laser beam.
  • a nano particle thin film that is a metal thin film is formed on one surface in the thickness direction of the silicon carbide substrate by the metal nanoparticles.
  • An ohmic electrode is formed by irradiating the nanoparticle thin film formed in the nano thin film forming process with laser light in the electrode forming process.
  • the energy density of the laser light necessary to form a low-resistance ohmic electrode Can be reduced. Further, since the silicon carbide substrate is not polished, it is possible to prevent the generation of a processing strain layer, to prevent the silicon carbide substrate from being warped, and to prevent the reliability of the semiconductor device from being impaired. Therefore, a low resistance ohmic electrode can be formed by irradiating laser light with as low energy density as possible without impairing the reliability of the semiconductor device.
  • FIG. 5 is a cross-sectional view showing a state at a stage where formation of a silicide layer 17 is completed. It is a flowchart which shows the procedure of the back surface process in the manufacturing method of the semiconductor device of the 2nd Embodiment of this invention.
  • FIG. 1 is a cross-sectional view showing a configuration of a semiconductor device 100 according to the first embodiment of the present invention.
  • the semiconductor device 100 is manufactured by the method for manufacturing a semiconductor device according to the first embodiment of the present invention.
  • Semiconductor device 100 includes a silicon carbide semiconductor element (hereinafter sometimes simply referred to as “semiconductor element”) 1.
  • the semiconductor element 1 is a Schottky Barrier Diode (abbreviation: SBD) using silicon carbide (SiC).
  • SBD Schottky Barrier Diode
  • SiC silicon carbide
  • the semiconductor element 1 includes a silicon carbide (SiC) substrate 11, a silicon carbide (SiC) epitaxial layer 12, an ion implantation region 13, a junction termination extension (JTE) region 14, a Schottky electrode 15, a wiring electrode 16, and A silicide layer 17 is provided. Ion implantation region 13 is formed in SiC epitaxial layer 12.
  • the SiC substrate 11 has n-type conductivity.
  • SiC substrate 11 has a 4H type polytype in which the surface orientation on one side in the thickness direction is off by 4 ° or 8 ° from the ⁇ 0001> silicon surface, that is, inclined by 4 ° or 8 °. It is an n-type low resistance substrate.
  • the SiC epitaxial layer 12 which is a drift layer is provided on the surface of one side in the thickness direction of the SiC substrate 11.
  • the surface on one side in the thickness direction of the SiC substrate may be simply referred to as “the surface of the SiC substrate”.
  • SiC epitaxial layer 12 contains n-type impurities and has n-type conductivity.
  • the n-type impurity concentration in SiC epitaxial layer 12 varies depending on the assumed breakdown voltage, but is, for example, 5 ⁇ 10 15 cm ⁇ 3 to 5 ⁇ 10 16 cm ⁇ 3 .
  • the thickness of SiC epitaxial layer 12 (hereinafter sometimes referred to as “film thickness”) varies depending on the assumed breakdown voltage, but is, for example, 5 ⁇ m to 15 ⁇ m.
  • the SiC substrate 11 and the SiC epitaxial layer 12 may be collectively referred to as “SiC substrate 10”.
  • the ion implantation region 13 is formed in the vicinity of the surface on one side in the thickness direction of the SiC epitaxial layer 12.
  • the “surface vicinity portion” includes the surface and a portion in the vicinity thereof.
  • the ion implantation region 13 is formed in an annular shape, more specifically in a substantially rectangular shape, as viewed from one side in the thickness direction.
  • the ion implantation region 13 is a p-type activation region and contains a p-type impurity.
  • Ion implantation region 13 contains, for example, aluminum (Al) as a p-type impurity.
  • the ion implantation region 13 is formed by ion implantation of p-type impurity ions such as Al ions.
  • the implantation amount of p-type impurity ions such as Al ions in the ion implantation region 13 is, for example, 1 ⁇ 10 17 cm ⁇ 3 to 1 ⁇ 10 18 cm ⁇ 3 .
  • the JTE region 14 is formed in the vicinity of the surface on one side in the thickness direction of the SiC epitaxial layer 12.
  • the JTE region 14 is formed adjacent to the ion implantation region 13 when viewed from one side in the thickness direction.
  • the JTE region 14 is formed in an annular shape, more specifically in a substantially rectangular shape, when viewed from one side in the thickness direction. More specifically, the JTE region 14 is formed so as to surround the ion implantation region 13 when viewed from one side in the thickness direction.
  • the JTE region 14 is provided to increase the breakdown voltage. By providing the JTE region 14 at a portion outside the ion implantation region 13 that is the peripheral portion of the semiconductor element 1, the electric field strength on the surface on one side in the thickness direction of the SiC epitaxial layer 12 can be reduced.
  • the ion implantation region 13 and the JTE region 14 constitute a p-type termination structure.
  • a region surrounded by the ion implantation region 13 in the vicinity of the surface on one side in the thickness direction of the SiC epitaxial layer 12 is referred to as a Schottky region 18.
  • the Schottky electrode 15 is provided on the surface on one side in the thickness direction of the SiC epitaxial layer 12, more specifically, on the surface of the Schottky region 18 and on a part of the surface of the ion implantation region 13.
  • Examples of the material of the Schottky electrode 15 include titanium (Ti), tungsten (W), molybdenum (Mo), and chromium (Cr).
  • the Schottky electrode 15 is formed of one or more selected from these materials.
  • the wiring electrode 16 is provided on the surface of one side in the thickness direction of the Schottky electrode 15. Examples of the material of the wiring electrode 16 include Al.
  • the silicide layer 17 is provided on the surface opposite to the surface on one side in the thickness direction of the SiC substrate 11, that is, on the surface on the other side in the thickness direction of the SiC substrate 11.
  • the surface on the other side in the thickness direction of SiC substrate 11 corresponds to one surface in the thickness direction of the SiC substrate on which the metal thin film is formed.
  • the surface on the other side in the thickness direction of the SiC substrate may be referred to as “the back surface of the SiC substrate”.
  • the silicide layer 17 is a reaction between the contact electrode film and SiC, and is in ohmic contact with the SiC substrate 11.
  • Examples of the material for the contact electrode film include nickel (Ni), titanium (Ti), cobalt (Co), molybdenum (Mo), and tungsten (W).
  • a contact electrode film is formed of one or more selected from these materials.
  • an ohmic electrode formed on the surface of the other side in the thickness direction of the SiC substrate 11 in the semiconductor element 1 which is an SBD will be described as an example.
  • the SBD has been described as an example of the semiconductor element 1.
  • the semiconductor element 1 is not limited thereto, and the semiconductor element 1 is a metal-oxide-semiconductor field-effect transistor (Metal Oxide Semiconductor Field Effect Transistor; abbreviation: MOSFET). It may be.
  • the method for manufacturing a semiconductor device 100 including the SiC Schottky barrier diode that is the semiconductor element 1 shown in FIG. 1 includes a preparation process, a front surface processing process, and a back surface processing process.
  • materials and devices necessary for manufacturing the semiconductor device 100 such as the SiC substrate 11 are prepared.
  • SiC substrate 11 SiC substrate 11 having n-type conductivity, specifically, the surface orientation of the surface on one side in the thickness direction is off by 4 ° or 8 ° from the ⁇ 0001> silicon surface.
  • a 4H type polytype n-type low resistance SiC substrate 11 is prepared.
  • the SiC epitaxial layer 12 is grown on the surface of one side in the thickness direction of the SiC substrate 11. Thereby, the SiC substrate 10 is obtained.
  • the SiC epitaxial layer 12 is formed so that the doping concentration of the n-type impurity is 5 ⁇ 10 15 cm ⁇ 3 to 5 ⁇ 10 16 cm ⁇ 3 .
  • the SiC epitaxial layer 12 is formed so as to have a film thickness of 5 ⁇ m to 15 ⁇ m.
  • an oxide film is formed on the surface on one side in the thickness direction of the SiC epitaxial layer 12 by sacrificial oxidation.
  • a process for forming a p-type termination structure is performed. Specifically, first, a mask for ion implantation (hereinafter referred to as “ion implantation mask”) is formed on the oxide film formed on the surface of one side in the thickness direction of SiC epitaxial layer 12. A p-type impurity, for example, aluminum is ion-implanted from one side in the thickness direction of the ion implantation mask to selectively ion-implant the p-type impurity into a predetermined region of the SiC epitaxial layer 12 to form an ion implantation region 13. To do.
  • ion implantation mask a mask for ion implantation
  • the ion implantation region 13 has, for example, an implantation amount of 1 ⁇ 10 17 cm ⁇ 3 to 1 ⁇ 10 18 cm ⁇ 3 and an implantation depth of 0.5 ⁇ m to 1.0 ⁇ m at room temperature, for example, 25 ° C. It is formed by implanting p-type impurity ions such as aluminum ions at an energy of 40 keV to 700 keV with an implantation angle of 0 °.
  • a JTE mask for forming the JTE region 14 is formed on the oxide film.
  • a p-type impurity, for example, aluminum is ion-implanted from one side in the thickness direction of the JTE mask to selectively ion-implant the p-type impurity into a predetermined region of the SiC epitaxial layer 12, thereby forming the JTE region 14.
  • the JTE region 14 has, for example, an implantation amount of 1 ⁇ 10 17 cm ⁇ 3 to 1 ⁇ 10 18 cm ⁇ 3 and an implantation depth of 0.5 ⁇ m to 1.0 ⁇ m. Further, it is formed by implanting p-type impurity ions such as aluminum ions at an energy of 40 keV to 700 keV at a room temperature of 25 ° C. and an implantation angle of 0 °.
  • heat treatment is performed in order to activate p-type impurity ions such as implanted aluminum ions. Specifically, heat treatment is performed in an argon atmosphere at a temperature of 1500 ° C. to 2000 ° C. for 1 minute to 30 minutes. By this heat treatment step, the implanted ions are activated and a p-type termination structure is formed.
  • the Schottky electrode 15 is formed in the Schottky region 18 surrounded by the ion implantation region 13 so that the peripheral portion protrudes from the ion implantation region 13.
  • Examples of the material of the Schottky electrode 15 include titanium (Ti), tungsten (W), molybdenum (Mo), and chromium (Cr).
  • the Schottky electrode 15 is formed of one or more selected from these materials.
  • the wiring electrode 16 is formed on the surface on one side in the thickness direction of the Schottky electrode 15. Examples of the material of the wiring electrode 16 include Al.
  • the device portion is indicated as “device portion 20” with reference numeral “20”.
  • the back surface processing step is a silicide layer forming step.
  • a silicide layer 17 that is an ohmic electrode is formed on the back surface of the SiC substrate 11, that is, the surface on the other side in the thickness direction of the SiC substrate 11.
  • the silicide layer forming step is performed as follows.
  • FIG. 2 is a flowchart showing a procedure of a silicide layer forming step in the method for manufacturing a semiconductor device according to the first embodiment of the present invention.
  • the silicide layer forming step includes a nano thin film forming step in step a1 and an electrode forming step in step a2.
  • the processing of the flowchart shown in FIG. 2 is started, and the process proceeds to the nano thin film forming step of step a1.
  • the nano thin film forming step includes a coating step of step a11 and a sintering step of step a12.
  • 3 to 5 are diagrams for explaining the silicide layer forming step. 3 to 5, the SiC epitaxial layer 12, the Schottky electrode 15, and the wiring electrode 16 including the ion implantation region 13 and the JTE region 14 shown in FIG.
  • FIG. 3 is a cross-sectional view showing a state in which the nanoparticle thin film 22 has been formed.
  • the nano particle thin film 22 is formed as shown in FIG. Specifically, first, in the coating step of step a11, a solvent containing metal nanoparticles 21 (hereinafter referred to as “nanoparticle coating liquid”) is formed on the surface on the other side in the thickness direction, which is one surface in the thickness direction of the SiC substrate 11. Apply).
  • the nanoparticle coating liquid is applied by spin coating, for example.
  • nickel nanoparticles are used as the metal nanoparticles 21.
  • the metal nanoparticles 21 have a particle size of 1 nm to 100 nm.
  • the applied nanoparticle coating solution is heat-treated at a temperature of about 100 ° C. to 300 ° C. to sinter the metal nanoparticles 21 in the nanoparticle coating solution. That is, the coated metal nanoparticles 21 are sintered by heat treatment with a solvent at a temperature of about 100 ° C. to 300 ° C.
  • a nanoparticle thin film 22 that is a metal thin film made of the metal nanoparticles 21 is formed.
  • the nanoparticle thin film 22 is a contact electrode film serving as a contact electrode.
  • the film thickness of the nanoparticle thin film 22 after sintering is 10 nm or more and 500 nm or less.
  • the nanoparticle thin film 22 which is a metal thin film, is formed from the metal nanoparticles 21.
  • the reflectance of a metal thin film can be made low compared with the case where a metal thin film is formed by other methods, such as vapor deposition, for example.
  • FIG. 4 is a cross-sectional view showing a state in which the nanoparticle thin film 22 is irradiated with laser light.
  • FIG. 5 is a cross-sectional view showing a state in which the formation of the silicide layer 17 has been completed.
  • the electrode formation step of step a2 in FIG. 2 is performed.
  • the electrode forming step first, as shown in FIG. 4, the nanoparticle thin film 22 is irradiated with a laser beam at an energy density necessary for forming an ohmic contact, whereby an annealing process using a laser beam (hereinafter referred to as “laser annealing process”).
  • laser annealing process an annealing process using a laser beam
  • the laser beam applied to the nanoparticle thin film 22 only needs to have a wavelength that is absorbed by the nanoparticle thin film 22.
  • the nanoparticle thin film 22 is a Ni thin film made of nickel (Ni) nanoparticles as in the present embodiment, for example, any one or two of the following (A) to (G) are used as the laser light: More than seeds can be used.
  • A Laser light whose wavelength of the YAG laser element is 1064 nm.
  • B Laser light from a YLF laser element.
  • C Of the laser light from the YVO 4 laser element, (a) a fundamental wave with a wavelength of 1064 nm, (b) a second harmonic with a wavelength of 532 nm, (c) a third harmonic with a wavelength of 355 nm, (d ) Quadruple wave with a wavelength of 266 nm.
  • D Laser light whose wavelength of the ArF excimer laser element is 193 nm.
  • E A laser beam having a wavelength of 248 nm of a KrF excimer laser element.
  • F A laser beam having a XeCl excimer laser element with a wavelength of 308 nm.
  • G A laser beam whose wavelength of the XeF excimer laser element is 351 nm.
  • laser light of various semiconductor laser elements other than the above (A) to (G) can be used.
  • these laser beams it is desirable to use a laser beam having a wavelength of 400 nm or less. The reason for this will be described below.
  • the nanoparticle thin film 22 has a film defect such as a pinhole 42 shown in FIG. 9 to be described later, or a process error that causes the nanoparticle thin film 22 to be thinner than a desired film thickness occurs.
  • the irradiated laser light is not absorbed by the nanoparticle thin film 22 and enters the SiC substrate 11.
  • the wavelength of the irradiated laser light is a wavelength that is not absorbed by silicon carbide constituting the SiC substrate 11, the irradiated laser light passes through the SiC substrate 11.
  • the laser beam that has passed through the SiC substrate 11 reaches the non-irradiated surface of the SiC substrate 11 that is not irradiated with the laser beam, specifically, the surface on one side in the thickness direction of the SiC substrate 11.
  • the laser light reaching the laser light non-irradiated surface is absorbed by the Schottky electrode 15 and the wiring electrode 16 formed on the laser light non-irradiated surface.
  • the device unit 20 is destroyed.
  • the device unit 20 in which Ti, Al, and the like are arranged, and the device unit 20 is heated to a high temperature. It may become.
  • the device unit 20 becomes high temperature, melting of Al, deterioration of the Schottky interface, and the like occur.
  • the laser beam In order to prevent heat conduction to the device unit 20, it is effective to irradiate the laser beam with a pulse as short as about 1 ns to 1000 ns, for example, with a repetition frequency as low as about 1 kHz to 1000 kHz. Specifically, it is preferable to scan and irradiate pulsed laser light having a pulse width of 1 ns to 1000 ns and a repetition frequency of 1 kHz to 1000 kHz.
  • Ni nickel
  • the laser beam irradiation in the laser annealing treatment is preferably performed in an inert gas atmosphere such as argon or nitrogen in order to prevent oxidation of the nanoparticle thin film 22 serving as an electrode.
  • the silicide layer 17 is formed as a reaction layer of metal and SiC constituting the nanoparticle thin film 22, in this embodiment as a reaction layer of Ni and SiC.
  • a low-resistance ohmic contact is obtained between the ohmic electrode formed of the silicide layer 17 as the reaction layer and the SiC substrate 11 as the SiC layer.
  • the process of irradiating a laser beam and forming an ohmic electrode is equivalent to an electrode formation process.
  • nanoparticle thin film 22 that is a metal thin film is formed by metal nanoparticles 21 on the surface of the other side in the thickness direction of SiC substrate 11 in the nanothin film formation step.
  • An ohmic electrode is formed by irradiating the nanoparticle thin film 22 which is a metal thin film formed in the nano thin film forming process with laser light in the electrode forming process.
  • the metal nanoparticles 21 can control the particle size. By controlling the particle size of the metal nanoparticles 21, irregularities can be formed in the nanoparticle thin film 22 which is a metal thin film, and thus the reflectance of the metal thin film can be reduced. Further, by forming a metal thin film with the metal nanoparticles 21, surface plasmons can be excited resonantly. In such a situation where surface plasmons can be excited, the energy of the irradiated laser light is deprived by the excitation of the surface plasmons, so that the reflectance of the metal thin film is lowered. Therefore, the reflectance of a metal thin film can be reduced by forming the nanoparticle thin film 22 as a metal thin film with the metal nanoparticles 21 as described above.
  • the reflectance of the metal thin film can be reduced without polishing the SiC substrate 11. Since the nanoparticle thin film 22, which is a metal thin film having a reduced reflectance in this way, is irradiated with laser light in the electrode forming step, the laser light enters the metal thin film and is absorbed and absorbed. The rate of change to energy can be increased. As a result, the energy density of laser light necessary for forming a low-resistance ohmic electrode can be reduced.
  • the energy density of the laser light necessary for the formation of the low-resistance ohmic electrode can be increased by sputtering, vapor deposition, or the like. It can reduce compared with the case where a metal thin film is formed by other methods. Thereby, the processing time required for laser beam irradiation can be shortened.
  • the ohmic electrode formed by the method of this embodiment does not have a processing strain layer at the interface with the SiC substrate 11, and the SiC substrate 11 warpage does not increase.
  • the warp of the SiC substrate 11 is 100 ⁇ (200 / T) Can be 2 ⁇ m or less.
  • the warp of the SiC substrate 11 can be reduced to 250 ⁇ (200 / t) 2 ⁇ m or less.
  • a low-resistance ohmic electrode can be formed by irradiating laser light with as low energy density as possible without impairing the reliability of the semiconductor device 100.
  • nickel (Ni) is used as the material of the metal nanoparticles 21 constituting the nanoparticle thin film 22.
  • the present invention is not limited to this, and titanium (Ti), cobalt (Co). Molybdenum (Mo), tungsten (W), or the like may be used. Even if these materials are used, the same effect as the case of using Ni can be obtained.
  • the material of the metal nanoparticles 21 preferably contains one or more selected from nickel (Ni), titanium (Ti), cobalt (Co), molybdenum (Mo), and tungsten (W).
  • the silicide layer 17 can be formed as an ohmic electrode having a lower resistance than in the case of using another material.
  • the metal nanoparticles 21 have a particle size of 1 nm to 100 nm.
  • the particle diameter of the metal nanoparticle 21 is not limited to this, it is preferable that it is 1 nm or more and 100 nm or less like this Embodiment. If the particle size of the metal nanoparticles 21 is less than 1 nm, the unevenness formed on the nanoparticle thin film 22 that is a metal thin film is small, and thus the effect of reducing the reflectance of the metal thin film may not be sufficiently obtained.
  • the particle size of the metal nanoparticles 21 is preferably 1 nm or more and 100 nm or less.
  • the particle diameter of the metal nanoparticles 21 is particularly preferably ⁇ / 4n, where ⁇ is the wavelength of the laser beam to be irradiated and n is the refractive index of the metal nanoparticles 21 at the wavelength ⁇ .
  • the refractive index n of Ni with respect to the wavelength 355 nm of the laser light is 1.63.
  • the film thickness of the nanoparticle thin film 22, specifically, the film thickness of the nanoparticle thin film 22 after sintering of the applied metal nanoparticles 21 is 10 nm or more and 500 nm or less in the present embodiment.
  • the film thickness of the nanoparticle thin film 22 is not limited to this, it is preferable that it is 10 nm or more and 500 nm or less like this Embodiment.
  • the film thickness of the nanoparticle thin film 22 is less than 10 nm, the silicide layer 17 obtained after the laser light irradiation is difficult to be uniform, and a uniform ohmic electrode may not be obtained. If the film thickness of the nanoparticle thin film 22 exceeds 500 nm, the irradiated laser light may not reach the interface between the nanoparticle thin film 22 and the SiC substrate 11. If the irradiated laser light cannot reach the interface between the nanoparticle thin film 22 and the SiC substrate 11, the reaction between the metal constituting the nanoparticle thin film 22 and SiC constituting the SiC substrate 11 does not proceed, and the silicide layer 17 may not be formed, and a low-resistance ohmic electrode may not be obtained. Therefore, the film thickness of the nanoparticle thin film 22 is preferably 10 nm or more and 500 nm or less.
  • the nanoparticle thin film 22 is formed by applying a solvent containing the metal nanoparticles 21 on the surface of the other side in the thickness direction of the SiC substrate 11 at the application stage of step a11 in FIG. It is formed by sintering the nanoparticles 21 in the sintering step. By doing in this way, the nanoparticle thin film 22 which is a metal thin film by the metal nanoparticle 21 can be formed easily.
  • the carrier passes through the SiC substrate 11 and travels in the vertical direction toward the paper surface of FIG. 1, specifically, in the thickness direction of the SiC substrate 11. Therefore, the resistance of the semiconductor element 1 can be reduced by reducing the thickness of the SiC substrate 11 serving as a current path.
  • the semiconductor element 1 is a SiC Schottky barrier diode (SBD).
  • the manufacturing method of the semiconductor device of the present embodiment is the same as that of the first embodiment until the back surface processing step. Specifically, first, in the preparation step, materials and devices necessary for manufacturing the semiconductor device 100 such as the SiC substrate 11 are prepared. As the SiC substrate 11, an n-type SiC substrate 11 is prepared. When materials and apparatuses necessary for manufacturing the semiconductor device 100 such as the SiC substrate 11 are prepared, the process proceeds to a surface processing step.
  • the SiC epitaxial layer 12 is grown on the surface of the SiC substrate 11.
  • the doping concentration of the n-type impurity in SiC epitaxial layer 12 is, for example, 5 ⁇ 10 15 cm ⁇ 3 to 5 ⁇ 10 16 cm ⁇ 3 .
  • the film thickness of SiC epitaxial layer 12 is, for example, 5 ⁇ m to 15 ⁇ m.
  • An oxide film is formed on the surface of one side in the thickness direction of SiC epitaxial layer 12 by sacrificial oxidation.
  • a process for forming a p-type termination structure is performed. Specifically, first, an ion implantation mask is formed on the oxide film formed on the surface on one side in the thickness direction of SiC epitaxial layer 12. A p-type impurity, for example, aluminum is ion-implanted from one side in the thickness direction of the ion implantation mask to selectively ion-implant the p-type impurity into a predetermined region of the SiC epitaxial layer 12 to form an ion implantation region 13. To do.
  • the ion implantation region 13 has, for example, an implantation amount of 1 ⁇ 10 16 cm ⁇ 3 to 1 ⁇ 10 18 cm ⁇ 3 and an implantation depth of 0.5 ⁇ m to 1.0 ⁇ m at room temperature, for example, 25 ° C. It is formed by implanting p-type impurity ions such as aluminum ions at an energy of 40 keV to 700 keV with an implantation angle of 0 °.
  • the ion implantation mask is removed, the JTE region 14 is formed in the same manner as in the first embodiment, and the JTE mask and the oxide film used for forming the JTE region 14 are removed. Thereafter, in order to activate p-type impurity ions such as implanted aluminum ions, heat treatment is performed at a temperature of 1500 ° C. to 2000 ° C. for 1 minute to 30 minutes, for example, in an argon atmosphere. By this heat treatment step, the implanted ions are activated and a p-type termination structure is formed.
  • p-type impurity ions such as implanted aluminum ions
  • the Schottky electrode 15 is formed in the Schottky region 18 surrounded by the ion implantation region 13 so that the peripheral portion protrudes from the ion implantation region 13.
  • the material of the Schottky electrode 15 include titanium (Ti), tungsten (W), molybdenum (Mo), and chromium (Cr).
  • the wiring electrode 16 is formed on the surface of the Schottky electrode 15 on one side in the thickness direction. Examples of the material of the wiring electrode 16 include Al.
  • FIG. 6 is a flowchart showing the procedure of the back surface processing step in the method for manufacturing a semiconductor device according to the second embodiment of the present invention.
  • the back surface processing step includes the thinning step of step b1 before the silicide layer forming step, specifically, before the nano thin film forming step of step a1. That is, the back surface processing process includes a thinning process in step b1, a nano thin film forming process in step a1, and an electrode forming process in step a2.
  • the nano thin film forming process in step a1 and the electrode forming process in step a2 constitute a silicide layer forming process.
  • the SiC substrate 11 is thinned. Specifically, by grinding the back surface of the SiC substrate 11, that is, the surface on the other side in the thickness direction, the thickness of the SiC substrate 11 (hereinafter sometimes referred to as “plate thickness”) is reduced. For example, when manufacturing semiconductor device 100 using SiC substrate 11 having a plate thickness of 400 ⁇ m, SiC substrate 11 is thinned so that the plate thickness becomes 200 ⁇ m or less by grinding the entire back surface of SiC substrate 11. .
  • a processing strain layer is formed on the back surface of the SiC substrate 11 by grinding in the thinning process.
  • the back surface of the SiC substrate 11 has an arithmetic average roughness Ra specified in JIS B 0601 of 10 nm or less. It is preferable to grind. Specifically, the arithmetic average roughness Ra of the back surface of the SiC substrate 11 is reduced to 10 nm or less by grinding the back surface of the SiC substrate 11 with a fine grindstone of number 1000 or more having an average abrasive grain size of 20 ⁇ m or less. It is preferable to do. By grinding so that the processing surface is flattened with a fine grindstone in this way, the depth at which the processing strain layer is formed can be reduced, so that the warp of the SiC substrate 11 can be suppressed. .
  • the thinning process of step b1 is provided to reduce the thickness of the SiC substrate 11 serving as a current path. Specifically, the SiC substrate 11 is thinned so that the plate thickness is 200 ⁇ m or less. Thereby, the resistance of the semiconductor element 1 can be reduced.
  • a silicide layer 17 that is an ohmic electrode is formed on the back surface of the SiC substrate 11 in the same manner as in the first embodiment. Specifically, first, a solvent containing metal nanoparticles 21 such as nickel nanoparticles having a particle size of 1 nm to 100 nm is applied to the back surface of the SiC substrate 11, that is, the surface on the other side in the thickness direction, for example, spin coating. .
  • the coated metal nanoparticles 21 such as nickel nanoparticles are sintered by a heat treatment at a temperature of about 100 ° C. to 300 ° C. to form a nanoparticle thin film 22 made of the metal nanoparticles 21.
  • the thickness of the nanoparticle thin film 22 formed of metal nanoparticles is large, the thickness of the silicide layer 17 which is an alloy layer formed by irradiating the nanoparticle thin film 22 with a laser beam to be silicided is also thick. As a result, the stress generated in the alloy layer increases. Accordingly, when the thick nanoparticle thin film 22 is formed on the thinned SiC substrate 11, the SiC substrate 11 is greatly warped. In the worst case, the SiC substrate 11 that has been thinned and reduced in strength cannot withstand the stress and cracks.
  • the nanoparticle thin film 22 having a thickness of 300 nm is formed by nickel nanoparticles on the 3 inch SiC substrate 11 thinned to 100 ⁇ m and irradiated with laser light, the thickness of the silicide layer 17 which is an alloy layer is increased. A large stress was generated, which caused the SiC substrate 11 to crack. Since the stress of the film is proportional to the thickness thereof, the stress of the alloy layer is proportional to the thickness of the nanoparticle thin film 22 to be formed.
  • FIG. 7 is a diagram for explaining the relationship between load and stress.
  • the warping and cracking of the SiC substrate 11 will be examined.
  • a disk-shaped wafer is assumed as the SiC substrate 11 and a load P is applied to the center of the wafer.
  • Calculate the maximum stress on the wafer is obtained by the following equation (1).
  • the warpage w max of the wafer is obtained by the following equations (2) and (3).
  • t represents the thickness of the wafer
  • ⁇ represents the Poisson's ratio
  • D represents the rigidity per unit area of the wafer
  • E represents the longitudinal elastic modulus
  • FIG. 8 is a graph showing the relationship between the thickness of the SiC substrate 11 and the thickness of the Ni film when a crack occurs in the SiC substrate 11.
  • the horizontal axis represents the thickness [ ⁇ m] of the SiC substrate 11
  • the vertical axis represents the thickness [nm] of the Ni film that is the nanoparticle thin film 22 formed of nickel nanoparticles.
  • the warp of the SiC substrate 11 is inversely proportional to the square of the thickness of the SiC substrate 11, and is proportional to the film stress and the thickness of the nanoparticle thin film 22.
  • the stress generated in the SiC substrate 11 is calculated from the actual warpage of the SiC substrate 11 and the thickness of the nanoparticle thin film 22.
  • the thickness of the nanoparticle thin film 22 when the SiC substrate 11 breaks is calculated for the SiC substrate 11 of each thickness, the thickness is as shown in FIG.
  • the thickness of the nanoparticle thin film 22 is y and the thickness of the SiC substrate 11 is x
  • the relationship between the thickness of the SiC substrate 11 and the thickness of the nanoparticle thin film 22 when the SiC substrate 11 is broken is expressed by the following formula ( It is represented by a curve of a quadratic function that satisfies 4).
  • y 0.0347x 2 -0.8212x + 21.286 (4)
  • the nanoparticle thin film 22 must be thinner than the value of the thickness y represented by the equation (4) with respect to the thinned SiC substrate 11. That is, the thickness y of the nanoparticle thin film 22 needs to satisfy the following formula (5) with respect to the thickness x of the SiC substrate 11. y ⁇ 0.0347x 2 ⁇ 0.8212x + 21.286 (5)
  • the thickness y of the nanoparticle thin film 22 so as to satisfy the formula (5), cracking of the SiC substrate 11 and warping of the SiC substrate 11 can be suppressed.
  • the reflectance of the surface of the nanoparticle thin film 22 which is a metal thin film irradiated with laser light can be lowered without increasing the warp of the SiC substrate 11. Therefore, also in the present embodiment, the energy density of the laser beam necessary for forming the low-resistance ohmic electrode is reduced by reducing the reflectivity of the surface of the metal thin film without increasing the warp of the SiC substrate 11. be able to.
  • the warp of the SiC substrate 11 is 100 ⁇ (200 / T) Can be 2 ⁇ m or less.
  • the warp of the SiC substrate 11 can be reduced to 250 ⁇ (200 / t) 2 ⁇ m or less.
  • the ohmic electrode is formed by irradiating the nanoparticle thin film 22 with laser light in the same manner as in the first embodiment. .
  • the thin plate forming step is provided before the nano thin film forming step to thin the SiC substrate 11 that is the current path, specifically, the plate thickness is 200 ⁇ m or less.
  • the resistance of the semiconductor element 1 is reduced by reducing the thickness.
  • the back surface of the SiC substrate 11, that is, the surface on the other side in the thickness direction is ground.
  • the metal thin film formed on the back surface of the SiC substrate 11 is formed as the nanoparticle thin film 22 by the metal nanoparticles 21, so that irregularities are formed in the metal thin film. Therefore, it is not necessary to grind the back surface of the SiC substrate 11. Therefore, when the back surface of SiC substrate 11 is ground, it can be ground so that the processing surface becomes flat with a fine grindstone as described above. As a result, the depth at which the work strain layer is formed can be reduced, so that the warp of SiC substrate 11 can be suppressed.
  • the nanoparticle thin film 22 as a metal thin film by the metal nanoparticles 21, the reflectance of the surface of the metal thin film irradiated with the laser light is formed. Can be reduced. As a result, the energy density of the laser beam required to form a low-resistance ohmic electrode can be reduced compared to the case where a metal film is formed by sputtering, vapor deposition, etc., so the processing time by laser beam irradiation is shortened. can do.
  • a low-resistance ohmic electrode can be formed by irradiating laser light with as low energy density as possible without impairing the reliability of the semiconductor device 100, and the resistance of the semiconductor element 1 Can be reduced.
  • the back surface of the SiC substrate 11 is ground so that the arithmetic average roughness Ra is 10 nm or less. If the arithmetic mean roughness Ra of the back surface of the SiC substrate 11 after grinding exceeds 10 nm, a processed strain layer may be formed from the back surface of the SiC substrate 11 to a deep position, and the SiC substrate 11 is excessively warped. There is a fear. Therefore, when grinding the back surface of SiC substrate 11, it is preferable to grind so that arithmetic mean roughness Ra is 10 nm or less as in the present embodiment.
  • the depth of the processing strain layer formed on the back surface of the SiC substrate 11 that is the processed surface after grinding is allowed. Since it can be made as shallow as possible, warping of SiC substrate 11 can be more reliably suppressed. Therefore, the semiconductor device 100 with higher reliability can be obtained.
  • the back surface of SiC substrate 11 is a grindstone having an average abrasive grain size of 20 ⁇ m or less. Grinding.
  • the average abrasive grain size of the grindstone exceeds 20 ⁇ m, it becomes difficult to make the arithmetic average roughness Ra of the back surface of the SiC substrate 11 after grinding 10 nm or less. Therefore, the average abrasive grain size of the grindstone is preferably 20 ⁇ m or less.
  • the method of manufacturing the semiconductor device as shown in FIG. 1 has been described for the thinned SiC substrate 11.
  • the nanoparticle thin film 22 formed by the metal nanoparticles 21 is thick, the thickness of the alloy layer formed after the laser light irradiation is increased, and the stress of the alloy layer is increased. Thereby, the curvature of SiC substrate 11 increases.
  • the wafer may be cracked.
  • the nanoparticle thin film 22 becomes thin, it becomes difficult to form a uniform nanoparticle thin film 22 as a metal thin film.
  • pinholes are easily formed in the formed nanoparticle thin film 22. Therefore, the silicide layer 17 obtained after the laser beam irradiation is difficult to be uniform, and there is a possibility that a uniform ohmic electrode cannot be obtained, resulting in an increase in contact resistance and a decrease in the reliability of the semiconductor element 1.
  • the particle size of the metal nanoparticles will be described. As the particle size of the metal nanoparticles constituting the nanoparticle thin film 22 increases, the unevenness increases and the reflectance with respect to the laser beam decreases. However, when the particle size of the metal nanoparticles is large, it is difficult to form a uniform nanoparticle thin film 22 as a metal thin film when forming a thin metal thin film.
  • FIG. 9 is a cross-sectional view showing the nanoparticle thin film 22 in which the pinholes 42 are formed.
  • the thinned SiC substrate is indicated by a reference sign “41”.
  • the silicide layer 17 obtained after the laser light irradiation is difficult to be uniform, and there is a possibility that a uniform ohmic electrode cannot be obtained, resulting in an increase in contact resistance and a decrease in the reliability of the semiconductor element 1.
  • the particle size of the metal nanoparticles 21 is small, it is easy to form a thin and uniform nanoparticle thin film 22. Therefore, it is easy to form a thin and uniform alloy layer, a stable low contact resistance can be obtained, and a high element reliability can be obtained.
  • the unevenness of the nanoparticle thin film 22 is reduced and the reflectance with respect to the laser beam is increased, the energy of the laser beam required to obtain a low contact resistance is increased. Therefore, throughput and productivity are reduced.
  • the nanoparticle thin film 22 is formed on the thinned SiC substrate 41 and irradiated with laser light to form the ohmic electrode as follows.
  • the production of the semiconductor device 100 including the highly reliable semiconductor element 1 having a uniform and stable low contact resistance without increasing the warp of the SiC substrate 41 and cracking of the SiC substrate 41. Can be obtained by sex.
  • an SiC substrate 11, specifically, an n-type SiC substrate 11 is prepared.
  • SiC epitaxial layer 12 is grown on the surface of SiC substrate 11.
  • the doping concentration of the n-type impurity in SiC epitaxial layer 12 is, for example, 5 ⁇ 10 15 cm ⁇ 3 to 5 ⁇ 10 16 cm ⁇ 3 .
  • the film thickness of SiC epitaxial layer 12 is, for example, 5 ⁇ m to 15 ⁇ m.
  • An oxide film is formed on the surface of one side in the thickness direction of SiC epitaxial layer 12 by sacrificial oxidation.
  • a process for forming a p-type termination structure is performed. Specifically, first, an ion implantation mask is formed on the oxide film formed on the surface on one side in the thickness direction of SiC epitaxial layer 12.
  • a p-type impurity, for example, aluminum is ion-implanted from one side in the thickness direction of the ion implantation mask to selectively ion-implant the p-type impurity into a predetermined region of the SiC epitaxial layer 12 to form an ion implantation region 13.
  • the ion implantation region 13 has, for example, an implantation amount of 1 ⁇ 10 16 cm ⁇ 3 to 1 ⁇ 10 18 cm ⁇ 3 and an implantation depth of 0.5 ⁇ m to 1.0 ⁇ m at room temperature, for example, 25 ° C. It is formed by implanting p-type impurity ions such as aluminum ions at an energy of 40 keV to 700 keV with an implantation angle of 0 °.
  • the ion implantation mask is removed, the JTE region 14 is formed in the same manner as in the first embodiment, and the JTE mask and the oxide film used for forming the JTE region 14 are removed. Thereafter, in order to activate p-type impurity ions such as implanted aluminum ions, heat treatment is performed at a temperature of 1500 ° C. to 2000 ° C. for 1 minute to 30 minutes, for example, in an argon atmosphere. By this heat treatment step, the implanted ions are activated and a p-type termination structure is formed.
  • p-type impurity ions such as implanted aluminum ions
  • the Schottky electrode 15 is formed in the Schottky region 18 surrounded by the ion implantation region 13 so that the peripheral portion protrudes from the ion implantation region 13.
  • Examples of the material of the Schottky electrode 15 include titanium (Ti), tungsten (W), molybdenum (Mo), and chromium (Cr).
  • the wiring electrode 16 is formed on the surface on one side in the thickness direction of the Schottky electrode 15. Examples of the material of the wiring electrode 16 include Al.
  • the back surface of the SiC substrate 11, that is, the surface on the other side in the thickness direction is ground to reduce the thickness of the SiC substrate 11.
  • SiC substrate 11 is thinned so that the plate thickness becomes 200 ⁇ m or less by grinding the entire back surface of SiC substrate 11.
  • the fine grinding stone of 1000th or more having an average abrasive grain size of 20 ⁇ m or less on the back surface of the SiC substrate 11.
  • the arithmetic average roughness Ra of the back surface of the SiC substrate 11 is ground to 10 nm or less.
  • the nano particle thin film 22 is formed on the back surface of the SiC substrate 11.
  • the larger the metal nanoparticles have a larger particle size the larger the unevenness and the lower the reflectance with respect to the laser beam.
  • the particle size of the metal nanoparticles 21 is excessively large, it is difficult to form a uniform nanoparticle thin film 22, and pinholes 42 are easily formed in the formed nanoparticle thin film 22.
  • the particle size of the metal nanoparticles 21 is small, it is easy to form a thin and uniform nanoparticle thin film 22.
  • the particle diameter of the metal nanoparticles 21 is small, the unevenness of the nanoparticle thin film 22 is reduced, and the reflectance with respect to the laser light is increased.
  • metal nanoparticles having two or more particle size distribution peaks are used as the metal nanoparticles 21.
  • FIG. 10 is a cross-sectional view schematically showing the metal nanoparticles 21 used in the third embodiment of the present invention.
  • a relatively small metal nanoparticle hereinafter sometimes referred to as “small particle nanoparticle” 52 having a particle size of 1 nm or more and 50 nm or less, and a particle size exceeding 50 nm.
  • Metal nanoparticles 21 including relatively large metal nanoparticles (hereinafter sometimes referred to as “large particle size nanoparticles”) 51 of 100 nm or less are used.
  • the metal nanoparticle 21 has two or more particle size distribution peaks, and at least one of the particle size distribution peaks exists within a particle size range of 1 nm or more and less than 50 nm, and others. At least one of the above uses metal nanoparticles 21 present in a particle size range of 50 nm or more and less than 100 nm.
  • the metal nanoparticles 21 include the large particle size nanoparticles 51 and the small particle size nanoparticles 52. Therefore, as shown in FIG.
  • the nanoparticle thin film 22 can be formed. Thereby, the reflectance of the nanoparticle thin film 22 can be reduced. Moreover, since the pinhole 42 can be obstruct
  • the nanoparticle thin film 22 is formed as a metal thin film by the metal nanoparticles 21 as described above. Thereafter, the ohmic electrode is formed by irradiating the nanoparticle thin film 22 with laser light in the same manner as in the above-described embodiment.
  • the present embodiment there are two or more particle size distribution peaks, and at least one of the particle size distribution peaks is present within a particle size range of 1 nm or more and less than 50 nm, and other At least one of the metal nanoparticles 21 present in a particle size range of 50 nm or more and less than 100 nm is used.
  • the reflectance of the surface of the nanoparticle thin film 22 which is a metal thin film irradiated with laser light can be lowered, and the uniform nanoparticle thin film 22 without the pinhole 42 can be formed.
  • the reflectivity of the surface of the nanoparticle thin film 22 which is a metal thin film is reduced, and the energy density of the laser light necessary for forming the low resistance ohmic electrode is reduced.
  • the silicide layer 17 obtained after the laser light irradiation is uniform, a semiconductor device including the semiconductor element 1 having a uniform and stable low contact resistance and high reliability can be obtained with high productivity. Can do.
  • FIG. 11 is a flowchart showing the procedure of the back surface processing step in the semiconductor device manufacturing method according to the fourth embodiment of the present invention. Since the manufacturing method of the semiconductor device of this embodiment is the same as that of the second embodiment described above except that it includes the back surface processing step shown in FIG. 11, the description of the same steps is omitted.
  • the back surface processing step in the present embodiment is the second embodiment shown in FIG. 6 described above except that the film forming step of step c1 is provided between the thinning step of step b1 and the nano thin film forming step of step a1.
  • the back surface processing step in the present embodiment includes a thinning step in step b1, a film forming step in step c1, a nano thin film forming step in step a1, and an electrode forming step in step a2.
  • the nano thin film forming process in step a1 and the electrode forming process in step a2 constitute a silicide layer forming process.
  • FIG. 12 is a cross-sectional view showing a state at the stage where the silicide layer forming step is completed in the fourth embodiment of the present invention.
  • the base of the nanoparticle thin film 22 is formed by sputtering or vapor deposition as shown in FIG. A base metal thin film 61 is formed.
  • the silicide layer 17 is formed in the electrode forming process in step a2.
  • the film By forming the film by sputtering or vapor deposition, it is easy to form a uniform base metal thin film 61 without a pinhole.
  • the nanoparticle thin film 22 capable of reducing the surface reflectance on the surface of the underlying metal thin film 61, a uniform and low reflectance metal thin film can be formed.
  • the silicide layer 17 obtained after the laser light irradiation is made uniform.
  • the material of the base metal thin film 61 one or more selected from nickel (Ni), titanium (Ti), cobalt (Co), molybdenum (Mo), tungsten (W) and the like can be used.
  • the base metal thin film 61 Since the base metal thin film 61 has a large stress, if the thickness of the base metal thin film 61 is excessively large, the warp of the SiC substrate 11 is increased, and in the worst case, the SiC substrate 11 is cracked. In order to prevent this, it is desirable that the thickness of the base metal thin film 61 be 1 nm or more and 50 nm or less.
  • the material of the nanoparticle thin film 21 formed on the base metal thin film 61 is one or two selected from nickel (Ni), titanium (Ti), cobalt (Co), molybdenum (Mo), tungsten (W), and the like. The above can be used.
  • the material of the nanoparticle thin film 22 may be the same as or different from the material of the base metal thin film 61.
  • the thickness of the SiC substrate 11 must not be cracked by the stress of the alloy layer formed by the reaction between the base metal thin film 61, the nanoparticle thin film 22, and silicon carbide.
  • the total thickness of the base metal thin film 61 and the nanoparticle thin film 22 is smaller than the thickness of the SiC substrate 11. Therefore, it must be less than or equal to the value shown in equation (4) above.
  • the particle size of the metal nanoparticles is preferably 1 nm to 100 nm.
  • the nanoparticle thin film 22 as a metal thin film with metal nanoparticles on the surface of the base metal thin film 61 formed by sputtering or vapor deposition, a metal thin film is formed by another method such as vapor deposition. Compared with the case, the reflectance of a metal thin film can be made low. In addition, since an alloy layer with silicon carbide can be formed uniformly, a semiconductor device including a semiconductor element having a uniform and stable low contact resistance and high reliability can be obtained with high productivity.
  • the particle size distribution peaks there are two or more particle size distribution peaks, and at least one of the particle size distribution peaks is within the range of the particle size of 1 nm or more and less than 50 nm.
  • a more uniform nanoparticle thin film 22 can be formed by using the metal nanoparticles 21 that are present and at least one of them exists in a particle size range of 50 nm or more and less than 100 nm.
  • the film thickness of the base metal thin film 61 is preferably 1 nm or more and 50 nm or less. Further, when the total thickness of the nanoparticle thin film 22 and the base metal thin film 61 is z (nm) and the thickness of the SiC substrate 41 is x ( ⁇ m), the following formula (6) is satisfied. It is preferable. z ⁇ (0.0347x 2 ⁇ 0.8212x + 21.286) (6)
  • the SBD using SiC is exemplified as the semiconductor element 1, but the semiconductor element 1 is not limited to this, and may be, for example, a MOSFET. Even when the semiconductor element 1 is a MOSFET, a low-resistance ohmic electrode can be formed by the same method as in the present embodiment.
  • Ni nickel
  • Mo molybdenum
  • W tungsten
  • the present invention can freely combine the above-described embodiments within the scope of the invention, and can arbitrarily modify or omit any component of each embodiment.
  • nitride semiconductor element 10 SiC substrate, 11, 41 SiC substrate, 12 SiC epitaxial layer, 13 ion implantation region, 14 JTE region, 15 Schottky electrode, 16 wiring electrode, 17 silicide layer, 18 Schottky region, 20 device part, 21 metal nanoparticles, 22 nanoparticle thin film, 51 large particle size nanoparticle, 52 small particle size nanoparticle, 61 base metal thin film, 100 semiconductor device.

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Abstract

La présente invention vise à fournir un dispositif de fabrication de dispositif semi-conducteur dans lequel, sans détériorer la fiabilité, une électrode ohmique à faible résistance peut être réalisée par rayonnement de lumière laser ayant la densité d'énergie la plus faible possible. Un film mince métallique (22) est formé de nanoparticules métalliques (21) sur une surface d'un substrat de SiC (11) dans la direction de l'épaisseur. En conséquence, la réflectance du film mince métallique (22) peut être réduite sans polir le substrat de SiC (11). Etant donné qu'une électrode ohmique est formée par rayonnement de lumière laser vers le film mince métallique (22) ayant la réflectance réduite, la densité d'énergie de lumière laser nécessaire pour former l'électrode ohmique peut être réduite. De plus, étant donné que le polissage n'est pas réalisé sur le substrat de SiC (11), une augmentation de la déformation du substrat de SiC (11) est éliminée par élimination de la génération de couche déformée en raison du procédé, et la fiabilité du dispositif semi-conducteur est empêchée d'être détériorée.
PCT/JP2012/068059 2011-08-10 2012-07-17 Procédé de fabrication de dispositif semi-conducteur WO2013021786A1 (fr)

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JP2018125520A (ja) * 2016-12-20 2018-08-09 インフィネオン テクノロジーズ アーゲーＩｎｆｉｎｅｏｎ Ｔｅｃｈｎｏｌｏｇｉｅｓ Ａｇ 炭化ケイ素上への金属接触層の形成及び金属接触構造を有する半導体デバイス
JP7434908B2 (ja) 2020-01-09 2024-02-21 富士電機株式会社 炭化珪素半導体装置
FR3139410A1 (fr) * 2022-09-07 2024-03-08 Soitec Procédé d’amincissement d’une structure composite portée par un substrat support SiC polycristallin, à gondolement réduit

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