WO2012133755A1 - 伝送システムとバックプレーンシステム構築方法 - Google Patents
伝送システムとバックプレーンシステム構築方法 Download PDFInfo
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- WO2012133755A1 WO2012133755A1 PCT/JP2012/058556 JP2012058556W WO2012133755A1 WO 2012133755 A1 WO2012133755 A1 WO 2012133755A1 JP 2012058556 W JP2012058556 W JP 2012058556W WO 2012133755 A1 WO2012133755 A1 WO 2012133755A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q1/00—Details of selecting apparatus or arrangements
- H04Q1/02—Constructional details
- H04Q1/15—Backplane arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/66—Structural association with built-in electrical component
- H01R13/6608—Structural association with built-in electrical component with built-in single component
- H01R13/6616—Structural association with built-in electrical component with built-in single component with resistor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/66—Structural association with built-in electrical component
- H01R13/6608—Structural association with built-in electrical component with built-in single component
- H01R13/6625—Structural association with built-in electrical component with built-in single component with capacitive component
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/66—Structural association with built-in electrical component
- H01R13/665—Structural association with built-in electrical component with built-in electronic circuit
- H01R13/6658—Structural association with built-in electrical component with built-in electronic circuit on printed circuit board
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0246—Termination of transmission lines
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/14—Mounting supporting structure in casing or on frame or rack
- H05K7/1438—Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
- H05K7/1439—Back panel mother boards
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0298—Arrangement for terminating transmission lines
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0245—Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0251—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance related to vias or transitions between vias and transmission lines
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/044—Details of backplane or midplane for mounting orthogonal PCBs
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09618—Via fence, i.e. one-dimensional array of vias
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10015—Non-printed capacitor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
Definitions
- the present invention is based on the priority claim of Japanese patent application: Japanese Patent Application No. 2011-073983 (filed on March 30, 2011), the entire contents of which are incorporated herein by reference. Shall.
- the present invention relates to a signal transmission technique, and more particularly to a backplane system construction method and a transmission system.
- the back drill uses a drill to cut through holes and the surrounding substrate.
- the portion where the through hole is formed is cut with a drill having a diameter slightly larger than the outer shape of the through hole to make a hole, thereby removing the portion corresponding to the stub.
- Back drills also have problems in terms of cost and procurement. For this reason, there is a need for a technology that replaces the back drill.
- a typical example of a backplane system will be described as a transmission system.
- FIG. 1 is a diagram showing an example (prototype) of a backplane system used for communication equipment and the like.
- a backplane is a type of printed circuit board (Printed Circuit Board) that has a plurality of connectors (also referred to as “backplane connectors”) on one side, and the cards that are mounted on the connectors are connected to each other. Configure the system.
- the midplane includes a plurality of connectors (backplane connectors) on both sides of the circuit board.
- the backplane structure will be described as an example, but it can be replaced with a midplane structure.
- a line card 11 and a switch card 12 are attached to a connector (backplane connector) 13 of the backplane 14.
- the backplane 14 performs electrical connection between the switch card 12 and the line card 11, and transmits a line signal to another line card 11 via the switch card 12.
- the line speed has changed from 1 Gbps to 10 Gbps, and is further evolving to 40 Gbps and 100 Gbps. For this reason, as shown in FIG. 1, it is necessary to increase the speed of backplane transmission while suppressing deterioration of signal characteristics and the like.
- FIG. 2 shows the configuration (physical specifications) of the backplane system shown in FIG.
- FIG. 2A is a diagram schematically showing a side cross section of a backplane, a connector, and a card (board).
- FIG. 2B is a diagram schematically showing a cross-sectional configuration of a region surrounded by a broken-line broken line between the substrate and the backplane in FIG. 2A, and is a diagram illustrating a through hole and a stub.
- the line signal is an IC (Integrated Circuit) 22A ⁇ board (a small printed circuit board attached to a backplane (board), also referred to as “daughter card” or “daughter board”) 21A.
- IC 22A Integrated Circuit
- board a small printed circuit board attached to a backplane (board), also referred to as “daughter card” or “daughter board” 21A.
- ⁇ Connector 23A ⁇ back plane 24
- connector 23B ⁇ board (daughter card) 21B
- the connector 23A (23B) includes a terminal (connector terminal) inserted (press-fitted) into the through hole of the substrate (daughter card) 21A (21B) and a terminal (connector inserted) into the through-hole of the substrate of the backplane 24 (connector). Terminal).
- FIG. 2 (B) schematically shows a cross section of the multilayer substrate.
- the signal wiring is connected to the signal layer (signal) at a predetermined depth (corresponding to the depth of the signal layer from the substrate surface) from the surface of the through hole formed by coating the conductive member with a plating or the like.
- the electrical signal sent to the signal layer (signal) is supplied from the upper part of the through-hole, and enters the signal layer near the middle of the through-hole. Since the through hole exists also below the portion where the signal layer (signal) is connected, the portion where the signal layer (signal) is connected to the through hole (the bent portion of the signal line in FIG. 2B) ) Is a branch point of the signal path.
- the signal propagating from the upper part of the through hole propagates to the signal layer (signal) in the multilayer substrate at this branch point (folded part), but a part of the signal is below the through hole from the branch point. move on.
- the through hole in the lower part from the branch point is not an original signal path, but is a conductive part, and thus becomes a signal propagation path.
- a portion that is not the original signal path is generally referred to as a “stub” (stub: branch wiring).
- a signal traveling from the branch point to the lower part of the through hole is reflected at the lower end of the through hole, travels upward through the through hole, and returns to the branch point.
- a signal traveling from the branch point and a signal reflected and returned from the lower end of the through hole collide with each other, which may adversely affect the signal transmission characteristics. For example, the influence becomes significant in a high-frequency signal, a high-speed digital signal, or the like.
- a removed opening is formed in the ground pattern of the lower ground layer (power supply) surrounding the differential via (via-hole), and this is shown as an antipad (anti). -Pad).
- FIG. 3 is a diagram showing an example (prototype) of a connection form between a connector (backplane connector) and a board (daughter card), and a connector (backplane connector) and a backplane.
- a connector backplane connector
- the backplane connector 33 a press-fit connector in which the terminal 35 is press-fit (press-fitted) into the corresponding through hole 34 of the substrate 31 is used.
- FIG. 4 schematically shows the state of signal propagation at the connection between the connector (backplane connector) of FIG. 3 and the substrate (daughter card or backplane).
- the daughter card or backplane substrate 41 includes a power supply layer or a GND layer (ground layer, ground plane) 42 and a signal layer 44, and is formed of a multilayer substrate including a dielectric 43 between the layers.
- the signal layer 44 is provided between the GND layers 42, for example.
- the signal from the connector terminal 45 (corresponding to the connector terminal 35 of the backplane connector 33 in FIG. 3) at the upper end of the through hole 46 propagates to the signal layer 44 at the branch point of the signal layer 44.
- a part of the signal travels through the terminal 45 from the branch point to the lower part of the through hole 46, is reflected at the lower end of the through hole 46, and is a signal from above the connector terminal 45 at the branch point to the signal layer 44. Clash. That is, the reflected wave is further reflected at the branch point in the through hole, and multiple reflection occurs here.
- the end of the connector terminal 45 in the through hole 46 is open, that is, totally reflected, and the branch point in the through hole 46 (the connection point with the signal layer 44) has low impedance, so that phase-inverted reflection occurs. Therefore, a quarter-wave resonance is generated by a standing wave with the end of the connector terminal 45 as an antinode and a branch point in the through hole (a connection point between the through hole 46 and the signal layer 44) as a node.
- the wavelength ⁇ of the standing wave is It is given by equation (1).
- the product of resonance frequency f and wavelength ⁇ is the speed of light.
- C0 the speed of light in vacuum
- C0 1 / ⁇ ( ⁇ 0 ⁇ ⁇ 0)
- ⁇ 0 is the dielectric constant of vacuum
- ⁇ 0 is the magnetic permeability of vacuum.
- the resonance frequency f is given by the following equation (4).
- n is a positive odd number (1, 3, 5,...)
- C0 is the speed of light in vacuum
- L is the stub length
- ⁇ r is the relative dielectric constant.
- FIG. 5 is a diagram for explaining the above-described signal transmission path (differential transmission path).
- backplane connectors 54A and 54B correspond to the connectors 23A and 23B in FIG. 5
- the connector terminal 53A corresponds to the connector terminal of the connector 23A connected to the through hole of the daughter card 21A of FIG. 2A
- the connector terminal 55A is the through terminal of the back plane 24 of FIG. This corresponds to the connector terminal of the connector 23A connected to the hole.
- the connector terminal 55B corresponds to the connector terminal of the connector 23B connected to the through hole of the backplane 24 of FIG.
- the connector terminal 53B corresponds to the connector terminal of the connector 23B connected to the through hole of the daughter card 21B of FIG.
- a signal differentially output from the output buffer 51 (an output buffer (not shown in the IC 22A in FIG. 2A)) is output via a wiring 52A in the daughter card (corresponding to the substrate 21A and the like in FIG. 2 (A)).
- the input buffer 57 (the input buffer (not shown in the IC 22B in FIG. 2A)) is differentially connected via the connector terminal 53B and the wiring 52B in the daughter card (corresponding to the substrate 21B in FIG. 2 (A)). Is input.
- the input buffer 57 includes a termination circuit (termination resistor) between differential inputs, and a differential input signal is input to an equalization circuit (equalizer) and equalized.
- the signal input from the connector via the wiring is a reflected wave generated at the open end of the stub by the stub that is parasitically generated in the through hole of the backplane.
- the reflected energy is reflected at the end of the through hole (stub open end).
- the reflected wave is further reflected at a branch point in the through hole, and multiple reflection occurs here. That is, a quarter-wave resonance is generated by a standing wave with the end of the connector terminal as an antinode and the through-hole branch point as a node.
- the analysis using the through-hole structure (differential through-hole) in FIG. 6 is the insertion loss of the differential through-hole in FIG. 7 (analysis by the present inventor).
- the horizontal axis represents frequency
- the vertical axis represents input differential insertion loss Sdd21 (unit dB). Due to the quarter-wave resonance of the through-hole stub, in the example of FIG. 7, the input differential insertion loss Sdd21 is about ⁇ 24 dB (the absolute value of the insertion loss (attenuation) amount is maximum) in the vicinity of 7 GHz.
- a pair of backplane connector terminals 67 that transmit signals differentially are connected to a pair of signal through holes 62.
- the pair of signal through holes 62 is connected to the pair of signal wirings 65 in the signal layer between the GND layers 64.
- a stub (through hole stub) 66 is formed between the open end of the lower end portion of the signal through hole 62 and the connection portion between the signal through hole 62 and the signal wiring 65.
- Acceleration of the line interface requires a speed of 10 Gbps or higher on the backplane, but it can be understood that transmission is difficult due to this through-hole characteristic.
- Patent Document 1 At least a part of a through hole and a via is drilled to shorten a conductive stub length portion of the hole, and the drilled portion of the hole includes a transition portion from the first profile to the second profile.
- a circuit board that reduces reflection from the drilled hole end is disclosed.
- a technique has been disclosed in which a through hole stub is scraped off by a drill to eliminate resonance caused by the stub. Although the characteristics are good, there is a concern that the drill is difficult to control at the time of manufacturing the substrate and the cost is increased due to problems such as yield. In addition, since it is scraped off by a drill, quality problems due to residual burrs and the like have not been solved.
- Patent Document 2 when a signal is transmitted at high speed through a differential wiring, a differential that passes through a via hole having an open stub is used to solve a problem that a waveform distortion occurs due to impedance mismatch in a via hole having an open stub and jitter occurs.
- a configuration is disclosed in which the degree of coupling is reduced while the differential characteristic impedance is constant with respect to the wiring. That is, a technique for optimizing the degree of coupling of differential lines and reducing the influence of through-hole stubs is disclosed. This technology assumes that the characteristic deterioration due to the stub is sufficiently higher than the operating band, and stabilizes the signal in the lower band. That is, it does not compensate for the degradation characteristics of the stub, and does not disclose a technique for solving the problem when the signal band and the degradation band due to the stub are approximately the same.
- Patent Document 3 discloses a method for optimizing a via structure for improving the high-frequency performance of the backplane and a method for optimizing the size and shape of the via structure for enhancing the high-frequency signal integrity performance of the via structure. Yes.
- the unused stub section of the plating through hole (PTH) is removed by removing the conductive portion of the via constituting the stub section with a drill. For this reason, there is a problem that the design becomes complicated. In addition, cost and quality problems caused by back drilling cannot be solved.
- the integrated circuit includes a built-in termination resistor designed to match the characteristic impedance (signal source impedance) of the transmission line, and the signal source drives a plurality of IC elements on the printed circuit board.
- the IC elements are connected in cascade, the internal resistors of the IC elements except for the last IC element in the chain are bypassed by the short circuit thereunder, and the last IC element in the chain does not have a short circuit underneath.
- a technique for providing a termination resistor in the IC in order to increase the speed of the bus has been disclosed, it does not solve the characteristic deterioration due to the through hole stub.
- the present invention was devised in view of the above problems, and an object of the present invention is to provide a system and method that enable high-speed signal transmission and stable operation without being restricted by the manufacturing of circuit boards. Is to provide.
- an AC termination circuit including a resistor and a capacitor is connected to a stub open end of a through hole provided in a circuit board.
- a backplane system construction method including a step of connecting an AC termination circuit including a resistor and a capacitor to a stub open end of a through hole provided in the backplane.
- FIG. 1 It is a figure which shows an example (prototype) of a backplane system.
- A) is the figure which looked at the backplane system from the side
- B) is a figure explaining the through hole of a board
- A is a figure which shows the connection form of a connector and a daughter card
- an AC termination circuit (through hole) including a resistor (R) and a capacitor (C) at the open end of the stub (96) of the through hole (92) provided in the circuit board (91 in FIG. 9).
- a stub AC termination circuit 98) is connected.
- the through-hole includes a pair of through-holes (92 in FIG. 9) for transmitting signals differentially, and the pair of through-holes from one surface side of the circuit board (91 in FIG. 9).
- a pair of connector terminals (97 in FIG. 9) are respectively inserted in the through holes (92) of the circuit board, and between the pair of through holes (92) on the surface opposite to the one surface of the circuit board,
- An AC termination circuit (98 in FIG. 9) composed of a series circuit of a resistor and a capacitor is connected.
- the through-hole includes a pair of through-holes that transmit signals differentially, and the first and second through-holes from one surface side of the circuit board to the first and second through-holes, respectively.
- 2 connector terminals are inserted, on the surface opposite to the one surface of the circuit board, between the first through hole and the ground, and between the second through hole and the ground, respectively,
- the AC termination circuit composed of a series circuit of capacitors may be connected.
- the circuit board includes either a backplane or a midplane.
- the circuit board is a backplane, and the first and second connector terminals are connected to the pair of through holes in the backplane (FIG. 9). 97).
- an AC termination circuit (89A and 89B in FIG. 8) including a resistor and a capacitor is connected to a stub open end of a through hole provided in a daughter card attached to the backplane with a backplane connector. It is good also as composition to do.
- the daughter card includes first and second through holes that transmit signals differentially, and connector terminals of a backplane connector are respectively provided from one surface side of the daughter card to the first and second through holes.
- the AC termination circuit (89A, FIG. 8), which is inserted and is formed between the first and second through holes on the surface opposite to the one surface of the daughter card, and includes a series circuit of the resistor and the capacitor. 89B) may be connected.
- the daughter card includes first and second through holes for differentially transmitting a signal, and back to the first and second through holes from one surface side of the daughter card.
- a connector terminal of a plain connector is inserted, respectively, on the surface opposite to the one surface of the daughter card, between the first through hole and the ground, and between the second through hole and the ground, respectively.
- the AC termination circuit (89A and 89B in FIG. 17) composed of a series circuit of the resistor and the capacitor may be connected.
- a first semiconductor chip (22A in FIG. 2A) including an output buffer (81 in FIG. 8) that outputs a signal differentially, and the first semiconductor chip are combined.
- the AC termination circuit includes first and second AC termination circuits (88A and 88B in FIG. 8) each consisting of a series circuit of a resistor and a capacitor, A pair of first and second connector terminals (85A) of the first backplane connector (23A in FIG. 2 and 84A in FIG. 8) transmit signals differentially from one surface side of the backplane.
- the first AC is inserted between the first and second through-holes on the surface opposite to the one surface of the backplane.
- a termination circuit (88A) is connected, and the first and second connector terminals (85B) of the second backplane connector (23B in FIG.
- the second AC termination circuit (88B) may be connected.
- each of the AC termination circuits includes first to fourth AC termination circuits (88A, 88C, 88B, 88D in FIG. 17) each including a series circuit of a resistor and a capacitor.
- the first and second connector terminals (85A) with the backplane connector (23A in FIG. 2 and 84A in FIG. 8) transmit signals differentially from one surface side of the backplane.
- the first AC termination circuit (88A) is inserted between the first through-hole and the ground on the surface opposite to the one surface of the backplane, and is inserted into the second through-hole
- the second AC termination circuit (88C) is connected between the second through hole and the ground, and the first and second connections with the second backplane connector (23B in FIG.
- a connector terminal (85B) is inserted into the third and fourth through holes for transmitting signals differentially from one surface side of the backplane, and is the surface opposite to the one surface of the backplane.
- the third AC termination circuit (88B) is connected between the third through hole and the ground, and the fourth AC termination circuit (88D) is connected to the fourth through hole and the ground. It is good. Exemplary embodiments are described below.
- FIG. 8 is a diagram for explaining the first exemplary embodiment.
- a through hole / stub AC termination circuit is provided in the differential signal through hole to which the backplane connector is connected.
- a differential transmission circuit is used, and the differential output of the output buffer 81 is connected to the connector terminal 83A of the backplane connector 84A and the wiring 82A in the daughter card.
- the connector terminal 83B of the connector terminal 84B of the backplane connector 84B and the differential input of the input buffer 87 are connected by a wiring 82B in the daughter card.
- the connectors 85A and 85B of the backplane connectors 84A and 84B are connected by a wiring 85 on the backplane.
- the characteristic impedance (differential impedance) of the differential wiring is about 100 ⁇ .
- the connector terminal 83A (83B) of the backplane connector 84A (84B) is connected to the through hole of the daughter card by press fitting (press fitting).
- the connector terminal 85A (85B) of the backplane connector 84A (84B) is connected to the through hole of the backplane by press fitting (press fitting).
- stubs are parasitic in the through holes of the backplane.
- a through-hole stub AC termination circuit 88 composed of a resistor R and a capacitor C is connected between the differential signals in the stub portion.
- FIG. 9 is a diagram showing a mounting image of the through-hole stub AC termination circuit.
- the configuration of FIG. 9 is obtained by connecting a through-hole stub AC termination circuit 98 to the stub open end in the configuration of FIG. That is, as shown in FIG. 9, a through-hole stub AC termination circuit 98 is mounted on the surface opposite to the press-fit portion (press-fit portion). Connection of the through-hole stub AC termination circuits 89A and 89B (see FIG. 8) on the daughter card is optional, and should be implemented when the resonance frequency calculated by equation (4) is within the signal operating range. It is.
- substrate reference board
- substrate 21A, 21B of FIG. 2 (A) is generally thin, a through hole is also shallow and the resonance by a stub has no influence in many cases.
- the transmission system of this embodiment shown in FIG. 8 will be described.
- a differential transmission circuit as shown in FIG. 8 is used, and a signal is propagated through a path of output buffer 81 ⁇ backplane connector 84A ⁇ wiring 86 (backplane) ⁇ backplane connector 84B ⁇ input buffer 87.
- the transmission waveform is attenuated due to the attenuation characteristics of the transmission line including wiring, connectors, and through holes.
- the connection portion of the backplane connector has a parasitic stub, and the characteristics are deteriorated as shown in FIG. This is because resonance occurs between the branch point in the through hole and the open end as described with reference to FIG.
- FIG. 9 by connecting a through-hole stub AC termination circuit 98 to the open end of the stub, reflection at the open end of the through-hole is eliminated and deterioration due to resonance is prevented. be able to.
- the characteristics of this through-hole stub AC termination 98 are shown in FIG. Originally, attenuation of -24 dB occurred around 7 GHz (see FIG. 7). According to this embodiment, by connecting the through-hole stub AC termination 98 to the open end of the stub, about -6 dB Can be suppressed. Since the characteristic impedance of the differential transmission line is generally designed to be about 100 ⁇ , it is appropriate that the resistance value of this through-hole stub AC termination is about 100 ⁇ .
- the resistance value of the through hole / stub AC terminal may be reduced in accordance with this.
- the capacitance value of the capacitor at the end of the through-hole stub AC is appropriate to be about several pF (pico-Farad), and has an effect of suppressing a DC loss due to the termination resistance.
- FIG. 11 shows a configuration in which a capacitor is removed and through-hole stub termination is performed only with a resistor.
- FIG. 12 shows the through hole characteristics in the reference example of FIG. Since there is no capacitor at the end of the through-hole stub, attenuation occurs even in the low frequency region, and it is not necessary to mention that there is a possibility of causing problems in transmission at a low frequency.
- the characteristics of transmission lines including wiring, connectors, and through-holes have a curve in which attenuation increases as the frequency increases, as shown in FIGS.
- FIGS. In the state where there is no resonance of the through-hole stub, it has a uniform downward-sloping characteristic as shown in FIG.
- the vertical axis indicates the differential insertion loss Sdd21
- the stub has resonance, it has irregular characteristics as shown in FIG.
- signal propagation on a transmission line having a uniform right-sloping frequency characteristic as shown in FIG. 13 has a small attenuation of a waveform having a large pulse width.
- the attenuation of a small waveform increases.
- FIG. 16 shows an example of the characteristic (insertion loss) of the equalization circuit of the input buffer 87.
- the signal has a Nyquist frequency (Nyquist Frequency) peak (near 5 GHz in FIG. 16) and has an upwardly convex characteristic, the maximum frequency component is raised, and lower frequencies are gradually increased. It has a characteristic to attenuate. Due to the characteristics of the equalization circuit of the input buffer 87, a signal having a large pulse width is intentionally reduced in amplitude, a signal having a small pulse width is amplified, and a low level component and a high frequency component are balanced to obtain a logical level (0 Or, it is shaped into a signal waveform that can be determined in 1).
- Nyquist Frequency Nyquist Frequency
- irregular characteristics for example, the characteristics of FIG. 14 due to stub resonance
- non-uniform waveform propagation such as a small signal having a large pulse width and a large signal having a small pulse width, as shown in FIG.
- Waveform shaping can no longer be performed with an equalization circuit having special characteristics.
- FIG. 17 is a diagram illustrating an example of a through-hole stub AC termination according to another embodiment.
- AC termination is performed between the differential signal lines, but the same effect can be obtained even if each signal is AC terminated with respect to GND (ground).
- AC termination is performed between the differential signal lines by the through-hole / stub AC termination circuit, but in the example shown in FIG. 17, each signal is AC-terminated with respect to GND.
- the first and second connector terminals 85A of the backplane connector 84A are respectively inserted into first and second through holes that transmit signals differentially from one side of the backplane,
- a first AC termination circuit 88A is connected between the first through-hole (through-hole stub open end) and the ground on the surface opposite to the one surface, and the second through-hole (through-hole
- the second AC termination circuit 88C is connected between the stub open end) and the ground, and the first and second connector terminals 85B of the backplane connector 84B can differentially transmit signals from one surface side of the backplane.
- Each of the third through hole and the fourth through hole to be transmitted is inserted into the third through hole (through hole.
- the third AC termination circuit 88B between tabs open end) and the ground are connected, the fourth AC termination circuit 88D is connected to the ground the fourth through-hole (through-hole stubs open end).
- the daughter card may also be configured to include AC termination circuits 89A to 89D between the stub open end of the through hole for transmitting signals differentially and GND. Even with such a configuration, the same effects as those of the first exemplary embodiment described above can be obtained.
- the backplane system has been described as an example of the differential transmission system.
- the present invention can be similarly applied to a differential transmission system including a midplane.
- the above embodiments can be applied to communication devices such as routers, switches, and exchanges, information processing devices such as servers and storages, and electronic circuit board designs.
- a transmission system comprising an AC termination circuit including a resistor and a capacitor connected to an open end of a stub provided in a circuit board.
- the through holes include first and second through holes that transmit signals differentially; First and second connector terminals are inserted into the first and second through holes from one surface side of the circuit board, The AC termination circuit including a series circuit of the resistor and the capacitor is connected between the first and second through holes on a surface opposite to the one surface of the circuit board.
- the transmission system according to appendix 1.
- the through hole includes first and second through holes for transmitting signals differentially; First and second connector terminals are inserted into the first and second through holes from one surface side of the circuit board, The AC comprising a series circuit of a resistor and a capacitor on the surface opposite to the one surface of the circuit board, between the first through hole and the ground, and between the second through hole and the ground, respectively.
- Appendix 4 The transmission system according to appendix 1, wherein the circuit board is either a backplane or a midplane.
- the circuit board is a backplane;
- the transmission system according to claim 2 or 3 wherein the first and second connector terminals are connector terminals of a backplane connector connected to the first and second through holes of the backplane. .
- the daughter card has first and second through holes for differentially transmitting signals, and connector terminals of a backplane connector are inserted into the first and second through holes from one side of the daughter card, respectively.
- the AC termination circuit comprising the series circuit of the resistor and the capacitor is connected between the first and second through holes of the daughter card on the surface opposite to the one surface of the daughter card.
- the daughter card has first and second through holes for differentially transmitting signals, and connector terminals of a backplane connector are inserted into the first and second through holes from one side of the daughter card, respectively. And on the surface opposite to the one surface of the daughter card, between the first through hole and the ground of the daughter card, and between the second through hole and the ground of the daughter card, respectively.
- the AC termination circuit includes first and second AC termination circuits each consisting of a series circuit of a resistor and a capacitor, The first and second connector terminals of the first backplane connector are respectively inserted into first and second through holes that transmit signals differentially from one surface side of the backplane, The first AC termination circuit is connected between the first and second through-holes on a surface opposite to the one surface of the backplane; The first and second connector terminals of the second backplane connector are respectively inserted into third and fourth through holes that transmit signals differentially from one surface side of
- the AC termination circuit includes first to fourth AC termination circuits each consisting of a series circuit of a resistor and a capacitor, The first and second connector terminals of the first backplane connector are respectively inserted into first and second through holes that transmit signals differentially from one surface side of the backplane, The first AC termination circuit is connected between the first through-hole and the ground on the surface opposite to the one surface of the backplane, and the second AC is connected between the second through-hole and the ground.
- the first and second connector terminals of the second backplane connector are respectively inserted into third and fourth through holes that transmit signals differentially from one surface side of the backplane,
- the third AC termination circuit is connected between the third through hole and the ground on the surface opposite to the one surface of the backplane, and the fourth AC is connected to the fourth through hole and the ground.
- An AC termination circuit including a resistor and a capacitor is connected to a stub open end of a through hole provided in the backplane.
- the through hole includes first and second through holes for transmitting signals differentially; First and second connector terminals of a backplane connector are inserted into the first and second through holes from one surface side of the backplane, respectively.
- the AC termination circuit comprising a series circuit of the resistor and the capacitor is connected between the first and second through holes on a surface opposite to the one surface of the backplane.
- the through hole includes first and second through holes for transmitting signals differentially;
- the first and second connector terminals of the backplane connector are inserted into the first and second through holes from one surface side of the circuit board, respectively.
- the AC comprising a series circuit of a resistor and a capacitor on the surface opposite to the one surface of the backplane, between the first through hole and the ground, and between the second through hole and the ground, respectively.
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Abstract
Description
本発明は、日本国特許出願:特願2011-073983号(2011年 3月30日出願)の優先権主張に基づくものであり、同出願の全記載内容は引用をもって本書に組み込み記載されているものとする。
本発明は、信号伝送技術に関し、特に、バックプレーンシステム構築方法および伝送システムに関する。
=C0/√(εr) ・・・(2)
C0=1/√(ε0×μ0) ・・・(3)
ε0は真空の誘電率、μ0は真空の透磁率である。
上記した関連技術においては、回路基板製造上の制約等を受けずに、例えば10Gbps超のバックプレーン伝送を扱えるようにした技術は開示されていない。
図8は、第1の例示的な実施形態を説明するための図である。図8を、前述した図5と対比すると、図8の本実施形態では、バックプレーンコネクタが接続する差動の信号スルーホールに、スルーホール・スタブAC終端回路を備えている。高速バックプレーン伝送では、差動伝送回路が用いられ、出力バッファ81の差動出力はバックプレーンコネクタ84Aのコネクタ端子83Aと、ドーターカード内で配線82Aにより接続される。バックプレーンコネクタ84Bのコネクタ端子84Bのコネクタ端子83Bと入力バッファ87の差動入力は、ドーターカード内で配線82Bにより接続される。バックプレーンコネクタ84A、84Bのコネクタ85A、85B同士は、バックプレーンの配線85で接続される。一般に差動配線の特性インピーダンス(差動インピーダンス)は100Ω程度である。バックプレーンコネクタ84A(84B)のコネクタ端子83A(83B)は、ドーターカードのスルーホールにプレスフィット(圧入)で接続される。バックプレーンコネクタ84A(84B)のコネクタ端子85A(85B)は、バックプレーンのスルーホールにプレスフィット(圧入)で接続される。
図17は、別の実施形態のスルーホール・スタブAC終端の1例を示す図である。図8では、差動信号線間に、AC終端を施すが、それぞれの信号をGND(グランド)に対してAC終端しても同様の効果を得ることができる。
回路基板に設けられたスルーホールのスタブ開放端に、抵抗とコンデンサを含むAC終端回路を接続してなる、ことを特徴とする伝送システム。
前記スルーホールが、信号を差動で伝送する第1及び第2のスルーホールを含み、
前記回路基板の一の面側から前記第1及び第2のスルーホールにそれぞれ第1及び第2のコネクタ端子が挿入され、
前記回路基板の前記一の面とは反対側の面で前記第1及び第2のスルーホール間に、前記抵抗と前記コンデンサの直列回路からなる前記AC終端回路が接続されている、ことを特徴とする付記1記載の伝送システム。
前記スルーホールが、信号を差動で伝送する第1及び第2のスルーホールを備え、
前記回路基板の一の面側から前記第1及び第2のスルーホールにそれぞれ第1及び第2のコネクタ端子が挿入され、
前記回路基板の前記一の面と反対側の面で、前記第1のスルーホールとグランド間、及び、前記第2のスルーホールとグランド間に、それぞれ、抵抗とコンデンサの直列回路からなる前記AC終端回路が接続されている、ことを特徴とする付記1記載の伝送システム。
前記回路基板が、バックプレーン又はミッドプレーンのいずれかである、付記1記載の伝送システム。
前記回路基板がバックプレーンであり、
前記第1及び第2のコネクタ端子が、前記バックプレーンの前記第1及び第2のスルーホールに接続されるバックプレーンコネクタのコネクタ端子である、ことを特徴とする付記2又は3記載の伝送システム。
前記バックプレーンにバックプレーンコネクタで装着されるドータカードに設けられたスルーホールのスタブ開放端に、抵抗とコンデンサを含むAC終端回路を接続してなる、ことを特徴とする付記5記載の伝送システム。
前記ドータカードが信号を差動で伝送する第1及び第2のスルーホールを備え、前記ドータカードの一の面側から前記第1及び第2のスルーホールにバックプレーンコネクタのコネクタ端子がそれぞれ挿入され、前記ドータカードの前記一の面と反対側の面で、前記ドータカードの前記第1及び第2のスルーホール間に、前記抵抗と前記コンデンサの直列回路からなる前記AC終端回路が接続されている、ことを特徴とする付記6記載の伝送システム。
前記ドータカードが信号を差動で伝送する第1及び第2のスルーホールを備え、前記ドータカードの一の面側から前記第1及び第2のスルーホールにバックプレーンコネクタのコネクタ端子がそれぞれ挿入され、前記ドータカードの前記一の面と反対側の面で、前記ドータカードの前記第1のスルーホールとグランド間、及び、前記ドータカードの前記第2のスルーホールとグランド間に、それぞれ、前記抵抗と前記コンデンサの直列回路からなる前記AC終端回路が接続されている、ことを特徴とする付記6記載の伝送システム。
差動で信号を出力する出力バッファを備えた第1の半導体チップと、
前記第1の半導体チップを搭載した接続する第1のドータカードと、
前記第1のドータカードを前記バックプレーンに装着する第1のバックプレーンコネクタと、
差動で信号を入力する入力バッファを備えた第2の半導体チップと、
前記第2の半導体チップを搭載した接続する第2のドータカードと、
前記第2のドータカードを前記バックプレーンに装着する第2のバックプレーンコネクタと、
前記回路基板を含むバックプレーンと、
を備え、
前記AC終端回路が、各々が、抵抗とコンデンサの直列回路からなる第1及び第2のAC終端回路を含み、
前記第1のバックプレーンコネクタの第1及び第2のコネクタ端子が、前記バックプレーンの一の面側から、信号を差動で伝送する第1及び第2のスルーホールにそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第1及び第2のスルーホール間に、前記第1のAC終端回路が接続されており、
前記第2のバックプレーンコネクタの第1及び第2のコネクタ端子が、前記バックプレーンの一の面側から、信号を差動で伝送する第3及び第4のスルーホールにそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第3及び第4のスルーホール間に、前記第2のAC終端回路が接続されている、付記1記載の伝送システム。
差動で信号を出力する出力バッファを備えた第1の半導体チップと、
前記第1の半導体チップを搭載した接続する第1のドータカードと、
前記第1のドータカードを前記バックプレーンに装着する第1のバックプレーンコネクタと、
差動で信号を入力する入力バッファを備えた第2の半導体チップと、
前記第2の半導体チップを搭載した接続する第2のドータカードと、
前記第2のドータカードを前記バックプレーンに装着する第2のバックプレーンコネクタと、
前記回路基板を含むバックプレーンと、
を備え、
前記AC終端回路が、各々が、抵抗とコンデンサの直列回路からなる第1乃至第4のAC終端回路を含み、
前記第1のバックプレーンコネクタの第1及び第2のコネクタ端子が、前記バックプレーンの一の面側から、信号を差動で伝送する第1及び第2のスルーホールにそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第1のスルーホールとグランド間に前記第1のAC終端回路が接続され、前記第2のスルーホールとグランド間に、前記第2のAC終端回路が接続され、
前記第2のバックプレーンコネクタの第1及び第2のコネクタ端子が、前記バックプレーンの一の面側から、信号を差動で伝送する第3及び第4のスルーホールにそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第3のスルーホールとグランド間に前記第3のAC終端回路が接続され、前記第4のスルーホールとグランドに前記第4のAC終端回路が接続されている、付記1記載の伝送システム。
バックプレーンに設けられたスルーホールのスタブ開放端に、抵抗とコンデンサを含むAC終端回路を接続する、ことを特徴とするバックプレーンシステム構築方法。
前記スルーホールが、信号を差動で伝送する第1及び第2のスルーホールを備え、
前記バックプレーンの一の面側から前記第1及び第2のスルーホールにバックプレーンコネクタの第1及び第2のコネクタ端子がそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第1及び第2のスルーホール間に、前記抵抗と前記コンデンサの直列回路からなる前記AC終端回路を接続する、ことを特徴とする付記11記載のバックプレーンシステム構築方法。
前記スルーホールが、信号を差動で伝送する第1及び第2のスルーホールを備え、
回路基板の一の面側から前記第1及び第2のスルーホールにバックプレーンコネクタの第1及び第2のコネクタ端子がそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第1のスルーホールとグランド間、及び、前記第2のスルーホールとグランド間に、それぞれ、抵抗とコンデンサの直列回路からなる前記AC終端回路を接続する、ことを特徴とする付記11記載のバックプレーンシステム構築方法。
12 スイッチカード
13 コネクタ
14 バックプレーン
21A、21B 基板
22A、22B IC
23A、23B コネクタ
24 バックプレーン
31 基板
33 コネクタ
34 スルーホール
35 端子
41 基板
42 電源層又はGND層
43 誘電体
44 信号層
45 端子
46 スルーホール
51、81 出力バッファ
52A、52B、82A、82B 配線(ドーターカード)
53A、53B、83A、83B コネクタ端子
54A、54B、84A、84B バックプレーンコネクタ
55A、55B、85A、85B コネクタ端子
56、86 配線(バックプレーン)
57、87 入力バッファ
61、91 基板
62、92 スルーホール(信号スルーホール)
63、93 スルーホール(GNDスルーホール)
64、94 GND層
65、95 信号配線
66、96 スルーホール・スタブ
67、97 バックプレーンコネクタ端子
88A、88B、88C、88D スルーホール・スタブAC終端回路
89A、89B、89C、89D スルーホール・スタブAC終端回路
98 スルーホール・スタブAC終端回路
Claims (10)
- 回路基板に設けられたスルーホールのスタブ開放端に、抵抗とコンデンサを含むAC終端回路を接続してなる、ことを特徴とする伝送システム。
- 前記スルーホールが、信号を差動で伝送する第1及び第2のスルーホールを含み、
前記回路基板の一の面側から前記第1及び第2のスルーホールにそれぞれ第1及び第2のコネクタ端子が挿入され、
前記回路基板の前記一の面とは反対側の面で前記第1及び第2のスルーホール間に、前記抵抗と前記コンデンサの直列回路からなる第1の前記AC終端回路が接続されている、ことを特徴とする請求項1記載の伝送システム。 - 前記スルーホールが、信号を差動で伝送する第1及び第2のスルーホールを備え、
前記回路基板の一の面側から前記第1及び第2のスルーホールにそれぞれ第1及び第2のコネクタ端子が挿入され、
前記回路基板の前記一の面と反対側の面で、前記第1のスルーホールとグランド間、及び、前記第2のスルーホールとグランド間に、各々が抵抗とコンデンサの直列回路からなる第1、第2の前記AC終端回路がそれぞれ接続されている、ことを特徴とする請求項1記載の伝送システム。 - 前記回路基板がバックプレーンであり、
前記第1及び第2のコネクタ端子が、前記バックプレーンの前記第1及び第2のスルーホールに接続されるバックプレーンコネクタのコネクタ端子である、ことを特徴とする請求項2又は3記載の伝送システム。 - 前記バックプレーンにバックプレーンコネクタで装着されるドータカードに設けられたスルーホールのスタブ開放端に、抵抗とコンデンサを含む第3のAC終端回路を接続してなる、ことを特徴とする請求項4記載の伝送システム。
- 前記ドータカードが信号を差動で伝送する第1及び第2のスルーホールを備え、前記ドータカードの一の面側から前記第1及び第2のスルーホールにバックプレーンコネクタのコネクタ端子がそれぞれ挿入され、前記ドータカードの前記一の面と反対側の面で、前記ドータカードの前記第1及び第2のスルーホール間に、前記抵抗と前記コンデンサの直列回路からなる前記第3のAC終端回路が接続されている、ことを特徴とする請求項5記載の伝送システム。
- 前記ドータカードが信号を差動で伝送する第1及び第2のスルーホールを備え、前記ドータカードの一の面側から前記第1及び第2のスルーホールにバックプレーンコネクタのコネクタ端子がそれぞれ挿入され、前記ドータカードの前記一の面と反対側の面で、前記ドータカードの前記第1のスルーホールとグランド間、及び、前記ドータカードの前記第2のスルーホールとグランド間に、各々が抵抗とコンデンサの直列回路からなる第3、第4のAC終端回路が接続されている、ことを特徴とする請求項5記載の伝送システム。
- 差動で信号を出力する出力バッファを備えた第1の半導体チップと、
前記第1の半導体チップを搭載した接続する第1のドータカードと、
前記第1のドータカードを前記バックプレーンに装着する第1のバックプレーンコネクタと、
差動で信号を入力する入力バッファを備えた第2の半導体チップと、
前記第2の半導体チップを搭載した接続する第2のドータカードと、
前記第2のドータカードを前記バックプレーンに装着する第2のバックプレーンコネクタと、
前記回路基板を含むバックプレーンと、
を備え、
前記AC終端回路が、各々が、抵抗とコンデンサの直列回路からなる第1及び第2のAC終端回路を含み、
前記第1のバックプレーンコネクタの第1及び第2のコネクタ端子が、前記バックプレーンの一の面側から、信号を差動で伝送する第1及び第2のスルーホールにそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第1及び第2のスルーホール間に、前記第1のAC終端回路が接続されており、
前記第2のバックプレーンコネクタの第1及び第2のコネクタ端子が、前記バックプレーンの一の面側から、信号を差動で伝送する第3及び第4のスルーホールにそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第3及び第4のスルーホール間に、前記第2のAC終端回路が接続されている、請求項1記載の伝送システム。 - 差動で信号を出力する出力バッファを備えた第1の半導体チップと、
前記第1の半導体チップを搭載した接続する第1のドータカードと、
前記第1のドータカードを前記バックプレーンに装着する第1のバックプレーンコネクタと、
差動で信号を入力する入力バッファを備えた第2の半導体チップと、
前記第2の半導体チップを搭載した接続する第2のドータカードと、
前記第2のドータカードを前記バックプレーンに装着する第2のバックプレーンコネクタと、
前記回路基板を含むバックプレーンと、
を備え、
前記AC終端回路が、各々が、抵抗とコンデンサの直列回路からなる第1乃至第4のAC終端回路を含み、
前記第1のバックプレーンコネクタの第1及び第2のコネクタ端子が、前記バックプレーンの一の面側から、信号を差動で伝送する第1及び第2のスルーホールにそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第1のスルーホールとグランド間に前記第1のAC終端回路が接続され、前記第2のスルーホールとグランド間に、前記第2のAC終端回路が接続され、
前記第2のバックプレーンコネクタの第1及び第2のコネクタ端子が、前記バックプレーンの一の面側から、信号を差動で伝送する第3及び第4のスルーホールにそれぞれ挿入され、
前記バックプレーンの前記一の面と反対側の面で、前記第3のスルーホールとグランド間に前記第3のAC終端回路が接続され、前記第4のスルーホールとグランドに前記第4のAC終端回路が接続されている、請求項1記載の伝送システム。 - バックプレーンに設けられたスルーホールのスタブ開放端に、抵抗とコンデンサを含むAC終端回路を接続する、ことを特徴とするバックプレーンシステム構築方法。
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2018056200A1 (ja) * | 2016-09-21 | 2019-07-11 | 日本電気株式会社 | 接続構造及び回路 |
JP7446209B2 (ja) | 2020-12-03 | 2024-03-08 | 株式会社日立製作所 | 信号伝送装置 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140273556A1 (en) * | 2013-03-15 | 2014-09-18 | Silicon Graphics International Corp. | High-density multidirectional midplane |
US9297971B2 (en) * | 2013-04-26 | 2016-03-29 | Oracle International Corporation | Hybrid-integrated photonic chip package with an interposer |
US20160034412A1 (en) * | 2014-08-03 | 2016-02-04 | Michael Feldman | Pci express cluster |
CN106704993A (zh) * | 2017-01-09 | 2017-05-24 | 宁波亚茂光电股份有限公司 | 一种插卡式电源与光源板的连接结构 |
JP6707486B2 (ja) * | 2017-03-23 | 2020-06-10 | キオクシア株式会社 | 半導体デバイス及び電子機器 |
CN109388195A (zh) * | 2017-08-03 | 2019-02-26 | 华硕电脑股份有限公司 | 电脑系统及其主板 |
CN109309484B (zh) * | 2018-10-23 | 2022-04-01 | 杭州电子科技大学 | 针对差分硅通孔传输通道的无源均衡器及其设计方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007317716A (ja) * | 2006-05-23 | 2007-12-06 | Ricoh Co Ltd | プリント配線板 |
JP2009188272A (ja) * | 2008-02-07 | 2009-08-20 | Jtekt Corp | 多層回路基板 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB8924282D0 (en) * | 1989-10-27 | 1989-12-13 | Bicc Plc | An improved circuit board |
US6118350A (en) | 1998-11-10 | 2000-09-12 | Gennum Corporation | Bus through termination circuit |
CN1989503B (zh) | 2003-03-06 | 2010-08-04 | 新美亚通讯设备有限公司 | 优化过孔结构的高频性能的方法 |
JP4834385B2 (ja) | 2005-11-22 | 2011-12-14 | 株式会社日立製作所 | プリント基板および電子装置 |
US8158892B2 (en) | 2007-08-13 | 2012-04-17 | Force10 Networks, Inc. | High-speed router with backplane using muli-diameter drilled thru-holes and vias |
WO2010056312A2 (en) * | 2008-11-14 | 2010-05-20 | Amphenol Corporation | Filtered power connector |
-
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007317716A (ja) * | 2006-05-23 | 2007-12-06 | Ricoh Co Ltd | プリント配線板 |
JP2009188272A (ja) * | 2008-02-07 | 2009-08-20 | Jtekt Corp | 多層回路基板 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2018056200A1 (ja) * | 2016-09-21 | 2019-07-11 | 日本電気株式会社 | 接続構造及び回路 |
US10896872B2 (en) | 2016-09-21 | 2021-01-19 | Nec Corporation | Connecting structure and circuit |
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