WO2012068748A1 - 液晶显示面板及其制造方法 - Google Patents

液晶显示面板及其制造方法 Download PDF

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Publication number
WO2012068748A1
WO2012068748A1 PCT/CN2010/079552 CN2010079552W WO2012068748A1 WO 2012068748 A1 WO2012068748 A1 WO 2012068748A1 CN 2010079552 W CN2010079552 W CN 2010079552W WO 2012068748 A1 WO2012068748 A1 WO 2012068748A1
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WIPO (PCT)
Prior art keywords
layer
conductive layer
transparent conductive
liquid crystal
crystal display
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PCT/CN2010/079552
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English (en)
French (fr)
Inventor
陈政鸿
贺成明
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深圳市华星光电技术有限公司
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Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US13/000,920 priority Critical patent/US20120147307A1/en
Publication of WO2012068748A1 publication Critical patent/WO2012068748A1/zh
Priority to US14/473,290 priority patent/US20140370632A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask

Definitions

  • the present invention relates to the field of liquid crystal display panels, and more particularly to a thin film transistor in which a transparent conductive layer is directly used as a source/drain and electrically connected to a data line, a liquid crystal display panel having the same, and a method of manufacturing the liquid crystal display panel.
  • LCD monitors have become widely used in a wide range of electronic devices such as mobile phones, personal digital assistants (PDAs), digital cameras, computer screens or notebook computer screens. Rate display with color screen.
  • a liquid crystal display panel of a conventional liquid crystal display includes a plurality of pixels, and each pixel includes three pixel units respectively representing three primary colors of red, green and blue (RGB).
  • RGB red, green and blue
  • FIG. 1 is a schematic diagram of a pixel unit 10 of a general liquid crystal display panel. As shown in FIG. 1, when a scan signal output from a gate driver (not shown) passes through the scan line 11, the thin film transistors 13 of the pixel cells of each column are sequentially turned on, and the source driver (not shown) passes through the data lines. 12 outputs the corresponding data signal to an entire column of pixel cells to charge them to their respective required voltages to display different gray levels.
  • the gate driver outputs a scan signal in a row and a column to turn on the thin film transistor 13 of each column of the pixel unit, and then the source driver charges and discharges the pixel unit turned on in each column. This is continued until all the pixel units 10 are fully charged, and charging starts from the first column.
  • FIG. 2 shows a cross-sectional view of points A to B to C in FIG.
  • the gate 131 of the thin film transistor 13 is formed of a first metal layer, and the source 132 and the drain 133 are formed by a second metal layer.
  • the lower plate 141 of the storage capacitor Cst is also formed by the first metal layer.
  • the transparent conductive layer 15 between the thin film transistor 13 and the storage capacitor Cst is a pixel region.
  • FIG. 3 to FIG. 7 are process flow diagrams required to complete the structure shown in FIG. 2 , wherein each figure represents a mask process, that is, completes FIG. 2 .
  • the structure shown must go through five mask processes.
  • a first metal layer (not shown) is deposited on the glass substrate 101 and a development process is performed using the first mask.
  • the developing process is to apply a photoresist (not shown) on the first metal layer, expose the photoresist by using a first mask having a specific pattern, and then wash the exposed photoresist with a developer. .
  • the first metal layer is then etched. The etching process is to remove the first metal layer without photoresist and remove the strong metal, and the first metal layer covered by the photoresist (substantially in this specific pattern) produces the lower plate 141 as the gate 131 of the thin film transistor 13 and the storage capacitor Cst shown in FIG. 3, and then the remaining photoresist is washed away.
  • the isolation layer will be deposited first.
  • Layer)16 depositing an active layer 17, and finally depositing an ohmic contact layer (n+
  • the layer 18 is then subjected to a development process using a second mask, and an etching process is performed on the active layer 17 and the ohmic contact layer 18.
  • a second metal layer (not shown) is first deposited, and then a third mask is used for the development process, and the second metal layer and the ohmic contact layer 18 are applied.
  • An etching process is performed to generate the drain 132 and the source 133 of the thin film transistor and the data line 12.
  • the passivation layer is first deposited. Layer 19, and then using a fourth mask for the development process, and etching the passivation layer 19 to create a via 20 over the source 133.
  • the transparent conductive layer 15 is first deposited, then the fifth mask is used for the development process, and the transparent conductive layer 15 is etched to produce the structure shown in FIG. At this point, the basic structure of the entire liquid crystal display panel 10 has been completed.
  • the aperture ratio of the pixel region is still increased to improve the transmittance of the entire panel.
  • An object of the present invention is to provide a method for manufacturing a liquid crystal display panel, a liquid crystal display panel, and a thin film transistor, which solve the problem of improving the aperture ratio of the liquid crystal display panel and improving the light transmittance of the liquid crystal display panel.
  • a method of fabricating a liquid crystal display panel includes:
  • the active layer serves as a transmission channel of the switching unit; the first passivation layer and the isolation layer over the data line are etched to form a contact window over the data line; and a transparent conductive layer is deposited on the isolation layer, the data line, and the active layer;
  • the transparent conductive layer is etched to divide the transparent conductive layer into a first conductive layer and a second conductive layer, wherein the data line is electrically connected to the active layer through the first conductive layer on the contact window, and the active layer is electrically connected to the second conductive
  • a liquid crystal display panel Contains: a glass base
  • a first metal layer on the glass substrate for use as a data line; a first passivation layer on the glass substrate and the first metal layer; and a second metal layer on the first passivation layer a control electrode as a switching unit; an isolation layer on the first passivation layer and the second metal layer; an active layer on the isolation layer for use as a transmission channel of the switching unit; and a contact window to form Above the data line; and a transparent conductive layer on the isolation layer and the contact window, the transparent conductive layer comprises a first conductive layer and a second conductive layer, the first conductive layer is used for electrically connecting the data lines, and the second conductive layer
  • the layer is used as a pixel electrode, wherein when the control electrode receives a scan voltage, the data voltage transmitted from the data line is transmitted to the second conductive layer through the first conductive layer and the active layer.
  • the present invention discloses a thin film transistor formed on a glass substrate
  • the thin film transistor comprises: a first passivation layer on the glass substrate; a metal layer on the first passivation layer and the substrate as a gate of the thin film transistor; an isolation layer on the metal layer; a layer, located on the isolation layer, serves as a transmission channel of the thin film transistor; and a transparent conductive layer, the transparent conductive layer is divided into a first conductive layer and a second conductive layer by a through hole, and the first conductive layer functions as a thin film transistor a first electrode for transmitting an electrical signal output from the first electrode or input to the first electrode, and a second conductive layer serving as a second electrode of the thin film transistor for transmitting electricity output from the second electrode or input to the second electrode signal.
  • the invention also discloses a method of manufacturing a liquid crystal display panel. package
  • the method comprises: providing a glass substrate; etching a first metal layer formed on the glass substrate to form a control electrode of a switching unit; sequentially depositing a first passivation layer and a second metal layer on the glass substrate and the first metal a second metal layer is etched to form a data line; an isolation layer and an active layer are sequentially deposited on the first passivation layer and the second metal layer; and the active layer is etched to retain the active layer above the control electrode,
  • the active layer serves as a transmission channel of the switching unit; the first passivation layer and the isolation layer above the data line are etched to form a contact window above the data line; and a transparent conductive layer is deposited on the isolation layer, the data line and the active layer; And etching the transparent conductive layer to divide the transparent conductive layer into the first conductive layer and the second conductive layer, wherein the data line is electrically connected to the active layer through the first conductive layer on the contact window, and the active layer is electrically connected to the second conductive layer .
  • the invention also discloses a liquid crystal display panel. Contains: a glass
  • a first metal layer on the glass substrate for use as a control electrode of a switching unit; a first passivation layer on the glass substrate and the first metal layer; and a second metal layer on the first blunt layer Above the layer, as a data line; an isolation layer on the first passivation layer and the second metal layer; an active layer on the isolation layer, used as a transmission channel of the switching unit; Above the data line; and a transparent conductive layer on the isolation layer and the contact window, the transparent conductive layer comprises a first conductive layer and a second conductive layer, the first conductive layer is used for electrically connecting the data lines, and the second conductive layer
  • the layer is used as a pixel electrode, wherein when the control electrode receives a scan voltage, the data voltage transmitted from the data line is transmitted to the second conductive layer through the first conductive layer and the active layer.
  • the invention also discloses a thin film transistor formed on a glass substrate.
  • the thin film transistor comprises: a metal layer on the glass substrate as a gate of the thin film transistor; a first passivation layer on the metal layer and the glass substrate; an isolation layer on the metal layer; and an active layer; Located on the isolation layer, used as a transmission channel of the thin film transistor; and a transparent conductive layer, the transparent conductive layer is divided into a first conductive layer and a second conductive layer by a through hole, and the first conductive layer is the first of the thin film transistors An electrode for transmitting an electrical signal output from the first electrode or input to the first electrode, and a second conductive layer serving as a second electrode of the thin film transistor for transmitting an electrical signal output from the second electrode or input to the second electrode.
  • the liquid crystal display panel of the present invention and the related manufacturing method thereof can still produce a liquid crystal display panel with a new thin film transistor structure by using a five mask process.
  • the liquid crystal display panel directly forms a transparent conductive layer to form a first electrode and a second electrode of the thin film transistor, and the transparent conductive layer also serves as a connection line between the thin film transistor and the data line and between the thin film transistor and the liquid crystal capacitor. Therefore, the contact of the thin film transistor without providing a contact window to provide a contact point can be connected to the data line through the transparent conductive layer, so that the pixel area can be further enlarged, thereby increasing the aperture ratio of the liquid crystal panel and causing the light source to emit The light can be projected more efficiently.
  • FIG. 1 is a schematic view of a prior art liquid crystal display panel.
  • Figure 2 is a cross-sectional view of the line A-B-C shown in Figure 1.
  • FIG 8 to 16 are schematic diagrams showing the process of the liquid crystal display panel of the present invention.
  • Figure 17 is a cross-sectional view showing a liquid crystal display panel of a first embodiment of the present invention.
  • 18 to 26 are schematic views showing the process of a liquid crystal display panel according to a second embodiment of the present invention.
  • Figure 27 is a cross-sectional view showing a liquid crystal display panel of a second embodiment of the present invention.
  • FIG. 8 to FIG. 16 are schematic diagrams showing the process of the liquid crystal display panel according to the first embodiment of the present invention.
  • a first metal layer (not shown) is deposited on the glass substrate 201.
  • the developing process is to apply a photoresist (not shown) on the first metal layer, expose the photoresist by using a first mask having a specific pattern, and then wash the exposed photoresist with a developer. .
  • the first metal layer is then etched.
  • the etching process is to remove the first metal layer without photoresist and remove the strong metal, and the first metal layer covered by the photoresist
  • the data line 22 is generated (substantially in this particular pattern) and the remaining photoresist is then washed away.
  • a first passivation layer is deposited on the glass substrate 201 and the first metal layer (passivation).
  • a second metal layer (not shown) is deposited on the first passivation layer 24.
  • a second mask is then used to perform the development process, and the second metal layer is etched to produce the control electrode 261.
  • an isolation layer is deposited on the control electrode 261 and the first passivation layer 24.
  • Layer 28 followed by sequentially depositing an active layer and an ohmic contact layer on the isolation layer 28 (n+ Layer).
  • a third mask is used to perform the developing process, and the active layer and the ohmic contact layer are etched to retain the active layer 30 and the ohmic contact layer 32 corresponding to the upper surface of the control electrode 261.
  • a fourth mask is used to perform a development process to etch the isolation layer 28 and the first passivation layer 24 up to the data line 22 to create a via. 34.
  • a transparent conductive layer 36 is deposited first, and then a photoresist 38 is applied over the transparent conductive layer 36.
  • the photoresist 38 is exposed by the fifth mask 40, and the photoresist 38 masked by the mask 40 changes the solubility of the developer after the light is irradiated. Therefore, the exposed photoresist 38 can be washed away with a developer.
  • the transparent conductive layer 36 and the ohmic contact layer 32 are etched by using the photoresist 38 after the unexposure development to form a through hole 42 formed in the control electrode.
  • the ohmic contact layer 32 on both sides of the via 42 forms a first ohmic contact layer 321 and a second ohmic contact layer 322, respectively.
  • a second passivation layer 44 is deposited over the photoresist 38 and within the vias 42 before the photoresist 38 has been removed.
  • the photoresist 38 and the second passivation layer 44 over the photoresist 38 are removed together by a lift-off method. Since the second passivation layer 44 in the via hole 42 is not attached to the photoresist 38 and is not peeled off, the active layer 30 in the through hole 42 and the corresponding portion of the through hole 42 may be attached. Two passivation layers 44.
  • FIG. 17 is a structural diagram of the liquid crystal display panel 50 of the present invention.
  • the liquid crystal display panel 50 includes a glass substrate 201 and a glass substrate 202. After the data line 22 and the switch unit 52 are disposed on the glass substrate 201, the liquid crystal layer 250 is first implanted and covered with a black matrix layer (black). Matrix) 242 and color filters (color The glass substrate 202 of the filter 244. Another transparent electrode layer 240 overlies the black matrix layer 242 and the color filter 244. Transparent electrode layer 240 as a common voltage (common Voltage) The electrode layer is applied with a common voltage.
  • the through hole 42 divides the transparent conductive layer 36 into a first conductive layer 36a and a second conductive layer 36b.
  • the switching unit 52 is equivalently operable as a thin film transistor for controlling whether the data signal is input to the data line 22, that is, the control electrode 261 of the switching unit 52 can serve as the gate of the thin film transistor, and the first conductive layer 36a and the second conductive layer
  • the layer 36b is substantially the first electrode and the second electrode of the switching unit 52, respectively, and can also serve as the source (or drain) and the drain (or source) of the thin film transistor, and the active layer 30 acts as a switch.
  • the first conductive layer 36a can be used as a first electrode to output or input an electrical signal.
  • the second conductive layer 36b can be used as a second electrode to input or output an electrical signal.
  • the purpose of the second purification layer 44 attached to the via hole 42 is to isolate the active layer 30 and the ohmic contact layer 32 as transmission channels from direct contact with the liquid crystal layer 250 to affect the rotation of the liquid crystal molecules.
  • the second conductive layer 36b serves not only as the second electrode of the thin film transistor 52, but also as a pixel electrode.
  • the liquid crystal capacitor 56 is substantially constituted by the overlap of the pixel electrode and the transparent conductive layer 240.
  • the thin film transistor 52 of the present embodiment is formed on a glass substrate 201, and includes a first passivation layer 24 on the glass substrate 201, a gate 261 on the first passivation layer 24, and a gate.
  • the ohmic contact layer 32 forms a first ohmic contact layer 321 and a second ohmic contact layer 322 on both sides of the via hole 42, respectively.
  • the transparent conductive layer 36 forms a first conductive layer 36a and a second conductive layer 36b on both sides of the via hole 42, respectively.
  • the first conductive layer 36a is connected to the first ohmic contact layer 321 as a first electrode for outputting or inputting an electrical signal; the second conductive layer 36b is connected to the second ohmic contact layer 322 as a second electrode for outputting or inputting an electrical signal.
  • the first ohmic contact layer 321 and the second ohmic contact layer 322 included in the ohmic contact layer 32 are used to lower the resistance value of the thin film transistor 52.
  • the ohmic contact layer 32 may not need to be disposed, and thus the liquid crystal display panel 50 and the thin film transistor 52 may also be formed without the first ohmic contact layer 321 and the second ohmic contact layer 322.
  • FIG. 18 to FIG. 26 are schematic diagrams showing the manufacturing process of a liquid crystal display panel according to a second embodiment of the present invention.
  • a first metal layer (not shown) is first deposited on the glass substrate 601, and then a developing process is performed with the first mask, and an etching process is performed on the first metal layer to A control electrode 661 of the switching unit is generated.
  • a first passivation layer 64 is deposited on the glass substrate 601 and the first metal layer, and then a second metal layer is deposited on the first passivation layer 64 ( Not shown).
  • the second mask is then used to perform the development process, and the second metal layer is etched to produce the data lines 62.
  • an isolation layer is deposited on the control electrode 661 and the first passivation layer 64.
  • Layer 68 followed by an active layer and an ohmic contact layer on the isolation layer 68 (n+ Layer).
  • a third mask is used for the development process, and the active layer and the ohmic contact layer are etched to retain the active layer 70 and the ohmic contact layer 72 corresponding to the upper surface of the control electrode 661.
  • a fourth mask is used to perform a development process to etch the first passivation layer 64 up to the data line 62 to create a via 74.
  • a transparent conductive layer 76 is deposited first, and then a photoresist 78 is applied over the transparent conductive layer 76.
  • the photoresist 78 is exposed by the fifth mask 90, and the photoresist 78 masked by the mask 90 is exposed to light, and the developer is soluble. change. Therefore, the exposed photoresist 78 can be washed away with a developer.
  • the transparent conductive layer 76 and the ohmic contact layer 72 are etched by using the photoresist 78 after the unexposure development to form a through hole 82, wherein the through hole 82 is formed in the control.
  • the ohmic contact layer 72 on both sides of the via 82 forms a first ohmic contact layer 721 and a second ohmic contact layer 722, respectively.
  • a second passivation layer 84 is deposited over the photoresist 78 and within the via 82 before the photoresist 78 has been removed.
  • the photoresist 78 and the second passivation layer 84 over the photoresist 78 are removed together by a lift-off method. Since the second passivation layer 84 in the via 82 is not attached to the photoresist 78 and is not peeled off, the active layer 70 in the via 82 and the corresponding via hole 82 may be attached. The two passivation layer 84 can effectively isolate the active layer 70.
  • FIG. 27 is a structural diagram of the liquid crystal display panel 90 of the present invention.
  • the liquid crystal display panel 90 includes a glass substrate 601 and a glass substrate 602. After the data line 62 and the switch unit 92 are disposed on the glass substrate 601, the liquid crystal layer 650 is first implanted, and the glass substrate 602 provided with the black matrix layer 642 and the color filter 644 is overlaid. Another transparent electrode layer 640 will overlie the black matrix layer 642 and the color filter 644. The transparent electrode layer 640 serves as a common voltage electrode layer to which a common voltage is applied.
  • the via 82 divides the transparent conductive layer 76 into a first conductive layer 76a and a second conductive layer 76b.
  • the switching unit 92 is equivalently a thin film transistor which can be used as a data signal for controlling the input of the data line 62, that is, the control electrode 661 of the switching unit 92 can serve as the gate of the thin film transistor, and the first conductive layer 76a and the second
  • the conductive layer 76b is substantially the first electrode and the second electrode of the switching unit 92, respectively, and may also serve as a source (or drain) and a drain (or source) of the thin film transistor, and the active layer 70 serves as A transmission channel between the drain and the source of the switching unit 92.
  • the first conductive layer 76a can be used as a first electrode to output or input an electrical signal.
  • the second conductive layer 76b can be used as a second electrode to output or input an electrical signal.
  • the purpose of the second purification layer 84 attached to the via 82 is to protect the active layer 70 and the ohmic contact layer 72 as transmission channels from direct contact with the liquid crystal layer 650 to affect the rotation of the liquid crystal molecules.
  • the second conductive layer 76b serves not only as the second electrode of the thin film transistor 92, but also as a pixel electrode.
  • the liquid crystal capacitor 96 is substantially constituted by the overlap of the pixel electrode and the transparent conductive layer 640.
  • the liquid crystal molecules of the liquid crystal layer 650 control the direction of rotation according to the voltage difference between the data voltage of the second conductive layer 76b and the common voltage of the transparent electrode layer 640, thereby determining the degree of penetration of the light.
  • the thin film transistor 92 of the present embodiment is formed on a glass substrate 601, and includes a gate electrode 661 on the glass substrate 601, a first passivation layer 64 covering the gate electrode 661, and a first passivation layer.
  • the ohmic contact layer 72 forms a first ohmic contact layer 721 and a second ohmic contact layer 722 on both sides of the via 82, respectively.
  • the transparent conductive layer 76 forms a first conductive layer 76a and a second conductive layer 76b on both sides of the via 82, respectively.
  • the first conductive layer 76a is connected to the first ohmic contact layer 721 as a first electrode for outputting or inputting an electrical signal;
  • the second conductive layer 76b is connected to the second ohmic contact layer 722 as a second electrode for outputting or inputting an electrical signal.
  • the first ohmic contact layer 721 and the second ohmic contact layer 722 included in the ohmic contact layer 72 are used to lower the resistance value of the thin film transistor 92.
  • the ohmic contact layer 72 may not need to be disposed, and thus the liquid crystal display panel 90 and the thin film transistor 92 may also be formed without the first ohmic contact layer 721 and the second ohmic contact layer 722.

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  • Thin Film Transistor (AREA)

Description

液晶显示面板及其制造方法 技术领域
本发明涉及液晶显示面板领域，尤指一种将透明导电层直接作为源/漏极并电性连接数据线的薄膜晶体管、具有该薄膜晶体管的液晶显示面板及该液晶显示面板的制造方法。
 背景技术
功能先进的显示器渐成为现今消费电子产品的重要特色，其中液晶显示器已经逐渐成为各种电子设备如移动电话、个人数字助理(PDA)、数码相机、计算机屏幕或笔记本计算机屏幕所广泛应用具有高分辨率彩色屏幕的显示器。
传统液晶显示器的液晶显示面板包含数个像素(pixel)，而每一个像素包含三个分别代表红绿蓝(RGB)三原色的像素单元构成。请参阅图1，图1是一般液晶显示面板的像素单元10的示意图。如图1所示，当栅极驱动器(未图示)输出的扫描信号经过扫描线11使得每一列的像素单元的薄膜晶体管13依序开启，同时源极驱动器(未图示)则经过数据线12输出对应的数据信号至一整列的像素单元使其充电到各自所需的电压，以显示不同的灰阶。栅极驱动器会一列接一列地输出扫描信号将每一列的像素单元的薄膜晶体管13打开，再由源极驱动器对每一列开启的像素单元进行充放电。如此依序下去，直到所有像素单元10都充电完成，再从第一列开始充电。
请一并参阅图2与图1，图2显示了图1中A至B至C点的横截面图。如图2所示，在A、B两点间，薄膜晶体管13的栅极131是由第一金属层形成，而源极132与漏极133则是以第二金属层所形成。而于B、C两点间，储存电容Cst的下极板141也是由第一金属层形成。而于薄膜晶体管13与储存电容Cst之间的透明导电层15则是像素区域。
在此请参阅图3至图7，图3至图7是完成图2所示的结构所须的制程流程图，其中，每一个图均代表一道掩膜制程，也就是说，完成图2所绘示的的结构必须经过五道掩膜制程。
请参阅图3，在此道制程之中，会先于玻璃基板101上沉积第一金属层(未图示)并利用第一道掩膜进行显影制程。显影制程是在第一金属层上涂布光阻(未图示)后，利用具有特定图案的第一道掩膜对光阻进行曝光再用显影剂(developer)将已曝光的光阻洗除。之后对第一金属层进行蚀刻制程。蚀刻制程是将没有光阻覆盖的第一金属层以强酸移除，而有光阻覆盖的第一金属层 (大致呈该特定图案)会产生图3所示的作为薄膜晶体管13的栅极131和储存电容Cst的下极板141，接着再洗除剩余的光阻。
请继续参阅图4，在此道制程中，首先会先沉积隔离层(isolation layer)16，接着沉积主动层(active layer)17，最后再沉积欧姆接触层(n+ layer)18，之后利用第二道掩膜进行显影制程，并且对主动层17与欧姆接触层18进行蚀刻制程。
请继续参阅图5，在此道制程之中，首先会先沉积第二金属层(未图示)，之后再利用第三道掩膜进行显影制程，并且对第二金属层和欧姆接触层18进行蚀刻制程，以产生薄膜晶体管的漏极132与源极133以及数据线12。
请继续参阅图6，在此道制程中，首先会先沉积钝化层(passivation layer)19，之后再利用第四道掩膜进行显影制程，并且对钝化层19进行蚀刻制程，以于源极133之上产生一接触窗(via)20。
最后请参阅图7，在此道制程中，首先会先沉积透明导电层15，接着用第五道掩膜进行显影制程，并且对透明导电层15进行蚀刻制程，以产生图7所示的结构，至此，整个液晶显示面板10的基本结构业已完成。
然而，上述的结构与制程技术尚有改进空间，举例来说，像素区域的开口率尚有提升的必要，以提升整体面板的透光率。
 技术问题
本发明的目的在于提供一种液晶显示面板的制造方法、液晶显示面板以及一种薄膜晶体管，以解决提升液晶显示面板的开口率，改善液晶显示面板光透射率的问题。
 技术解决方案
根据本发明的实施例，本发明揭露一种液晶显示面板的制造方法。包括：
提供一玻璃基板；蚀刻形成于玻璃基板上的第一金属层，以形成一数据线；依序沉积一第一钝化层和一第二金属层于玻璃基板以及第一金属层上；蚀刻第二金属层，以形成一开关单元的控制电极；依序沉积一隔离层以及一主动层于第一钝化层以及第二金属层上；同时蚀刻主动层以保留控制电极上方的主动层，其中主动层作为开关单元的传输通道；蚀刻数据线上方的第一钝化层以及隔离层，以于数据线上方形成一接触窗；沉积一透明导电层于隔离层、数据线以及主动层上；以及蚀刻透明导电层以将透明导电层分为第一导电层和第二导电层，其中数据线经过接触窗上的第一导电层电性连接主动层，且主动层电性连接第二导电层。
根据本发明的实施例，本发明揭露一种液晶显示面板。包含：一玻璃基
板；一第一金属层，位于玻璃基板上，用来作为一数据线；一第一钝化层，位于玻璃基板以及第一金属层上；一第二金属层，位于第一钝化层之上，作为一开关单元的控制电极；一隔离层，位于第一钝化层以及第二金属层上；一主动层，位于隔离层上，用来作为开关单元的传输通道；一接触窗，形成于数据线的上方；以及一透明导电层，位于隔离层以及接触窗上，透明导电层包含一第一导电层和一第二导电层，第一导电层用来电性连接数据线，第二导电层用来作为像素电极，其中当控制电极接收一扫描电压时，会将数据线传来的数据电压经过第一导电层、主动层传输到第二导电层。
根据本发明的实施例，本发明揭露一种薄膜晶体管，形成于一玻璃基板
上。薄膜晶体管包含：一第一钝化层，位于玻璃基板之上；一金属层，位于第一钝化层和基板之上，作为薄膜晶体管的栅极；一隔离层，位于金属层上；一主动层，位于隔离层上，用来作为薄膜晶体管的传输通道；以及一透明导电层，透明导电层被一通孔贯穿而分为第一导电层和第二导电层，第一导电层作为薄膜晶体管的第一电极，用来传递自第一电极输出或输入至第一电极的电信号，第二导电层作为薄膜晶体管的第二电极，用来传递自第二电极输出或输入至第二电极的电信号。
根据本发明的实施例，本发明还揭露一种液晶显示面板的制造方法。包
含：提供一玻璃基板；蚀刻形成于玻璃基板上的第一金属层，以形成一开关单元的控制电极；依序沉积一第一钝化层和一第二金属层于玻璃基板以及第一金属层上；蚀刻第二金属层以形成一数据线；依序沉积一隔离层以及一主动层于第一钝化层以及第二金属层上；同时蚀刻主动层以保留控制电极上方的主动层，其中主动层作为开关单元的传输通道；蚀刻数据线上方的第一钝化层以及隔离层，以于数据线上方形成一接触窗；沉积一透明导电层于隔离层、数据线以及主动层上；以及蚀刻透明导电层以将透明导电层分为第一导电层和第二导电层，其中数据线经过接触窗上的第一导电层电性连接主动层，且主动层电性连接第二导电层。
根据本发明的实施例，本发明还揭露一种液晶显示面板。包含：一玻璃
基板；一第一金属层，位于玻璃基板上，用来作为一开关单元的控制电极；一第一钝化层，位于玻璃基板以及第一金属层上；一第二金属层，位于第一钝化层之上，作为一数据线；一隔离层，位于第一钝化层以及第二金属层上；一主动层，位于隔离层上，用来作为开关单元的传输通道；一接触窗，形成于数据线的上方；以及一透明导电层，位于隔离层以及接触窗上，透明导电层包含一第一导电层和一第二导电层，第一导电层用来电性连接数据线，第二导电层用来作为像素电极，其中当控制电极接收一扫描电压时，会将数据线传来的数据电压经过第一导电层、主动层传输到第二导电层。
根据本发明的实施例，本发明还揭露一种薄膜晶体管，形成于一玻璃基板上。薄膜晶体管包含：一金属层，位于玻璃基板之上，作为薄膜晶体管的栅极；一第一钝化层，位于金属层和玻璃基板之上；一隔离层，位于金属层上；一主动层，位于隔离层上，用来作为薄膜晶体管的传输通道；以及一透明导电层，透明导电层被一通孔贯穿而分为第一导电层和第二导电层，第一导电层作为薄膜晶体管的第一电极，用来传递自第一电极输出或输入至第一电极的电信号，第二导电层作为薄膜晶体管的第二电极，用来传递自第二电极输出或输入至第二电极的电信号。
 有益效果
相较于先前技术，本发明的液晶显示面板以及其相关制造方法仍是利用五道掩膜制程，即可产生一种新的薄膜晶体管架构的液晶显示面板。该液晶显示面板将透明导电层直接形成薄膜晶体管的第一电极与第二电极，同时该透明导电层亦作为薄膜晶体管与数据线之间以及薄膜晶体管与液晶电容之间的连接线。因此，薄膜晶体管上方无须另外形成一接触窗来提供接触点，便可透过透明导电层连接到数据线，如此一来，像素区域可更加扩大，进而提升液晶面板的开口率，使光源所发出的光能够更有效率的投射出来。
附图说明
图1是先前技术液晶显示面板的示意图。
图2是图1所示的A-B-C线段的剖面图。
图3至图7是完成图2所示的结构所须的制程流程图。
图8至图16绘示本发明液晶显示面板的制程示意图。
图17是本发明第一实施例液晶显示面板剖面图。
图18至图26为本发明第二实施例的液晶显示面板的制程示意图。
图27是本发明第二实施例液晶显示面板剖面图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施之特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「顶」、「底」、「水平」、「垂直」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
请参阅图8~图16，图8至图16为本发明第一实施例的液晶显示面板的制程示意图。请先参阅图8，在此道制程之中，首先在玻璃基板201上沉积第一金属层(未图示) 并利用第一道掩膜进行显影制程。显影制程是在第一金属层上涂布光阻(未图示)后，利用具有特定图案的第一道掩膜对光阻进行曝光再用显影剂(developer)将已曝光的光阻洗除。之后对第一金属层进行蚀刻制程。蚀刻制程是将没有光阻覆盖的第一金属层以强酸移除，而有光阻覆盖的第一金属层 (大致呈该特定图案)会产生数据线22，接着再洗除剩余的光阻。
请继续参阅图9，在此道制程之中，首先，在玻璃基板201以及第一金属层上，先沉积第一钝化层(passivation layer)24，接着再于第一钝化层24上，沉积第二金属层(未图示)。之后再利用第二道掩膜进行显影制程，并且对第二金属层进行蚀刻，以产生控制电极261。
请继续参阅图10，在此道制程中，首先，在控制电极261以及第一钝化层24上，沉积一隔离层(isolation layer)28，接着在于隔离层28上依序沉积主动层(active layer)与欧姆接触层(n+ layer)。之后再利用第三道掩膜进行显影制程，并且对主动层与欧姆接触层进行蚀刻制程，以保留对应于控制电极261上方的主动层30与欧姆接触层32。
请继续参阅图11，在此道制程中，利用第四道掩膜进行显影制程，以对隔离层28与第一钝化层24进行蚀刻制程直至数据线22，以产生一接触窗(via)34。
请参阅图12，在此道制程之中，先沉积透明导电层36，之后在透明导电层36上方涂布一层光阻(photoresist)38。
接着请参阅图13，在此道制程中，利用第五道掩膜40对光阻38进行曝光，没有掩膜40遮蔽的光阻38在光线照射后，对显影剂的溶解性会改变。所以可用显影剂将已曝光的光阻38洗除。
接着请参阅图14，在此道制程中，利用未曝光显影后的光阻38，对透明导电层36以及欧姆接触层32进行蚀刻制程以形成一通孔42，其中通孔42是形成在控制电极261的上方，而通孔42两侧欧姆接触层32则分别形成第一欧姆接触层321与第二欧姆接触层322。
接着请参阅图15，在此道制程之中，在尚未去除光阻38之前，沉积一层第二钝化层44在光阻38之上和通孔42之内。
接着请参阅图16，在此道制程中，再将光阻38以及光阻38之上的第二钝化层44利用剥离(lift-off)方法一并去除。由于通孔42内的第二钝化层44并未附着于光阻38之上而不会被剥离，如此一来，通孔42内以及通孔42对应之处的主动层30上会附着第二钝化层44。
请继续参阅图17，图17是本发明液晶显示面板50的结构图。液晶显示面板50包含玻璃基板201和玻璃基板202。当玻璃基板201上设置数据线22、开关单元52之后，会先注入液晶层250，并覆上设置有黑色矩阵层(black matrix)242和彩色滤光片(color filter)244的玻璃基板202。另一透明电极层240会覆盖在黑色矩阵层242和彩色滤光片244之上。透明电极层240作为公共电压(common voltage)电极层，会被施加一公共电压。通孔42将透明导电层36分为第一导电层36a和第二导电层36b。开关单元52等效上可作为控制数据线22输入数据信号与否的薄膜晶体管，也就是说，开关单元52的控制电极261可作为薄膜晶体管的栅极，而第一导电层36a和第二导电层36b实质上是分别作为开关单元52的第一电极和第二电极，亦即可作为薄膜晶体管的源极(或漏极)和漏极(或源极)，而主动层30则是作为开关单元52的漏极和源极之间的传输通道。第一导电层36a作为第一电极可用来输出或输入电信号，对应地，第二导电层36b作为第二电极则可用来输入或输出电信号。附着于通孔42的第二纯化层44的目的是用来隔离作为传输通道的主动层30和欧姆接触层32，以避免与液晶层250直接接触而影响液晶分子的转动。在本实施例中，第二导电层36b不仅作为薄膜晶体管52的第二电极，实质上，也是作为像素电极。液晶电容56实质上是由像素电极和透明导电层240重叠之处构成，当控制电极52接收一扫描电压时，会将数据线22传来的数据电压经过第一导电层36a和开关单元52传输到第二导电层36b(也是像素电极)。液晶层250的液晶分子会依据第二导电层36b的数据电压和透明电极层240公共电压之间的电压差来控制其转动方向，据以决定光线的穿透程度。
请参阅图16，本实施例的薄膜晶体管52是形成于玻璃基板201上，其包含位于玻璃基板201上的第一钝化层24、位于第一钝化层24上的栅极261、位于栅极261上的隔离层28、位于隔离层28上作为薄膜晶体管52传输通道的主动层30以及位于主动层30上开设一通孔42的欧姆接触层32。欧姆接触层32在通孔42的两侧分别形成第一欧姆接触层321与第二欧姆接触层322。透明导电层36在通孔42的两侧分别形成第一导电层36a和第二导电层36b。第一导电层36a连接第一欧姆接触层321，作为第一电极用来输出或输入电信号；第二导电层36b连接第二欧姆接触层322，作为第二电极用来输出或输入电信号。
在本发明的较佳实施例中，欧姆接触层32所包含的第一欧姆接触层321与第二欧姆接触层322是用来降低薄膜晶体管52的电阻值。在另一实施例的制造过程中，欧姆接触层32是可以不需要设置，因此产生的液晶显示面板50和薄膜晶体管52也可以不需要第一欧姆接触层321与第二欧姆接触层322。
请参阅图18~图26，图18至图26为本发明第二实施例的液晶显示面板的制程示意图。请先参阅图18，在此道制程中，首先在玻璃基板601上沉积第一金属层(未图示)，之后以第一掩膜进行显影制程，并且对第一金属层进行蚀刻制程，以产生开关单元的控制电极661。
请继续参阅图19，在此道制程中，首先，在玻璃基板601以及第一金属层上先沉积第一钝化层64，接着再于第一钝化层64上，沉积第二金属层(未图示)。之后再利用第二道掩膜进行显影制程，并且对第二金属层进行蚀刻制程，以产生数据线62。
请继续参阅图20，在此道制程中，首先，在控制电极661以及第一钝化层64上，沉积一隔离层(isolation layer)68，接着在于隔离层68上依序沉积主动层(active layer)与欧姆接触层(n+ layer)。之后再利用第三道掩膜进行显影制程，并且对主动层与欧姆接触层进行蚀刻制程，以保留对应于控制电极661上方的主动层70与欧姆接触层72。
请继续参阅图21，在此道制程中，利用第四道掩膜进行显影制程，以对第一钝化层64进行蚀刻制程直至数据线62，以产生一接触窗(via)74。
请参阅图22，在此道制程中，先沉积透明导电层76，之后在透明导电层76上方涂布一层光阻(photoresist)78。
接着请参阅图23，在此道制程中，利用第五道掩膜90对光阻78进行曝光，没有掩膜90遮蔽的光阻78在光线照射后，对显影剂(developer)的溶解性会改变。所以可用显影剂将已曝光的光阻78洗除。
接着请参阅图24，在此道制程之中，利用未曝光显影后的光阻78，对透明导电层76以及欧姆接触层72进行蚀刻制程以形成一通孔82，其中通孔82是形成在控制电极661的上方，而通孔82两侧欧姆接触层72则分别形成第一欧姆接触层721与第二欧姆接触层722。
接着请参阅图25，在此道制程中，在尚未去除光阻78之前，沉积一层第二钝化层84于光阻78之上和通孔82之内。
接着请参阅图26，在此道制程之中，再将光阻78以及光阻78之上的第二钝化层84利用剥离(lift-off)方法一并去除。由于通孔82内的第二钝化层84并未附着于光阻78之上而不会被剥离，如此一来，通孔82内以及通孔82对应之处的主动层70上会附着第二钝化层84，可有效隔离主动层70。
请继续参阅图27，图27是本发明液晶显示面板90的结构图。液晶显示面板90包含玻璃基板601和玻璃基板602。当玻璃基板601上设置数据线62、开关单元92之后，会先注入液晶层650，并覆上设置有黑色矩阵层642和彩色滤光片644的玻璃基板602。另一透明电极层640会覆盖在黑色矩阵层642和彩色滤光片644之上。透明电极层640作为公共电压电极层，会被施加一公共电压。通孔82将透明导电层76分为第一导电层76a和第二导电层76b。开关单元92等效上可作为控制数据线62输入的数据信号与否的薄膜晶体管，也就是说，开关单元92的控制电极661可作为薄膜晶体管的栅极，而第一导电层76a和第二导电层76b实质上是分别作为开关单元92的第一电极和第二电极，亦即可作为薄膜晶体管的源极(或漏极)和漏极(或源极)，而主动层70则是作为开关单元92的漏极和源极之间的传输通道。第一导电层76a作为第一电极可用来输出或输入电信号，对应地，第二导电层76b作为第二电极则可用来输出或输入电信号。附着于通孔82的第二纯化层84的目的是用来保护作为传输通道的主动层70和欧姆接触层72，以避免与液晶层650直接接触而影响液晶分子的转动。在本实施例中，第二导电层76b不仅作为薄膜晶体管92的第二电极，实质上，也是作为像素电极。液晶电容96实质上是由像素电极和透明导电层640重叠之处构成，当控制电极92接收一扫描电压时，会将数据线62传来的数据电压经过第一导电层76a和开关单元92传输到第二导电层76b(也是像素电极)。液晶层650的液晶分子会依据第二导电层76b的数据电压和透明电极层640公共电压之间的电压差来控制其转动方向，据以决定光线的穿透程度。
请参阅图26，本实施例的薄膜晶体管92是形成于玻璃基板601上，其包含位于玻璃基板601上的栅极661、覆盖栅极661的第一钝化层64、位于第一钝化层64上的隔离层68、位于隔离层68上作为薄膜晶体管92传输通道的主动层70以及位于主动层70上开设一通孔82的欧姆接触层72。欧姆接触层72在通孔82的两侧分别形成第一欧姆接触层721与第二欧姆接触层722。透明导电层76在通孔82的两侧分别形成第一导电层76a和第二导电层76b。第一导电层76a连接第一欧姆接触层721，作为第一电极用来输出或输入电信号；第二导电层76b连接第二欧姆接触层722，作为第二电极用来输出或输入电信号。
在本发明的较佳实施例中，欧姆接触层72所包含的第一欧姆接触层721与第二欧姆接触层722是用来降低薄膜晶体管92的电阻值。在另一实施例的制造过程中，欧姆接触层72是可以不需要设置，因此产生的液晶显示面板90和薄膜晶体管92也可以不需要第一欧姆接触层721与第二欧姆接触层722。
综上所述，虽然本发明已以较佳实施例揭露如上，但该较佳实施例并非用以限制本发明，该领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。
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  1. 一种液晶显示面板的制造方法，包含：
    提供一玻璃基板；
    蚀刻形成于所述玻璃基板上的第一金属层，以形成一数据线；
    依序沉积一第一钝化层和一第二金属层于所述玻璃基板以及所述第一金属层上；
    蚀刻所述第二金属层，以形成一开关单元的控制电极；
    依序沉积一隔离层以及一主动层于所述第一钝化层以及所述第二金属层上；
    同时蚀刻所述主动层以保留所述控制电极上方的所述主动层，其中所述主动层作为所述开关单元的传输通道；
    蚀刻所述数据线上方的所述第一钝化层以及所述隔离层，于所述数据线上方形成一接触窗；
    沉积一透明导电层于所述隔离层、所述数据线以及所述主动层上；以及
    蚀刻所述透明导电层将所述透明导电层分为第一导电层和第二导电层，其中所述数据线经过所述接触窗上的所述第一导电层电性连接所述主动层，且所述主动层电性连接所述第二导电层。
  2. 根据权利要求1所述的液晶显示面板的制造方法，其特征在于：
    依序沉积所述隔离层、所述主动层以及一欧姆接触层于所述第一钝化层以及所述第二金属层上；
    同时蚀刻所述主动层以及所述欧姆接触层以保留所述控制电极上方的所述主动层以及所述欧姆接触层，其中所述主动层作为所述开关单元的传输通道；
    蚀刻所述数据线上方的所述第一钝化层以及所述隔离层，于所述数据线上方形成一接触窗；
    沉积所述透明导电层于所述隔离层、所述数据线以及所述欧姆接触层上；以及
    蚀刻所述透明导电层以及所述欧姆接触层，将所述透明导电层分为第一导电层和第二导电层及将所述欧姆接触层分为第一欧姆接触层和第二欧姆接触层，其中所述数据线经过所述接触窗上的所述第一导电层，所述第一欧姆接触层位于所述第一导电层和所述主动层之间，且第二欧姆接触层位于所述第二导电层和所述主动层之间。
  3. 根据权利要求1所述的液晶显示面板的制造方法，其特征在于：蚀刻所述透明导电层的步骤还包含：
    沉积一光阻于所述透明导电层之上；以及
    对所述光阻进行曝光显影，并蚀刻所述透明导电层，于所述主动层的上方形成一通孔。
  4. 根据权利要求2所述的液晶显示面板的制造方法，其特征在于：蚀刻所述透明导电层的步骤还包含：
    沉积一光阻于所述透明导电层之上；以及
    对所述光阻进行曝光显影，并蚀刻所述透明导电层，于所述主动层的上方
    形成一通孔。
  5. 根据权利要求3所述的液晶显示面板的制造方法，其特征在于：还包含：
    沉积一第二钝化层于所述光阻、所述隔离层和所述通孔之上；以及
    剥离所述光阻以及所述光阻上的所述第二钝化层，使得未剥离的第二钝化层覆盖于所述透明导电层的区域上。
  6. 根据权利要求4所述的液晶显示面板的制造方法，其特征在于：还包含：
    沉积一第二钝化层于所述光阻、所述隔离层和所述通孔之上；以及
    剥离所述光阻以及所述光阻上的所述第二钝化层，使得未剥离的第二钝化层覆盖于所述透明导电层的区域上。
  7. 一种液晶显示面板，包含：
    一玻璃基板；
    一第一金属层，位于所述玻璃基板上，用来作为一数据线；
    一第一钝化层，位于所述玻璃基板以及所述第一金属层上；
    一第二金属层，位于所述第一钝化层之上，作为一开关单元的控制电极；
    一隔离层，位于所述第一钝化层以及所述第二金属层上；
    一主动层，位于所述隔离层上，用来作为所述开关单元的传输通道；
    一接触窗，形成于所述数据线的上方；以及
    一透明导电层，位于所述隔离层以及所述接触窗上，所述透明导电层包含一第一导电层和一第二导电层，所述第一导电层用来电性连接所述数据线，所述第二导电层用来作为像素电极，
    其中当控制电极接收一扫描电压时，会将所述数据线传来的数据电压经过所述第一导电层、所述主动层传输到所述第二导电层。
  8. 根据权利要求7所述的液晶显示面板，其特征在于：还包含一欧姆接触层，位于所述主动层和所述透明导电层之间。
  9. 根据权利要求8所述的液晶显示面板，其特征在于：所述液晶显示面板还包含一通孔，贯穿所述欧姆连接层和所述透明导电层直至所述主动层。
  10. 根据权利要求7所述的液晶显示面板，其特征在于：所述液晶显示面板另包含一第二钝化层，覆盖于所述主动层上方的通孔上，用来保护所述主动层。
  11. 一种液晶显示面板的制造方法，包含：
    提供一玻璃基板；
    蚀刻形成于所述玻璃基板上的第一金属层，以形成一开关单元的控制电极；
    依序沉积一第一钝化层和一第二金属层于所述玻璃基板以及所述第一金属层上；
    蚀刻所述第二金属层以形成一数据线；
    依序沉积一隔离层以及一主动层于所述第一钝化层以及所述第二金属层上；
    同时蚀刻所述主动层以保留所述控制电极上方的所述主动层，其中所述主动层作为所述开关单元的传输通道；
    蚀刻所述数据线上方的所述第一钝化层以及所述隔离层，于所述数据线上方形成一接触窗；
    沉积一透明导电层于所述隔离层、所述数据线以及所述主动层上；以及
    蚀刻所述透明导电层将所述透明导电层分为第一导电层和第二导电层，其中所述数据线经过所述接触窗上的所述第一导电层电性连接所述主动层，且所述主动层电性连接所述第二导电层。
  12. 根据权利要求11所述的液晶显示面板的制造方法，其特征在于：
    依序沉积所述隔离层、所述主动层以及一欧姆接触层于所述第一钝化层以及所述第二金属层上；
    同时蚀刻所述主动层以及所述欧姆接触层以保留所述控制电极上方的所述主动层以及所述欧姆接触层，其中所述主动层作为所述开关单元的传输通道；
    蚀刻所述数据线上方的所述第一钝化层以及所述隔离层，于所述数据线上方形成一接触窗；
    沉积所述透明导电层于所述隔离层、所述数据线以及所述欧姆接触层上；以及
    蚀刻所述透明导电层以及所述欧姆接触层，以将所述透明导电层分为第一导电层和第二导电层及将所述欧姆接触层分为第一欧姆接触层和第二欧姆接触层，其中所述数据线经过所述接触窗上的所述第一导电层，所述第一欧姆接触层位于所述第一导电层和所述主动层之间，且第二欧姆接触层位于所述第二导电层和所述主动层之间。
  13. 根据权利要求11所述的液晶显示面板的制造方法，其特征在于：蚀刻所述透明导电层的步骤还包含：
    沉积一光阻于所述透明导电层之上；以及
    对所述光阻进行曝光显影，并蚀刻所述透明导电层于所述主动层的上方形成一通孔。
  14. 根据权利要求12所述的液晶显示面板的制造方法，其特征在于：蚀刻所述透明导电层的步骤还包含：
    沉积一光阻于所述透明导电层之上；以及
    对所述光阻进行曝光显影，并蚀刻所述透明导电层于所述主动层的上方形成一通孔。
  15. 根据权利要求13所述的液晶显示面板的制造方法，其特征在于：还包含：
    沉积一第二钝化层于所述光阻、所述隔离层和所述通孔之上；以及
    剥离所述光阻以及所述光阻上的所述第二钝化层，使得未剥离的第二钝化层覆盖于所述透明导电层的区域上。
  16. 根据权利要求14所述的液晶显示面板的制造方法，其特征在于：还包含：
    沉积一第二钝化层于所述光阻、所述隔离层和所述通孔之上；以及
    剥离所述光阻以及所述光阻上的所述第二钝化层，使得未剥离的第二钝化层覆盖于所述透明导电层的区域上。
  17. 一种液晶显示面板，包含：
    一玻璃基板；
    一第一金属层，位于所述玻璃基板上，用来作为一开关单元的控制电极；
    一第一钝化层，位于所述玻璃基板以及所述第一金属层上；
    一第二金属层，位于所述第一钝化层之上，作为一数据线；
    一隔离层，位于所述第一钝化层以及所述第二金属层上；
    一主动层，位于所述隔离层上，用来作为所述开关单元的传输通道；
    一接触窗，形成于所述数据线的上方；以及
    一透明导电层，位于所述隔离层以及所述接触窗上，所述透明导电层包含一第一导电层和一第二导电层，所述第一导电层用来电性连接所述数据线，所述第二导电层用来作为像素电极，
    其中当控制电极接收一扫描电压时，会将所述数据线传来的数据电压经过所述第一导电层、所述主动层传输到所述第二导电层。
  18. 根据权利要求17所述的液晶显示面板，其特征在于：还包含一欧姆接触层，位于所述主动层和所述透明导电层之间。
  19. 根据权利要求18所述的液晶显示面板，其特征在于：所述液晶显示面板还包含一通孔，贯穿所述欧姆连接层和所述透明导电层直至所述主动层。
  20. 根据权利要求17所述的液晶显示面板，其特征在于：所述液晶显示面板另包含一第二钝化层，覆盖于所述主动层上方的通孔上，用来保护所述主动层。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1266254A (zh) * 1999-03-04 2000-09-13 三星电子株式会社 反射型液晶显示器及其制造方法
CN1790727A (zh) * 2004-12-17 2006-06-21 三星电子株式会社 有机薄膜晶体管阵列板及其制造方法
KR20070040035A (ko) * 2005-10-11 2007-04-16 삼성전자주식회사 표시 기판 및 이의 제조 방법
CN101552277A (zh) * 2008-04-03 2009-10-07 上海广电Nec液晶显示器有限公司 薄膜晶体管阵列基板及其制造方法
US20090280591A1 (en) * 2008-05-08 2009-11-12 Pil-Soon Hong Method of manufacturing a display substrate and method of manufacturing a display apparatus using the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100598737B1 (ko) * 2003-05-06 2006-07-10 엘지.필립스 엘시디 주식회사 박막 트랜지스터 어레이 기판 및 그 제조 방법
KR101282893B1 (ko) * 2006-06-30 2013-07-05 엘지디스플레이 주식회사 액정표시장치용 어레이 기판과 그 제조방법
CN100432812C (zh) * 2006-11-10 2008-11-12 北京京东方光电科技有限公司 一种薄膜晶体管液晶显示器像素结构及其制造方法
KR20090009612A (ko) * 2007-07-20 2009-01-23 엘지디스플레이 주식회사 스퍼터링을 통한 무기절연막 형성방법
CN101762914B (zh) * 2010-01-05 2011-04-13 友达光电股份有限公司 聚合物稳定配向液晶显示面板及液晶显示面板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1266254A (zh) * 1999-03-04 2000-09-13 三星电子株式会社 反射型液晶显示器及其制造方法
CN1790727A (zh) * 2004-12-17 2006-06-21 三星电子株式会社 有机薄膜晶体管阵列板及其制造方法
KR20070040035A (ko) * 2005-10-11 2007-04-16 삼성전자주식회사 표시 기판 및 이의 제조 방법
CN101552277A (zh) * 2008-04-03 2009-10-07 上海广电Nec液晶显示器有限公司 薄膜晶体管阵列基板及其制造方法
US20090280591A1 (en) * 2008-05-08 2009-11-12 Pil-Soon Hong Method of manufacturing a display substrate and method of manufacturing a display apparatus using the same

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