WO2017101161A1 - 基于hsd结构的显示面板和显示装置 - Google Patents

基于hsd结构的显示面板和显示装置 Download PDF

Info

Publication number
WO2017101161A1
WO2017101161A1 PCT/CN2015/099717 CN2015099717W WO2017101161A1 WO 2017101161 A1 WO2017101161 A1 WO 2017101161A1 CN 2015099717 W CN2015099717 W CN 2015099717W WO 2017101161 A1 WO2017101161 A1 WO 2017101161A1
Authority
WO
WIPO (PCT)
Prior art keywords
pixel units
pair
pixel
pairs
data
Prior art date
Application number
PCT/CN2015/099717
Other languages
English (en)
French (fr)
Inventor
赵阳
王勐
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US14/917,019 priority Critical patent/US20180047352A1/en
Publication of WO2017101161A1 publication Critical patent/WO2017101161A1/zh

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections

Definitions

  • the present invention relates to the field of liquid crystal technology, and in particular to a display panel and a display device based on an HSD structure.
  • the front display panel is produced using HSD (Half Source Driving, semi-source drive) structure, that is, double the number of scan lines, and the number of corresponding data lines is reduced by 1/2.
  • HSD Half Source Driving, semi-source drive
  • the total number of signal lines in the display panel of the HSD structure will be There is a significant reduction, which reduces the number of data line driver chips and ultimately saves manufacturing costs.
  • a data cycle unit and a scan line in the HSD structure form a pixel cycle unit.
  • the HSD structure includes at least two columns of pixel units (10, 11), wherein the polarities of the first column of pixel units 10 and the second column of pixel units 11 are opposite, due to the first column of pixel units 10 and the second column of pixel units 11 The opposite polarity is opposite, and it is difficult to achieve dot inversion between the first column of pixel units 10 and the second column of pixel units 11, which greatly affects the display quality of the display panel.
  • the technical problem to be solved by the present invention is to provide a display panel and a display device based on an HSD structure, which can effectively improve the display image quality of the display panel.
  • a technical solution adopted by the present invention is to provide a display panel based on an HSD structure, the display panel includes: a pixel unit array including a plurality of pairs of pixel units; and a plurality of pairs of scan lines, wherein each Having a scan line disposed between at least one pair of pixel units and connected to at least one pair of pixel units; a plurality of data lines, wherein adjacent data lines are disposed between at least one pair of pixel units and connected to at least one pair of pixel units Wherein each pixel unit is opposite in polarity to an adjacent pixel unit;
  • Each pair of scan lines includes a first scan line and a second scan line, and one of the first scan line and the second scan line is connected to one of each pair of pixel units, the first scan line and the second scan line
  • the other of the pixels is connected to the remaining one of each pair of pixel units
  • the data line includes a first data line and a second data line, one of the first data line and the second data line and each pair of pixels
  • One of the cells is connected, the other of the first data line and the second data line is connected to the remaining one of each pair of pixel cells
  • the data voltage transmitted by the first data line and the second data line The polarity is opposite; each pair of pixel units includes a first pixel unit and a second pixel unit, the first pixel unit and the second pixel unit have opposite polarities, and the first pixel unit and the second pixel unit are disposed adjacent to each other.
  • the plurality of pairs of pixel units includes at least 4 pairs of pixel units, the plurality of pairs of scan lines include at least 2 pairs of scan lines, and each pair of scan lines is provided with at least 2 pairs of pixel units; and the plurality of data lines include at least 3 data lines. At least two pairs of pixel units are disposed between adjacent data lines.
  • the display panel includes: a pixel unit array including a plurality of pairs of pixel units; and a plurality of pairs of scan lines, wherein each a pair of scan lines disposed between at least one pair of pixel units and connected to at least one pair of pixel units; a plurality of data lines, wherein adjacent data lines are disposed between at least one pair of pixel units and with at least one pair of pixel units Connection; wherein each pixel unit is opposite in polarity to an adjacent pixel unit.
  • each pair of scan lines includes a first scan line and a second scan line, and one of the first scan line and the second scan line is connected to one of each pair of pixel units, the first scan line and the second The other of the scan lines is connected to the remaining one of each pair of pixel units.
  • the data line includes a first data line and a second data line, and one of the first data line and the second data line is connected to one of each pair of pixel units, and the first data line and the second data line are The other one is connected to the remaining one of each pair of pixel units.
  • the data voltages transmitted by the first data line and the second data line have opposite polarities.
  • Each of the pair of pixel units includes a first pixel unit and a second pixel unit.
  • the first pixel unit and the second pixel unit have opposite polarities, and the first pixel unit and the second pixel unit are disposed adjacent to each other.
  • the pair of pixel units includes at least 4 pairs of pixel units, the plurality of pairs of scan lines comprise at least 2 pairs of scan lines, and each pair of scan lines is provided with at least 2 pairs of pixel units.
  • the plurality of data lines includes at least three data lines, and at least two pairs of pixel units are disposed between the adjacent data lines.
  • the first pixel unit is provided with four adjacent second pixel units, and the second pixel unit is provided with four adjacent first pixel units.
  • the display panel is a COA type liquid crystal panel.
  • a display device comprising a display panel, the display panel comprising: an array of pixel units, including a plurality of pairs of pixel units; and a plurality of pairs of scan lines, Wherein each pair of scan lines is disposed between at least one pair of pixel units and connected to at least one pair of pixel units; a plurality of data lines, wherein adjacent data lines are disposed between at least one pair of pixel units and at least 1 Connected to pixel cells; wherein each pixel cell is opposite in polarity to an adjacent pixel cell.
  • each pair of scan lines includes a first scan line and a second scan line, and one of the first scan line and the second scan line is connected to one of each pair of pixel units, the first scan line and the second The other of the scan lines is connected to the remaining one of each pair of pixel units.
  • the data line includes a first data line and a second data line, and one of the first data line and the second data line is connected to one of each pair of pixel units, and the first data line and the second data line are The other one is connected to the remaining one of each pair of pixel units.
  • the data voltages transmitted by the first data line and the second data line have opposite polarities.
  • Each of the pair of pixel units includes a first pixel unit and a second pixel unit.
  • the first pixel unit and the second pixel unit have opposite polarities, and the first pixel unit and the second pixel unit are disposed adjacent to each other.
  • the pair of pixel units includes at least 4 pairs of pixel units, the plurality of pairs of scan lines comprise at least 2 pairs of scan lines, and each pair of scan lines is provided with at least 2 pairs of pixel units.
  • the plurality of data lines includes at least three data lines, and at least two pairs of pixel units are disposed between the adjacent data lines.
  • the first pixel unit is provided with four adjacent second pixel units, and the second pixel unit is provided with four adjacent first pixel units.
  • the display panel is a COA type liquid crystal panel.
  • the HSD structure-based display panel of the present invention includes: a pixel unit array including a plurality of pairs of pixel units; a plurality of pairs of scan lines, wherein each pair of scan lines is set Connecting between at least one pair of pixel units and at least one pair of pixel units; a plurality of data lines, wherein adjacent data lines are disposed between at least one pair of pixel units and connected to at least one pair of pixel units; wherein each One pixel unit is opposite in polarity to adjacent pixel units.
  • the pixel unit of the opposite polarity is disposed in the periphery of each pixel unit in the display panel of the present invention, which can realize dot inversion between the pixel units and greatly improve the display image quality of the display panel.
  • FIG. 1 is a schematic structural diagram of a pixel unit array of a display panel based on an HSD structure in the prior art
  • FIG. 2 is a schematic structural view of a display device of the present invention
  • FIG. 3 is a schematic structural diagram of a pixel unit array of a display panel based on an HSD structure according to the present invention
  • FIG. 4 is a schematic enlarged view of a partial area A of FIG. 3.
  • FIG. 2 is a schematic structural view of a display device of the present invention.
  • the display device includes a display panel 21, a gate driving unit 22, and a source driving unit 23.
  • the gate driving unit 22 is configured to strobe the corresponding pixels of the display panel 21 according to the image to be displayed
  • the source driving unit 23 is configured to convert the received display data of the image to be displayed into a data voltage, and the data voltage passes
  • the data lines are loaded on the corresponding pixels on the display panel 21, and the corresponding pictures are displayed.
  • the display panel 21 is a COA (Color Filter on Array) LCD panel.
  • the technology employed in the COA substrate included in the COA type liquid crystal panel is a technique of integrating a color filter on an array substrate.
  • COA technology provides a design idea to reduce the difficulty of the process of the display panel in the preparation process of the display panel.
  • a wider black matrix (BM) shading is used in the design, and in the COA substrate, the black matrix can be designed to have a narrow line width, and the aperture ratio is increased.
  • BM black matrix
  • COA The substrate through the color resist layer increases the distance between the pixel electrode and the metal trace, reduces the capacitive coupling effect between the two, improves the signal delay effect on the metal line, and improves the panel quality.
  • the display panel 21 includes a pixel unit array, a plurality of pairs of scanning lines (G1, G2), and a plurality of data lines (D1, D2).
  • the pixel unit array includes a plurality of pairs of pixel units (A, B), the scan lines (G1, G2) and the data lines (D1, D2) are vertically disposed, and between the scan lines (G1, G2) and the data lines (D1, D2)
  • the formed pixel region (such as the first pixel region 201 or the second pixel region 202) is provided with a pair of pixel units (A, B).
  • Each pair of scan lines (G1, G2) is disposed between at least one pair of pixel units (A, B) and connected to at least one pair of pixel units (A, B).
  • Adjacent data lines (D1, D2) are disposed between at least one pair of pixel units (A, B) and connected to at least one pair of pixel units (A, B).
  • each pair of scan lines (G1, G2) are arranged in order, and each pair of scan lines (G1, G2) includes a first scan line G1 and a second scan line G2, and the first scan line G1 and At least one pair of pixel units (A, B) is disposed between the second scanning lines G2.
  • Each pair of pixel units (A, B) includes a first pixel unit A and a second pixel unit B, and the first pixel unit A and the second pixel unit B are disposed adjacent to each other.
  • One of the first scan line G1 and the second scan line G2 is connected to one of each pair of pixel units (A, B), and the other of the first scan line G1 and the second scan line G2 The remaining one of the pair of pixel units (A, B) is connected.
  • the first scan line G1 is connected to the first pixel unit A in the first pixel region 201, and the second scan line G2 and the remaining second pixel unit in the first pixel region 201 B connection.
  • the first scan line G1 is connected to the second pixel unit B in the second pixel region 202, and the second scan line G2 is connected to the remaining first pixel unit A in the second pixel region 202.
  • the first scan line G1 is connected to the first pixel unit A in the third pixel region 203
  • the second scan line G2 is connected to the remaining second pixel unit B in the third pixel region 203.
  • each pair of scan lines of the present invention provides a driving voltage for at least one pair of pixel cells.
  • the first scan line G1 and the second scan line G2 are the first in the first pixel region 201.
  • One pixel unit A and second pixel unit B provide a driving voltage; in the second pixel region 202, another pair of scanning lines such as the first scanning line G1 and the second scanning line G2 are the first pixels in the second pixel area 202
  • the unit A and the second pixel unit B supply a driving voltage.
  • the ITO (conductive glass) film layer disposed on the base substrate is stretched, such as the edge area of the stretched ITO film layer,
  • the overall area of the ITO film layer is made larger than that of the substrate substrate, so that there is more space on the ITO film layer, thereby increasing the aperture ratio of the pixel unit.
  • the data lines (D1, D2) include a first data line D1 and a second data line D2.
  • the first data line D1 and the second data line D2 are arranged in order, and at least one pair of pixel units (A, B) are disposed between the first data line D1 and the second data line D2.
  • one of the first data line D1 and the second data line D2 is connected to one of each pair of pixel units (A, B), and the other of the first data line D1 and the second data line D2 Connected to the remaining one of each pair of pixel units (A, B).
  • the first data line D1 is connected to the second pixel unit B in the first pixel region 201, and the second data line D2 and the first pixel unit remaining in the first pixel region 201 are A connection.
  • the second data line D2 is connected to the first pixel unit A in the second pixel region 202, and the first data line D2 is connected to the remaining second pixel unit B in the second pixel region 202.
  • the first data line D1 is connected to the second pixel unit B in the third pixel region 203, and the second data line D2 is connected to the remaining first pixel unit A in the third pixel region 203.
  • the second data line D2 is connected to the first pixel unit A in the fourth pixel region 204, and the first data line D1 is connected to the remaining second pixel unit B in the fourth pixel region 204.
  • each data line of the present invention provides data voltages for at least two pixel units, respectively, and specifically, each data line provides a data voltage for two adjacent pixel regions, for example, the second data line D2 is first.
  • the first pixel unit A in the pixel area 201 provides a data voltage
  • the second data line D2 also supplies a data voltage to the first pixel unit A in the second pixel area 202.
  • the polarities of the data voltages transmitted by the first data line D1 and the second data line D2 are opposite. If the data voltage transmitted by the first data line D1 is positive, the data voltage transmitted by the second data line D2 is negative. It should be understood that the present invention does not limit the data voltage transmitted by the first data line D1 to be positive, and the data voltage transmitted by the second data line D2 is negative. Of course, in other embodiments, the data voltage transmitted by the first data line D1 may also be positive, and the data voltage transmitted by the second data line D2 may also be negative.
  • the polarities of the first pixel unit A and the second pixel unit B are opposite, when the data voltage received by the first pixel unit A is negative, and the data voltage received by the second pixel unit B is working at the timing. It should be understood that in other embodiments, the first pixel unit A may be designed to operate with the received data voltage being positive, and the second pixel unit B is designed to operate when the received data voltage is negative.
  • Each pixel unit has the opposite polarity to the adjacent pixel unit, that is, the pixel unit is opposite to the polarity of the adjacent pixel unit, whether in the same pixel area or in the adjacent pixel area, so that adjacent pixels can be realized.
  • the polarity between the cells is reversed, such as the polarity of the first pixel unit B in the first pixel region 201 and the first pixel unit A in the second pixel region 202; the second pixel in the first pixel region 201
  • the cell B is opposite in polarity to the first pixel cell A in the third pixel region 203.
  • the plurality of pairs of pixel units (A, B) comprise at least 4 pairs of pixel units (A, B), and the pairs of scan lines (G1, G2) comprise at least 2 pairs of scan lines (G1, G2), each pair of scan lines At least two pairs of pixel units (A, B) are provided between (G1, G2).
  • a plurality of data lines (D1, D2) include at least three data lines (D1, D2), and at least two pairs of pixel units (A, B) are disposed between adjacent data lines (D1, D2).
  • the first pixel unit A of the present invention is provided with four adjacent second pixel units B, and the second pixel unit B is provided with four adjacent first pixel units A. That is, since each pixel unit (A, B) is opposite in polarity to adjacent pixel units (A, B), the present invention forms one pixel loop unit by 8 pixel units (A, B), As a pixel recycling unit is formed by pixel units in the first pixel region 201, the second pixel region 202, the third pixel region 203, and the fourth pixel region 204, the present invention is designed in comparison with the HSD structure in the prior art. The improvement is made to increase the number of pixel units in the pixel cycle unit, which can achieve polarity correction between adjacent pixel units, and improve the display quality of the display panel.
  • the HSD structure-based display panel of the present invention includes: a pixel unit array including a plurality of pairs of pixel units; a plurality of pairs of scan lines, wherein each pair of scan lines is disposed between at least one pair of pixel units and at least 1 Connecting to a pixel unit; a plurality of data lines, wherein adjacent data lines are disposed between at least one pair of pixel units and connected to at least one pair of pixel units; wherein each pixel unit is adjacent to a pole of an adjacent pixel unit.
  • the pixel unit of the opposite polarity is disposed in the periphery of each pixel unit in the display panel of the present invention, which can realize dot inversion between the pixel units and greatly improve the display image quality of the display panel.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种基于ＨＳＤ结构的显示面板，包括：像素单元阵列，包括有若干对像素单元（A，B）；若干对扫描线（G1，G2），其中，每一对扫描线（G1，G2）设置在至少１对像素单元（A，B）之间并与至少１对像素单元（A，B）连接；若干条数据线（D1，D2），其中，相邻的数据线（D1，D2）设置在至少１对像素单元（A，B）之间并与至少１对像素单元（A，B）连接；其中，每一像素单元均与相邻的像素单元的极性相反。该显示面板能够实现像素单元之间的点反转，大大提升显示面板的显示画质。

Description

基于HSD结构的显示面板和显示装置
【技术领域】
本发明涉及液晶技术领域，特别是涉及一种基于HSD结构的显示面板和显示装置。
【背景技术】
前的显示面板生产采用HSD(Half Source Driving，半源极驱动)结构，即，将扫描线的数量加倍，相应的数据线的数量减少1/2，与传统的显示面板结构相比，HSD结构的显示面板中信号线的总数量会有明显的减少，从而实现减少数据线驱动芯片的数量，最终达到节省制造成本的目的。
然而，一般HSD结构的显示面板中的一个像素循环单元中有2或4个像素，如图1所示，该HSD结构中的数据线和扫描线之间构成一个像素循环单元，该像素循环单元中有2个像素（A、B）。该HSD结构包括至少两列像素单元（10、11），其中，第一列像素单元10和第二列像素单元11的极性相反，由于第一列像素单元10和第二列像素单元11之间的极性相反，难以实现第一列像素单元10和第二列像素单元11之间的点反转，大大影响显示面板的显示画质。
综上所述，有必要提供一种基于HSD结构的显示面板和显示装置以解决上述问题。
【发明内容】
本发明主要解决的技术问题是提供一种基于HSD结构的显示面板和显示装置，能够有效提高显示面板的显示画质。
为解决上述技术问题，本发明采用的一个技术方案是：提供一种基于HSD结构的显示面板，该显示面板包括：像素单元阵列，包括有若干对像素单元；若干对扫描线，其中，每一对扫描线设置在至少1对像素单元之间并与至少1对像素单元连接；若干条数据线，其中，相邻的数据线设置在至少1对像素单元之间并与至少1对像素单元连接；其中，每一像素单元均与相邻的像素单元的极性相反；
每一对扫描线包括第一扫描线和第二扫描线，第一扫描线和第二扫描线中的一者与每一对像素单元中的一者连接，第一扫描线和第二扫描线中的另一者与每一对像素单元中剩下的一者连接；数据线包括第一数据线和第二数据线，第一数据线和第二数据线中的一者与每一对像素单元中的一者连接，第一数据线和第二数据线中的另一者与每一对像素单元中剩下的一者连接；第一数据线和第二数据线所传输的数据电压的极性相反；每一对像素单元包括第一像素单元和第二像素单元，第一像素单元和第二像素单元的极性相反，第一像素单元和第二像素单元相邻设置。
其中，若干对像素单元包括至少4对像素单元，若干对扫描线包括至少2对扫描线，每一对扫描线之间设置有至少2对像素单元；若干条数据线包括至少3条数据线，相邻的数据线之间设置有至少2对像素单元。
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种基于HSD结构的显示面板，该显示面板包括：像素单元阵列，包括有若干对像素单元；若干对扫描线，其中，每一对扫描线设置在至少1对像素单元之间并与至少1对像素单元连接；若干条数据线，其中，相邻的数据线设置在至少1对像素单元之间并与至少1对像素单元连接；其中，每一像素单元均与相邻的像素单元的极性相反。
其中，每一对扫描线包括第一扫描线和第二扫描线，第一扫描线和第二扫描线中的一者与每一对像素单元中的一者连接，第一扫描线和第二扫描线中的另一者与每一对像素单元中剩下的一者连接。
其中，数据线包括第一数据线和第二数据线，第一数据线和第二数据线中的一者与每一对像素单元中的一者连接，第一数据线和第二数据线中的另一者与每一对像素单元中剩下的一者连接。
其中，第一数据线和第二数据线所传输的数据电压的极性相反。
其中，每一对像素单元包括第一像素单元和第二像素单元，第一像素单元和第二像素单元的极性相反，第一像素单元和第二像素单元相邻设置。
其中，若干对像素单元包括至少4对像素单元，若干对扫描线包括至少2对扫描线，每一对扫描线之间设置有至少2对像素单元。
其中，若干条数据线包括至少3条数据线，相邻的数据线之间设置有至少2对像素单元。
其中，第一像素单元的周边设置有4个相邻的第二像素单元，第二像素单元的周边设置有4个相邻的第一像素单元。
其中，显示面板为COA型液晶面板。
为解决上述技术问题，本发明采用的又一个技术方案是：提供一种显示装置，该显示装置包括显示面板，该显示面板包括：像素单元阵列，包括有若干对像素单元；若干对扫描线，其中，每一对扫描线设置在至少1对像素单元之间并与至少1对像素单元连接；若干条数据线，其中，相邻的数据线设置在至少1对像素单元之间并与至少1对像素单元连接；其中，每一像素单元均与相邻的像素单元的极性相反。
其中，每一对扫描线包括第一扫描线和第二扫描线，第一扫描线和第二扫描线中的一者与每一对像素单元中的一者连接，第一扫描线和第二扫描线中的另一者与每一对像素单元中剩下的一者连接。
其中，数据线包括第一数据线和第二数据线，第一数据线和第二数据线中的一者与每一对像素单元中的一者连接，第一数据线和第二数据线中的另一者与每一对像素单元中剩下的一者连接。
其中，第一数据线和第二数据线所传输的数据电压的极性相反。
其中，每一对像素单元包括第一像素单元和第二像素单元，第一像素单元和第二像素单元的极性相反，第一像素单元和第二像素单元相邻设置。
其中，若干对像素单元包括至少4对像素单元，若干对扫描线包括至少2对扫描线，每一对扫描线之间设置有至少2对像素单元。
其中，若干条数据线包括至少3条数据线，相邻的数据线之间设置有至少2对像素单元。
其中，第一像素单元的周边设置有4个相邻的第二像素单元，第二像素单元的周边设置有4个相邻的第一像素单元。
其中，显示面板为COA型液晶面板。
本发明的有益效果是：区别于现有技术的情况，本发明的基于HSD结构的显示面板包括：像素单元阵列，包括有若干对像素单元；若干对扫描线，其中，每一对扫描线设置在至少1对像素单元之间并与至少1对像素单元连接；若干条数据线，其中，相邻的数据线设置在至少1对像素单元之间并与至少1对像素单元连接；其中，每一像素单元均与相邻的像素单元的极性相反。通过上述方式，本发明的显示面板中的每一像素单元的周边均设置有极性相反的像素单元，能够实现像素单元之间的点反转，大大提升显示面板的显示画质。
【附图说明】
图1是现有技术中基于HSD结构的显示面板的像素单元阵列的结构示意图；
图2是本发明显示装置的结构示意图；
图3是本发明基于HSD结构的显示面板的像素单元阵列的结构示意图；
图4是图3中局部区域A的放大结构示意图。
【具体实施方式】
下面结合附图和实施方式对本发明进行详细说明。
如图2所示，图2是本发明显示装置的结构示意图。该显示装置包括显示面板21、栅极驱动单元22和源极驱动单元23。其中，栅极驱动单元22用于根据待显示的图像选通显示面板21的相应像素，源极驱动单元23用于将所接收的待显示的图像的显示数据转换为数据电压，该数据电压通过数据线加载在显示面板21上相对应的像素上，显示相应的画面。
在本实施例中，显示面板21为COA（Color Filter on Array）型液晶面板。COA型液晶面板所包括的COA基板所采用的技术是将一种将彩色滤光片集成在阵列基板上的技术。相比传统的CF（彩色滤光片）基板与TFT（薄膜晶体管）基板对组技术，COA技术提供了一种降低显示面板制备过程中对盒制程的难度的设计思路。具体来说，在传统技术中，为了尽量消除对组误差，在设计中采用较宽的黑色矩阵（BM）遮光，而在COA基板中，黑色矩阵可以设计为窄线宽，开口率随之提升。另外，COA 基板通过色阻层增加了像素电极与金属走线之间的距离，减小了二者间的电容耦合效应，金属线上的信号延时效应得以改善，面板品质得到提升。
如图3和图4所示，显示面板21包括像素单元阵列、若干对扫描线（G1、G2）和若干条数据线（D1、D2）。像素单元阵列包括有若干对像素单元（A、B），扫描线（G1、G2）与数据线（D1、D2）垂直设置，扫描线（G1、G2）与数据线（D1、D2）之间形成的像素区域（如第一像素区域201或第二像素区域202）设置有一对像素单元（A、B）。每一对扫描线（G1、G2）设置在至少1对像素单元（A、B）之间并与至少1对像素单元（A、B）连接。相邻的数据线（D1、D2）设置在至少1对像素单元（A、B）之间并与至少1对像素单元（A、B）连接。
在本实施例中，每一对扫描线（G1、G2）按顺序排列设置，每一对扫描线（G1、G2）包括第一扫描线G1和第二扫描线G2，第一扫描线G1和第二扫描线G2之间设置有至少一对像素单元（A、B）。每一对像素单元（A、B）包括第一像素单元A和第二像素单元B，第一像素单元A和第二像素单元B相邻设置。第一扫描线G1和第二扫描线G2中的一者与每一对像素单元（A、B）中的一者连接，第一扫描线G1和第二扫描线G2中的另一者与每一对像素单元（A、B）中剩下的一者连接。
具体地，在第一像素区域201中，第一扫描线G1与第一像素区域201中的第一像素单元A连接，第二扫描线G2与第一像素区域201中剩下的第二像素单元B连接。而在第二像素区域202中，第一扫描线G1与第二像素区域202中的第二像素单元B连接，第二扫描线G2与第二像素区域202中剩下的第一像素单元A连接。在第三像素区域203中，第一扫描线G1与第三像素区域203中的第一像素单元A连接，第二扫描线G2与第三像素区域203中剩下的第二像素单元B连接。而在第四像素区域204中，第一扫描线G1与第四像素区域204中的第二像素单元B连接，第二扫描线G2与第四像素区域204中剩下的第一像素单元A连接。应理解，本发明的每一对扫描线为至少1对像素单元提供驱动电压，如在第一像素区域201中，第一扫描线G1和第二扫描线G2为第一像素区域201中的第一像素单元A和第二像素单元B提供驱动电压；在第二像素区域202中，另外一对扫描线如第一扫描线G1和第二扫描线G2为第二像素区域202中的第一像素单元A和第二像素单元B提供驱动电压。
值得注意的是，在本发明中，为了进一步提高开口率，在每一个像素单元中，将设置在衬底基板上ITO（导电玻璃）膜层拉伸，如拉伸ITO膜层的边缘面积，使得ITO膜层的整体面积大于衬底基板的面积，这样在ITO膜层上有更多的空间，从而增加像素单元的开口率。
数据线（D1、D2）包括第一数据线D1和第二数据线D2。在本实施例中，第一数据线D1和第二数据线D2按顺序排列设置，第一数据线D1和第二数据线D2之间设置有至少一对像素单元（A、B）。其中，第一数据线D1和第二数据线D2中的一者与每一对像素单元（A、B）中的一者连接，第一数据线D1和第二数据线D2中的另一者与每一对像素单元（A、B）中剩下的一者连接。
具体地，在第一像素区域201中，第一数据线D1与第一像素区域201中的第二像素单元B连接，第二数据线D2与第一像素区域201中剩下的第一像素单元A连接。在第二像素区域202中，第二数据线D2与第二像素区域202中的第一像素单元A连接，第一数据线D2与第二像素区域202中剩下的第二像素单元B连接。在第三像素区域203中，第一数据线D1与第三像素区域203中的第二像素单元B连接，第二数据线D2与第三像素区域203中剩下的第一像素单元A连接。在第四像素区域204中，第二数据线D2与第四像素区域204中的第一像素单元A连接，第一数据线D1与第四像素区域204中剩下的第二像素单元B连接。
应理解，本发明的每一条数据线分别为至少2个像素单元提供数据电压，具体地，每一条数据线分别为相邻的两个像素区提供数据电压，如第二数据线D2为第一像素区域201中的第一像素单元A提供数据电压，第二数据线D2同时也为第二像素区域202中的第一像素单元A提供数据电压。
在本实施例中，第一数据线D1和第二数据线D2所传输的数据电压的极性相反。如第一数据线D1传输的数据电压为正，第二数据线D2传输的数据电压为负。应理解，本发明并不限定第一数据线D1传输的数据电压为正，第二数据线D2传输的数据电压为负。当然，在其他实施例中，第一数据线D1传输的数据电压也可以为正，第二数据线D2传输的数据电压也可以为负。
进一步地，第一像素单元A和第二像素单元B的极性相反，如第一像素单元A接收的数据电压为负时工作，第二像素单元B接收的数据电压为正时工作。应理解，在其他实施例中，可以根据实际设计，将第一像素单元A设计成接收的数据电压为正时工作，将第二像素单元B设计成接收的数据电压为负时工作。
每一像素单元均与相邻的像素单元的极性相反，即无论是在同一像素区域还是在相邻像素区域，像素单元均与相邻的像素单元的极性相反，这样可以实现相邻像素单元之间的极性反转，如第一像素区域201中的第二像素单元B与第二像素区域202中的第一像素单元A的极性相反；第一像素区域201中的第二像素单元B与第三像素区域203中的第一像素单元A的极性相反。优选地，若干对像素单元（A、B）包括至少4对像素单元（A、B），若干对扫描线（G1、G2）包括至少2对扫描线（G1、G2），每一对扫描线（G1、G2）之间设置有至少2对像素单元（A、B）。若干条数据线（D1、D2）包括至少3条数据线（D1、D2），相邻的数据线（D1、D2）之间设置有至少2对像素单元（A、B）。
应理解，本发明的第一像素单元A的周边设置有4个相邻的第二像素单元B，第二像素单元B的周边设置有4个相邻的第一像素单元A。也就是说，由于每一像素单元（A、B）均与相邻的像素单元（A、B）的极性相反，因此本发明通过8个像素单元（A、B）形成一个像素循环单元，如通过第一像素区域201、第二像素区域202、第三像素区域203和第四像素区域204中的像素单元形成一个像素循环单元，与现有技术中的HSD结构相比，本发明在设计上进行改进，增加像素循环单元内的像素单元的数量，其能够实现相邻像素单元之间的极性反正，改善显示面板的显示画质。
综上，本发明的基于HSD结构的显示面板包括：像素单元阵列，包括有若干对像素单元；若干对扫描线，其中，每一对扫描线设置在至少1对像素单元之间并与至少1对像素单元连接；若干条数据线，其中，相邻的数据线设置在至少1对像素单元之间并与至少1对像素单元连接；其中，每一像素单元均与相邻的像素单元的极性相反。通过上述方式，本发明的显示面板中的每一像素单元的周边均设置有极性相反的像素单元，能够实现像素单元之间的点反转，大大提升显示面板的显示画质。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (20)

  1. 一种基于HSD结构的显示面板，其中，所述显示面板包括：
    像素单元阵列，包括有若干对像素单元；
    若干对扫描线，其中，每一对所述扫描线设置在至少1对像素单元之间并与所述至少1对像素单元连接；
    若干条数据线，其中，相邻的所述数据线设置在所述至少1对像素单元之间并与所述至少1对像素单元连接；
    其中，每一所述像素单元均与相邻的所述像素单元的极性相反；
    每一对所述扫描线包括第一扫描线和第二扫描线，所述第一扫描线和所述第二扫描线中的一者与每一对所述像素单元中的一者连接，所述第一扫描线和所述第二扫描线中的另一者与每一对所述像素单元中剩下的一者连接；
    所述数据线包括第一数据线和第二数据线，所述第一数据线和所述第二数据线中的一者与每一对所述像素单元中的一者连接，所述第一数据线和所述第二数据线中的另一者与每一对所述像素单元中剩下的一者连接；
    所述第一数据线和所述第二数据线所传输的数据电压的极性相反；
    每一对所述像素单元包括第一像素单元和第二像素单元，所述第一像素单元和所述第二像素单元的极性相反，所述第一像素单元和所述第二像素单元相邻设置。
  2. 根据权利要求1所述的显示面板，其中，所述若干对像素单元包括至少4对所述像素单元，所述若干对扫描线包括至少2对所述扫描线，每一对所述扫描线之间设置有至少2对像素单元；所述若干条数据线包括至少3条数据线，相邻的所述数据线之间设置有所述至少2对像素单元。
  3. 一种基于HSD结构的显示面板，其中，所述显示面板包括：
    像素单元阵列，包括有若干对像素单元；
    若干对扫描线，其中，每一对所述扫描线设置在至少1对像素单元之间并与所述至少1对像素单元连接；
    若干条数据线，其中，相邻的所述数据线设置在所述至少1对像素单元之间并与所述至少1对像素单元连接；
    其中，每一所述像素单元均与相邻的所述像素单元的极性相反。
  4. 根据权利要求3所述的显示面板，其中，每一对所述扫描线包括第一扫描线和第二扫描线，所述第一扫描线和所述第二扫描线中的一者与每一对所述像素单元中的一者连接，所述第一扫描线和所述第二扫描线中的另一者与每一对所述像素单元中剩下的一者连接。
  5. 根据权利要求4所述的显示面板，其中，所述数据线包括第一数据线和第二数据线，所述第一数据线和所述第二数据线中的一者与每一对所述像素单元中的一者连接，所述第一数据线和所述第二数据线中的另一者与每一对所述像素单元中剩下的一者连接。
  6. 根据权利要求5所述的显示面板，其中，所述第一数据线和所述第二数据线所传输的数据电压的极性相反。
  7. 根据权利要求5所述的显示面板，其中，每一对所述像素单元包括第一像素单元和第二像素单元，所述第一像素单元和所述第二像素单元的极性相反，所述第一像素单元和所述第二像素单元相邻设置。
  8. 根据权利要求7所述的显示面板，其中，所述若干对像素单元包括至少4对所述像素单元，所述若干对扫描线包括至少2对所述扫描线，每一对所述扫描线之间设置有至少2对像素单元。
  9. 根据权利要求8所述的显示面板，其中，所述若干条数据线包括至少3条数据线，相邻的所述数据线之间设置有所述至少2对像素单元。
  10. 根据权利要求9所述的显示面板，其中，所述第一像素单元的周边设置有4个相邻的所述第二像素单元，所述第二像素单元的周边设置有4个相邻的所述第一像素单元。
  11. 根据权利要求3所述的显示面板，其中，所述显示面板为COA型液晶面板。
  12. 一种显示装置，其中，所述显示装置包括显示面板，所述显示面板包括：
    像素单元阵列，包括有若干对像素单元；
    若干对扫描线，其中，每一对所述扫描线设置在至少1对像素单元之间并与所述至少1对像素单元连接；
    若干条数据线，其中，相邻的所述数据线设置在所述至少1对像素单元之间并与所述至少1对像素单元连接；
    其中，每一所述像素单元均与相邻的所述像素单元的极性相反。
  13. 根据权利要求12所述的显示装置，其中，每一对所述扫描线包括第一扫描线和第二扫描线，所述第一扫描线和所述第二扫描线中的一者与每一对所述像素单元中的一者连接，所述第一扫描线和所述第二扫描线中的另一者与每一对所述像素单元中剩下的一者连接。
  14. 根据权利要求13所述的显示装置，其中，所述数据线包括第一数据线和第二数据线，所述第一数据线和所述第二数据线中的一者与每一对所述像素单元中的一者连接，所述第一数据线和所述第二数据线中的另一者与每一对所述像素单元中剩下的一者连接。
  15. 根据权利要求14所述的显示装置，其中，所述第一数据线和所述第二数据线所传输的数据电压的极性相反。
  16. 根据权利要求14所述的显示装置，其中，每一对所述像素单元包括第一像素单元和第二像素单元，所述第一像素单元和所述第二像素单元的极性相反，所述第一像素单元和所述第二像素单元相邻设置。
  17. 根据权利要求16所述的显示装置，其中，所述若干对像素单元包括至少4对所述像素单元，所述若干对扫描线包括至少2对所述扫描线，每一对所述扫描线之间设置有至少2对像素单元。
  18. 根据权利要求17所述的显示装置，其中，所述若干条数据线包括至少3条数据线，相邻的所述数据线之间设置有所述至少2对像素单元。
  19. 根据权利要求18所述的显示装置，其中，所述第一像素单元的周边设置有4个相邻的所述第二像素单元，所述第二像素单元的周边设置有4个相邻的所述第一像素单元。
  20. 根据权利要求12所述的显示装置，其中，所述显示面板为COA型液晶面板。
PCT/CN2015/099717 2015-12-14 2015-12-30 基于hsd结构的显示面板和显示装置 WO2017101161A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/917,019 US20180047352A1 (en) 2015-12-14 2015-12-30 Display panel and display device based on hsd structure

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510928894.5A CN105336304A (zh) 2015-12-14 2015-12-14 基于hsd结构的显示面板和显示装置
CN201510928894.5 2015-12-14

Publications (1)

Publication Number Publication Date
WO2017101161A1 true WO2017101161A1 (zh) 2017-06-22

Family

ID=55286792

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/099717 WO2017101161A1 (zh) 2015-12-14 2015-12-30 基于hsd结构的显示面板和显示装置

Country Status (3)

Country Link
US (1) US20180047352A1 (zh)
CN (1) CN105336304A (zh)
WO (1) WO2017101161A1 (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105789220B (zh) * 2016-03-24 2019-05-14 京东方科技集团股份有限公司 一种双栅线阵列基板、测试方法、显示面板和显示装置
TWI599830B (zh) * 2016-05-09 2017-09-21 友達光電股份有限公司 畫素陣列及顯示裝置
CN106094383B (zh) * 2016-08-30 2019-03-01 武汉华星光电技术有限公司 一种阵列基板布线结构、液晶显示面板及液晶显示器
CN109471288B (zh) * 2018-07-02 2021-10-29 惠科股份有限公司 显示面板及液晶显示面板的制造方法
CN208569265U (zh) * 2018-07-17 2019-03-01 惠科股份有限公司 阵列基板及液晶显示面板
TWI690747B (zh) * 2018-12-05 2020-04-11 友達光電股份有限公司 畫素陣列基板
CN110060652A (zh) * 2019-06-10 2019-07-26 北海惠科光电技术有限公司 阵列基板、显示装置及其驱动方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101566744A (zh) * 2009-06-08 2009-10-28 友达光电股份有限公司 液晶显示器及其液晶显示面板
US20100110046A1 (en) * 2008-11-05 2010-05-06 Ken-Ming Chen Display Panel with Half Source Driver Structure and Display Data Supplying Method thereof
CN102368125A (zh) * 2009-04-27 2012-03-07 友达光电股份有限公司 液晶显示器及其液晶显示面板的驱动方法
CN103514846A (zh) * 2012-06-29 2014-01-15 北京京东方光电科技有限公司 一种液晶显示器及其驱动方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101100890B1 (ko) * 2005-03-02 2012-01-02 삼성전자주식회사 액정표시장치 및 그 구동방법
TW201042625A (en) * 2009-05-27 2010-12-01 Au Optronics Corp Liquid crystal display device and liquid crystal display panel thereof
CN203786435U (zh) * 2014-02-27 2014-08-20 京东方科技集团股份有限公司 Coa阵列基板及显示装置
CN103971657B (zh) * 2014-05-27 2017-03-08 深圳市华星光电技术有限公司 液晶显示面板驱动方法
CN104062792B (zh) * 2014-07-04 2017-06-30 深圳市华星光电技术有限公司 一种用于驱动hsd液晶显示面板的方法及装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100110046A1 (en) * 2008-11-05 2010-05-06 Ken-Ming Chen Display Panel with Half Source Driver Structure and Display Data Supplying Method thereof
CN102368125A (zh) * 2009-04-27 2012-03-07 友达光电股份有限公司 液晶显示器及其液晶显示面板的驱动方法
CN101566744A (zh) * 2009-06-08 2009-10-28 友达光电股份有限公司 液晶显示器及其液晶显示面板
CN103514846A (zh) * 2012-06-29 2014-01-15 北京京东方光电科技有限公司 一种液晶显示器及其驱动方法

Also Published As

Publication number Publication date
US20180047352A1 (en) 2018-02-15
CN105336304A (zh) 2016-02-17

Similar Documents

Publication Publication Date Title
WO2017101161A1 (zh) 基于hsd结构的显示面板和显示装置
WO2017092082A1 (zh) 阵列基板以及液晶显示装置
WO2014023050A1 (zh) 液晶显示面板及显示装置
WO2017024644A1 (zh) 一种液晶显示面板及其驱动电路
WO2017071090A1 (zh) 广视角面板和显示装置
WO2017031790A1 (zh) 阵列基板及其驱动方法
WO2015043036A1 (zh) 一种阵列基板及液晶显示面板
WO2016176914A1 (zh) 基板及其液晶显示装置
WO2016058183A1 (zh) 阵列基板及液晶显示面板
WO2019015078A1 (zh) 一种阵列基板以及显示面板
WO2017031793A1 (zh) 一种液晶显示面板及其阵列基板
WO2019144483A1 (zh) 显示模组及电子设备
WO2017015993A1 (zh) 液晶显示器及其液晶面板
WO2017088201A1 (zh) 液晶显示装置及其反射式显示模组
WO2015000188A1 (zh) 显示面板及其驱动方法、显示装置
WO2019104839A1 (zh) 像素驱动架构、显示面板及显示装置
WO2016112563A1 (zh) 阵列基板及液晶显示器
WO2017079992A1 (zh) 改善大视角色偏的液晶显示器
WO2019127767A1 (zh) 显示面板的驱动方法及显示装置
WO2014023010A1 (zh) 一种阵列基板及液晶显示面板
WO2014153771A1 (zh) 阵列基板及液晶显示装置
WO2018120386A1 (zh) 显示面板及其阵列基板
WO2019015008A1 (zh) 一种像素阵列基板及显示器
WO2017124596A1 (zh) 液晶显示面板及液晶显示装置
WO2019205204A1 (zh) 柔性阵列基板、柔性液晶显示面板和柔性液晶显示器

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14917019

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15910630

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15910630

Country of ref document: EP

Kind code of ref document: A1