WO2019041476A1 - 一种阵列基板及其制作方法、显示面板 - Google Patents
一种阵列基板及其制作方法、显示面板 Download PDFInfo
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- WO2019041476A1 WO2019041476A1 PCT/CN2017/106966 CN2017106966W WO2019041476A1 WO 2019041476 A1 WO2019041476 A1 WO 2019041476A1 CN 2017106966 W CN2017106966 W CN 2017106966W WO 2019041476 A1 WO2019041476 A1 WO 2019041476A1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
Definitions
- the present invention relates to the field of display technologies, and in particular, to an array substrate, a method for fabricating the same, and a display panel.
- the existing capacitive touch screen structure has an outer representation represented by GFF (Glass-Film-Film) and OGS (OneGlassSolution).
- Cell structure On Cell structure, Hybrid In Cell structure, and Full In cell structure.
- Full In The Cell structure refers to a method of embedding a touch function into a liquid crystal pixel, that is, embedding a touch sensor function inside the display screen, the screen can be made lighter and thinner, and the light transmittance is better, which is bound to become the mainstream structure of the touch screen in the future.
- the technical problem to be solved by the present invention is to provide an array substrate, a manufacturing method thereof, and a display panel, which can reduce the manufacturing process of the array substrate, thereby reducing the manufacturing cost of the array substrate.
- a technical solution adopted by the present invention is to provide a method for fabricating an array substrate, the method for fabricating the array substrate includes: providing a substrate; sequentially fabricating a TFT functional layer, a touch signal transmission line, and a first insulating layer, a first electrode, and a second insulating layer; wherein the first electrode serves as both a common electrode and a touch sensor; and the first insulating layer is formed by etching a mask on the second insulating layer a second via hole; wherein the first via hole exposes the touch signal transmission line and the first electrode, the second via hole exposes the source and/or the drain in the TFT functional layer; and the second electrode is formed on the second insulating layer And a metal pattern; wherein the metal pattern is connected to the touch signal transmission line and the first electrode through the first via, and the second electrode is connected to the source and/or the drain through the second via.
- an array substrate including a substrate sequentially stacked, a TFT functional layer, a touch signal transmission line, a first insulating layer, a first electrode, and a second An insulating layer, a second electrode, and a metal pattern; wherein the first electrode serves as both a common electrode and a touch sensor; wherein the second insulating layer is provided with a first via formed by etching with a mask Two vias, the first via exposes the touch signal transmission line and the first electrode, and the second via exposes the source and/or the drain in the TFT functional layer; wherein the second electrode and the metal pattern use the same metal layer The metal pattern is connected to the touch signal transmission line and the first electrode through the first via, and the second electrode is connected to the source and/or the drain through the second via.
- a display panel including an array substrate, a color filter substrate, and a liquid crystal layer between the array substrate and the color filter substrate, wherein the array substrate is fabricated as above.
- the method is fabricated, or the array substrate is an array substrate as above.
- the method for fabricating the array substrate comprises: providing a substrate; sequentially fabricating a TFT functional layer, a touch signal transmission line, a first insulating layer, and a first An electrode, a second insulating layer; wherein the first electrode serves as both a common electrode and a touch sensor; and a first via and a second via are formed on the second insulating layer by using a mask;
- the first via hole exposes the touch signal transmission line and the first electrode
- the second via hole exposes the source and/or the drain in the TFT functional layer
- the second electrode and the metal pattern are formed on the second insulating layer;
- the metal pattern connects the touch signal transmission line and the first electrode through the first via, and the second electrode connects the source and/or the drain through the second via.
- FIG. 1 is a schematic top plan view of an embodiment of an array substrate provided by the present invention.
- FIG. 2 is a schematic diagram of connection of a common electrode and a touch signal transmission line in the prior art
- FIG. 3 is a schematic side view showing an embodiment of an array substrate provided by the present invention.
- FIG. 4 is a schematic flow chart of an embodiment of a method for fabricating an array substrate provided by the present invention.
- step S42 is a schematic structural view of step S42 in an embodiment of a method for fabricating an array substrate provided by the present invention
- step S43 is a schematic structural view of step S43 in an embodiment of a method for fabricating an array substrate provided by the present invention
- step S44 is a schematic structural view of step S44 in an embodiment of a method for fabricating an array substrate provided by the present invention
- FIG. 8 is a schematic structural view of a functional layer of a TFT in an embodiment of a method for fabricating an array substrate provided by the present invention
- FIG. 9 is a schematic structural view of an embodiment of a display panel provided by the present invention.
- a self-capacitance Full In Cell is adopted.
- Touch technology generally uses a patterned common electrode as a touch sensor, and uses Display & Touch time-division driving to achieve the purpose of reducing the processing of noise signals.
- the array substrate includes at least a plurality of common electrodes 11 distributed in an array, and at the same time, each common electrode 11 Also used as a touch sensor for array substrates.
- Each of the common electrodes 11 is connected to the controller 13 via a touch signal transmission line 12.
- the common electrode 11 receives the controller through the touch signal transmission line 12
- the common electrode signal is transmitted.
- the pixel electrode receives the data signal, and an electric field is formed between the common electrode 11 and the pixel electrode to change the deflection direction of the liquid crystal molecules to realize the display function.
- the common electrode 11 As the touch electrode, an external touch signal is received, and the touch signal is transmitted to the controller 13 through the touch signal transmission line 12 to implement a touch control function.
- the pixel electrodes are disposed on the array substrate.
- FIG. 2 is a schematic diagram of connection of a common electrode and a touch signal transmission line in the prior art.
- the array substrate includes a substrate 20 and a TFT functional layer 21 laminated on the substrate 20.
- a touch signal transmission line 22 a first insulating layer 23, a first electrode 24, a second insulating layer 25, and a second electrode 26.
- a via hole is formed on the first insulating layer 23 by one mask etching to form the first electrode 24
- the first electrode 24 is connected to the touch signal transmission line 22 through the via hole; before the second electrode 26 is formed, a via hole is formed on the second insulating layer 25 by another mask etching to form the second electrode.
- the second electrode 26 is connected to the source and/or the drain in the TFT functional layer 21 through the via.
- FIG. 3 is a schematic side view showing an embodiment of an array substrate provided by the present invention, and the array substrate includes a substrate 30. And a TFT functional layer 31, a touch signal transmission line 32, a first insulating layer 33, a first electrode 34, a second insulating layer 35, and a second electrode 361 which are stacked on the substrate 30. And metal pattern 362.
- the first electrode 34 serves as both a common electrode and a touch sensor.
- the second insulating layer is provided with a first via hole (not labeled) and a second via hole (not labeled) formed by etching a mask, and the first via hole exposes the touch signal transmission line 32 and the first electrode 34 Second via
- the source and / or drain in the TFT function layer 31 are bare.
- the second electrode 361 and the metal pattern 362 are formed by using the same metal layer, and the metal pattern 362
- the touch signal transmission line 32 and the first electrode 34 are connected through the first via, and the second electrode 361 is connected to the source and/or the drain through the second via.
- the TFT functional layer 31 includes a light shielding layer, a buffer layer, an active layer, a gate insulating layer, a gate electrode, an interlayer dielectric layer, and a source/layer. a drain and a flat layer; wherein the interlayer dielectric layer is provided with a third via hole and a fourth via hole formed by etching, the third via hole exposes a source region of the active layer, and the fourth via hole exposes the active layer a drain region; a source is connected to the source region through the third via, and a drain is connected to the drain region through the fourth via.
- the specific structure in the TFT function 31 is only a schematic example, and the present embodiment is not limited. The specific structure in the TFT function layer 31 will be described in the following embodiments, and details are not described herein again.
- the first via comprises a first via extending through the second insulating layer 35 and extending through the first electrode 34 and the first insulating layer 33 a second through hole; wherein a width of the first through hole is larger than a width of the second through hole such that a bottom portion of the first through hole exposes a portion of the upper surface of the first electrode 34; and a bottom touch signal of the second through hole is exposed Transmission line 32 Part of the upper surface.
- the metal pattern 362 can be made to be in contact with the touch signal transmission line 32 and the first electrode 34 better.
- the via of the metal pattern 362 and the second electrode 361 The via holes are completed in one process, and only one photomask is used. Therefore, the embodiment can reduce the manufacturing process of the array substrate and save cost.
- FIG. 4 is a schematic flowchart diagram of an embodiment of a method for fabricating an array substrate according to the present invention. The method includes:
- the substrate is generally a transparent glass substrate.
- the substrate can also be made of a suitable flexible material, such as polyethylene terephthalate (PET) or polyphthalic acid. Glycol ester (PEN), but the embodiment is not limited thereto.
- PET polyethylene terephthalate
- PEN polyphthalic acid
- the embodiment is not limited thereto.
- S42 sequentially forming a TFT functional layer, a touch signal transmission line, a first insulating layer, a first electrode, and a second insulating layer on the substrate.
- a TFT functional layer 31 As shown in FIG. 5, a TFT functional layer 31, a touch signal transmission line 32, and a first insulating layer are sequentially formed on the substrate 30.
- the first electrode 34 is formed on the first insulating layer 33, and may be specifically: in the first insulating layer 33. A layer of metal is formed thereon, and the layer of metal is patterned to obtain the first electrode 34.
- the first electrode 34 functions as both a common electrode and a touch sensor, that is, a touch electrode.
- a first via 351 and a second via 352 are formed on the second insulating layer 35 by a mask etching.
- the first via 351 exposes the touch signal transmission line 32 and the first electrode 34
- the second via 352 exposes the source and/or the drain in the TFT functional layer 31.
- the first via 351 includes a second insulating layer 35 a first through hole (not labeled) and a second through hole (not labeled) penetrating the first electrode 34 and the first insulating layer 33; wherein the width d1 of the first through hole is greater than the width d2 of the second through hole So that the bottom of the first via hole exposes a portion of the upper surface of the first electrode 34; the bottom of the second via hole exposes a portion of the upper surface of the touch signal transmission line 32.
- a second electrode 361 and a metal pattern 362 are formed on the second insulating layer 35; wherein, the metal pattern 362
- the touch signal transmission line 32 and the first electrode 34 are connected through the first via 351, and the second electrode 361 is connected to the source and/or the drain through the second via.
- S42 may specifically include:
- TFT functional layer on the substrate; in the TFT Forming a first metal layer on the functional layer, and patterning the first metal layer to obtain a touch signal transmission line; forming a first insulating layer on the first metal layer; and forming a second metal layer on the first insulating layer, And patterning the second metal layer to obtain a first electrode; and forming a second insulating layer on the second metal layer.
- S44 may specifically include:
- a third metal layer is formed on the second insulating layer, and the third metal layer is patterned to obtain a second electrode and a metal pattern.
- the second metal layer and the third metal layer are obtained by depositing ITO (indium tin oxide).
- the step of fabricating the TFT functional layer on the substrate may specifically include:
- a light shielding layer 311 is formed on the substrate; a buffer layer 312 is formed on the light shielding layer 311; and an active layer is formed on the buffer layer 312. 313, and a source region (not labeled) and a drain region (not labeled) are formed by doping; a gate insulating layer 314 is formed on the active layer 313; and a gate electrode 315 is formed on the gate insulating layer 314.
- An interlayer dielectric layer 316 is formed on the gate 315; and an interlayer dielectric layer 316 is formed.
- the upper via forms a third via and a fourth via; wherein the third via exposes the source region, the fourth via exposes the drain region; and the source 317 and the drain 318 are formed on the interlayer dielectric layer 316; Source 317 The source region is connected through the third via, the drain 318 is connected to the drain region through the fourth via, and the planar layer 319 is formed on the source 317 and the drain 318.
- the light shielding layer 311 is used to block the influence of light on the active layer 313, and prevent the photogenerated carriers from being on the active layer 313. The impact of performance.
- the active layer 313 can be obtained by depositing an amorphous silicon (a-si) layer and then excimer laser annealing. (ELA) process converting the amorphous silicon layer into polycrystalline silicon (poly-Si) And patterning the polysilicon layer and performing ion doping to form an active layer including a source region and a drain region.
- a-si amorphous silicon
- ELA excimer laser annealing
- the buffer layer 312, the gate insulating layer 314, and the interlayer dielectric layer 316 are generally inorganic materials, and specifically, SiOx may be used. , SiNx, or a mixture of SiOx and SiNx, the flat layer 319 is generally an organic material and is not required here.
- M1 when the gate electrode 315 is formed, M1 is formed, and a gate pattern is formed by etching;
- M2 when the source 317 and the drain 318 are formed, M2 is formed, and then the source pattern and the drain pattern are formed by etching;
- M3 when the touch signal transmission line 32 is fabricated, M3 is formed, and the touch signal transmission line pattern is formed by etching;
- M4 when the first electrode 34 is formed, M4 is formed, and a common electrode pattern (ie, a touch electrode pattern) is formed by etching;
- M5 When the second electrode 36 and the metal pattern are formed, M5 is formed, and the second electrode pattern and the metal pattern are formed by etching.
- M1-M3 may be metal such as aluminum or copper
- M4 and M5 are transparent metal materials such as ITO.
- the metal pattern becomes a bridging portion connecting the touch signal transmission line and the first electrode, which reduces a mask etching process and reduces the cost.
- FIG. 9 is a schematic structural diagram of an embodiment of a display panel according to the present invention.
- the display panel includes an array substrate 91 and a color filter substrate. 92 and a liquid crystal layer between the array substrate 91 and the color filter substrate 92.
- the array substrate 91 is fabricated by the fabrication method provided in the above embodiment, or the array substrate 91. It is the array substrate provided in the above embodiment. The structure and working principle are similar to those of the array substrate in the above embodiments, and details are not described herein again.
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Abstract
一种阵列基板(91)及其制作方法、显示面板,其中,该阵列基板(91)的制作方法包括:(S41)提供一基板(30);(S42)在基板(30)上依次制作TFT功能层(31)、触控信号传输线(32)、第一绝缘层(33)、第一电极(34)、第二绝缘层(35);其中,第一电极(34)既用作公共电极,也用作触控传感器;(S43)在第二绝缘层(35)上采用一道光罩蚀刻形成第一过孔(351)和第二过孔(352);其中,第一过孔(351)使触控信号传输线(32)和第一电极(34)裸露,第二过孔(352)使TFT功能层(31)中的源极(317)和/或漏极(318)裸露;(S44)在第二绝缘层(35)上制作第二电极(361)和金属图案(362);其中,金属图案(362)通过第一过孔(351)连接触控信号传输线(32)和第一电极(34),第二电极(361)通过第二过孔(352)连接源极(317)和/或漏极(318)。通过该方式,能够减少阵列基板(91)的制程,从而减少阵列基板(91)的制作成本。
Description
【技术领域】
本发明涉及显示技术领域,特别是涉及一种阵列基板及其制作方法、显示面板。
【背景技术】
现有的电容式触摸屏结构有以GFF(Glass-Film-Film)、OGS(OneGlassSolution)为代表的Out
Cell结构、On Cell结构、Hybrid In Cell结构以及Full In cell结构。其中Full In
Cell结构是指将触控功能嵌入到液晶像素中的方法,即在显示屏内部嵌入触摸传感器功能,可以使屏幕更轻薄、透光性更好,势必成为未来触摸屏的主流结构。
【发明内容】
本发明主要解决的技术问题是提供一种阵列基板及其制作方法、显示面板,能够减少阵列基板的制程,从而减少阵列基板的制作成本。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种阵列基板的制作方法,该阵列基板的制作方法包括:提供一基板;在基板上依次制作TFT功能层、触控信号传输线、第一绝缘层、第一电极、第二绝缘层;其中,第一电极既用作公共电极,也用作触控传感器;在第二绝缘层上采用一道光罩蚀刻形成第一过孔和第二过孔;其中,第一过孔使触控信号传输线和第一电极裸露,第二过孔使TFT功能层中的源极和/或漏极裸露;在第二绝缘层上制作第二电极和金属图案;其中,金属图案通过第一过孔连接触控信号传输线和第一电极,第二电极通过第二过孔连接源极和/或漏极。
为解决上述技术问题,本发明采用的另一个技术方案是:提供阵列基板,该阵列基板包括依次层叠设置的基板、TFT功能层、触控信号传输线、第一绝缘层、第一电极、第二绝缘层、第二电极和金属图案;其中,第一电极既用作公共电极,也用作触控传感器;其中,第二绝缘层上设置有采用一道光罩蚀刻形成的第一过孔和第二过孔,第一过孔使触控信号传输线和第一电极裸露,第二过孔使TFT功能层中的源极和/或漏极裸露;其中,第二电极和金属图案采用同一金属层制作得到,金属图案通过第一过孔连接触控信号传输线和第一电极,第二电极通过第二过孔连接源极和/或漏极。
为解决上述技术问题,本发明采用的另一个技术方案是:提供显示面板,包括阵列基板、彩膜基板以及阵列基板和彩膜基板之间的液晶层,其中,该阵列基板是采用如上的制作方法制作得到,或阵列基板是如上的阵列基板。
本发明的有益效果是:区别于现有技术的情况,本发明提供的阵列基板的制作方法包括:提供一基板;在基板上依次制作TFT功能层、触控信号传输线、第一绝缘层、第一电极、第二绝缘层;其中,第一电极既用作公共电极,也用作触控传感器;在第二绝缘层上采用一道光罩蚀刻形成第一过孔和第二过孔;其中,第一过孔使触控信号传输线和第一电极裸露,第二过孔使TFT功能层中的源极和/或漏极裸露;在第二绝缘层上制作第二电极和金属图案;其中,金属图案通过第一过孔连接触控信号传输线和第一电极,第二电极通过第二过孔连接源极和/或漏极。通过上述方式,能够减少阵列基板的制程,从而减少阵列基板的制作成本。
【附图说明】
图1是本发明提供的阵列基板一实施例的俯视结构示意图
图2是现有技术中公共电极和触摸信号传输线的连接示意图;
图3是本发明提供的阵列基板一实施例的侧视结构示意图;
图4是本发明提供的阵列基板的制作方法一实施例的流程示意图;
图5是本发明提供的阵列基板的制作方法一实施例中步骤S42的结构示意图;
图6是本发明提供的阵列基板的制作方法一实施例中步骤S43的结构示意图;
图7是本发明提供的阵列基板的制作方法一实施例中步骤S44的结构示意图;
图8是本发明提供的阵列基板的制作方法一实施例中TFT功能层的结构示意图;
图9是本发明提供的显示面板一实施例的结构示意图。
【具体实施方式】
在本发明的实施例中,是采用自电容式 Full In Cell
触控技术,一般采用图案化的公共电极作为触控传感器,采用 Display &Touch 分时驱动的方式,以达成减少杂讯信号的处理的目的。
参阅图 1 ,图 1
是本发明提供的阵列基板一实施例的俯视结构示意图,该阵列基板至少包括阵列分布的多个公共电极 11 ,同时,每个公共电极 11
也作为阵列基板的触摸传感器。其中,每个公共电极 11 通过一条触摸信号传输线 12 连接控制器 13 。
可以理解的,在第一时序,公共电极 11 通过触摸信号传输线 12 接收控制器 13
发送的公共电极信号,此时,像素电极接收数据信号,公共电极 11 与像素电极之间形成电场以改变液晶分子的偏转方向,实现显示功能。在第二时序,公共电极 11
作为触摸电极,接收外部的触摸信号,并将触摸信号通过触摸信号传输线 12 发送给控制器 13 ,实现触摸控制功能。
其中,在 FFS ( Fringe Field Switching , 边缘场开关
)显示技术中,像素电极设置在阵列基板上。
参阅图 2 ,图 2 是现有技术中公共电极和触摸信号传输线的连接示意图。
在现有技术中,阵列基板包括基板 20 以及层叠设置在基板 20 上的 TFT 功能层 21
、触控信号传输线 22 、第一绝缘层 23 、第一电极 24 、第二绝缘层 25 和第二电极 26 。
其中,在制作第一电极 24 之前,在第一绝缘层 23 上通过一次光罩蚀刻形成过孔,在制作第一电极 24
时,将第一电极 24 通过该过孔与触控信号传输线 22 连接;在制作第二电极 26 之前,在第二绝缘层 25 上通过另一次光罩蚀刻形成过孔,在制作第二电极
26 时,将第二电极 26 通过该过孔与 TFT 功能层 21 中的源极和 / 或漏极连接。
可以看出,在现有技术中,需要通过两次不同的光罩蚀刻工艺来分别实现第一电极 24 和第二电极 26
的连接。
参阅图 3 ,图 3 是本发明提供的阵列基板一实施例的侧视结构示意图,该阵列基板包括基板 30
以及层叠设置在基板 30 上的 TFT 功能层 31 、触控信号传输线 32 、第一绝缘层 33 、第一电极 34 、第二绝缘层 35 和第二电极 361
以及金属图案 362 。
其中,第一电极 34 既用作公共电极,也用作触控传感器。
其中,第二绝缘层上设置有采用一道光罩蚀刻形成的第一过孔(未标识)和第二过孔(未标识),第一过孔使触控信号传输线 32 和第一电极 34 裸露,第二过孔使
TFT 功能层 31 中的源极和 / 或漏极裸露。
其中,第二电极 361 和金属图案 362 采用同一金属层制作得到,金属图案 362
通过第一过孔连接触控信号传输线 32 和第一电极 34 ,第二电极 361 通过第二过孔连接源极和 / 或漏极。
其中, TFT 功能层 31 包括层叠设置的遮光层、缓冲层、有源层、栅极绝缘层、栅极、层间介质层、源极 /
漏极以及平坦层;其中,层间介质层上设置有蚀刻形成的第三过孔和第四过孔,第三过孔裸露有源层的源极区域,第四过孔裸露有源层的漏极区域;源极通过第三过孔连接源极区域,漏极通过第四过孔连接漏极区域。
TFT 功能 31 中的具体结构仅作示意性的举例,并不限制本实施例,在后面的实施例中会对 TFT 功能层 31 中的具体结构进行说明,这里不再赘述。
可选的,第一过孔包括贯穿第二绝缘层 35 的第一通孔以及贯穿第一电极 34 和第一绝缘层 33
的第二通孔;其中,第一通孔的宽度大于第二通孔的宽度,以使第一通孔的底部裸露第一电极 34 的部分上表面;第二通孔的底部裸露触控信号传输线 32
的部分上表面。这样,能够使得金属图案 362 更好的与触控信号传输线 32 和第一电极 34 形成接触连接。
值得注意的是,由于金属图案 362 的过孔和第二电极 361
的过孔是在一次工序中完成的,只使用一道光罩,因此,本实施例能够减少阵列基板制作的工艺制程,节省成本。
下面,将结合本发明提供的阵列基板的制作方法的实施例对本发明进行说明。
参阅图 4 ,图 4 是本发明提供的阵列基板的制作方法一实施例的流程示意图,该方法包括:
S41 :提供一基板。
可选的,该基板一般为透明的玻璃基板,若用作柔性显示屏时,该基板也可采用适当的柔性材料制成,例如聚对苯二甲酸乙二酯 (PET) 或者聚萘二甲酸乙二醇酯
(PEN) ,但本实施例并不限制于此。
S42 :在基板上依次制作 TFT 功能层、触控信号传输线、第一绝缘层、第一电极、第二绝缘层。
如图 5 所示,在基板 30 上依次制作 TFT 功能层 31 、触控信号传输线 32 、第一绝缘层 33
、第一电极 34 、第二绝缘层 35 。
其中,在第一绝缘层 33 上制作第一电极 34 可以具体为:在第一绝缘层 33
上制作一层金属,对该层金属进行图案化以得到该第一电极 34 。
可以理解的,正如上述说明的,该第一电极 34 既用作公共电极,也用作触控传感器,即触控电极。
S43
:在第二绝缘层上采用一道光罩蚀刻形成第一过孔和第二过孔;其中,第一过孔使触控信号传输线和第一电极裸露,第二过孔使 TFT 功能层中的源极和 /
或漏极裸露。
如图 6 所示,在第二绝缘层 35 上采用一道光罩蚀刻形成第一过孔 351 和第二过孔 352
;其中,第一过孔 351 使触控信号传输线 32 和第一电极 34 裸露,第二过孔 352 使 TFT 功能层 31 中的源极和 / 或漏极裸露。
可选的,在一具体的实施例中,第一过孔 351 包括贯穿第二绝缘层 35
的第一通孔(未标识)以及贯穿第一电极 34 和第一绝缘层 33 的第二通孔(未标识);其中,第一通孔的宽度 d1 大于第二通孔的宽度 d2
,以使第一通孔的底部裸露第一电极 34 的部分上表面;第二通孔的底部裸露触控信号传输线 32 的部分上表面。
S44
:在第二绝缘层上制作第二电极和金属图案;其中,金属图案通过第一过孔连接触控信号传输线和第一电极,第二电极通过第二过孔连接源极和 / 或漏极。
如图 7 所示,在第二绝缘层 35 上制作第二电极 361 和金属图案 362 ;其中,金属图案 362
通过第一过孔 351 连接触控信号传输线 32 和第一电极 34 ,第二电极 361 通过第二过孔连接源极和 / 或漏极。
可选的,在上述的实施步骤中, S42 可以具体包括:
在基板上制作 TFT 功能层;在 TFT
功能层上制作第一金属层,并对第一金属层进行图案化,以得到触控信号传输线;在第一金属层上制作第一绝缘层;在第一绝缘层上制作第二金属层,并对第二金属层进行图案化,以得到第一电极;在第二金属层上制作第二绝缘层。
可选的,在上述的实施步骤中, S44 可以具体为包括:
在第二绝缘层上制作第三金属层,并对第三金属层进行图案化,以得到第二电极和金属图案。
其中,第二金属层和第三金属层是通过沉积 ITO (铟锡氧化物)得到的。
可选的,如图 8 所示,在上述的实施步骤中,在基板上制作 TFT 功能层的步骤可以具体包括:
在基板上制作遮光层 311 ;在遮光层 311 上制作缓冲层 312 ;在缓冲层 312 上制作有源层
313 ,并通过掺杂形成源极区域(未标识)和漏极区域(未标识);在有源层 313 上制作栅极绝缘层 314 ;在栅极绝缘层 314 上制作栅极 315
;在栅极 315 上制作层间介质层 316 ;在层间介质层 316
上蚀刻形成第三过孔和第四过孔;其中,第三过孔裸露源极区域,第四过孔裸露漏极区域;在层间介质层 316 上制作源极 317 和漏极 318 ;其中,源极 317
通过第三过孔连接源极区域,漏极 318 通过第四过孔连接漏极区域;在源极 317 和漏极 318 上制作平坦层 319 。
其中,遮光层 311 用于遮挡光线对有源层 313 的影响,防止光生载流子对有源层 313
性能的影响。
其中,有源层 313 可以通过以下方式制得:先沉积非晶硅 (a-si) 层,再通过准分子激光退火
(ELA) 工艺将所述非晶硅层转化结晶为多晶硅 (poly-Si)
层,再将所述多晶硅层进行图案化处理,并进行离子掺杂,形成包括源极区域和漏极区域的有源层。
可选的,缓冲层 312 、栅极绝缘层 314 、层间介质层 316 一般为无机材料,具体可以采用 SiOx
、 SiNx ,或者 SiOx 和 SiNx 的混合物,平坦层 319 一般为有机材料,这里不作要求。
可以理解的,在制作阵列基板的过程中,往往需要形成一些电极,我们一般是先沉积一层金属,再通过蚀刻形成特定的图形。在本实施例中,一共需要沉积 5 层金属,即
M1-M5 ,下面结合上述图 5- 图 8 进行说明:
M1 :在制作栅极 315 时,形成 M1 ,再通过蚀刻形成栅极图形;
M2 :在制作源极 317 和漏极 318 时,形成 M2 ,再通过蚀刻形成源极图形和漏极图形;
M3 :在制作触摸信号传输线 32 时,形成 M3 ,再通过蚀刻形成触摸信号传输线图形;
M4 :在制作第一电极 34 时,形成 M4 ,再通过蚀刻形成公共电极图案(即触摸电极图案);
M5 :在制作第二电极 36 和金属图案时,形成 M5 ,再通过蚀刻形成第二电极图形和金属图案。
其中, M1-M3 可以是铝、铜等金属, M4 、 M5 为透明的金属材料,例如 ITO 。
在本实施例中,在 M5
图案化后,其中的金属图案成为了连接触摸信号传输线和第一电极的桥接部分,减少了一道光罩蚀刻工艺,降低了成本。
参阅图 9 ,图 9 是本发明提供的显示面板一实施例的结构示意图,该显示面板包括阵列基板 91 、彩膜基板
92 以及阵列基板 91 和彩膜基板 92 之间的液晶层。
其中,阵列基板 91 是采用如上实施例提供的制作方法制作得到,或阵列基板 91
是如上实施例提供的阵列基板。其结构和工作原理与上述实施例中的阵列基板类似,这里不再赘述。
以上所述仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (20)
- 一种显示面板,包括阵列基板、彩膜基板以及所述阵列基板和所述彩膜基板之间的液晶层,其中,所述阵列基板包括依次层叠设置的基板、TFT功能层、触控信号传输线、第一绝缘层、第一电极、第二绝缘层、第二电极和金属图案;其中,所述第一电极既用作公共电极,也用作触控传感器;其中,所述第二绝缘层上设置有采用一道光罩蚀刻形成的第一过孔和第二过孔,所述第一过孔使所述触控信号传输线和所述第一电极裸露,所述第二过孔使所述TFT功能层中的源极和/或漏极裸露;其中,所述第二电极和所述金属图案采用同一金属层制作得到,所述金属图案通过所述第一过孔连接所述触控信号传输线和所述第一电极,所述第二电极通过所述第二过孔连接所述源极和/或漏极;其中,所述第一过孔包括贯穿所述第二绝缘层的第一通孔以及贯穿所述第一电极和所述第一绝缘层的第二通孔;其中,所述第一通孔的宽度大于所述第二通孔的宽度,以使所述第一通孔的底部裸露所述第一电极的部分上表面;所述第二通孔的底部裸露所述触控信号传输线的部分上表面;其中,所述TFT功能层包括层叠设置的遮光层、缓冲层、有源层、栅极绝缘层、栅极、层间介质层、源极/漏极以及平坦层;其中,层间介质层上设置有蚀刻形成的第三过孔和第四过孔,所述第三过孔裸露所述有源层的源极区域,所述第四过孔裸露所述有源层的漏极区域;所述源极通过所述第三过孔连接所述源极区域,所述漏极通过所述第四过孔连接所述漏极区域。
- 根据权利要求1所述的显示面板,其中,所述第一电极、所述第二电极以及所述金属图案采用ITO制作得到。
- 根据权利要求1所述的显示面板,其中,所述触控信号传输线、第一绝缘层、第一电极、第二绝缘层、第二电极和金属图案是采用以下方法制作得到的:在所述TFT功能层上制作第一金属层,并对所述所述第一金属层进行图案化,以得到触控信号传输线;在所述第一金属层上制作第一绝缘层;在所述第一绝缘层上制作第二金属层,并对所述第二金属层进行图案化,以得到第一电极;在所述第二金属层上制作第二绝缘层。
- 根据权利要求1所述的显示面板,其中,所述TFT功能层是采用以下方法制作得到的:在所述基板上制作遮光层;在所述遮光层上制作缓冲层;在所述缓冲层上制作有源层,并通过掺杂形成源极区域和漏极区域;在所述有源层上制作栅极绝缘层;在所述栅极绝缘层上制作栅极;在所述栅极上制作层间介质层;在所述层间介质层上蚀刻形成第三过孔和第四过孔;其中,所述第三过孔裸露所述源极区域,所述第四过孔裸露所述漏极区域;在所述层间介质层上制作源极和漏极;其中,所述源极通过所述第三过孔连接所述源极区域,所述漏极通过所述第四过孔连接所述漏极区域;在所述源极和漏极上制作平坦层。
- 根据权利要求4所述的显示面板,其中,所述缓冲层、所述栅极绝缘层以及所述层间介质层采用无机材料制作得到,所述平坦层采用有机材料制作得到。
- 根据权利要求5所述的显示面板,其中,所述无机材料为SiOx、SiNx,或者SiOx和SiNx的混合物。
- 一种阵列基板的制作方法,其中,提供一基板;在所述基板上依次制作TFT功能层、触控信号传输线、第一绝缘层、第一电极、第二绝缘层;其中,所述第一电极既用作公共电极,也用作触控传感器;在所述第二绝缘层上采用一道光罩蚀刻形成第一过孔和第二过孔;其中,所述第一过孔使所述触控信号传输线和所述第一电极裸露,所述第二过孔使所述TFT功能层中的源极和/或漏极裸露;在所述第二绝缘层上制作第二电极和金属图案;其中,所述金属图案通过所述第一过孔连接所述触控信号传输线和所述第一电极,所述第二电极通过所述第二过孔连接所述源极和/或漏极。
- 根据权利要求7所述的制作方法,其中,所述第一过孔包括贯穿所述第二绝缘层的第一通孔以及贯穿所述第一电极和所述第一绝缘层的第二通孔;其中,所述第一通孔的宽度大于所述第二通孔的宽度,以使所述第一通孔的底部裸露所述第一电极的部分上表面;所述第二通孔的底部裸露所述触控信号传输线的部分上表面。
- 根据权利要求7所述的制作方法,其中,所述在所述基板上依次制作TFT功能层、触控信号传输线、第一绝缘层、第一电极、第二绝缘层,包括:在所述基板上制作TFT功能层;在所述TFT功能层上制作第一金属层,并对所述所述第一金属层进行图案化,以得到触控信号传输线;在所述第一金属层上制作第一绝缘层;在所述第一绝缘层上制作第二金属层,并对所述第二金属层进行图案化,以得到第一电极;在所述第二金属层上制作第二绝缘层。
- 根据权利要求9所述的制作方法,其中,所述在所述第二绝缘层上制作第二电极和金属图案,包括:在所述第二绝缘层上制作第三金属层,并对所述第三金属层进行图案化,以得到第二电极和金属图案。
- 根据权利要求10所述的制作方法,其中,所述第二金属层和所述第三金属层是通过沉积ITO得到的。
- 根据权利要求9所述的制作方法,其中,所述在所述基板上制作TFT功能层,包括:在所述基板上制作遮光层;在所述遮光层上制作缓冲层;在所述缓冲层上制作有源层,并通过掺杂形成源极区域和漏极区域;在所述有源层上制作栅极绝缘层;在所述栅极绝缘层上制作栅极;在所述栅极上制作层间介质层;在所述层间介质层上蚀刻形成第三过孔和第四过孔;其中,所述第三过孔裸露所述源极区域,所述第四过孔裸露所述漏极区域;在所述层间介质层上制作源极和漏极;其中,所述源极通过所述第三过孔连接所述源极区域,所述漏极通过所述第四过孔连接所述漏极区域;在所述源极和漏极上制作平坦层。
- 一种阵列基板,其中,包括依次层叠设置的基板、TFT功能层、触控信号传输线、第一绝缘层、第一电极、第二绝缘层、第二电极和金属图案;其中,所述第一电极既用作公共电极,也用作触控传感器;其中,所述第二绝缘层上设置有采用一道光罩蚀刻形成的第一过孔和第二过孔,所述第一过孔使所述触控信号传输线和所述第一电极裸露,所述第二过孔使所述TFT功能层中的源极和/或漏极裸露;其中,所述第二电极和所述金属图案采用同一金属层制作得到,所述金属图案通过所述第一过孔连接所述触控信号传输线和所述第一电极,所述第二电极通过所述第二过孔连接所述源极和/或漏极。
- 根据权利要求13所述的阵列基板,其中,所述第一过孔包括贯穿所述第二绝缘层的第一通孔以及贯穿所述第一电极和所述第一绝缘层的第二通孔;其中,所述第一通孔的宽度大于所述第二通孔的宽度,以使所述第一通孔的底部裸露所述第一电极的部分上表面;所述第二通孔的底部裸露所述触控信号传输线的部分上表面。
- 根据权利要求13所述的阵列基板,其中,所述TFT功能层包括层叠设置的遮光层、缓冲层、有源层、栅极绝缘层、栅极、层间介质层、源极/漏极以及平坦层;其中,层间介质层上设置有蚀刻形成的第三过孔和第四过孔,所述第三过孔裸露所述有源层的源极区域,所述第四过孔裸露所述有源层的漏极区域;所述源极通过所述第三过孔连接所述源极区域,所述漏极通过所述第四过孔连接所述漏极区域。
- 根据权利要求15所述的阵列基板,其中,所述TFT功能层是采用以下方法制作得到的:在所述基板上制作遮光层;在所述遮光层上制作缓冲层;在所述缓冲层上制作有源层,并通过掺杂形成源极区域和漏极区域;在所述有源层上制作栅极绝缘层;在所述栅极绝缘层上制作栅极;在所述栅极上制作层间介质层;在所述层间介质层上蚀刻形成第三过孔和第四过孔;其中,所述第三过孔裸露所述源极区域,所述第四过孔裸露所述漏极区域;在所述层间介质层上制作源极和漏极;其中,所述源极通过所述第三过孔连接所述源极区域,所述漏极通过所述第四过孔连接所述漏极区域;在所述源极和漏极上制作平坦层。
- 根据权利要求16所述的阵列基板,其中,所述缓冲层、所述栅极绝缘层以及所述层间介质层采用无机材料制作得到,所述平坦层采用有机材料制作得到。
- 根据权利要求17所述的阵列基板,其中,所述无机材料为SiOx、SiNx,或者SiOx和SiNx的混合物。
- 根据权利要求13所述的阵列基板,其中,所述触控信号传输线、第一绝缘层、第一电极、第二绝缘层、第二电极和金属图案是采用以下方法制作得到的:在所述TFT功能层上制作第一金属层,并对所述所述第一金属层进行图案化,以得到触控信号传输线;在所述第一金属层上制作第一绝缘层;在所述第一绝缘层上制作第二金属层,并对所述第二金属层进行图案化,以得到第一电极;在所述第二金属层上制作第二绝缘层。
- 根据权利要求13所述的阵列基板,其中,所述第一电极、所述第二电极以及所述金属图案采用ITO制作得到。
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