WO2012028064A1 - 裸芯片与印制电路板的连接结构及印制电路板、通信设备 - Google Patents

裸芯片与印制电路板的连接结构及印制电路板、通信设备 Download PDF

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Publication number
WO2012028064A1
WO2012028064A1 PCT/CN2011/078757 CN2011078757W WO2012028064A1 WO 2012028064 A1 WO2012028064 A1 WO 2012028064A1 CN 2011078757 W CN2011078757 W CN 2011078757W WO 2012028064 A1 WO2012028064 A1 WO 2012028064A1
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WIPO (PCT)
Prior art keywords
circuit board
printed circuit
bare chip
ground
conductor
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PCT/CN2011/078757
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English (en)
French (fr)
Inventor
罗兵
蔡华
缑海鸥
马可尼·佛朗哥
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华为技术有限公司
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Publication of WO2012028064A1 publication Critical patent/WO2012028064A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/021—Components thermally connected to metal substrates or heat-sinks by insert mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00—Waveguides; Transmission lines of the waveguide type
    • H01P3/003—Coplanar lines
    • H01P3/006—Conductor backed coplanar waveguides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0243—Printed circuits associated with mounted high frequency components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H01L2924/30111—Impedance matching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors

Definitions

  • the present invention relates to the field of communications, and in particular, to a connection structure of a bare chip and a printed circuit board, and a printed circuit board and a communication device.
  • Microwave millimeter wave in communication equipment MMW, Micro and Millimeter Due to its extremely high operating frequency, Waves
  • Waves Microwave millimeter wave in communication equipment
  • the reflection problem caused by the discontinuity of the circuit impedance is also more serious, and the existence of the reflection problem will result in the signal amplitude obtained at the receiving end. Decrease, resulting in reflection loss, and the reflection will affect the stability of the circuit operation under certain circumstances.
  • the wavelength of the MMW signal is very short, the radiation capability in the space is strong, and crosstalk between the different circuit elements is also caused, so the shielding should be added to avoid the influence of crosstalk, and the shielding can make the ordinary heat dissipation method. Can not be used, so it is necessary to adopt a more precise circuit structure to ensure that the MMW circuit works normally and meets the requirements of the predetermined specifications.
  • the physical structure continuity of the transmission line and the connectivity of the reference ground are ensured, thereby ensuring the circuit reflow (ie, the path through which the MMW signal and the ground signal flow), generally adopting a double layer.
  • the structure of the PCB, the bare chip is placed in the opening of the PCB, the bottom conductor layer in the PCB (can be added with heat-dissipating metal) as a thermal substrate, the surface layer of the surface layer is provided with a microstrip line structure, the microstrip line structure is often used as The microstrip line composed of the signal line, the insulating medium and the reference ground plane shown in FIG.
  • the double-layered PCB only one conductor layer can be used as the circuit layer, and the other layer acts as the thermal substrate and the reference ground. Although the physical structure continuity of the transmission line and the connectivity of the reference ground are ensured, the larger layer cannot be realized.
  • the scale of the MMW circuit module makes the current MMW circuit module small in scale and cannot realize large-scale circuit design. Therefore, how to improve the size of the MMW circuit module is a problem to be solved in the case of ensuring the continuity of the physical structure of the transmission line and the connectivity of the reference ground and avoiding reflection and loss.
  • the embodiments of the present invention provide a connection structure between a bare chip and a printed circuit board, a printed circuit board, and a communication device, which can solve the physical structure continuity and reference ground of the transmission line.
  • the connectivity is improved, and the size of the MMW circuit module is increased in the case of avoiding reflection and loss.
  • Embodiments of the present invention provide a connection structure between a bare chip and a printed circuit board, which is used in a microwave millimeter wave circuit, and includes:
  • the printed circuit board comprises at least three conductor layers, and each conductor layer is separated by an insulating layer, wherein one conductor layer is a thermal substrate, and the printed circuit board above the thermal substrate is provided with an open slot, the bare chip
  • the conductor layer on the printed circuit board on both sides of the bare chip forms a hybrid microstrip line on the hot substrate disposed in the open slot, and the bare chip is electrically connected to the hybrid microstrip line through a plurality of bonding wires.
  • the embodiment of the invention further provides a printed circuit board, the circuit board comprising:
  • At least three conductor layers each of which is separated by an insulating layer, wherein one of the conductor layers is a thermal substrate, and the printed circuit board above the thermal substrate is provided with an open slot, and the two sides of the open slot are printed
  • the conductor layers on the circuit board form a hybrid microstrip line.
  • the embodiment of the invention further provides a communication device, including:
  • the circuit board is provided with a microwave millimeter wave circuit, and the microwave millimeter wave circuit includes the above-mentioned connection structure of the bare chip and the printed circuit board.
  • the embodiment of the present invention can form a hybrid microstrip line on a printed circuit board on both sides of an open slot in which a bare chip is disposed, so that the bare chip can be easily passed through the bonding wire. Electrically connected to the hybrid microstrip line.
  • the hybrid microstrip line can ensure the physical structure continuity of the transmission line and the connectivity of the reference ground, avoiding reflection and loss.
  • the PCB including at least three conductor layers can be used, the scale of the MMW circuit module can be improved, which is beneficial to improve System integration of MMW communication equipment.
  • FIG. 1 is a schematic structural view of a typical microstrip line used in an MMW circuit provided by the prior art
  • FIG. 2 is a schematic diagram of a connection structure between a bare chip and a printed circuit board according to Embodiment 1 of the present invention
  • FIG. 3 is a schematic diagram of a hybrid microstrip line of a connection structure according to Embodiment 1 of the present invention.
  • FIG. 4 is a schematic top plan view of a hybrid microstrip line provided with a ground via according to a second embodiment of the present invention.
  • FIG. 5 is a schematic top plan view of a hybrid microstrip line provided with a grounding blind hole according to Embodiment 2 of the present invention.
  • FIG. 6 is a side cross-sectional view of a hybrid microstrip line according to a second embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a port return loss when a coupled conductor of a side structure is removed by a reference ground plane in a connection structure according to an embodiment of the present invention
  • FIG. 8 is a schematic diagram of insertion loss when a coupled conductor of a side structure is removed by a reference ground plane in a connection structure according to an embodiment of the present invention
  • FIG. 9 is a schematic diagram of a port return loss when a reference ground plane is removed from a reference ground plane using only a side coupled conductor in a connection structure according to an embodiment of the present invention.
  • FIG. 10 is a schematic diagram of insertion loss when a reference ground plane is removed from a reference ground plane using only a side coupled conductor in a connection structure according to an embodiment of the present invention
  • FIG. 11 is a schematic diagram of port return loss of a bare chip and a hybrid microstrip line connection structure according to an embodiment of the present invention
  • FIG. 12 is a schematic diagram of insertion loss of a bare chip and a hybrid microstrip line connection structure according to an embodiment of the present invention.
  • Fig. 1 The reference numerals in Fig. 1 are: 1-signal line; 2-insulating medium; 3-reference ground plane;
  • the reference numerals in Fig. 2 are: C11-conductor layer one; C12-conductor layer two; J11-insulating layer one; J12-insulating layer two; H1-thermal substrate; 41-bare chip; 42-signal line; 43-coupling Ground conductor; 44-signal bond wire; 45-ground bond wire; 46-ground via; 47-reference ground plane;
  • the reference numerals in FIG. 3 are: 42-signal line; 43-coupled ground conductor; 47-reference ground plane; J11-insulation layer one;
  • the reference numerals in FIG. 4 are: 41-bare chip; 42-signal line; 43-coupling conductor; 44-signal bonding wire; 45-ground bonding wire; 46-grounding via;
  • the reference numerals in FIG. 5 are: 41-bare chip; 42-signal line; 43-coupling conductor; 44-signal bonding wire; 45-ground bonding wire; 46-grounding via hole; 48-grounding blind hole;
  • the reference numerals in Fig. 6 are: C11-conductor layer one; C12-conductor layer two; J11-insulating layer one; J12-insulating layer; H1-thermal substrate; 42-signal line; 43-coupling ground conductor; Ground via; 48-ground blind via.
  • the embodiment provides a connection structure between a bare chip and a printed circuit board, and can be used in an MMW circuit module, a chip package, a multi-chip module MCM, a system-level package module SIP, etc., as shown in FIGS. 2 to 4, the connection structure.
  • the connection structure Including: printed circuit board 50 and bare chip 41;
  • the printed circuit board 50 includes at least three conductor layers.
  • the three conductor layers are exemplified by C11, C12 and C13.
  • An insulating layer is disposed between each of the conductor layers (in the embodiment, three layers are taken as an example, and an insulating layer is disposed between each of the conductor layers, that is, an insulating layer J11 is disposed between the conductor layers C11 and C12, and the conductor layer C12 and An insulating layer J12 is disposed between C13.
  • one of the conductor layers may be a thermal substrate H1, and the bottommost conductor layer C13 is generally used as the thermal substrate H1. In this embodiment, FIG. 2 As shown, C13 is used as the thermal substrate H1.
  • the printed circuit board above the thermal substrate H1 is provided with an open slot 40.
  • the bare chip 41 is disposed on the thermal substrate H1 in the open slot 40, and the conductor layer C11 on the printed circuit board on both sides of the bare chip 41, C12 forms a hybrid microstrip line, and the bare chip 41 is electrically connected to the hybrid microstrip line through a plurality of bonding wires (such as a bonding wire 44 in FIG. 2 and two bonding wires 45); the mixing
  • the microstrip line includes: a signal line 42, a coupled ground conductor 43, and a reference ground plane 47; the signal line 42 is printed on the middle of the printed circuit board surface conductor layer C11, on both sides of the signal line 42.
  • the signal line 42 forms a side conductor layer of a certain interval as a coupling ground conductor 43 (that is, two side conductor layers which are spaced apart from the signal line 42 on both sides of the signal line 42 are two portions of the rear conductor 43), the surface conductor
  • the intermediate conductor layer C12 between the layer C11 and the thermal substrate H1 serves as a reference ground plane 47, wherein the interval between the signal line 42 and the two portions of the coupled conductor 43 located on both sides of the signal line is 0.06 to 1.0 mm.
  • the bare chip 41 is electrically connected to the hybrid microstrip line through a plurality of bonding wires, and the input terminal and the ground terminal of the input port of the bare chip 41 are passed through three bonding wires (one signal bonding wire 44 and two).
  • the ground bonding wire 45) is electrically connected to the hybrid microstrip line on the input side.
  • the input terminal of the input port of the bare chip 41 is electrically connected to the signal line 42 of the hybrid microstrip line on the input side of the bare chip 41 through a signal bonding wire 44, and the two ground terminals of the input port are connected.
  • Each of the hybrid microstrip lines on the input side of the bare chip 41 is electrically connected to the coupled conductor 43 that is strongly coupled to the signal line through a ground bonding wire 45; the output terminal and the ground terminal of the output port of the bare chip 41 pass through three keys.
  • the bonding wires (one signal bonding wire 44 and two ground bonding wires 44) are electrically connected to the hybrid microstrip line on the output side, specifically, the output terminal of the output port of the bare chip 41 is passed through a signal bonding wire 44 and bare.
  • the signal line 42 of the hybrid microstrip line on the output side of the chip 41 is electrically connected, and the two ground terminals of the output port are respectively stronger by the grounding bonding wire 45 and the mixed microstrip line on the output side of the bare chip 41 and the signal line 44.
  • the coupled coupled ground conductors 43 are electrically connected.
  • one or more ground vias 46 are disposed on the printed circuit boards on both sides of the bare chip 41, so that the ground conductor 43 is coupled.
  • the thermal substrate H1 is electrically connected through the provided ground vias 46 (see FIGS. 2 and 4).
  • the above structure for connecting the bare chip and the hybrid microstrip line by three bonding wires reduces the reflection problem caused by the discontinuity of the reference ground, and can also adjust the distance of the coupled conductor to the signal line or the line of the signal line. Width to control the local distributed capacitance size provides a more flexible design for impedance matching.
  • the problem of the small size of the existing MMW circuit using the two-layer structure PCB is solved, and the multilayer structure PCB can be used in the MMW circuit module to ensure the physical structure continuity of the transmission line and the connection of the reference ground. Under the premise of avoiding reflection and loss, the scale of the MMW circuit module is improved. Therefore, it is beneficial to improve the system integration of the MMW communication device and reduce the material and assembly cost of the MMW communication device; and the hybrid microstrip line is convenient to interconnect with the traditional microstrip line in the MMW circuit, and no additional conversion circuit is needed.
  • the embodiment of the present invention provides a structure in which a hybrid microstrip line structure is connected to a bare chip, which can reduce the coupling degree between the signal line and the coupled conductor of the side thereof, thereby increasing the interval between the signal line and the coupled ground conductor. It is not necessary to use a conductor pitch that is too small (for example, 0.05 mm or less), which reduces the difficulty of fabrication, and can meet the manufacturing requirements by using an ordinary PCB manufacturing process, which reduces the process difficulty of MMW circuit fabrication and reduces the cost.
  • the embodiment provides a connection structure between a bare chip and a printed circuit board.
  • the connection structure is substantially the same as that of the bare chip and the printed circuit board according to the first embodiment, except that the bare chip is on both sides of the bare chip.
  • One or more grounding blind holes 48 are further disposed on the printed circuit board, so that the reference ground plane 47 and the hot substrate H1 are electrically connected through the ground blind via 48 (ie, the thermal substrate H1 and the conductor layer C12 are electrically connected). See Figure 5 and Figure 6).
  • the reflow signal propagates through two paths, one part is the coupled ground conductor 43 through the ground bonding wire 45 to the PCB surface conductor layer (ie, the conductor layer C11); the other part is through the hot substrate H1 to the ground.
  • the blind via 48 re-enters the reference ground plane 47 of the intermediate layer of the PCB. Where the portion passing through the thermal substrate H1 is located on both sides of the signal line 42 due to the ground via 46, the reflow signal needs to go back through the longer path in the planar direction to reach directly below the signal line 42, thus the continuity of the portion of the reflow signal. Not good, see Figure 6.
  • the hybrid microstrip line structure is utilized to fully utilize two incomplete reflow paths to ensure the reflow of the circuit.
  • One of the two incomplete reflow paths is for the reflow path.
  • the conductors of the signal line and the side coupling if a common PCB process is used, since the distance between the two is greater than 0.1 m, sufficient coupling back flow cannot be formed; for the second return path, relative to the second reference ground plane.
  • the ground of the bare chip is connected to the hot substrate, a ground layer is formed between the microstrip line and the bare chip, and it is difficult to form a continuous reflow. Therefore, both of these return paths are incomplete return paths.
  • Figures 7 and 8 show the standing wave and insertion loss simulation results when only the second layer reference plane is used;
  • Figures 9 and 10 show the standing wave and insertion loss simulation results of only the side-coupled conductors (coupled conductor to signal) The line spacing is 0.12 mm);
  • Figures 11 and 12 show the results of standing wave and insertion loss simulation using the connection structure of the embodiment of the present invention.
  • connection structure of the embodiment of the present invention can satisfy the requirements of the MMW circuit for reflection, loss, and the like, and can utilize a multi-layer PCB, can manufacture a large-scale circuit, reduce circuit modules in the MMW communication device, and adopt Ordinary PCB fabrication process can be used without having to use the high-precision fabrication process of making MMW chips.
  • the embodiment provides a printed circuit board for use in an MMW circuit, the circuit board including (the circuit board structure can be seen in FIG. 2):
  • the printed circuit board above the thermal substrate is provided with open slots, and the conductor layers on the printed circuit board on both sides of the open slot form a hybrid microstrip line.
  • the hybrid microstrip line in the above printed circuit board includes (see FIG. 3): a signal line 42, a coupled ground conductor 43, and a reference ground plane 47; a conductor layer C11 is printed on the printed circuit board surface layer with a signal line 42 A two-sided conductor layer having a spacing of 0.06 to 1.0 mm from the signal line 42 on both sides of the signal line 42 as a coupling ground conductor 43 and an intermediate layer between the surface conductor layer C11 and the thermal substrate (ie, the conductor layer C13)
  • the conductor layer C12 is used as the reference ground plane 47.
  • one or more ground vias 46 are provided on the printed circuit board on both sides of the open slot, so that the ground conductor 47, the reference ground plane 47 and the hot substrate h1 pass through the ground via 46. Electrical connection.
  • One or more buried hole holes 48 of the buried hole structure may be disposed on the printed circuit board on both sides of the open slot, so that the reference ground plane 47 and the hot substrate h1 are electrically connected through the ground blind via 48.
  • the printed circuit board of the embodiment can be applied to the MMW circuit module, the chip package, the multi-chip module MCM, the system-level package module SIP, etc., so that the bare chip and the printed circuit board are conveniently connected through a plurality of bonding wires, not only the connection, but also the printed circuit board. It can ensure the performance of the circuit and avoid the influence of reflection, etc. Moreover, the manufacturing process of the printed circuit board of this structure is simple, and the ordinary PCB manufacturing process can meet the requirements.
  • the embodiment provides a communication device, which may be an MMW communication device, including: a casing and a circuit board; a microwave millimeter wave circuit is disposed on the circuit board, and the microwave millimeter wave circuit (MMW circuit) includes the foregoing implementation.
  • MMW circuit microwave millimeter wave circuit
  • the MMW circuit in this kind of equipment can be fabricated by ordinary PCB processing technology, and the cost is low, and its performance can meet various requirements of the MMW circuit.
  • a hybrid microstrip line is used, and the bare chip and the hybrid microstrip line are electrically connected by a bonding wire to form a circuit connection structure, and a hybrid microstrip line structure is applied.
  • the use of a hybrid mode microstrip line can reduce the coupling degree of the signal line and the side coupled conductors, thereby eliminating the need for a very small conductor spacing for design, reducing the difficulty of PCB fabrication.
  • the hybrid microstrip line structure connected by three bonding wires has greatly improved the insertion loss and standing wave index at the joint.
  • connection structure of the embodiment of the invention can solve the key technical problems in the multi-layer PCB design of the MMW circuit, realize the development of the large-scale MMW circuit module, improve the system integration degree of the MMW communication device, and reduce the material and assembly cost of the device; Moreover, the lower PCB manufacturing difficulty is adopted, and the PCB manufacturing cost is reduced.
  • the output structure of the MMW circuit adopts a hybrid microstrip line, which is convenient for interconnection with the conventional microstrip line in the MMW circuit, and does not require an additional conversion circuit.

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  • Microelectronics & Electronic Packaging (AREA)
  • Structure Of Printed Boards (AREA)
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Description

裸芯片与印制电路板的连接结构及印制电路板、通信设备
本申请要求于2010年９月２日提交中国专利局、申请号为201010272337.X、发明名称为“裸芯片与印制电路板的连接结构及印制电路板、通信设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及通信领域，尤其涉及一种裸芯片与印制电路板的连接结构及印制电路板、通信设备。
发明背景
通信设备中的微波毫米波（MMW，Micro and Millimeter Waves）电路由于其工作频率极高，导致信号在电路中的损耗剧烈增加，同时因为电路阻抗的不连续性导致的反射问题也更加严重，而反射问题的存在会导致在接收端获得的信号幅度减小，产生反射损耗，并且反射在一定情况下会影响电路工作的稳定性。并且，由于MMW信号波长很短，在空间的辐射能力很强，还会导致不同电路单元之间相互影响的问题造成串扰，因此要增加屏蔽来避免串扰的影响，而屏蔽则使普通的散热方式不能使用，因此需要采用较精密的电路结构才能保证MMW电路工作正常，达到预定规格的要求。
目前广泛应用的MMW电路中，为避免反射及损耗，保证传输线路的物理结构连续性及参考地的连接性，从而保证电路回流（即MMW信号和地信号流经的途径），一般采用双层结构的PCB，将裸芯片设置在PCB的开口内，PCB中的底层导体层（可以加散热金属）作为热衬底，表层的线路层上设有微带线结构，微带线结构常采用如图1所示的由信号线、绝缘介质和参考地平面构成的微带线，通过键合线使裸芯片与微带线结构连接，采用接地的金属导体构成屏蔽腔，将不同的电路单元设置在不同的屏蔽腔内进行屏蔽避免串扰，从而解决MMW电路设计中易出现的反射、损耗、串扰及散热等问题。
但双层结构的PCB中只有一层导体层可作为线路层，另一层作为热衬底及参考地，虽保证了传输线路的物理结构连续性及参考地的连接性，但无法实现较大规模的MMW电路模块，使得目前的MMW电路模块存在规模较小，不能实现大规模电路设计。因此，如何在保证传输线路的物理结构连续性及参考地的连接性，避免反射及损耗的情况下，提升MMW电路模块规模是个需要解决的问题。
发明内容
基于上述现有技术所存在的问题，本发明实施例提供一种裸芯片与印制电路板的连接结构及印制电路板、通信设备，可以解决在保证传输线路的物理结构连续性及参考地的连接性，避免反射及损耗的情况下，提升MMW电路模块的规模。
本发明实施例提供一种裸芯片与印制电路板的连接结构，用在微波毫米波电路中，包括：
印制电路板和裸芯片；
印制电路板上至少包括三层导体层，各导体层之间均通过绝缘层隔离，其中一层导体层为热衬底，热衬底之上的印制电路板设有开口槽，裸芯片设置在所述开口槽内的热衬底上，裸芯片两侧的印制电路板上的导体层形成混合式微带线，裸芯片通过多条键合线与所述混合式微带线电连接。
本发明实施例还提供一种印制电路板，该电路板包括：
至少三层导体层，各导体层之间均通过绝缘层隔离，其中一层导体层为热衬底，热衬底之上的印制电路板设有开口槽，所述开口槽两侧的印制电路板上的导体层形成混合式微带线。
本发明实施例进一步提供一种通信设备，包括：
机壳和电路板；
所述电路板上设有微波毫米波电路，所述微波毫米波电路中包括上述的裸芯片与印制电路板的连接结构。
由上述本发明实施方式提供的技术方案可以看出，本发明实施方式通过在设置裸芯片的开口槽两侧的印制电路板上形成混合式微带线，从而使裸芯片通过键合线可以方便的与混合式微带线形成电连接。混合式微带线能保证传输线路的物理结构连续性及参考地的连接性，避免反射及损耗，同时，由于可采用包括至少三层导体层的PCB，可提升MMW电路模块的规模，有利于提高MMW通讯设备的系统集成度。
附图简要说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他附图。
图1为现有技术提供的MMW电路中采用的典型微带线的结构示意图；
图2为本发明实施例一提供的裸芯片与印制电路板的连接结构的示意图；
图3为本发明实施例一提供的连接结构的混合式微带线示意图；
图4为本发明实施例二提供的混合式微带线设置接地过孔的俯视示意图；
图5为本发明实施例二提供的混合式微带线设置接地盲孔的俯视示意图；
图6为本发明实施例二提供的混合式微带线的侧面剖视图；
图7为本发明实施例提供的连接结构中去掉侧边的耦合地导体只用参考地平面回流时的端口回损示意图；
图8为本发明实施例提供的连接结构中去掉侧边的耦合地导体只用参考地平面回流时的插入损耗示意图；
图9为本发明实施例提供的连接结构中去掉参考地平面只用侧边的耦合地导体回流时的端口回损示意图；
图10为本发明实施例提供的连接结构中去掉参考地平面只用侧边的耦合地导体回流时的插入损耗示意图；
图11为本发明实施例提供的裸芯片与混合式微带线连接结构的端口回损示意图；
图12为本发明实施例提供的裸芯片与混合式微带线连接结构的插入损耗示意图。
图1中各标号为：1-信号线；2-绝缘介质；3-参考地平面；
图2中各标号为：C11-导体层一；C12-导体层二；J11-绝缘层一；J12-绝缘层二；H1-热衬底；41-裸芯片；42-信号线；43-耦合地导体；44-信号键合线；45-接地键合线；46-接地过孔；47-参考地平面；
图3中各标号为：42-信号线；43-耦合地导体；47-参考地平面；J11-绝缘层一；
图4中各标号为：41-裸芯片；42-信号线；43-耦合地导体；44-信号键合线；45-接地键合线；46-接地过孔；
图5中各标号为：41-裸芯片；42-信号线；43-耦合地导体；44-信号键合线；45-接地键合线；46-接地过孔；48-接地盲孔；
图6中各标号为：C11-导体层一；C12-导体层二；J11-绝缘层一；J12-绝缘层而；H1-热衬底；42-信号线；43-耦合地导体；46-接地过孔；48-接地盲孔。
实施本发明的方式
为便于理解，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
实施例一
本实施例提供一种裸芯片与印制电路板的连接结构，可用在MMW电路模块、芯片封装、多芯片模块MCM、系统级封装模块SIP等中，如图2～4所示，该连接结构包括：印制电路板50和裸芯片41；
其中，印制电路板50上至少包括三层导体层，在本实施例中，以三层导体层为例，分别为C11、C12和C13。各导体层之间均设有绝缘层（在本实施例中以三层为例，各个导体层之间设有绝缘层，即导体层C11和C12之间设有绝缘层J11，导体层C12和C13之间设有绝缘层J12），在一个实施例中，其中一层导体层可以为热衬底H1，一般采用最底层的导体层C13作为热衬底H1，在本实施例中如图2所示，将C13作为热衬底H1。
热衬底H1之上的印制电路板设有开口槽40，裸芯片41设置在该开口槽40内的热衬底H1上，裸芯片41两侧的印制电路板上的导体层C11、C12形成混合式微带线，裸芯片41通过多条键合线（如图2中的一条键合线44、和两条键合线45）与所述混合式微带线电连接；所述的混合式微带线如图3所示，包括：信号线42、耦合地导体43和参考地平面47；所述信号线42印制在印制电路板表层导体层C11中部，在信号线42两侧与信号线42形成一定间隔的两侧导体层作为耦合地导体43（即，在信号线42两侧与信号线42形成一定间隔的两侧导体层为后合导体43的两个部分），表层导体层C11与热衬底H1之间的中间导体层C12作为参考地平面47，其中，信号线42与耦合地导体43位于信号线两侧的两部分之间的间隔为均为0.06～1.0mm。
上述连接结构中，裸芯片41通过多条键合线与混合式微带线电连接是将裸芯片41的输入端口的输入端子和接地端子通过三条键合线（一条信号键合线44和两条接地键合线45）与输入侧的混合式微带线电连接。在一个实施例中，具体是将裸芯片41的输入端口的输入端子通过一条信号键合线44与裸芯片41输入侧的混合式微带线的信号线42电连接，输入端口的两个接地端子各通过一条接地键合线45分别与裸芯片41输入侧的混合式微带线中与信号线发生强耦合的耦合地导体43电连接；裸芯片41的输出端口的输出端子和接地端子通过三条键合线（一条信号键合线44和两条接地键合线44）与输出侧的混合式微带线电连接，具体是将裸芯片41的输出端口的输出端子通过一条信号键合线44与裸芯片41输出侧的混合式微带线的信号线42电连接，输出端口的两个接地端子各通过一条接地键合线45分别与裸芯片41输出侧的混合式微带线中与信号线44发生强耦合的耦合地导体43电连接。
在上述连接结构中，在裸芯片41两侧的印制电路板上均设有一个或多个接地过孔46（设置在混合式微带线所在的印制电路板上），使耦合地导体43和热衬底H1通过设置的接地过孔46电连接（参见图2和图4）。
上述这种用三条键合线使裸芯片与混合式微带线连接的结构，减小了因参考地不连续引起的反射问题，同时可以通过调节耦合地导体到信号线的距离或者信号线的线宽来控制局部的分布电容大小，为阻抗匹配提供了更加灵活的设计方案。通过采用这种连接结构，解决了现有采用双层结构PCB的MMW电路规模小的问题，可以在MMW电路模块中使用多层结构PCB，在保证传输线路的物理结构连续性及参考地的连接性，避免反射及损耗的前提下，提升了MMW电路模块的规模。从而有利于提高MMW通讯设备的系统集成度，降低MMW通讯设备的物料和组装成本；并且这种混合式微带线与MMW电路中传统的微带线互连方便，无需额外转换电路。
并且，本发明实施例提供采用混合式微带线结构与裸芯片连接的结构，能够降低信号线和其侧边的耦合地导体的耦合度，从而使信号线与耦合地导体之间的间隔增大，不需要采用过小（例如0.05mm或小于0.05mm）的导体间距，降低了制作的难度，采用普通的PCB制作工艺即可满足制作要求，降低了MMW电路制作的工艺难度并降低了成本。
实施例二
本实施例提供一种裸芯片与印制电路板的连接结构，该连接结构与实施例一给出的裸芯片与印制电路板的连接结构基本相同，不同的是在所述裸芯片两侧的印制电路板上均还设有一个或多个接地盲孔48，使参考地平面47与热衬底H1通过接地盲孔48电连接（即实现热衬底H1与导体层二C12电连接，参见图5和图6）。这种电路结构中，回流信号通过两个路径传播，一部分是通过接地键合线45到PCB表层导体层（即导体层一C11）的耦合地导体43；另一部分是通过热衬底H1到接地盲孔48再进入PCB中间层的参考地平面47。其中通过热衬底H1的部分由于接地过孔46位于信号线42的两侧，回流信号在平面方向需要经过较长路径的迂回才能达到信号线42的正下方，因此这部分回流信号的连续性不好，见图6。为此可以在作为参考地平面47的导体层二C12到热衬底H1之间采用埋孔结构的接地盲孔48进行改善，其结构如图6所示。采用埋孔结构可以在一定程度上提高电气性能，但是PCB制作成本和难度会相应上升。
上述本发明实施例给出的这种连接结构中，通过采用混合式微带线结构充分利用两条不完整的回流路径，保证了电路的回流，两条不完整的回流路径中一条回流路径是对于信号线和侧边的耦合地导体而言，若采用普通PCB工艺制作由于两者间距大于0.1m，无法形成足够的耦合回流量；对于第二条回流路径是相对于第二层参考地平面而言，由于裸芯片的地端连接在热衬底上，微带线与裸芯片之间的地形成了断层，难以形成连续的回流。因此，这两条回流路径均是不完整的回流路径。图7、8显示了只采用第二层参考平面时的驻波和插损仿真结果；图9、10显示了只采用侧边耦合地导体的驻波和插损仿真结果（耦合地导体到信号线间距为0.12mm）;图11、12显示了采用本发明实施例的连接结构的驻波和插损仿真结果。通过对比可以知道，采用本发明实施例的连接结构之后，连接处的插损和驻波指标都得到了较大改善。
因此，本发明实施例的连接结构既能满足MMW电路对于反射、损耗等要求，同时又可以利用多层结构的PCB，可制作大规模的电路，减少MMW通讯设备中的电路模块，并且，采用普通的PCB制作工艺即可，而不必采用制作MMW芯片的高精度制作工艺。
实施例三
本实施例提供一种印制电路板，用在MMW电路中，该电路板包括（电路板结构可参见图2）：
至少三层导体层C11、C12、C13，各导体层之间均通过绝缘层隔离J11、J12，其中一层导体层作为热衬底H1，一般采用最底层的导体层三C13作为热衬底H1，热衬底之上的印制电路板设有开口槽，所述开口槽两侧的印制电路板上的导体层形成混合式微带线。
上述印制电路板中的混合式微带线包括（可参见图3）：信号线42、耦合地导体43和参考地平面47；印制电路板表层的导体层一C11中部印制有信号线42，在信号线42两侧与信号线42形成间隔为0.06～1.0mm的两侧导体层作为耦合地导体43，表层导体层一C11与热衬底（即导体层一C13）之间的中间层的导体层二C12作为参考地平面47。
在上述印制电路板中，开口槽两侧的印制电路板上均设有一个或多个接地过孔46，使耦合地导体43、参考地平面47与热衬底h1通过接地过孔46电连接。
在开口槽两侧的印制电路板上还可以设置一个或多个埋孔结构的接地盲孔48，使参考地平面47与热衬底h1通过接地盲孔48电连接。
本实施例的印制电路板可应用在MMW电路模块、芯片封装、多芯片模块MCM、系统级封装模块SIP等中，使裸芯片与印制电路板通过多条键合线方便的连接，不但可以保证电路性能，避免反射等影响，并且，这种结构的印制电路板制作工艺简单，普通的PCB制作工艺即可满足要求。
实施例四
本实施例提供一种通信设备，可以是一种MMW通信设备，该设备包括：机壳和电路板；在电路板上设有微波毫米波电路，微波毫米波电路（MMW电路）中包括上述实施例一或实施例二中任一项给出的裸芯片与印制电路板的连接结构。这种设备中的MMW电路采用普通的PCB加工工艺即可以制作，成本低，并且其性能能满足MMW电路的各种要求。
综上所述，本发明实施例中通过采用混合式微带线，利用键合线使裸芯片与混合式微带线电连接，形成电路连接结构，应用了混合式微带线结构。采用混合模式的微带线能够降低信号线和侧边的耦合地导体的耦合度，从而不需要采用非常小的导体间距进行设计，降低了PCB制作的难度。采用三条键合线连接的混合式微带线结构，连接处的插损和驻波指标都得到了很大改善。通过本发明实施例的连接结构可解决MMW电路多层PCB设计中的关键技术问题，实现大规模MMW电路模块的开发，有利于提高MMW通讯设备的系统集成度，降低设备的物料和组装成本；并且采用更低的PCB制造难度，降低了PCB制造成本，MMW电路的输出结构采用混合式微带线，与MMW电路中传统的微带线互连方便，无需额外转换电路。
以上所述，仅为本发明较佳的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应该以权利要求的保护范围为准。

Claims (14)

  1. 一种裸芯片与印制电路板的连接结构，其特征在于，包括：
    印制电路板和裸芯片；
    印制电路板上至少包括三层导体层，各导体层之间均通过绝缘层隔离，其中一层导体层为热衬底，热衬底之上的印制电路板设有开口槽，裸芯片设置在所述开口槽内的热衬底上，裸芯片两侧的印制电路板上的导体层形成混合式微带线，裸芯片通过多条键合线与所述混合式微带线电连接。
  2. 根据权利要求1所述的裸芯片与印制电路板的连接结构，其特征在于，所述混合式微带线包括：信号线、耦合地导体和参考地平面；所述信号线印制在印制电路板表层导体层中部，所述耦合地导体为在信号线两侧与信号线形成一定间隔的两侧导体层，所述参考地平面为所述表层导体层与热衬底之间的中间导体层。
  3. 根据权利要求2所述的裸芯片与印制电路板的连接结构，其特征在于，所述信号线与耦合地导体位于所述信号两侧的两部分之间的间隔均为0.06～1.0mm。
  4. 根据权利要求2所述的裸芯片与印制电路板的连接结构，其特征在于，所述裸芯片两侧的印制电路板上均设有一个或多个接地过孔，使所述耦合地导体、参考地平面与所述热衬底通过所述接地过孔电连接。
  5. 根据权利要求2所述的裸芯片与印制电路板的连接结构，其特征在于，所述裸芯片两侧的印制电路板上均设有一个或多个接地盲孔，使所述参考地平面与所述热衬底通过所述接地盲孔电连接。
  6. 根据权利要求1所述的裸芯片与印制电路板的连接结构，其特征在于，所述裸芯片通过多条键合线与所述混合式微带线电连接包括：
    裸芯片的输入端口的输入端子和接地端子通过三条键合线与输入侧的混合式微带线电连接；裸芯片的输出端口的输出端子和接地端子通过三条键合线与输出侧的混合式微带线电连接。
  7. 根据权利要求6所述的裸芯片与印制电路板的连接结构，其特征在于，所述裸芯片的输入端口的输入端子和接地端子通过三条键合线与输入侧的混合式微带线电连接包括：
    裸芯片的输入端口的输入端子通过一条信号键合线与裸芯片输入侧的混合式微带线的信号线电连接，输入端口的两个接地端子各通过一条接地键合线分别与裸芯片输入侧的混合式微带线的耦合地导体电连接。
  8. 根据权利要求6所述的裸芯片与印制电路板的连接结构，其特征在于，所述裸芯片的输出端口的输出端子和接地端子通过三条键合线与输出侧的混合式微带线电连接包括：
    裸芯片的输出端口的输出端子通过一条信号键合线与裸芯片输出侧的混合式微带线的信号线电连接，输出端口的两个接地端子各通过一条接地键合线分别与裸芯片输出侧的混合式微带线的耦合地导体电连接。
  9. 一种印制电路板，其特征在于，该电路板包括：
    至少三层导体层，各导体层之间均通过绝缘层隔离，其中一层导体层为热衬底，热衬底之上的印制电路板设有开口槽，所述开口槽两侧的印制电路板上的导体层形成混合式微带线。
  10. 根据权利要求9所述的印制电路板，其特征在于，所述混合式微带线包括：信号线、耦合地导体和参考地平面；所述信号线印制在印制电路板表层导体层中部，所述耦合地导体为在信号线两侧与信号线形成一定间隔的两侧导体层，所述参考地平面为所述表层导体层与热衬底之间的中间导体层。
  11. 根据权利要求9所述的印制电路板，其特征在于，所述信号线与所述耦合地导体位于所述信号线两侧的两部分之间的间隔均为0.06～1.0mm。
  12. 根据权利要求9所述的印制电路板，其特征在于，所述开口槽两侧的印制电路板上均设有一个或多个接地过孔，使所述耦合地导体、参考地平面与所述热衬底通过所述接地过孔电连接。
  13. 根据权利要求9所述的印制电路板，其特征在于，所述开口槽两侧的印制电路板上均设有一个或多个接地盲孔，使所述参考地平面与所述热衬底通过所述接地盲孔电连接。
  14. 一种通信设备，其特征在于，包括：
    机壳和电路板；
    所述电路板上设有微波毫米波电路，所述微波毫米波电路中包括权利要求1～8任一项所述的裸芯片与印制电路板的连接结构。
PCT/CN2011/078757 2010-09-02 2011-08-23 裸芯片与印制电路板的连接结构及印制电路板、通信设备 WO2012028064A1 (zh)

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