WO2021184844A1 - 一种光模块 - Google Patents

一种光模块 Download PDF

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Publication number
WO2021184844A1
WO2021184844A1 PCT/CN2020/135330 CN2020135330W WO2021184844A1 WO 2021184844 A1 WO2021184844 A1 WO 2021184844A1 CN 2020135330 W CN2020135330 W CN 2020135330W WO 2021184844 A1 WO2021184844 A1 WO 2021184844A1
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WO
WIPO (PCT)
Prior art keywords
layer
inner layer
circuit board
pin
golden finger
Prior art date
Application number
PCT/CN2020/135330
Other languages
English (en)
French (fr)
Inventor
李福宾
张加傲
王欣南
慕建伟
Original Assignee
青岛海信宽带多媒体技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN202010198479.XA external-priority patent/CN111308620B/zh
Priority claimed from CN202010681155.1A external-priority patent/CN113946019B/zh
Application filed by 青岛海信宽带多媒体技术有限公司 filed Critical 青岛海信宽带多媒体技术有限公司
Publication of WO2021184844A1 publication Critical patent/WO2021184844A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details

Definitions

  • the present disclosure relates to the field of optical communication technology, and in particular to an optical module.
  • Optical Module usually refers to an integrated module used for photoelectric conversion, which can realize the mutual conversion of optical signals and electrical signals, and plays an important role in the field of optical communications.
  • the communication channel for high-speed signal transmission is realized by golden finger components (golden yellow conductive contacts arranged like fingers) and high-speed signal lines on the circuit board of the optical module.
  • the present disclosure provides an optical module, including a circuit board; a driving chip, which is placed on the surface of the circuit board; a light emitting chip, which receives signals from the driving chip through the circuit board;
  • the circuit board includes: a top layer, which is located on the upper surface of the circuit board; and a bottom layer , Located on the lower surface of the circuit board; the first inner layer, located between the top layer and the bottom layer, and attached to the top layer; on the top layer is equipped with: gold finger components, located at one end of the top layer, including signal pins, I2C pins and Grounding pin; microprocessor, connected to I2C pin; driving chip connected to signal pin and grounding pin; signal pin has no metal layer in the orthographic projection area on the first inner layer; grounding pin and I2C There is a metal layer in all the orthographic projection areas of the pins on the first inner layer.
  • the present disclosure also provides an optical module, including a circuit board; a driving chip, which is placed on the surface of the circuit board; a light emitting chip, which receives signals from the driving chip through the circuit board; and the circuit board includes: a top layer, which is located on the upper surface of the circuit board; The bottom layer is located on the lower surface of the circuit board; the first inner layer is located between the top layer and the bottom layer and is attached to the top layer; the top layer is equipped with: gold finger components, located at one end of the top layer, including signal pins and I2C pins And the ground pin; the microprocessor, connected to the I2C pin; the driver chip is connected to the signal pin and the ground pin respectively; there is no metal layer in the orthographic projection area of the signal pin and the ground pin on the first inner layer ; There is a metal layer in the orthographic projection area of the I2C pin on the first inner layer.
  • the present disclosure also provides an optical module, including a circuit board; a driving chip, which is placed on the surface of the circuit board; a light emitting chip, which receives signals from the driving chip through the circuit board; and the circuit board includes: a top layer, which is located on the upper surface of the circuit board; The bottom layer is located on the lower surface of the circuit board; the first inner layer is located between the top layer and the bottom layer and is attached to the top layer; the second inner layer is located between the first inner layer and the bottom layer and is attached to the second inner layer ;
  • the top layer is equipped with: gold finger components, located at one end of the top layer, including signal pins, I2C pins and ground pins; microprocessor, connected to I2C pins; driver chip respectively connected to signal pins and ground pins Connection; the signal pin does not have a metal layer in the orthographic projection area on the first inner layer and the second inner layer; the ground pin has a metal layer in the orthographic projection area on the first inner layer and the second inner layer; I2C
  • the present disclosure also provides an optical module, including a circuit board; a driving chip, which is placed on the surface of the circuit board; a light emitting chip, which receives signals from the driving chip through the circuit board; and the circuit board includes: a top layer, which is located on the upper surface of the circuit board; The bottom layer is located on the lower surface of the circuit board; the first inner layer is located between the top layer and the bottom layer and is attached to the top layer; the second inner layer is located between the first inner layer and the bottom layer and is attached to the second inner layer ;
  • the top layer is equipped with: gold finger components, located at one end of the top layer, including signal pins, I2C pins and ground pins; microprocessor, connected to I2C pins; driver chip respectively connected to signal pins and ground pins Connection; the signal pin does not have a metal layer in the orthographic projection area on the first inner layer and the second inner layer; the ground pin does not have a metal layer in the orthographic projection area on the first inner layer and the second inner layer; There is
  • the present disclosure also provides an optical module, including a circuit board; a driving chip, which is placed on the surface of the circuit board; a light emitting chip, which receives signals from the driving chip through the circuit board; and the circuit board includes: a top layer, which is located on the upper surface of the circuit board; The bottom layer is located on the lower surface of the circuit board; the first inner layer is located between the top layer and the bottom layer and is attached to the top layer; the second inner layer is located between the first inner layer and the bottom layer and is attached to the second inner layer ;
  • Other inner layer groups have multiple layers, located between the second inner layer and the bottom layer, and the uppermost layer of the other inner layer groups is adjacent to the second inner layer, and the lowermost layer is attached to the bottom layer; the top layer is set There are: golden finger components, located at one end of the top layer, including signal pins, I2C pins, and ground pins; microprocessors, connected to I2C pins; driver chips, connected to signal pins and ground pins, respectively; signal leads
  • the present disclosure also provides an optical module, including a circuit board; a driving chip, which is placed on the surface of the circuit board; a light emitting chip, which receives signals from the driving chip through the circuit board; and the circuit board includes: a top layer, which is located on the upper surface of the circuit board; The bottom layer is located on the lower surface of the circuit board; the first inner layer is located between the top layer and the bottom layer and is attached to the top layer; the second inner layer is located between the first inner layer and the bottom layer and is attached to the second inner layer ;
  • Other inner layer groups have multiple layers, located between the second inner layer and the bottom layer, and the uppermost layer of the other inner layer groups is adjacent to the second inner layer, and the lowermost layer is attached to the bottom layer; the top layer is set There are: golden finger components, located at one end of the top layer, including signal pins, I2C pins and ground pins; microprocessors, connected to I2C pins; driving chips connected to signal pins and ground pins respectively; signal leads There is no
  • Figure 1 is a schematic diagram of the connection relationship of an optical communication terminal
  • Figure 2 is a schematic diagram of the optical network terminal structure
  • FIG. 3 is a schematic structural diagram of an optical module provided by an embodiment of the disclosure.
  • FIG. 4 is a schematic diagram of an exploded structure of an optical module provided by an embodiment of the disclosure.
  • FIG. 5 is a schematic structural diagram of the top layer of the circuit board of the optical module provided by an embodiment of the disclosure.
  • FIG. 6 is a schematic structural diagram of a first inner layer of a circuit board of an optical module provided by an embodiment of the disclosure
  • FIG. 7 is a schematic structural diagram of a second inner layer of a circuit board of an optical module provided by an embodiment of the disclosure.
  • FIG. 8 is a schematic structural diagram of the first inner layer in the other inner layer groups of the circuit board of the optical module provided by the embodiment of the disclosure.
  • FIG. 9 is a schematic structural diagram of a second inner layer in other inner layer groups of the circuit board of the optical module provided by the embodiment of the disclosure.
  • FIG. 10 is a schematic structural diagram of the bottom layer of the circuit board of the optical module provided by an embodiment of the disclosure.
  • FIG. 11 is a schematic structural diagram of another circuit board provided by an embodiment of the disclosure.
  • FIG. 12 is a partial structural schematic diagram of the contact connection between the circuit board and the connector when the optical module is inserted into the cage according to the embodiment of the disclosure;
  • FIG. 13 is a partial exploded view 1 of the first end of another circuit board provided by an embodiment of the disclosure.
  • FIG. 14 is a second partial exploded view of the first end of another circuit board provided by an embodiment of the disclosure.
  • One of the core links of optical fiber communication is the mutual conversion of optical and electrical signals.
  • Optical fiber communication uses information-carrying optical signals to be transmitted in optical fibers/optical waveguides and other information transmission equipment.
  • the passive transmission characteristics of light in optical fibers/optical waveguides can achieve low-cost and low-loss information transmission; and computers and other information processing equipment Electrical signals are used.
  • information transmission equipment such as optical fibers/optical waveguides and information processing equipment such as computers, it is necessary to realize mutual conversion between electrical signals and optical signals.
  • the optical module realizes the above-mentioned mutual conversion function of optical and electrical signals in the field of optical fiber communication technology, and the mutual conversion of optical signals and electrical signals is the core function of the optical module.
  • the optical module realizes the electrical connection with the external host computer through the golden finger component on its internal circuit board.
  • the main electrical connections include power supply, I2C signal, data signal and grounding.
  • the electrical connection method realized by the golden finger component has become The mainstream connection method of the optical module industry, based on this, the definition of pins on golden finger components has formed a variety of industry agreements/standards.
  • Figure 1 is a schematic diagram of the connection relationship of an optical communication terminal.
  • the connection of the optical communication terminal mainly includes the interconnection between the optical network terminal 100, the optical module 200, the optical fiber 101, and the network cable 103;
  • One end of the optical fiber 101 is connected to the remote server, and one end of the network cable 103 is connected to the local information processing equipment.
  • the connection between the local information processing equipment and the remote server is completed by the connection of the optical fiber 101 and the network cable 103; and the connection between the optical fiber 101 and the network cable 103 is The optical network terminal 100 with the optical module 200 is completed.
  • the optical port of the optical module 200 is externally connected to the optical fiber 101 to establish a bidirectional optical signal connection with the optical fiber 101;
  • the electrical port of the optical module 200 is externally connected to the optical network terminal 100 to establish a bidirectional electrical signal connection with the optical network terminal 100;
  • the optical module realizes the mutual conversion between optical signals and electrical signals, thereby realizing the establishment of an information connection between the optical fiber and the optical network terminal; specifically, the optical signal from the optical fiber is converted into an electrical signal by the optical module and then input to the optical network terminal 100 , The electrical signal from the optical network terminal 100 is converted into an optical signal by the optical module and input into the optical fiber.
  • the optical network terminal has an optical module interface 102, which is used to connect to the optical module 200 and establish a two-way electrical signal connection with the optical module 200; the optical network terminal has a network cable interface 104, which is used to connect to the network cable 103 and establish a two-way electrical connection with the network cable 103 Signal connection; a connection is established between the optical module 200 and the network cable 103 through the optical network terminal 100.
  • the optical network terminal transmits the signal from the optical module to the network cable, and transmits the signal from the network cable to the optical module, and the optical network terminal serves as the optical The upper computer of the module monitors the work of the optical module.
  • the remote server establishes a two-way signal transmission channel with the local information processing equipment through optical fibers, optical modules, optical network terminals and network cables.
  • Common information processing equipment includes routers, switches, electronic computers, etc.; the optical network terminal is the upper computer of the optical module, which provides data signals to the optical module and receives data signals from the optical module.
  • the common optical module upper computer also has optical lines Terminal and so on.
  • FIG 2 is a schematic diagram of the optical network terminal structure.
  • the optical network terminal 100 has a circuit board 105, and a cage 106 is provided on the surface of the circuit board 105; an electrical connector is provided inside the cage 106 for accessing optical module electrical ports such as golden finger components;
  • a heat sink 107 is provided on the cage 106, and the heat sink 107 has protrusions such as fins that increase the heat dissipation area.
  • the optical module 200 is inserted into the optical network terminal. Specifically, the electrical port of the optical module is inserted into the electrical connector inside the cage 106, and the optical port of the optical module is connected to the optical fiber 101.
  • the cage 106 is located on the circuit board and wraps the electrical connector on the circuit board in the cage, so that the electrical connector is arranged inside the cage; the optical module is inserted into the cage, and the optical module is fixed by the cage, and the heat generated by the optical module is conducted to the cage 106, and then spread through the radiator 107 on the cage.
  • FIG. 3 is a schematic structural diagram of an optical module provided by an embodiment of the present disclosure
  • FIG. 4 is a schematic diagram of an exploded structure of an optical module provided by an embodiment of the present disclosure.
  • the optical module 200 provided by the embodiment of the present disclosure includes an upper housing 201, a lower housing 202, an unlocking component 203, a circuit board 300, a light emitting device 301, and a light receiving device 302;
  • the upper shell 201 is covered on the lower shell 202 to form a wrapper cavity with two openings; the outer contour of the wrapper cavity generally presents a square shape.
  • the lower shell includes a main board and is located on both sides of the main board, and Two side plates are arranged vertically; the upper shell includes a cover plate, and the cover plate covers the two side plates of the upper shell to form a wrapping cavity; the upper shell may also include The two vertical side walls of the plate are combined with the two side plates to realize the upper casing covering the lower casing.
  • the two openings can be two openings (204, 205) in the same direction, or two openings in different directions; one of the openings is the electrical port 204, and the gold finger assembly of the circuit board extends from the electrical port 204
  • the other opening is the optical port 205, which is used for external optical fiber access to connect the optical transceiver device 400 inside the optical module; the circuit board 300, the optical transceiver device 400 and other optoelectronic devices are located in the package cavity In the body.
  • the upper shell and the lower shell are combined to facilitate the installation of the circuit board 300, the optical transceiver 400 and other components into the shell.
  • the upper shell and the lower shell form the outermost package protection shell of the optical module.
  • the upper shell and the lower shell are generally made of metal materials, which is conducive to electromagnetic shielding and heat dissipation; generally, the shell of the optical module is not made into an integral part, so that when assembling circuit boards and other devices, positioning parts, heat dissipation and electromagnetic shielding The components cannot be installed, and it is not conducive to production automation.
  • the unlocking component 203 is located on the outer wall of the wrapping cavity/lower casing 202, and is used to realize a fixed connection between the optical module and the upper computer, or to release the fixed connection between the optical module and the upper computer.
  • the unlocking component 203 has an engaging component that matches the cage of the host computer; pulling the end of the unlocking component can make the unlocking component move relatively on the surface of the outer wall; the optical module is inserted into the cage of the host computer, and the optical module is held by the engaging component of the unlocking component Fixed in the cage of the host computer; by pulling the unlocking part, the locking part of the unlocking part moves accordingly, and then the connection relationship between the locking part and the host computer is changed, so as to release the optical module and the host computer. The optical module is withdrawn from the cage of the host computer.
  • the circuit board 300 is provided with circuit wiring, electronic components (such as capacitors, resistors, transistors, MOS tubes) and chips (such as MCUs, laser drive chips, limiting amplification chips, clock data recovery CDR, power management chips, and data processing chips) DSP) and so on.
  • electronic components such as capacitors, resistors, transistors, MOS tubes
  • chips such as MCUs, laser drive chips, limiting amplification chips, clock data recovery CDR, power management chips, and data processing chips) DSP
  • the circuit board connects the electrical components in the optical module according to the circuit design through circuit traces to achieve electrical functions such as power supply, electrical signal transmission, and grounding.
  • the circuit board is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also realize the carrying function. For example, the rigid circuit board can carry the chip smoothly; when the optical transceiver is on the circuit board, the rigid circuit board can also provide Stable bearing; the rigid circuit board can also be inserted into the electrical connector in the upper computer cage. Specifically, a metal pin/gold finger assembly is formed on one end surface of the rigid circuit board for connection with the electrical connector; these All of them are not easy to implement with flexible circuit boards.
  • Some optical modules also use flexible circuit boards as a supplement to rigid circuit boards; flexible circuit boards are generally used in conjunction with rigid circuit boards, for example, flexible circuit boards can be used to connect between rigid circuit boards and optical transceiver devices.
  • FIG. 5 is a schematic diagram of the structure of the top layer of the circuit board of the optical module provided by the embodiment of the present disclosure
  • FIG. 6 is the first inner layer of the circuit board of the optical module provided by the embodiment of the disclosure
  • Figure 10 is a schematic structural diagram of the bottom layer of the circuit board of the optical module provided by an embodiment of the disclosure.
  • the optical module includes a circuit board and a driving chip 601 and a light emitting chip 602 arranged on the circuit board.
  • the light emitting chip 602 is used to generate laser light, and the generated laser light can be emitted through an optical fiber.
  • the driving chip 601 is used to provide driving to the light emitting chip 602 so as to drive the light emitting chip 602 to generate laser light.
  • the circuit board adopts a multilayer board, and adjacent layers are bonded together.
  • the circuit board includes a top layer 401, a first inner layer 403, and a bottom layer 402.
  • the top layer 401 is located on the upper surface of the circuit board; as shown in FIG. 10, the bottom layer 402 is located on the lower surface of the circuit board; the first inner layer 403 is located between the top layer 401 and the bottom layer 402, and is adjacent to the top layer 401.
  • the specific expression is the bonding relationship, such as being adjacent to the top layer, and being bonded to the top layer.
  • the top layer 401 refers to the surface layer of the signal pins 501 with golden finger components.
  • the top layer 401 with the signal pins 501 faces downward due to the mounting relationship, the top layer 401 is located on the lower surface of the circuit board, and the bottom layer 402 is located The upper surface of the circuit board.
  • a golden finger assembly and a microprocessor 603 are provided on the top layer 401.
  • the golden finger assembly is arranged at one end of the top layer 401, and multiple rows of pins are arranged side by side, including a signal pin 501, an I2C pin 503, and a ground pin 502.
  • the signal pin 501 is used to connect with the high-speed signal line 604, and then the high-speed signal line 604 is signal-connected with the driving chip 601; the I2C pin 503 is used to connect with the microprocessor 603.
  • the ground pin 502 is also connected to the driving chip 601.
  • a power management chip 605 may also be provided on the top layer 401, and a power supply pin is provided on the corresponding golden finger assembly.
  • the power management chip 605 is connected to the power supply pin and is connected to the driving chip 601 for power supply.
  • the impedance of the high-speed signal line 604 is matched with a differential 100 ohms.
  • the high-speed signal line 604 with a differential of 100 ohms has a thinner trace.
  • a metal layer 406 is laid on the first inner layer 403, which may be a copper layer.
  • the top layer 401 and the first inner layer 403 are arranged in layers, as shown in FIG. 6, there is no metal layer 406 in the orthographic projection area of the signal pin 501 and the ground pin 502 on the first inner layer 403; the I2C pin 503 There is a metal layer 406 in the orthographic projection area on the first inner layer 403.
  • the signal pin 501 and the ground pin 502 are hollowed out of the metal layer 406 in the orthographic projection area on the first inner layer 403, so that there is no metal at this position; the I2C pin 503 is on the first inner layer 403.
  • the projection area is not hollowed out, and the original metal layer 406 is maintained.
  • the hollowing process is performed on the first inner layer 403.
  • the signal pin 501 and the ground pin 502 are both located at the end of the top layer 401 Therefore, when the first inner layer 403 is hollowed out, the corresponding end edge of the first inner layer 403 may be hollowed out, so that the shape of the hollowed-out part is roughly a rectangle.
  • the metal layer 406 does not exist in the orthographic projection area of the signal pin 501 and the ground pin 502, which increases the distance between the pad where the signal pin 501 and the ground pin 502 are located and the reference ground. Distance.
  • the impedance can be increased after the distance is increased, so as to offset the problem of impedance reduction caused by the increase of the pin area, thereby maintaining the continuity of the impedance and ensuring the quality of signal transmission.
  • the number of signal pins 501 is two, which are arranged side by side with a gap between the two.
  • the number of ground pins 502 is also two, which are located on both sides of the signal pin 501 respectively. There is a gap between it and the signal pin 501. That is, the four pins are generally arranged side by side, and there is a gap between the two adjacent pins.
  • the orthographic projection area of the four pins is hollowed out, which is actually the entire surrounding area of the orthographic projection area hollowed out, thereby forming a hollowed out rectangle.
  • the present disclosure also provides a second embodiment.
  • the present disclosure in the above-mentioned first embodiment, there is no metal layer 406 in the orthographic projection area of the signal pin 501 and the ground pin 502 on the first inner layer 403; the I2C pin 503 is The metal layer 406 exists in the orthographic projection area on the first inner layer 403.
  • the second embodiment there is no metal layer 406 in the orthographic projection area of the signal pin 501 on the first inner layer 403, while the I2C pin 503 and the ground pin 502 are on the first inner layer 403.
  • the metal layer 406 exists in all the projection areas. Otherwise, the technical content of the second embodiment is the same as that of the above-mentioned first embodiment, and will not be repeated here.
  • the distance between the pad where the signal pin 501 is located and the reference ground is increased. According to the principle of impedance, the distance is increased.
  • the impedance can be increased to offset the problem of impedance reduction caused by the increase in the pin area, thereby maintaining the continuity of the impedance and ensuring the quality of signal transmission.
  • FIG. 7 is a schematic structural diagram of the second inner layer of the circuit board of the optical module provided by the embodiment of the present disclosure.
  • the circuit board further includes a second inner layer 404, which is located between the first inner layer 403 and the bottom layer 402 , And adjacent to the first inner layer 403.
  • a second inner layer 404 which is located between the first inner layer 403 and the bottom layer 402 , And adjacent to the first inner layer 403.
  • the metal layer 406 exists in the orthographic projection area on the inner layer 404. Except for this, the technical content of the third embodiment is the same as that of the above-mentioned first embodiment, and will not be repeated here.
  • the orthographic projection area of the signal pin 501 and the ground pin 502 on the inner layer is hollowed out on the metal layer 406, so that there is no metal at this position; the I2C pin 503
  • the orthographic projection area on the inner layer is not hollowed out, and the original metal layer 406 is maintained.
  • the metal layer 406 does not exist in the orthographic projection area of the signal pin 501 and the ground pin 502, and there is no metal in the orthographic projection area of the first inner layer 403 and the second inner layer 404. Therefore, compared with the first embodiment, the third embodiment further increases the distance between the pad where the signal pin 501 and the ground pin 502 are located and the reference ground. According to the principle of impedance, the distance After further increase, the impedance can be further increased, thereby further offsetting the problem of impedance reduction caused by the increase of the pin area, thereby maintaining the continuity of the impedance and ensuring the quality of signal transmission.
  • the present disclosure also provides a fourth embodiment.
  • a metal layer 406 exists in both the inner layer 403 and the orthographic projection area on the second inner layer 404. Except for this, the technical content of the fourth embodiment is the same as that of the third embodiment, and will not be repeated here.
  • the third embodiment further increases the difference between the pad where the signal pin 501 and the ground pin 502 are located and the reference ground. According to the principle of impedance, the impedance can be further increased after the spacing is further increased, thereby further offsetting the problem of impedance reduction caused by the increase of the pin area, thereby maintaining the continuity of the impedance and ensuring the signal transmission quality.
  • FIG. 5 FIG. 6, FIG. 7, FIG. 8, and FIG. 9.
  • FIG. 9 Schematic diagram of the structure of the layer
  • FIG. 9 is a schematic diagram of the structure of the second inner layer in the other inner layer groups of the circuit board of the optical module provided by the embodiment of the disclosure.
  • the fifth embodiment is an improvement on the basis of the third embodiment.
  • the circuit board further includes other inner layer groups, and the other inner layer groups have at least one other inner layer 407, It may be one layer, two layers, three layers, or more layers, which is not limited in the present disclosure.
  • the other inner layer group is located between the second inner layer 404 and the bottom layer 402, and the uppermost layer of the other inner layer groups is adjacent to the second inner layer 404, and the lowermost layer is adjacent to the bottom layer. 402 adjacent.
  • the orthographic projection area of the signal pin 501 and the ground pin 502 on the first inner layer 403 and the second inner layer 404 does not have a metal layer 406. ; As shown in Figure 8 and Figure 9, and in the orthographic projection area on the other inner layer groups, from top to bottom, from the first layer at least one layer does not exist in the metal layer 406; Figure 6, Figure 7, Figure As shown in FIG. 8 and FIG. 9, the metal layer 406 exists in the orthographic projection area of the I2C pin 503 on the first inner layer 403, the second inner layer 404 and other inner layer groups. Except for this, the technical content of the fifth embodiment is the same as that of the third embodiment, and will not be repeated here.
  • this sentence means that there is no metal layer in this layer.
  • this sentence describes the structure: there is no metal layer in sequence, for example, the first layer does not, and the second layer has a metal layer; the first layer and There is no second layer, and the third and subsequent layers have metal layers. Rather than, the first layer has no metal layer, the second layer has a metal layer, and the third layer has no metal layer. It is not that the first layer has a metal layer, and the second and third layers have no metal layer. Intermittent structure.
  • the orthographic projection area of the signal pin 501 on the other inner layer groups, from top to bottom does not exist in all layers Metal layer 406; the orthographic projection area of the ground pin 502 on the other inner layer groups, from top to bottom, there is no metal layer 406 in all layers.
  • the metal layer 406 does not exist in the orthographic projection area of the signal pin 501 and the ground pin 502, and it is at least one layer of the first inner layer 403, the second inner layer 404, and other inner layer groups. There is no metal layer 406 on the orthographic projection area on the above, so compared to the third embodiment, only the first inner layer 403 and the second inner layer 404 on the orthographic projection area do not have the metal layer 406, this fifth implementation
  • the example further increases the distance between the pad where the signal pin 501 and the ground pin 502 are located and the reference ground. According to the principle of impedance, the impedance can be further increased after the spacing is further increased, thereby further offsetting the increase in pin area. The problem of impedance reduction caused by large, thereby maintaining the continuity of impedance and ensuring the quality of signal transmission.
  • the present disclosure also provides the last sixth embodiment.
  • the difference from the above-mentioned fifth embodiment is that in the sixth embodiment, only the orthographic projection area of the signal pin 501 does not have the metal layer 406, and the ground pin 502 and The metal layer 406 exists in the orthographic projection area of the I2C pin 503. That is, as shown in FIGS. 6 and 7, there is no metal layer 406 in the orthographic projection area of the signal pin 501 on the first inner layer 403 and the second inner layer 404; as shown in FIGS.
  • the orthographic projection area of the signal pin 501 on the other inner layer groups, from top to bottom, does not exist in all layers Metal layer 406.
  • the metal layer 406 does not exist in the orthographic projection area of the signal pin 501, and it is the orthographic projection area on at least one of the first inner layer 403, the second inner layer 404, and other inner layer groups. There is no metal layer 406 above, so compared to the fourth embodiment, only the first inner layer 403 and the second inner layer 404 do not have the metal layer 406 in the orthographic projection area.
  • the sixth embodiment further increases The distance between the pad where the signal pin 501 and the ground pin 502 are located and the reference ground. According to the principle of impedance, the impedance can be further increased after the spacing is further increased, thereby further offsetting the impedance caused by the increase in the pin area Reduce the problem, thereby maintaining the continuity of impedance, to ensure the quality of signal transmission.
  • FIG. 11 is a schematic structural diagram of another circuit board provided by an embodiment of the disclosure.
  • the circuit board 300 provided by the embodiment of the present disclosure includes a first end 310, and a gold finger assembly 320 is disposed on the first end 310.
  • the circuit board 300 includes two surfaces with relatively large areas and opposite positions. For ease of description, one surface is referred to as the top layer of the circuit board 300, and the other surface is referred to as the bottom layer of the circuit board 300; the golden finger assembly 320 is not only provided On the top layer of the circuit board 300, the gold finger assembly 320 is also arranged on the bottom layer of the circuit board 300 opposite to the top layer shown in FIGS. 5 and 6.
  • the golden finger assembly 320 includes a first set of golden finger assemblies and a second set of golden finger assemblies, and the first set of golden finger assemblies and the second set of golden finger assemblies respectively include several golden finger assemblies.
  • the first group of golden finger components are arranged on the top layer of the circuit board 300, and the second group of golden finger components are arranged on the bottom layer of the circuit board 300.
  • the golden finger assembly 320 includes a plurality of mutually isolated golden finger assemblies, and the plurality of mutually isolated golden finger assemblies include a golden finger assembly for grounding, a golden finger assembly for transmitting power signals, and a golden finger assembly for transmitting communication signals.
  • the golden finger component used to transmit power signals means that the function of the signal transmitted by the golden finger component is to make the circuit board 300 power on the device to work
  • the golden finger component used to transmit communication signals means that the golden finger component transmits
  • the function of the signal is to make the golden finger assembly perform communication signal transmission, so although the golden finger assembly used to transmit the communication signal is essentially the transmission of electrical signals, the function and use of the electrical signal transmitted by the golden finger assembly for the communication signal is The functions of the electrical signals transmitted by the golden finger components for transmitting power signals are different.
  • the golden finger components for transmitting electrical signals are divided into Gold finger components for transmitting power signals and golden finger components for transmitting communication signals.
  • the signal type transmitted by the golden finger assembly used to transmit communication signals can specifically be control signals, high-frequency signals or clock signals, etc.
  • the golden finger assembly used to transmit communication signals includes the transmission of high-frequency signals.
  • the gold finger assembly used for grounding is called a grounded gold finger assembly
  • the gold finger assembly used for transmitting high-frequency signals is called a high-frequency signal gold finger assembly.
  • circuit traces such as ground and high-frequency signal lines are provided on the circuit board 300, and the golden finger components in the golden finger component 320 are respectively electrically connected to the corresponding circuit traces.
  • the grounded golden finger assembly is connected to the ground on the circuit board 300
  • the high-frequency signal golden finger assembly is electrically connected to the corresponding high-frequency signal line on the circuit board 300.
  • the circuit board 300 is a multilayer circuit board, and the circuits of the circuit board 300 are integrated and laid out on each layer of the circuit board 300.
  • the number of layers of the circuit board 300 can be selected according to the actual needs of the circuit layout, and adjacent layers are isolated from each other by insulating materials. In an embodiment of the present disclosure, the number of layers of the circuit board 300 may be 5 layers, 8 layers, 10 layers, and so on.
  • the circuit board 300 includes a top layer, a bottom layer, and several inner layers (including a first inner layer) located between the top layer and the bottom layer, and circuit traces are provided on each layer.
  • the inner layer usually includes multiple layers.
  • the circuit board 300 includes 10 layers, and the inner layer includes 8 layers.
  • the gold finger components of the gold finger components 320 are arranged on the top and bottom layers of the circuit board 300.
  • the circuit trace extends directly to the corresponding gold finger component; if the gold finger component needs to be connected to the circuit trace on the inner layer of the circuit board 300, The circuit trace directly extends to the projection area of the corresponding golden finger component on the inner layer of the circuit board 300, and then electrically connects the corresponding golden finger component through a metal via. For example, if a certain circuit trace is on the third layer of the circuit board 300, and the corresponding golden finger component is located on the top layer of the circuit board 300, the circuit trace extends to the projection area of the corresponding golden finger component on the third layer of the circuit board 300. And in the projection area of the corresponding golden finger component of the circuit board 300, via holes from the top layer to the third layer are provided, and the circuit trace is electrically connected to the corresponding golden finger component through the via hole; the number of via holes usually includes several.
  • FIG. 12 is a partial structural schematic diagram of the contact connection between the circuit board and the connector when the optical module is inserted into the cage according to the embodiment of the disclosure.
  • the gold finger components of the gold finger component 320 are arranged on the top layer 301A and the bottom layer 302A of the circuit board 300.
  • the gold finger components located at the first end of the circuit board 300 are connected to the corresponding connectors respectively. Contact electrical connection.
  • the circuit board 300 provided in this embodiment is a 10-layer board, that is, the circuit board 300 includes 10 metal layers for setting circuit traces.
  • the circuit board 300 includes a top layer 301A, a bottom layer 302A, and an inner layer 303 disposed between the top layer 301A and the bottom layer 302A.
  • the top layer 301A is the first layer of the circuit board 300
  • the bottom layer 302A is the circuit board.
  • several inner layers 303 include the second layer, the third layer, the fourth layer...the eighth layer, the ninth layer of the circuit board 300.
  • the top layer 301A, the second layer...the ninth layer, and the bottom layer 302A are arranged in order, and the adjacent layers are separated from each other by insulating materials. Since the thickness of the top layer 301A, the second layer...the ninth layer, and the bottom layer 302A are thinner, the layer-by-layer structure of the circuit board 300 shown in FIG. 12 is mainly formed of insulating materials, and the second layer...the ninth layer They are respectively clamped between corresponding structural layers formed of insulating materials.
  • the shaded area on the top layer 301A in FIG. 12 is a circuit trace formed by copper coating.
  • the connector includes a connector G for connecting a grounded golden finger assembly and a connector S for connecting a high-frequency signal golden finger assembly. Finger components.
  • the number of connectors G and connectors S connected to it is more than one, and the number of grounding gold finger components and high frequency signal gold finger components is also more than one.
  • the grounded golden finger assembly and the high-frequency signal golden finger assembly are respectively electrically connected to corresponding circuit traces on the circuit board 300.
  • circuit traces shown in FIG. 12 that are electrically connected to the grounded golden finger assembly and the high-frequency signal golden finger assembly on the top layer 301A of the circuit board 300 are all located on the top layer 301A of the circuit board 300, but the circuit traces in the embodiment of the present disclosure
  • the wires are not limited to the top layer 301A of the circuit board 300.
  • the circuit traces to which the grounded gold finger components or the high-frequency signal gold finger components on the top layer 301A are electrically connected may be located on the inner layer 303.
  • circuit trace to which the ground gold finger component or the high-frequency signal gold finger component on the top layer 301A is electrically connected can be located on the inner layer 303, then the circuit trace is extended to the projection area of the gold finger component on the inner layer 303, A metal via hole is arranged between the gold finger assembly and the projection area, and the circuit trace and the gold finger assembly are electrically connected through the metal via hole.
  • the circuit traces to which the grounded golden finger components or the high-frequency signal golden finger components on the bottom layer 302A are electrically connected can be located on the bottom layer 302A, and can also be located on the inner layer 303.
  • the high-frequency signal golden finger assembly and the like are provided with a hollowed-out area in the projection area of the inner layer 303 of the circuit board 300.
  • the hollowed-out area means that there are at most circuit traces connected to the corresponding golden finger components in the area, and no other metal is laid (no other circuit traces are provided).
  • the width of the hollowed-out area is greater than or equal to the width of the corresponding high-frequency signal golden finger components, such as the side of the hollowed-out area is located below the grounded golden finger components next to the high-frequency signal golden finger components, etc.
  • the length direction extends as far as possible to the edge of the circuit board 300, so that the projection of the hollowed out area on the surface of the circuit board 300 completely covers the corresponding golden finger assembly as much as possible.
  • the hollowed-out area may not completely cover the corresponding golden finger component.
  • the shape of the hollowed-out area can be a regular shape or an irregular shape, which can be adjusted and set according to the paving and circuit routing of the area.
  • the board edge of the first end 310 of the circuit board 300 is provided with a board edge reference ground 330.
  • the board edge reference ground 330 is arranged on the board edge perpendicular to the length direction of the circuit board 300, that is, the board edge reference ground 330 is the edge of the first end 310 of the circuit board 300.
  • the board edge reference ground 330 is provided on the inner layer 303 of the circuit board 300.
  • the board edge reference ground 330 is located at the edge of the inner layer 303, that is, the board edge reference ground 330 is located at the edge of the inner layer projection area of the golden finger assembly 320, which is closer to the edge of the inner layer 303 than the hollowed-out area provided on the inner layer 303.
  • the board edge reference ground 330 is in direct contact with the cutout area on the same layer, such as on the circuit board 300, the cutout area extends to the board edge reference ground 330 on the same layer.
  • the board edge reference ground 330 is usually formed by laying metal, such as copper, and the board edge reference ground 330 is electrically connected to the ground on the circuit board 300.
  • the electromagnetic radiation generated by the connector S and the corresponding high-frequency signal golden finger assembly is transmitted to the board-side reference ground 330.
  • the board-side reference ground 330 will absorb the energy of electromagnetic radiation and hinder the transmission of electromagnetic radiation, thereby reducing the high-frequency signal gold finger Crosstalk is generated between the components and the channels at the connector S, and the crosstalk between the channels at 20GHz is found to be less than -30dB through testing.
  • a board edge reference ground 330 is provided on each board edge of the inner layer 303.
  • the board edge reference ground 330 on each layer can be connected to the ground gold finger assembly through metal vias.
  • the width of the board edge reference ground 330 is not less than 20 mils.
  • FIG. 13 is a partial exploded view 1 of the first end of another circuit board provided by an embodiment of the disclosure.
  • FIG. 13 shows a partial structure of the top layer 301A of the circuit board 300.
  • the golden finger assembly 320 provided in this embodiment includes a section of golden finger assemblies arranged according to the rules of the protocol, including a first group of golden finger assemblies including a first high-frequency signal golden finger assembly 321 and a second high-frequency signal golden finger assembly 321. Frequency signal golden finger assembly 322.
  • the first group of golden finger components may not only include the first high-frequency signal golden finger component 321 and the second high-frequency signal golden finger component 322, but may also include other high-frequency signal golden finger components.
  • the first high-frequency signal golden finger assembly 321 and the second high-frequency signal golden finger assembly 322 are usually used to transmit differential signals, so the golden fingers in the first high-frequency signal golden finger assembly 321 and the second high-frequency signal golden finger assembly 322 Components usually appear in pairs.
  • the first group of golden finger assemblies in the golden finger assembly 320 provided in this embodiment further includes a first grounded golden finger assembly 323, a second grounded golden finger assembly 324, and a third grounded golden finger assembly 325.
  • the first grounded golden finger assembly 323 is arranged on one side of the first high-frequency signal golden finger assembly 321
  • the second grounded golden finger assembly 324 is arranged on the other side of the first high-frequency signal golden finger assembly 321
  • the third grounded golden finger The component 325 is arranged on a side of the second high-frequency signal golden finger component 322 away from the first high-frequency signal golden finger component 321.
  • FIG. 13 also shows the first inner layer 3031 of the circuit board 300, and the first inner layer 3031 is the second layer of the circuit board 300.
  • the board edge of the first inner layer 3031 is provided with a first board edge reference ground 331.
  • the width of the first board edge reference ground 331 is not less than 20 mils.
  • other inner layers of the circuit board 300 may also be provided with a board edge reference ground, and the setting of the board edge reference ground on other inner layers may refer to the first board edge reference ground 331 on the first inner layer 3031.
  • the board edge reference ground can be directly or indirectly connected electrically. For example, metal vias are provided on the board edge reference ground, and the electrical connection between the board edge reference grounds is realized through the corresponding metal vias.
  • the board edge reference ground is directly or indirectly electrically connected to the grounded gold finger assembly.
  • a number of metal vias 3311 are provided on the first inner layer 3031, and the first board edge reference ground 331 is connected to the board edge reference grounds on other inner layers through the metal vias 3311; or, connected to the top layer 301A Or the grounded gold finger assembly on the bottom layer 302A.
  • the first inner layer 3031 is also provided with a first hollowed-out area 0311 and a second hollowed-out area 0312.
  • the projection of the first hollowed-out area 0311 on the top layer 301A completely covers the first high-frequency signal gold finger assembly 321
  • the projection of the second hollowed-out area 0312 on the top layer 301A completely covers the second high-frequency signal golden finger assembly 322.
  • the area around the first hollowed-out area 0311 and the second hollowed-out area 0312 needs to be routed and laid a large area, the area of the first hollowed-out area 0311 and the second hollowed-out area 0312 can be appropriately reduced to make the first hollow area 0311 and the second hollow area 0312.
  • the projection of the hollowed-out area 0311 on the top layer 301A does not completely cover the first high-frequency signal gold finger component 321, and the projection of the second hollowed-out area 0312 on the top layer 301A does not completely cover the second high-frequency signal gold finger component 322.
  • the first hollowed-out area 0311 helps to increase the impedance of the first high-frequency signal golden finger assembly 321, and the second hollowed-out area 0312 helps to increase the impedance of the second high-frequency signal golden finger assembly 322.
  • the first hollowed-out area 0311 and the second hollowed-out area 0312 extend to the first board edge reference ground 331.
  • the first hollowed-out area 0311 and the second hollowed-out area 0312 may have regular shapes. For the hollowed-out areas on other layers on the inner layer 303, please refer to the first hollowed-out area 0311.
  • the width of the first hollowed-out area 0311 is greater than the width of the first high-frequency signal golden finger assembly 321, and the second hollowed-out area 0312 is greater than the width of the second high-frequency signal golden finger assembly 322.
  • one side of the first hollowed-out area 0311 is located in the projection area of the first grounded gold finger assembly 323 on the first inner layer 3031, and the other side of the first hollowed-out area 0311 is located at the second
  • the grounded gold finger assembly 324 is in the projection area of the first inner layer 3031; one side of the second hollowed-out area 0312 is located in the second grounded gold finger assembly 324 in the projection area of the first inner layer 3031, and the other side of the second hollowed-out area 0312
  • the side is located in the projection area of the third grounded gold finger assembly 325 on the first inner layer 3031. If the first hollowed-out area 0311 and the second hollowed-out area 0312 can be routed and laid, the first hollowed-out area 0311 can be connected to the second hollowed-out area 0312.
  • other inner layers 303 of the circuit board 300 are also provided with hollowed out areas.
  • a hollowed-out area is provided on successive inner layers 303 close to the layer where the high-frequency signal golden finger assembly is located.
  • the first high-frequency signal golden finger assembly 321 is provided with a first hollowed-out area on the second to fifth, second to eighth layers of the projection area on the circuit board 300, and the second high-frequency signal golden finger
  • the component 322 is provided with a second hollowed-out area on the second layer to the fifth layer, the second layer to the ninth layer, etc. of the projection area on the circuit board 300.
  • FIG. 14 is a partial exploded view 2 of the first end of another circuit board provided by an embodiment of the present disclosure. Compared with FIG. 13, FIG. 14 also shows the second inner layer 3032 of the circuit board 300, and the second inner layer 3032 is the third layer of the circuit board 300.
  • the board edge of the second inner layer 3032 is provided with a second board edge reference ground 332.
  • the width of the second board edge reference ground 332 is not less than 20 mils.
  • a number of metal vias 3321 are provided on the second board edge reference ground 332, and the second board edge reference ground 332 is connected to the first board edge reference ground 331 or other board edge reference grounds on the inner layer through the metal via 3321.
  • the second inner layer 3032 is also provided with a first hollowed-out area 0321 and a second hollowed-out area 0322.
  • the projection of the first hollowed-out area 0321 on the top layer 301A covers the first high-frequency signal gold finger assembly 321.
  • the projection of the second hollowed-out area 0322 on the top layer 301A covers the second high-frequency signal golden finger assembly 322.
  • the first hollowed-out area 0321 helps to further increase the impedance of the first high-frequency signal golden finger assembly 321, and the second hollowed-out area 0322 helps to further increase the impedance of the second high-frequency signal golden finger assembly 322.
  • the first hollowed-out area 0321 and the second hollowed-out area 0322 extend to the second board edge reference ground 332.
  • the width of the first hollowed-out area 0321 is greater than the width of the first high-frequency signal golden finger assembly 321, and the second hollowed-out area 0322 is greater than the width of the second high-frequency signal golden finger assembly 322.
  • one side of the first hollowed-out area 0321 is located in the projection area of the first grounded gold finger assembly 323 on the second inner layer 3032, and the other side of the first hollowed-out area 0321 is located at the second inner layer 3032.
  • the grounded gold finger assembly 324 is in the projection area of the second inner layer 3032; one side of the second hollowed-out area 0322 is located in the second grounded gold finger assembly 324 in the second inner layer 3032 projection area, and the other side of the second hollowed-out area 0322 The side is located in the projection area of the third grounded gold finger assembly 325 on the second inner layer 3032.
  • the second group of golden finger components on the bottom layer of the circuit board 300 may include high-frequency signal golden finger components such as a third high-frequency signal golden finger component and a fourth high-frequency signal golden finger component.
  • the first high-frequency signal golden finger component 321 is opposite to the third high-frequency signal golden finger component
  • the second high-frequency signal golden finger component 322 is opposite to the fourth high-frequency signal golden finger component.
  • the third high-frequency signal golden finger assembly and the fourth high-frequency signal golden finger assembly are also provided with hollowed-out areas in the projection area of the inner layer 303.
  • the third high-frequency signal golden finger assembly is provided with a third hollowed-out area on the ninth to sixth layer, the ninth to the second layer, etc. of the projection area on the circuit board 300, and the fourth high-frequency signal golden finger assembly
  • a fourth hollowed-out area is provided on the ninth to the sixth layer, the ninth to the second layer, etc. of the projection area on the circuit board 300.
  • the second group of golden finger assemblies in the golden finger assembly 320 provided in this embodiment further includes a fourth grounded golden finger assembly, a fifth grounded golden finger assembly, and a sixth grounded golden finger assembly.
  • the fourth grounded golden finger assembly is arranged on one side of the third high-frequency signal golden finger assembly
  • the fifth grounded golden finger assembly is arranged on the other side of the third high-frequency signal golden finger assembly
  • the sixth grounded golden finger assembly is arranged on the second side.
  • the four high-frequency signal golden finger assembly is away from the side of the third high-frequency signal golden finger assembly.
  • the width of the third hollowed-out area is greater than the width of the third high-frequency signal golden finger component
  • the fourth hollowed-out area is greater than the width of the fourth high-frequency signal golden finger component.
  • one side of the third hollowed-out area is located in the inner projection area of the fourth grounded gold finger assembly, and the other side of the third hollowed-out area is located on the inner layer of the fifth grounded gold finger.
  • Projection area; one side of the fourth hollowed-out area is located in the inner projection area of the fifth grounded gold finger assembly, and the other side of the fourth hollowed-out area is located in the inner projection area of the sixth grounded gold finger assembly.
  • specific features, components, or characteristics may be combined in any suitable manner. Therefore, without limitation, the specific features, components or characteristics shown or described in conjunction with one embodiment may be combined in whole or in part with the features, components or characteristics of one or more other embodiments. Such modifications and variations are intended to be included within the scope of the present disclosure.

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Abstract

一种光模块（200），包括电路板（300）、及置于电路板（300）上的驱动芯片（601）和光发射芯片（602）；电路板（300）包括：顶层（401）；底层（402）；第一内层（403），位于顶层（401）与底层（402）之间；顶层（401）上设有：金手指组件，设于顶层（401）的一端，包括信号引脚（501）、I2C引脚（503）和接地引脚（502）；微处理器（603），与I2C引脚（503）连接；驱动芯片（601）与信号引脚（501）和接地引脚（502）连接；信号引脚（501）在第一内层（403）上的正投影区域不存在金属层；接地引脚（502）和I2C引脚（503）在第一内层（403）上的正投影区域均存在金属层。光模块（200）的结构设计能够解决由于金手指组件面积增大而带来的阻抗骤然减小的问题，从而保持了阻抗的连续性，保证了信号传输质量。

Description

一种光模块
本公开要求在2020年03月20日提交中国专利局、申请号为202010198479.X、发明名称为“一种光模块”、在2020年07月15日提交中国专利局、申请号为202010681155.1、发明名称为“一种光模块”的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及光通信技术领域，尤其涉及一种光模块。
背景技术
光模块(Optical Module)通常指用于光电转换的一种集成模块，可以实现光信号和电信号的相互转换，在光通信领域中发挥着重要作用。
在光通信领域中，随着通信速率的不断加快，实现信号传输的通信通道的数目不断增加。通常，信号高速传输的通信通道通过光模块的电路板上的金手指组件(金黄色、且排列如手指状的导电触片)和高速信号线实现。
发明内容
本公开提供一种光模块，包括,电路板；驱动芯片，置于电路板表面；光发射芯片，通过电路板接收来自驱动芯片的信号；电路板包括：顶层，位于电路板的上表面；底层，位于电路板的下表面；第一内层，位于顶层与底层之间，并与顶层贴合；顶层上设有：金手指组件，设于顶层的一端，包括信号引脚、I2C引脚和接地引脚；微处理器，与I2C引脚连接；驱动芯片分别与信号引脚和接地引脚连接；信号引脚在第一内层上的正投影区域不存在金属层；接地引脚和I2C引脚在第一内层上的正投影区域均存在金属层。
本公开还提供一种光模块，包括,电路板；驱动芯片，置于电路板表面；光发射芯片，通过电路板接收来自驱动芯片的信号；电路板包括：顶层，位于电路板的上表面；底层，位于电路板的下表面；第一内层，位于顶层与底层之间，并与顶层贴合；顶层上设有：金手指组件，设于顶层的一端，包括信号引脚、I2C引脚和接地引脚；微处理器，与I2C引脚连接；驱动芯片分别与信号引脚和接地引脚连接；信号引脚和接地引脚在第一内层上的正投影区域均不存在金属层；I2C引脚在第一内层上的正投影区域均存在金属层。
本公开还提供一种光模块，包括,电路板；驱动芯片，置于电路板表面；光发射芯片，通过电路板接收来自驱动芯片的信号；电路板包括：顶层，位于电路板的上表面；底层，位于电路板的下表面；第一内层，位于顶层与底层之间，并与顶层贴合；第二内层，位于第一内层与底层之间，并与第二内层贴合；顶层上设有：金手指组件，设于顶层的一端，包括信号引脚、I2C引脚和接地引脚；微处理器，与I2C引脚连接；驱动芯片分别与信号引脚和接地引脚连接；信号引脚在第一内层和第二内层上的正投影区域均不存在金属层；接地引脚在第一内层和第二内层上的正投影区域均存在金属层；I2C引脚在第一内层和第二内层上的正投影区域均存在金属层。
本公开还提供一种光模块，包括,电路板；驱动芯片，置于电路板表面；光发射芯片，通过电路板接收来自驱动芯片的信号；电路板包括：顶层，位于电路板的上表面；底层，位于电路板的下表面；第一内层，位于顶层与底层之间，并与顶层贴合；第二内层，位于第一内层与底层之间，并与第二内层贴合；顶层上设有：金手指组件，设于顶层的一端，包括信号引脚、I2C引脚和接地引脚；微处理器，与I2C引脚连接；驱动芯片分别与信号引脚和接地引脚连接；信号引脚在第一内层和第二内层上的正投影区域均不存在金属层；接地引脚在第一内层和第二内层上的正投影区域均不存在金属层；I2C引脚在第一内层和第二内层上的正投影区域均存在金属层。
本公开还提供一种光模块，包括，电路板；驱动芯片，置于电路板表面；光发射芯片，通过电路板接收来自驱动芯片的信号；电路板包括：顶层，位于电路板的上表面；底层，位于电路板的下表面；第一内层，位于顶层与底层之间，并与顶层贴合；第二内层，位于第一内层与底层之间，并与第二内层贴合；其他内层组，具有多层，位于第二内层与底层之间，并其他内层组的最上一层与第二内层相邻，其最下一层与底层贴合；顶层上设有：金手指组件，设于顶层的一端，包括信号引脚、I2C引脚和接地引脚；微处理器，与I2C引脚连接；驱动芯片分别与信号引脚和接地引脚连接；信号引脚在第一内层和第二内层上的正投影区域均不存在金属层；并在其他内层组上的正投影区域，由上往下，自第一层起来至少依次一层不存在金属层；接地引脚在第一内层、第二内层和其他内层组上的正投影区域均存在金属层；I2C引脚在第一内层、第二内层和其他内层组上的正投影区域均存在金属层。
本公开还提供一种光模块，包括，电路板；驱动芯片，置于电路板表面；光发射芯片，通过电路板接收来自驱动芯片的信号；电路板包括：顶层，位于电路板的上表面；底层，位于电路板的下表面；第一内层，位于顶层与底层之间，并与顶层贴合；第二内层，位于第一内层与底层之间，并与第二内层贴合；其他内层组，具有多层，位于第二内层与底层之间，并其他内层组的最上一层与第二内层相邻，其最下一层与底层贴合；顶层上设有：金手指组件，设于顶层的一端，包括信号引脚、I2C引脚和接地引脚；微处理器，与I2C引脚连接；驱动芯片分别与信号引脚和接地引脚连接；信号引脚在第一内层和第二内层上的正投影区域均不存在金属层；并在其他内层组上的正投影区域，由上往下，自第一层起来至少依次一层不存在金属层；接地引脚在第一内层和第二内层上的正投影区域均不存在金属层；并在其他内层组上的正投影区域，由上往下，自第一层起来至少依次一层不存在金属层；I2C引脚在第一内层、第二内层和其他内层组上的正投影区域均存在金属层。
附图说明
为了更清楚地说明本公开的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，对于本领域普通技术人员而言，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为光通信终端连接关系示意图；
图2为光网络终端结构示意图；
图3为本公开实施例提供的一种光模块结构示意图；
图4为本公开实施例提供光模块分解结构示意图；
图5为本公开实施例提供的光模块的电路板的顶层的结构示意图；
图6为本公开实施例提供的光模块的电路板的第一内层的结构示意图；
图7为本公开实施例提供的光模块的电路板的第二内层的结构示意图；
图8为本公开实施例提供的光模块的电路板的其他内层组中第一个内层的结构示意图；
图9为本公开实施例提供的光模块的电路板的其他内层组中第二个内层的结构示意图；
图10为本公开实施例提供的光模块的电路板的底层的结构示意图；
图11为本公开实施例提供的另一种电路板的结构示意图；
图12为本公开实施例提供的一种光模块插入笼子中时电路板与连接器接触连接的局部结构示意图；
图13为本公开实施例提供的另一种电路板的第一端的局部分解图一；
图14为本公开实施例提供的另一种电路板的第一端的局部分解图二。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
光纤通信的核心环节之一是光、电信号的相互转换。光纤通信使用携带信息的光信号在光纤/光波导等信息传输设备中传输，利用光在光纤/光波导中的无源传输特性可以实现低成本、低损耗的信息传输；而计算机等信息处理设备使用的是电信号，为了在光纤/光波导等信息传输设备与计算机等信息处理设备之间建立信息连接，就需要实现电信号与光信号的相互转换。
光模块在光纤通信技术领域中实现上述光、电信号的相互转换功能，光信号与电信号的相互转换是光模块的核心功能。光模块通过其内部电路板上的金手指组件实现与外部上位机之间的电连接，主要的电连接包括供电、I2C信号、数据信号以及接地等；采用金手指组件实现的电连接方式已经成为光模块行业的主流连接方式，以此为基础，金手指组件上引脚的定义形成了多种行业协议/规范。
图1为光通信终端连接关系示意图。如图1所示，光通信终端的连接主要包括光网络终端100、光模块200、光纤101及网线103之间的相互连接；
光纤101的一端连接远端服务器，网线103的一端连接本地信息处理设备，本地信息处理设备与远端服务器的连接由光纤101与网线103的连接完成；而光纤101与网线103之间的连接由具有光模块200的光网络终端100完成。
光模块200的光口对外接入光纤101，与光纤101建立双向的光信号连接；光模块200 的电口对外接入光网络终端100中，与光网络终端100建立双向的电信号连接；在光模块内部实现光信号与电信号的相互转换，从而实现在光纤与光网络终端之间建立信息连接；具体地，来自光纤的光信号由光模块转换为电信号后输入至光网络终端100中，来自光网络终端100的电信号由光模块转换为光信号输入至光纤中。
光网络终端具有光模块接口102，用于接入光模块200，与光模块200建立双向的电信号连接；光网络终端具有网线接口104，用于接入网线103，与网线103建立双向的电信号连接；光模块200与网线103之间通过光网络终端100建立连接，具体地，光网络终端将来自光模块的信号传递给网线，将来自网线的信号传递给光模块，光网络终端作为光模块的上位机监控光模块的工作。
至此，远端服务器通过光纤、光模块、光网络终端及网线，与本地信息处理设备之间建立双向的信号传递通道。
常见的信息处理设备包括路由器、交换机、电子计算机等；光网络终端是光模块的上位机，向光模块提供数据信号，并接收来自光模块的数据信号，常见的光模块上位机还有光线路终端等。
图2为光网络终端结构示意图。如图2所示，在光网络终端100中具有电路板105，在电路板105的表面设置笼子106；在笼子106内部设置有电连接器，用于接入金手指组件等光模块电口；在笼子106上设置有散热器107，散热器107具有增大散热面积的翅片等凸起部。
光模块200插入光网络终端中，具体为光模块的电口插入笼子106内部的电连接器，光模块的光口与光纤101连接。
笼子106位于电路板上，将电路板上的电连接器包裹在笼子中，从而使笼子内部设置有电连接器；光模块插入笼子中，由笼子固定光模块，光模块产生的热量传导给笼子106，然后通过笼子上的散热器107进行扩散。
图3为本公开实施例提供的一种光模块结构示意图，图4为本公开实施例提供光模块分解结构示意图。如图3、图4所示，本公开实施例提供的光模块200包括上壳体201、下壳体202、解锁部件203、电路板300、光发射器件301及光接收器件302；
上壳体201盖合在下壳体202上，以形成具有两个开口的包裹腔体；包裹腔体的外轮廓一般呈现方形体，具体地，下壳体包括主板以及位于主板两侧、与主板垂直设置的两个侧板；上壳体包括盖板，盖板盖合在上壳体的两个侧板上，以形成包裹腔体；上壳体还可以包括位于盖板两侧、与盖板垂直设置的两个侧壁，由两个侧壁与两个侧板结合，以实现上壳体盖合在下壳体上。
两个开口具体可以是在同一方向的两端开口(204、205)，也可以是在不同方向上的两处开口；其中一个开口为电口204，电路板的金手指组件从电口204伸出，插入光网络终端等上位机中；另一个开口为光口205，用于外部光纤接入以连接光模块内部的光收发器件400；电路板300、光收发器件400等光电器件位于包裹腔体中。
采用上壳体、下壳体结合的装配方式，便于将电路板300、光收发器件400等器件安装到壳体中，由上壳体、下壳体形成光模块最外层的封装保护壳体；上壳体及下壳体一般 采用金属材料，利于实现电磁屏蔽以及散热；一般不会将光模块的壳体做成一体部件，这样在装配电路板等器件时，定位部件、散热以及电磁屏蔽部件无法安装，也不利于生产自动化。
解锁部件203位于包裹腔体/下壳体202的外壁，用于实现光模块与上位机之间的固定连接，或解除光模块与上位机之间的固定连接。
解锁部件203具有与上位机笼子匹配的卡合部件；拉动解锁部件的末端可以在使解锁部件在外壁的表面相对移动；光模块插入上位机的笼子里，由解锁部件的卡合部件将光模块固定在上位机的笼子里；通过拉动解锁部件，解锁部件的卡合部件随之移动，进而改变卡合部件与上位机的连接关系，以解除光模块与上位机的卡合关系，从而可以将光模块从上位机的笼子里抽出。
电路板300上设置有电路走线、电子元件(如电容、电阻、三极管、MOS管)及芯片(如MCU、激光驱动芯片、限幅放大芯片、时钟数据恢复CDR、电源管理芯片、数据处理芯片DSP)等。
电路板通过电路走线将光模块中的用电器件按照电路设计连接在一起，以实现供电、电信号传输及接地等电功能。
电路板一般为硬性电路板，硬性电路板由于其相对坚硬的材质，还可以实现承载作用，如硬性电路板可以平稳的承载芯片；当光收发器件位于电路板上时，硬性电路板也可以提供平稳的承载；硬性电路板还可以插入上位机笼子中的电连接器中，具体地，在硬性电路板的一侧末端表面形成金属引脚/金手指组件，用于与电连接器连接；这些都是柔性电路板不便于实现的。
部分光模块中也会使用柔性电路板，作为硬性电路板的补充；柔性电路板一般与硬性电路板配合使用，如硬性电路板与光收发器件之间可以采用柔性电路板连接。
请参考图5、图6和图10，图5为本公开实施例提供的光模块的电路板的顶层的结构示意图；图6为本公开实施例提供的光模块的电路板的第一内层的结构示意图；图10为本公开实施例提供的光模块的电路板的底层的结构示意图。
在本公开的第一种实施例中，如图5所示，光模块包括电路板及设置在电路板上的驱动芯片601和光发射芯片602。其中，光发射芯片602用于产生激光，产生的激光可以通过光纤发出。驱动芯片601用于给光发射芯片602提供驱动，从而驱动光发射芯片602产生激光。
在本实施例中，电路板采用多层板，相邻层板之间贴合在一起，具体地，电路板包括顶层401、第一内层403以及底层402。其中，顶层401位于电路板的上表面；如图10所示，底层402位于电路板的下表面；第一内层403位于顶层401与底层402之间，并与顶层401相邻，相邻关系具体表现为贴合关系，比如与顶层相邻，为与顶层贴合在一起。
需要说明的是，在此实施例中，电路板上表面和下表面是相对的。顶层401是指的具有金手指组件的信号引脚501的表层，当由于安装关系，使得具有信号引脚501的顶层401朝下时，则此时顶层401位于电路板的下表面，底层402位于电路板的上表面。
在本实施例中，顶层401和底层402之间是否有其他内层，本实施例不作限制，因而 如若具有其他内层，也应该在本实施例的保护范围之内。
如图5所示，顶层401上设有金手指组件和微处理器603。金手指组件设于顶层401的一端，呈并排设置多排引脚，包括信号引脚501、I2C引脚503和接地引脚502。其中，信号引脚501用于与高速信号线604连接，然后高速信号线604再与驱动芯片601进行信号连接；I2C引脚503用于与微处理器603连接。此外，接地引脚502也与驱动芯片601连接。此外，顶层401上还可以设有电源管理芯片605，相对应的金手指组件上设有电源引脚，该电源管理芯片605与电源引脚连接，并与驱动芯片601供电连接。
如图5所示，为配合集成电路芯片内阻抗要求、及生产工艺等要求，高速信号线604阻抗均为差分100欧姆匹配。差分100欧姆的高速信号线604走线较细。当连接到信号引脚501时，由于此时引脚焊盘的面积突然变宽，面积陡然增大。考虑焊盘与参考地之间的关系可知，焊盘与参考地之间对应面积增大会引起阻抗减小，故金手指组件焊盘处阻抗骤然减小，导致阻抗不连续。
如图6所示，在本实施例中，第一内层403上铺设有金属层406，具体为可以为铜层。当顶层401与第一内层403层状设置时，如图6所示，信号引脚501和接地引脚502在第一内层403上的正投影区域不存在金属层406；I2C引脚503在第一内层403上的正投影区域存在金属层406。
也就是信号引脚501和接地引脚502在第一内层403上的正投影区域进行金属层406挖空处理，使得该位置不存在金属；I2C引脚503在第一内层403上的正投影区域不进行挖空处理，保持有原来的金属层406。
在本公开某一实施例中，如图6所示，在第一内层403上进行挖空处理，由于如图5所示，信号引脚501和接地引脚502均处于顶层401的端部边缘，因而在对第一内层403进行挖空处理时，把第一内层403相对应的端部边缘进行挖空处理即可，使得挖空部分的形状大体为一个矩形。
在该种实施例中，由于信号引脚501和接地引脚502的正投影区域不存在金属层406，从而增大了信号引脚501和接地引脚502所在的焊盘与参考地之间的距离，根据阻抗的原理，间距增大后可以增大阻抗，从而抵消由于引脚面积增大所引起的阻抗减小的问题，从而保持了阻抗的连续性，保证了信号传输质量。
此外需要说明的是，如图5所示，信号引脚501的数量为两个，并排设置，两者之间具有间隙。接地引脚502的数量也为两个，分别位于信号引脚501的两侧。其与信号引脚501之间具有间隙。也就是该四个引脚大体并排设置，并且相邻的两者之间具有间隙。在上述的实施例中，该四个引脚的正投影区域挖空，实际为正投影区域的包围区域整体挖空，从而形成一个挖空的矩形。
此外，可以在该实施例的基础上，做一变形，从而得到另一种技术方案。比如，在进行挖空时，严格按照各个引脚的正投影区域进行挖空。在顶层401上，该四个引脚是条状结构，因而相对应的，在第一内层403也挖空为条状结构，形成有四个条状的挖空区域405，在该区域内不存在金属层406。显然，该种技术方案也能解决技术问题，实现发明目的。
此外，本公开还提供第二种实施例。在本公开某一实施例中，在上述第一种实施例中，是信号引脚501和接地引脚502在第一内层403上的正投影区域不存在金属层406；I2C引脚503在第一内层403上的正投影区域存在金属层406。而在第二种实施例中，是信号引脚501在第一内层403上的正投影区域不存在金属层406，而I2C引脚503和接地引脚502在第一内层403上的正投影区域均存在金属层406。除此之外，第二种实施例的技术内容与上述第一种实施例的技术内容均相同，在此不再赘述。
需要说明的是，在该第二种实施例中，由于仅仅信号引脚501的正投影区域进行挖空处理，不存在金属层406。信号引脚501的数量为两个，因而相对于第一种实施例，在第一内层403上形成一个宽度小一点的矩形挖空区域405。处于外侧的接地引脚502的正投影区域不挖空，因而在第一内层403的最外侧边缘，还存在一个条状的金属层406。
在该种实施例中，由于信号引脚501的正投影区域不存在金属层406，从而增大了信号引脚501所在焊盘与参考地之间的距离，根据阻抗的原理，间距增大后可以增大阻抗，从而抵消由于引脚面积增大所引起的阻抗减小的问题，从而保持了阻抗的连续性，保证了信号传输质量。
此外，本公开还提供第三种实施例。请参考图5、图6和图7，图7为本公开实施例提供的光模块的电路板的第二内层的结构示意图。
该第三种实施例是在第一种实施例的基础上做的改进。在本公开某一实施例中，在第三种实施例中，如图7所示，电路板还包括第二内层404，该第二内层404位于第一内层403与底层402之间，并与第一内层403相邻。如图6和图7所示，接地引脚502在第一内层403和第二内层404上的正投影区域均不存在金属层406；I2C引脚503在第一内层403和第二内层404上的正投影区域均存在金属层406。除此之外，第三种实施例的技术内容与上述第一种实施例的技术内容均相同，在此不再赘述。
也就是说，如图7所示，也就是信号引脚501和接地引脚502在第而内层上的正投影区域进行金属层406挖空处理，使得该位置不存在金属；I2C引脚503在第而内层上的正投影区域不进行挖空处理，保持有原来的金属层406。
在该第三种实施例中，如图6所示，在第一内层403上，信号引脚501和接地引脚502的正投影区域均不存在金属层406，I2C引脚503的正投影区域存在金属层406；如图7所示，在第二内层404上，信号引脚501和接地引脚502的正投影区域均不存在金属层406，I2C引脚503的正投影区域存在金属层406；也就是在该第二内层404上，在相应的正投影区域进行挖空处理，不存在金属层406。
在该种实施例中，由于信号引脚501和接地引脚502的正投影区域不存在金属层406，并且是在第一内层403和第二内层404的正投影区域上均不存在金属层406，因而相对于第一种实施例中，该第三种实施例进一步增大了信号引脚501和接地引脚502所在的焊盘与参考地之间的距离，根据阻抗的原理，间距进一步增大后可以进一步增大阻抗，从而进一步抵消由于引脚面积增大所引起的阻抗减小的问题，从而保持了阻抗的连续性，保证了信号传输质量。
此外，本公开还提供第四种实施例。在本公开某一实施例中，在上述第三种实施例中，是信号引脚501和接地引脚502在第一内层403和第二内层404上的正投影区域不存在金属层406；I2C引脚503在第一内层403和第二内层404上的正投影区域存在金属层406。而在第四种实施例中，是信号引脚501在第一内层403和第二内层404上的正投影区域不存在金属层406，而I2C引脚503和接地引脚502在第一内层403和第二内层404上的正投影区域均存在金属层406。除此之外，第四种实施例的技术内容与上述第三种实施例的技术内容均相同，在此不再赘述。
需要说明的是，在该第四种实施例中，由于仅仅信号引脚501的正投影区域进行挖空处理，不存在金属层406。信号引脚501的数量为两个，因而相对于第三种实施例，在第一内层403和第二内层404上形成一个宽度小一点的矩形挖空区域405。处于外侧的接地引脚502的正投影区域不挖空，因而在第一内层403和第二内层404的最外侧边缘，还存在一个条状的金属层406。
在该种实施例中，由于信号引脚501正投影区域不存在金属层406，并且是在第一内层403和第二内层404的正投影区域上均不存在金属层406，因而相对于第二种实施例中仅仅第一内层403上的正投影区域不存在金属层406，该第三种实施例进一步增大了信号引脚501和接地引脚502所在的焊盘与参考地之间的距离，根据阻抗的原理，间距进一步增大后可以进一步增大阻抗，从而进一步抵消由于引脚面积增大所引起的阻抗减小的问题，从而保持了阻抗的连续性，保证了信号传输质量。
此外，本公开还提供第五种实施例。在本公开某一实施例中，请参考图5、图6、图7、图8和图9，图8为本公开实施例提供的光模块的电路板的其他内层组中第一个内层的结构示意图；图9为本公开实施例提供的光模块的电路板的其他内层组中第二个内层的结构示意图。
该第五种实施例是在第三种实施例的基础上做的改进。在本公开某一实施例中，在第五种实施例中，如图8和图9所示，电路板还包括其他内层组，该其他内层组具有至少一层的其他内层407，可以为一层、两层、三层、或更多层，本公开对此不作限制。在本公开某一实施例中，该其他内层组位于第二内层404与底层402之间，并其他内层组的最上一层与第二内层404相邻，最下一层与底层402相邻。
可以理解的是，当该其他内层组仅有一层其他内层407时，上段文中所说的最上一层和最下一层为同一层。
在该第五种实施例中，如图6和图7所示，信号引脚501和接地引脚502在第一内层403和第二内层404上的正投影区域均不存在金属层406；如图8和图9所示，并在其他内层组上的正投影区域，由上往下，自第一层起来至少依次一层不存在金属层406；如图6、图7、图8和图9所示，I2C引脚503在第一内层403、第二内层404和其他内层组上的正投影区域均存在金属层406。除此之外，第五种实施例的技术内容与上述第三种实施例的技术内容均相同，在此不再赘述。
对“由上往下，自第一层起依次至少一层不存在金属层”做出解释。当其他内层组只有一层时，这句话的意思也就是这一层不存在金属层。当其他内层组具有两层，乃至更多 层时，这句话的是描述这样的结构：是依次不存在金属层，比如第一层没有，第二层级以后有金属层；第一层和第二层没有，第三层及以后有金属层、、、、、、。而不是，第一层没有金属层、第二层有金属层、第三层没有金属层这种间断的结构；也不是第一层有金属层，第二层、第三层没有金属层这种间断的结构。
在本公开某一实施例中，在一种变形方案中，如图8和图9所示，信号引脚501在其他内层组上的正投影区域，由上往下，所有层均不存在金属层406；接地引脚502在其他内层组上的正投影区域，由上往下，所有层均不存在金属层406。
在该种实施例中，由于信号引脚501和接地引脚502的正投影区域不存在金属层406，并且是在第一内层403、第二内层404及其他内层组的至少一层上的正投影区域上均不存在金属层406，因而相对于第三种实施例中仅仅第一内层403和第二内层404上的正投影区域不存在金属层406，该第五种实施例进一步增大了信号引脚501和接地引脚502所在的焊盘与参考地之间的距离，根据阻抗的原理，间距进一步增大后可以进一步增大阻抗，从而进一步抵消由于引脚面积增大所引起的阻抗减小的问题，从而保持了阻抗的连续性，保证了信号传输质量。
此外，本公开还提供最后第六种实施例。在本公开某一实施例中，与上述第五种实施例所不同的是，在该第六种实施例中，只有信号引脚501的正投影区域不存在金属层406，接地引脚502和I2C引脚503的正投影区域均存在金属层406。也就是，如图6和图7所示，信号引脚501在第一内层403和第二内层404上的正投影区域均不存在金属层406；如图8和图9所示，并在其他内层组上的正投影区域，由上往下，自第一层起来至少依次一层不存在金属层406；如图6、图7、图8和图9所示，I2C引脚503和接地引脚502在第一内层403、第二内层404和其他内层组上的正投影区域均存在金属层406。
在本公开某一实施例中，在一种变形方案中，如图8和图9所示，信号引脚501在其他内层组上的正投影区域，由上往下，所有层均不存在金属层406。
在该种实施例中，由于信号引脚501的正投影区域不存在金属层406，并且是在第一内层403、第二内层404及其他内层组的至少一层上的正投影区域上均不存在金属层406，因而相对于第四种实施例中仅仅第一内层403和第二内层404上的正投影区域不存在金属层406，该第六种实施例进一步增大了信号引脚501和接地引脚502所在的焊盘与参考地之间的距离，根据阻抗的原理，间距进一步增大后可以进一步增大阻抗，从而进一步抵消由于引脚面积增大所引起的阻抗减小的问题，从而保持了阻抗的连续性，保证了信号传输质量。
图11为本公开实施例提供的另一种电路板的结构示意图。如图11所示，本公开实施例提供的电路板300包括第一端310，第一端310上设置金手指组件320。其中，电路板300包括位置相对且面积相对较大的两个表面，为便于描述，其中一个表面称为电路板300的顶层、另一表面称为电路板300的底层；金手指组件320不止设置在电路板300的顶层，金手指组件320还设置在与图5和6中展示的顶层相对的电路板300的底层。为便于描述，本公开实施例中，金手指组件320包括第一组金手指组件和第二组金手指组件，第一组金手指组件和第二组金手指组件分别包括若干金手指组件。在本公开某一实施例中，第一组 金手指组件设置在电路板300的顶层，第二组金手指组件设置在电路板300的底层。
金手指组件320包括若干相互隔离的金手指组件，若干相互隔离的金手指组件包括用于接地的金手指组件、用于传输电源信号的金手指组件和用于传输通信信号的金手指组件。其中，用于传输电源信号的金手指组件是指该金手指组件传输的信号的功能是使电路板300上电器件上电工作，用于传输通信信号的金手指组件是指该金手指组件传输的信号的功能是使该金手指组件进行通信信号传输，所以虽然用于传输通信信号的金手指组件虽然实质上也是传输电信号，但是传输通信信号的金手指组件传输的电信号的功能和用于传输电源信号的金手指组件传输的电信号的功能是不同的，所以在本公开实施例中，按照金手指组件上传输电信号的功能，将用于传输电信号的金手指组件分为用于传输电源信号的金手指组件和用于传输通信信号的金手指组件。还需要说明的是，用于传输通信信号的金手指组件传输的信号类型具体可以是控制信号、高频信号或时钟信号等，进而用于传输通信信号的金手指组件包括用于传输高频信号的金手指组件。
为方便描述，本公开实施例中，用于接地的金手指组件被称为接地金手指组件，用于传输高频信号的金手指组件被称为高频信号金手指组件。在本公开实施例中，电路板300上设置地、高频信号线等电路走线，金手指组件320中的金手指组件分别电连接相应的电路走线。如，接地金手指组件连接电路板300上地，高频信号金手指组件电连接电路板300上相应的高频信号线。
在本公开实施例中，由于光模块200结构体积小，为了满足电路板300在光模块200壳体内的安装需求，相应的电路板300的尺寸也相对比较小，因此为了满足电路板300上布局电路面积的需要，电路板300为多层电路板，进而将电路板300的电路整合布局在电路板300的各层。电路板300的层数可根据电路布局的实际需要进行选择，相邻层之间通过绝缘材料相互隔离。在本公开某一实施例中，电路板300的层数可为5层、8层、10层等。
在本公开实施例中，电路板300包括顶层、底层以及位于顶层和底层之间的若干内层(包括第一内层)，每一层上均设置电路走线。内层通常包括多层，如电路板300包括10层，内层则包括8层。金手指组件320中的金手指组件设置在电路板300的顶层和底层。若金手指组件需要连接电路走线位于电路板300的顶层或底层，该电路走线直接延伸至该相应的金手指组件处；若金手指组件需要连接电路走线位于电路板300的内层，该电路走线直接延伸至该相应的金手指组件在电路板300内层的投影区域，然后通过金属过孔电连接相应的金手指组件。如，某一电路走线为电路板300的第三层，相应的金手指组件位于电路板300的顶层，则该电路走线延伸至相应金手指组件在电路板300第三层的投影区域，并在电路板300的该相应金手指组件投影区域设置顶层到第三层的过孔，该电路走线通过该过孔电连接相应的金手指组件；过孔的数量通常包括若干个。
图12为本公开实施例提供的一种光模块插入笼子中时电路板与连接器接触连接的局部结构示意图。如图12所示，金手指组件320中金手指组件设置在电路板300的顶层301A和底层302A，当光模块插入笼子中，位于电路板300第一端的金手指组件分别与相应的连接器接触电连接。
如图12所示，本实施例提供的电路板300为10层板，即该电路板300上包括10层用于设置电路走线的金属层。在本公开某一实施例中，电路板300包括顶层301A、底层302A以及设置在顶层301A和底层302A之间的内层303，记顶层301A为电路板300的第一层、底层302A为电路板300的第十层，则若干内层303包括电路板300的第二层、第三层、第四层……第八层、第九层。其中，顶层301A、第二层……第九层、底层302A依次叠加排列，相邻层之间通过绝缘材料相互隔离。由于顶层301A、第二层……第九层、底层302A的厚度更薄，因而图12中所示的电路板300中一层层的结构主要是绝缘材料形成，第二层……第九层分别夹持在绝缘材料形成的相应结构层之间。其中图12中顶层301A上的阴影区域为覆铜形成的电路走线。
在本公开实施例中，连接器包括用于连接接地金手指组件的连接器G和用于连接高频信号金手指组件的连接器S，连接器G与连接器S的下方接触连接相应的金手指组件。如图12所示的局部电路板300中，与之相连接的连接器G与连接器S的数量均不止一个，进而接地金手指组件与高频信号金手指组件的数量也不止一个。在本实施例中，接地金手指组件和高频信号金手指组件分别电连接电路板300上相应到的电路走线。
图12中所示的与电路板300的顶层301A上接地金手指组件和高频信号金手指组件电连接到的电路走线均位于电路板300的顶层301A上，但本公开实施例中电路走线不局限于电路板300的顶层301A，如，顶层301A上的接地金手指组件或高频信号金手指组件电连接到的电路走线可位于内层303。若顶层301A上的接地金手指组件或高频信号金手指组件电连接到的电路走线可位于内层303，则将该电路走线延伸至该金手指组件在该内层303的投影区域，设置该金手指组件到该投影区域的金属过孔，通过该金属过孔电连接电路走线与该金手指组件。相应的，底层302A上的接地金手指组件或高频信号金手指组件电连接到的电路走线可位于底层302A上，还可以位于内层303上。
在本公开实施例中，为提高高频信号金手指组件等的阻抗，高频信号金手指组件等在电路板300内层303的投影区域设置挖空区域。挖空区域是指该区域内最多设置有连接相应金手指组件的电路走线，不铺设其他金属(不设置其他电路走线)。为充分保证挖空区域的效果，挖空区域的宽度大于或等于相应高频信号金手指组件等的宽度，如挖空区域的侧边位于高频信号金手指组件等旁边的接地金手指组件下方，长度方向则尽可能向电路板300的板边延伸，以使挖空区域在电路板300表面的投影尽可能的完全覆盖相应金手指组件。当然，若是电路板300的内层303无充足的区域实现使挖空区域完全覆盖相应金手指组件可以不完全覆盖相应的金手指组件。挖空区域的形状可为规则形状，也可为不规则形状，可根据该区域的铺地和电路走线进行调整设置。
在高速光模块中，金手指组件排布相对比较密集，因而当某一连接器S进行传输高频信号时，连接器S以及相应的高频信号金手指组件产生电磁辐射，电磁辐射将向其他连接器S以及其他高频信号金手指组件传输，若电磁辐射传输至其他连接器S以及其他高频信号金手指组件，将对其他连接器S以及其他高频信号金手指组件上传输的信号产生干扰；相应的，当其他连接器S以及其他高频信号金手指组件产生的电磁辐射也会向该某一连接器S以及相应的高频信号金手指组件传输，若其他连接器S以及其他高频信 号金手指组件产生的电磁辐射传输至该某一连接器S以及相应的高频信号金手指组件，将会对该某一连接器S以及相应的高频信号金手指组件上传输的信号产生干扰。如此，在光模块使用过程中，若连接器S以及相应的高频信号金手指组件产生的电磁辐射传输至其他连接器S以及高频信号金手指组件，将会在高频信号金手指组件以及连接器S的各通道之间产生串扰。通过测试获得，20GHz的通道间串扰有时会超过-30dB。
为减少高频信号金手指组件以及连接器S处各通道之间产生串扰，因此在本公开实施例中，电路板300的第一端310的板边设置板边参考地330。板边参考地330设置在垂直于电路板300长度方向的板边，即板边参考地330为电路板300的第一端310边缘。为防止设置板边参考地330而影响到金手指组件320的设置，板边参考地330设置在电路板300的内层303。进而板边参考地330位于内层303的边缘，即板边参考地330位于金手指组件320在内层投影区域的边缘，较内层303上设置的挖空区域更靠近内层303的边缘。在本公开某一实施例中，板边参考地330与同层的挖空区域向接触，如在电路板300上，挖空区域延伸至同层的板边参考地330。
板边参考地330通常为铺金属形成，如铺铜形成，板边参考地330电连接电路板300上的地。连接器S以及相应的高频信号金手指组件产生的电磁辐射传输至板边参考地330，板边参考地330将吸收电磁辐射的能量，阻碍电磁辐射的传输，进而可减少高频信号金手指组件以及连接器S处各通道之间产生串扰，通过测试发现20GHz的通道间串扰均低于-30dB。在本公开某一实施例中，在内层303的每一层板边设置板边参考地330。每一层上的板边参考地330可通过金属过孔连接接地金手指组件。为保证板边参考地330抑制干扰的效果，板边参考地330的宽度不小于20mil。
图13为本公开实施例提供的另一种电路板的第一端的局部分解图一，图13中示出了电路板300顶层301A的局部结构。如图13所示，本实施例提供的金手指组件320包括按协议规则排布的一段一段金手指组件，其中包括第一组金手指组件包括第一高频信号金手指组件321和第二高频信号金手指组件322。当然第一组金手指组件可不止包括第一高频信号金手指组件321和第二高频信号金手指组件322，还可包括其他高频信号金手指组件。第一高频信号金手指组件321和第二高频信号金手指组件322通常用于传输差分信号，因此第一高频信号金手指组件321和第二高频信号金手指组件322中的金手指组件通常成对出现。如图13所示，本实施例提供的金手指组件320中第一组金手指组件还包括第一接地金手指组件323、第二接地金手指组件324和第三接地金手指组件325。第一接地金手指组件323设置在第一高频信号金手指组件321的一侧，第二接地金手指组件324设置在第一高频信号金手指组件321的另一侧，第三接地金手指组件325设置在第二高频信号金手指组件322远离第一高频信号金手指组件321的一侧。
图13中还示出了电路板300的第一内层3031，第一内层3031为电路板300的第二层。第一内层3031的板边设置第一板边参考地331。第一板边参考地331的宽度不小于20mil。相应的，电路板300中的其他内层也可设置板边参考地，其他内层上的板边参考地的设置可参考第一内层3031上第一板边参考地331。板边参考地之间可直接或间接电连接。如，板边参考地上设置金属过孔，通过相应的金属过孔实现板边参考地之间的电连 接。进一步，板边参考地直接或间接电连接接地金手指组件。在本公开某一实施例中，第一内层3031上设置若干金属过孔3311，第一板边参考地331通过金属过孔3311连接其他内层上的板边参考地；或者，连接顶层301A或底层302A上的接地金手指组件。
如图13所示，第一内层3031上还设置第一挖空区域0311和第二挖空区域0312，第一挖空区域0311在顶层301A的投影完全覆盖第一高频信号金手指组件321，第二挖空区域0312在顶层301A的投影完全覆盖第二高频信号金手指组件322。但若是第一挖空区域0311和第二挖空区域0312周边需要走线和铺地占有面积较大时，可适当缩小第一挖空区域0311和第二挖空区域0312的面积，使第一挖空区域0311在顶层301A的投影不完全覆盖第一高频信号金手指组件321，第二挖空区域0312在顶层301A的投影不完全覆盖第二高频信号金手指组件322。第一挖空区域0311有助于提高第一高频信号金手指组件321处阻抗，第二挖空区域0312有助于提高第二高频信号金手指组件322处阻抗。在本公开某一实施例中，第一挖空区域0311和第二挖空区域0312延伸至第一板边参考地331。第一挖空区域0311和第二挖空区域0312可为规则形状。内层303上其他层上设置挖空区域可参考第一挖空区域0311。
如图13所示，第一挖空区域0311的宽度大于第一高频信号金手指组件321的宽度，第二挖空区域0312的大于第二高频信号金手指组件322的宽度。在本公开某一实施例中，第一挖空区域0311的一侧边位于第一接地金手指组件323在第一内层3031投影区域，第一挖空区域0311的另一侧边位于第二接地金手指组件324在第一内层3031投影区域；第二挖空区域0312的一侧边位于第二接地金手指组件324在第一内层3031投影区域，第二挖空区域0312的另一侧边位于第三接地金手指组件325在第一内层3031投影区域。若第一挖空区域0311和第二挖空区域0312之间可走线和铺地，第一挖空区域0311可连通第二挖空区域0312。
另外，电路板300的其它内层303中也设置挖空区域。在本公开某一实施例中，靠近高频信号金手指组件所在层的连续若干内层303上设置挖空区域。如，第一高频信号金手指组件321在电路板300上投影区域的第二层至第五层、第二层至第八层等上设置第一挖空区域，第二高频信号金手指组件322在电路板300上投影区域的第二层至第五层、第二层至第九层等上设置第二挖空区域。
图14为本公开实施例提供的另一种电路板的第一端的局部分解图二，相较与图13，图14还示出了电路板300的第二内层3032，第二内层3032为电路板300的第三层。第二内层3032的板边设置第二板边参考地332。第二板边参考地332的宽度不小于20mil。第二板边参考地332上设置若干金属过孔3321，第二板边参考地332通过金属过孔3321连接第一板边参考地331或其他内层上的板边参考地。
如图14所示，第二内层3032上还设置第一挖空区域0321和第二挖空区域0322，第一挖空区域0321在顶层301A的投影覆盖第一高频信号金手指组件321，第二挖空区域0322在顶层301A的投影覆盖第二高频信号金手指组件322。第一挖空区域0321有助于进一步提高第一高频信号金手指组件321处阻抗，第二挖空区域0322有助于进一步提高第二高频信号金手指组件322处阻抗。第一挖空区域0321和第二挖空区域0322延伸至第 二板边参考地332。
如图14所示，第一挖空区域0321的宽度大于第一高频信号金手指组件321的宽度，第二挖空区域0322的大于第二高频信号金手指组件322的宽度。在本公开某一实施例中，第一挖空区域0321的一侧边位于第一接地金手指组件323在第二内层3032投影区域，第一挖空区域0321的另一侧边位于第二接地金手指组件324在第二内层3032投影区域；第二挖空区域0322的一侧边位于第二接地金手指组件324在第二内层3032投影区域，第二挖空区域0322的另一侧边位于第三接地金手指组件325在第二内层3032投影区域。
相应的，本公开实施例中，电路板300的底层上第二组金手指组件可包括第三高频信号金手指组件和第四高频信号金手指组件等高频信号金手指组件。其中，第一高频信号金手指组件321与第三高频信号金手指组件相对，第二高频信号金手指组件322与第四高频信号金手指组件相对。第三高频信号金手指组件和第四高频信号金手指组件在内层303的投影区域同样设置挖空区域。如，第三高频信号金手指组件在电路板300上投影区域的第九层至第六层、第九层至第二层等上设置第三挖空区域，第四高频信号金手指组件在电路板300上投影区域的第九层至第六层、第九层至第二层等上设置第四挖空区域。
本实施例提供的金手指组件320中第二组金手指组件还包括第四接地金手指组件、第五接地金手指组件和第六接地金手指组件。第四接地金手指组件设置在第三高频信号金手指组件的一侧，第五接地金手指组件设置在第三高频信号金手指组件的另一侧，第六接地金手指组件设置在第四高频信号金手指组件远离第三高频信号金手指组件的一侧。
第三挖空区域的宽度大于第三高频信号金手指组件的宽度，第四挖空区域的大于第四高频信号金手指组件的宽度。在本公开某一实施例中，第三挖空区域的一侧边位于第四接地金手指组件在内层投影区域，第三挖空区域的另一侧边位于第五接地金手在内层投影区域；第四挖空区域的一侧边位于第五接地金手指组件在内层投影区域，第四挖空区域的另一侧边位于第六接地金手指组件在内层投影区域。
本说明书通篇提及的“多个实施例”、“一些实施例”、“一个实施例”或“实施例”等，意味着结合该实施例描述的具体特征、部件或特性包括在至少一个实施例中。因此，本说明书通篇出现的短语“在多个实施例中”、“在一些实施例中”、“在至少另一个实施例中”或“在实施例中”等并不一定都指相同的实施例。此外，在一个或多个实施例中，具体特征、部件或特性可以任何合适的方式进行组合。因此，在无限制的情形下，结合一个实施例示出或描述的具体特征、部件或特性可全部或部分地与一个或多个其他实施例的特征、部件或特性进行组合。这种修改和变型旨在包括在本公开的范围之内。
最后应说明的是：以上实施例仅用以说明本公开的技术方案，而非对其限制；尽管参照前述实施例对本公开进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本公开各实施例技术方案的精神和范围。

Claims (19)

  1. 一种光模块，其特征在于，包括
    电路板；
    驱动芯片，置于所述电路板表面；
    光发射芯片，通过所述电路板接收来自所述驱动芯片的信号；
    所述电路板包括：
    顶层，位于所述电路板的上表面；
    底层，位于所述电路板的下表面；
    第一内层，位于所述顶层与所述底层之间，并与所述顶层贴合；
    所述顶层上设有：
    金手指组件，设于所述顶层的一端，包括信号引脚、I2C引脚和接地引脚；
    微处理器，与所述I2C引脚连接；
    所述驱动芯片分别与所述信号引脚和所述接地引脚连接；
    所述信号引脚在所述第一内层上的正投影区域不存在金属层；
    所述接地引脚和所述I2C引脚在所述第一内层上的正投影区域均存在金属层。
  2. 一种光模块，其特征在于，包括
    电路板；
    驱动芯片，置于所述电路板表面；
    光发射芯片，通过所述电路板接收来自所述驱动芯片的信号；
    所述电路板包括：
    顶层，位于所述电路板的上表面；
    底层，位于所述电路板的下表面；
    第一内层，位于所述顶层与所述底层之间，并与所述顶层贴合；
    所述顶层上设有：
    金手指组件，设于所述顶层的一端，包括信号引脚、I2C引脚和接地引脚；
    微处理器，与所述I2C引脚连接；
    所述驱动芯片分别与所述信号引脚和所述接地引脚连接；
    所述信号引脚和所述接地引脚在所述第一内层上的正投影区域均不存在金属层；
    所述I2C引脚在所述第一内层上的正投影区域均存在金属层。
  3. 一种光模块，其特征在于，包括
    电路板；
    驱动芯片，置于所述电路板表面；
    光发射芯片，通过所述电路板接收来自所述驱动芯片的信号；
    所述电路板包括：
    顶层，位于所述电路板的上表面；
    底层，位于所述电路板的下表面；
    第一内层，位于所述顶层与所述底层之间，并与所述顶层贴合；
    第二内层，位于所述第一内层与所述底层之间，并与所述第二内层贴合；
    所述顶层上设有：
    金手指组件，设于所述顶层的一端，包括信号引脚、I2C引脚和接地引脚；
    微处理器，与所述I2C引脚连接；
    所述驱动芯片分别与所述信号引脚和所述接地引脚连接；
    所述信号引脚在所述第一内层和所述第二内层上的正投影区域均不存在金属层；
    所述接地引脚在所述第一内层的正投影区域均存在金属层；
    所述I2C引脚在所述第一内层的正投影区域均存在金属层。
  4. 一种光模块，其特征在于，包括
    电路板；
    驱动芯片，置于所述电路板表面；
    光发射芯片，通过所述电路板接收来自所述驱动芯片的信号；
    所述电路板包括：
    顶层，位于所述电路板的上表面；
    底层，位于所述电路板的下表面；
    第一内层，位于所述顶层与所述底层之间，并与所述顶层贴合；
    第二内层，位于所述第一内层与所述底层之间，并与所述第二内层贴合；
    所述顶层上设有：
    金手指组件，设于所述顶层的一端，包括信号引脚、I2C引脚和接地引脚；
    微处理器，与所述I2C引脚连接；
    所述驱动芯片分别与所述信号引脚和所述接地引脚连接；
    所述信号引脚在所述第一内层和所述第二内层上的正投影区域均不存在金属层；
    所述接地引脚在所述第一内层和所述第二内层上的正投影区域均不存在金属层；
    所述I2C引脚在所述第一内层的正投影区域均存在金属层。
  5. 一种光模块，其特征在于，包括
    电路板；
    驱动芯片，置于所述电路板表面；
    光发射芯片，通过所述电路板接收来自所述驱动芯片的信号；
    所述电路板包括：
    顶层，位于所述电路板的上表面；
    底层，位于所述电路板的下表面；
    第一内层，位于所述顶层与所述底层之间，并与所述顶层贴合；
    第二内层，位于所述第一内层与所述底层之间，并与所述第二内层贴合；
    其他内层组，具有多层，位于所述第二内层与所述底层之间，其最上一层与所述第二内层相邻，其最下一层与所述底层贴合；
    所述顶层上设有：
    金手指组件，设于所述顶层的一端，包括信号引脚、I2C引脚和接地引脚；
    微处理器，与所述I2C引脚连接；
    所述驱动芯片分别与所述信号引脚和所述接地引脚连接；
    所述信号引脚在所述第一内层和所述第二内层上的正投影区域均不存在金属层；并在所述其他内层组上的正投影区域，由上往下，自第一层起依次至少一层不存在金属层；
    所述接地引脚在所述第一内层、所述第二内层和所述其他内层组上的正投影区域均存在金属层；
    所述I2C引脚在所述第一内层、所述第二内层和所述其他内层组上的正投影区域均存在金属层。
  6. 如权利要求5所述的一种光模块，其特征在于，
    所述信号引脚在所述其他内层组上的正投影区域，由上往下，所有层均不存在金属层。
  7. 一种光模块，其特征在于，包括
    电路板；
    驱动芯片，置于所述电路板表面；
    光发射芯片，通过所述电路板接收来自所述驱动芯片的信号；
    所述电路板包括：
    顶层，位于所述电路板的上表面；
    底层，位于所述电路板的下表面；
    第一内层，位于所述顶层与所述底层之间，并与所述顶层贴合；
    第二内层，位于所述第一内层与所述底层之间，并与所述第二内层贴合；
    其他内层组，具有多层，位于所述第二内层与所述底层之间，其最上一层与所述第二内层相邻，其最下一层与所述底层贴合；
    所述顶层上设有：
    金手指组件，设于所述顶层的一端，包括信号引脚、I2C引脚和接地引脚；
    微处理器，与所述I2C引脚连接；
    所述驱动芯片分别与所述信号引脚和所述接地引脚连接；
    所述信号引脚在所述第一内层和所述第二内层上的正投影区域均不存在金属层；并在所述其他内层组上的正投影区域，由上往下，自第一层起依次至少一层不存在金属层；
    所述接地引脚在所述第一内层和所述第二内层上的正投影区域均不存在金属层；并在所述其他内层组上的正投影区域，由上往下，自第一层起依次至少一层不存在金属层；
    所述I2C引脚在所述第一内层、所述第二内层和所述其他内层组上的正投影区域均存在金属层。
  8. 如权利要求7所述的一种光模块，其特征在于，
    所述信号引脚在所述其他内层组上的正投影区域，由上往下，所有层均不存在金属层；
    所述接地引脚在所述其他内层组上的正投影区域，由上往下，所有层均不存在金属层。
  9. 如权利要求8所述的一种光模块，其特征在于，
    所述金手指组件包括电源引脚，所述顶层上设有电源管理芯片；
    所述电源管理芯片与所述电源引脚连接，并与所述驱动芯片供电连接。
  10. 如权利要求8所述的一种光模块，其特征在于，
    所述驱动芯片通过高速信号线与所述信号引脚连接。
  11. 一种光模块，其特征在于，包括：
    电路板，包括顶层、底层以及位于所述顶层和所述底层之间的内层，所述顶层、所述底层和所述内层均设置有电路走线；
    金手指组件，设置在所述电路板的第一端且位于所述顶层或底层，包括相互隔离的若干接地金手指组件和若干用于传输高频信号的高频信号金手指组件，所述接地金手指组件和所述高频信号金手指组件分别电连接相应的电路走线；
    挖空区域，设置在所述内层，在所述顶层或所述底层的投影覆盖所述高频信号金手指组件；
    板边参考地，铺设在所述电路板的第一端且垂直于所述电路板长度方向的板边，并位于所述内层，电连接所述电路板上的地；
    所述板边参考地较所述挖空区域更靠近所述电路板的边缘。
  12. 如权利要求11所述的光模块，其特征在于，所述电路板包括多个内层，所述内层的板边均设置所述板边参考地，相邻层上的板边参考地通过金属过孔连接。
  13. 如权利要求12所述的光模块，其特征在于，所述金手指组件包括第一组金手指组件和第二组金手指组件；
    所述第一组金手指组件设置在所述顶层，包括第一高频信号金手指组件，与所述顶层靠近的连续多个内层均设置第一挖空区域，所述第一挖空区域在所述顶层的投影覆盖所述第一高频信号金手指组件；
    所述第二组金手指组件设置在所述底层，包括第三高频信号金手指组件，与所述底层靠近的连续多个内层均设置第三挖空区域，所述第三挖空区域在所述底层的投影覆盖所述第三高频信号金手指组件。
  14. 如权利要求12所述的光模块，其特征在于，所述板边参考地分别通过金属过孔电连接所述接地金手指组件。
  15. 如权利要求11所述的光模块，其特征在于，所述板边参考地的宽度不小于20mil。
  16. 如权利要求11所述的光模块，其特征在于，所述挖空区域在所述电路板长度方向延伸至与其同层的板边参考地，所述挖空区域完全覆盖相应的高频信号金手指组件。
  17. 如权利要求11所述的光模块，其特征在于，所述挖空区域的宽度大于所述高频信号金手指组件的宽度。
  18. 如权利要求13所述的光模块，其特征在于，所述第一组金手指组件还包括第一接地金手指组件，所述第一高频信号金手指组件的侧边设置所述第一接地金手指组件，所述第一接地金手指组件在所述内层的投影覆盖所述第一挖空区域的侧边。
  19. 如权利要求13所述的光模块，其特征在于，所述第二组金手指组件还包括第四接地金手指组件，所述第三高频信号金手指组件的侧边设置所述第四接地金手指组件，所 述第四接地金手指组件在所述内层的投影覆盖所述第三挖空区域的侧边。
PCT/CN2020/135330 2020-03-20 2020-12-10 一种光模块 WO2021184844A1 (zh)

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