WO2021232624A1 - 一种光模块 - Google Patents

一种光模块 Download PDF

Info

Publication number
WO2021232624A1
WO2021232624A1 PCT/CN2020/114571 CN2020114571W WO2021232624A1 WO 2021232624 A1 WO2021232624 A1 WO 2021232624A1 CN 2020114571 W CN2020114571 W CN 2020114571W WO 2021232624 A1 WO2021232624 A1 WO 2021232624A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit board
pad
chip
bonding wires
bonding
Prior art date
Application number
PCT/CN2020/114571
Other languages
English (en)
French (fr)
Inventor
郑龙
杨思更
Original Assignee
青岛海信宽带多媒体技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 青岛海信宽带多媒体技术有限公司 filed Critical 青岛海信宽带多媒体技术有限公司
Priority to US17/481,798 priority Critical patent/US20220011510A1/en
Publication of WO2021232624A1 publication Critical patent/WO2021232624A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4274—Electrical aspects
    • G02B6/428—Electrical aspects containing printed circuit boards [PCB]
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/4201—Packages, e.g. shape, construction, internal or external details
    • G02B6/4274—Electrical aspects
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09218—Conductive traces
    • H05K2201/09236—Parallel layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09445—Pads for connections not located at the edge of the PCB, e.g. for flexible circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/097—Alternating conductors, e.g. alternating different shaped pads, twisted pairs; Alternating components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10121—Optical component, e.g. opto-electronic component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10287—Metal wires as connectors or conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/049—Wire bonding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/328—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by welding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present disclosure relates to the field of optical communication technology, and in particular to an optical module.
  • optical modules encapsulate a variety of electronic components.
  • the interconnection between electronic components and the connection between electronic components and circuits are widely used for wire connection, especially between silicon optical chips and circuit boards. Has a large number of dense wire connections.
  • the embodiment of the present disclosure provides an optical module, including: a circuit board; a silicon optical chip, which is electrically connected to the circuit board; an optical fiber socket, which is optically connected to the optical port of the silicon optical chip through an optical fiber ribbon; wherein, one side of the silicon optical chip is provided There are a third die pad, a first die pad, a second die pad and a fourth die pad. The first die pad and the second die pad are located between the third die pad and the fourth die pad. ;
  • the circuit board is provided with corresponding third circuit board pads, first circuit board pads, second circuit board pads and fourth circuit board pads;
  • the third circuit board bonding pad and the third chip bonding pad, the first circuit board bonding pad and the first chip bonding pad, the second circuit board bonding pad and the second chip bonding pad, and the fourth circuit board bonding pad and the fourth chip bonding pad In the disk, at least one pair of bonding pads are electrically connected by a plurality of bonding wires, and the bonding heights of the plurality of bonding wires are different.
  • FIG. 1 is a schematic diagram of the connection relationship of optical communication terminals according to some embodiments of the present disclosure
  • FIG. 2 is a schematic diagram of the structure of an optical network terminal according to some embodiments of the present disclosure.
  • Fig. 3 is a schematic structural diagram of an optical module according to some embodiments of the present disclosure.
  • FIG. 4 is a schematic diagram of an exploded structure of an optical module according to some embodiments of the present disclosure.
  • FIG. 5 is a schematic diagram of an assembly structure of a circuit board, a silicon optical chip, and an optical fiber socket according to some embodiments of the present disclosure
  • Fig. 6 is another schematic diagram of assembly of a circuit board, a silicon optical chip, and an optical fiber socket according to some embodiments of the present disclosure
  • Fig. 7 is an enlarged schematic diagram of A in Fig. 5;
  • FIG. 8 is an equivalent circuit model diagram of bonding wires according to some embodiments of the present disclosure.
  • FIG. 9 is a top view of a circuit board according to some embodiments of the present disclosure.
  • Fig. 10 is an enlarged schematic diagram of B in Fig. 9;
  • FIG. 11 is a schematic diagram from another angle of a circuit board according to some embodiments of the present disclosure.
  • Figure 12 is a side view of a circuit board according to some embodiments of the present disclosure.
  • Fig. 13 is an enlarged schematic view of C in Fig. 12.
  • One of the core links of optical fiber communication is the mutual conversion of optical and electrical signals.
  • Optical fiber communication uses information-carrying optical signals to be transmitted in optical fibers/optical waveguides and other information transmission equipment.
  • the passive transmission characteristics of light in optical fibers/optical waveguides can achieve low-cost and low-loss information transmission; and computers and other information processing equipment Electrical signals are used.
  • information transmission equipment such as optical fibers/optical waveguides and information processing equipment such as computers, it is necessary to realize mutual conversion between electrical signals and optical signals.
  • the optical module realizes the above-mentioned mutual conversion function of optical and electrical signals in the field of optical fiber communication technology, and the mutual conversion of optical signals and electrical signals is the core function of the optical module.
  • the optical module realizes the electrical connection with the external host computer through the golden finger on its internal circuit board.
  • the main electrical connections include power supply, I2C signal, data information and grounding, etc.; the electrical connection method realized by the golden finger has become the optical module.
  • the mainstream connection method of the industry based on this, the definition of the pins on the golden finger has formed a variety of industry protocols/standards.
  • Fig. 1 is a schematic diagram of a connection relationship of an optical communication terminal according to some embodiments of the present disclosure.
  • the connection of the optical communication terminal mainly includes the interconnection between the optical network terminal 100, the optical module 200, the optical fiber 101 and the network cable 103.
  • One end of the optical fiber 101 is connected to the remote server, and one end of the network cable 103 is connected to the local information processing equipment.
  • the connection between the local information processing equipment and the remote server is completed by the connection of the optical fiber 101 and the network cable 103; and the connection between the optical fiber 101 and the network cable 103 is The optical network terminal 100 with the optical module 200 is completed.
  • the optical port of the optical module 200 is externally connected to the optical fiber 101 to establish a bidirectional optical signal connection with the optical fiber 101;
  • the electrical port of the optical module 200 is externally connected to the optical network terminal 100 to establish a bidirectional electrical signal connection with the optical network terminal 100;
  • the optical module realizes the mutual conversion between the optical signal and the electrical signal, so as to realize the establishment of an information connection between the optical fiber and the optical network terminal. Specifically, the optical signal from the optical fiber is converted into an electrical signal by the optical module and then input into the optical network terminal 100, and the electrical signal from the optical network terminal 100 is converted into an optical signal by the optical module and input into the optical fiber.
  • the optical network terminal has an optical module interface 102, which is used to connect to the optical module 200 and establish a two-way electrical signal connection with the optical module 200; the optical network terminal has a network cable interface 104, which is used to connect to the network cable 103 and establish a two-way electrical connection with the network cable 103 Signal connection; a connection is established between the optical module 200 and the network cable 103 through the optical network terminal 100.
  • the optical network terminal transmits the signal from the optical module to the network cable, and transmits the signal from the network cable to the optical module, and the optical network terminal acts as the upper computer of the optical module to monitor the operation of the optical module.
  • the remote server establishes a two-way signal transmission channel with the local information processing equipment through optical fibers, optical modules, optical network terminals and network cables.
  • Common information processing equipment includes routers, switches, electronic computers, etc.; the optical network terminal is the upper computer of the optical module, which provides data signals to the optical module and receives data signals from the optical module.
  • the common optical module upper computer also has optical lines Terminal and so on.
  • Fig. 2 is a schematic structural diagram of an optical network terminal provided according to some embodiments of the present disclosure.
  • the optical network terminal 100 includes a circuit board 105, and a cage 106 is provided on the surface of the circuit board 105; an electrical connector is provided inside the cage 106 for accessing optical module electrical ports such as golden fingers; in the cage 106 A radiator 107 is provided thereon, and the radiator 107 has protrusions such as fins that increase the heat dissipation area.
  • the optical module 200 is inserted into the optical network terminal 100. Specifically, the electrical port of the optical module is inserted into the electrical connector inside the cage 106, and the optical port of the optical module is connected to the optical fiber 101.
  • the cage 106 is located on the circuit board 105, and the electrical connector on the circuit board 105 is wrapped in the cage 106; the optical module 200 is inserted into the cage 106, and the optical module 200 is fixed by the cage 106. The heat generated by the optical module 200 is conducted to the cage 106 through The radiator 107 on the cage spreads.
  • FIG. 3 is a schematic diagram of the structure of an optical module according to some embodiments of the present disclosure
  • FIG. 4 is a schematic diagram of an exploded structure of an optical module according to some embodiments of the present disclosure.
  • the optical module 200 includes an upper housing 201, a lower housing 202, an unlocking component 203, a circuit board 300, a silicon optical chip 400 and an optical fiber socket 600.
  • the upper shell 201 is covered on the lower shell 202 to form a wrapping cavity with two openings; the outer contour of the wrapping cavity generally presents a square shape.
  • the lower housing 202 includes a main board and two side plates located on both sides of the main board and perpendicular to the main board;
  • the upper housing 201 includes a cover plate, which covers the two side plates of the upper housing to form Wrap the cavity;
  • the upper shell may also include two side walls located on both sides of the cover plate and perpendicular to the cover plate. The two side walls are combined with the two side plates to realize the upper shell 201 covering the lower shell On 202.
  • the two openings can be two openings (204, 205) in opposite directions, or two openings in other different directions; the openings 204 and 205 in FIG. 3 are two openings in opposite directions, where the opening 204 is an electrical
  • the golden finger of the circuit board extends from the electrical port 204 and is inserted into the upper computer such as the optical network terminal; the opening 205 is the electrical port for external optical fiber access to connect the silicon optical chip 400 inside the optical module; the circuit board 300, Optoelectronic devices such as silicon optical chip 400 are located in the enveloping cavity.
  • the upper shell and the lower shell are combined to facilitate the installation of the circuit board 300, silicon optical chip 400 and other components into the shell.
  • the upper shell and the lower shell form the outermost package protection shell of the optical module.
  • the upper shell and the lower shell generally use metal materials to achieve electromagnetic shielding and heat dissipation.
  • the shell of the optical module is not made into an integral part, so that when assembling circuit boards and other devices, positioning parts, heat dissipation and electromagnetic shielding The components cannot be installed, and it is not conducive to production automation.
  • the unlocking component 203 is located on the outer wall of the lower housing 202 in the wrapping cavity, and is used to realize the fixed connection between the optical module and the upper computer, or to release the fixed connection between the optical module and the upper computer.
  • the unlocking component 203 has an engaging component that matches the cage of the upper computer; pulling the end of the unlocking component can move the unlocking component on the surface of the outer wall; the optical module is inserted into the cage of the upper computer, and the optical module is fixed on the upper computer by the engaging component of the unlocking component.
  • the cage of the host computer by pulling the unlocking part, the locking part of the unlocking part moves accordingly, and then the connection relationship between the locking part and the host computer is changed to release the optical module and the host computer. Take it out of the cage of the host computer.
  • the circuit board 300 is provided with circuit wiring, electronic components (such as capacitors, resistors, transistors, MOS tubes) and chips (such as MCUs, laser drive chips, limiting amplification chips, clock data recovery CDR, power management chips, and data processing chips) DSP) and so on.
  • electronic components such as capacitors, resistors, transistors, MOS tubes
  • chips such as MCUs, laser drive chips, limiting amplification chips, clock data recovery CDR, power management chips, and data processing chips) DSP
  • the circuit board 300 connects the electrical components in the optical module according to the circuit design through circuit wiring to achieve electrical functions such as power supply, electrical signal transmission, and grounding.
  • the circuit board is generally a rigid circuit board. Due to its relatively hard material, the rigid circuit board can also realize the bearing function. For example, the rigid circuit board can carry the chip smoothly; when the optical transceiver component is on the circuit board, the rigid circuit board can also provide Stable bearing; the rigid circuit board can also be inserted into the electrical connector in the upper computer cage, specifically, metal pins/gold fingers are formed on the end surface of one side of the rigid circuit board for connection with the electrical connector; these are all The flexible circuit board is not easy to implement.
  • Some optical modules also use flexible circuit boards as a supplement to rigid circuit boards; flexible circuit boards are generally used in conjunction with rigid circuit boards, for example, flexible circuit boards can be used to connect between rigid circuit boards and optical transceiver components.
  • the silicon optical chip 400 is generally attached to the surface of the circuit board (PCB) 300, and is electrically connected to the circuit board 300 through wire bonding. After that, the silicon optical chip 400 is connected to the optical fiber socket 600 through the optical fiber ribbon 500, and the silicon optical chip 400 can be connected to the optical fiber socket 600. The electrical signal is converted into an optical signal and then transmitted through the optical fiber ribbon 500 and the optical fiber socket 600. The silicon optical chip 400 can also convert the external optical signal into an electrical signal and output it to the circuit board 300.
  • the silicon optical chip 400 and the circuit board 300 are each provided with a row of pads, and the pads on the circuit board 300 and the corresponding pads on the silicon optical chip 400 are connected by a bonding wire, that is, one end of the bonding wire It is fixed on the pad of the circuit board 300, and the other end is fixed on the pad of the silicon optical chip 400, and the electrical connection between the silicon optical chip 400 and the circuit board 300 is realized by bonding wires.
  • the equivalent inductance and equivalent resistance of a bonding wire are relatively high, which tends to cause the bandwidth of the bonding wire to be low, which affects the high-speed signal transmission rate between the silicon optical chip 400 and the circuit board 300.
  • the embodiments of the present disclosure provide an optical module, which is provided with the number of bonding wires, that is, the circuit board pads on the circuit board 300 correspond to the silicon optical chip 400 through multiple bonding wires.
  • the electrical connection of the chip pad can reduce the equivalent inductance and equivalent resistance of the bonding wire, increase the bandwidth of the bonding wire, and ensure the high-speed signal transmission rate between the silicon optical chip 400 and the circuit board 300.
  • FIG. 5 is a schematic diagram of an assembly structure of a circuit board, a silicon optical chip, and an optical fiber socket according to some embodiments of the present disclosure
  • FIG. 6 is a schematic diagram of an assembly structure of a circuit board, a silicon optical chip, and an optical fiber socket according to some embodiments of the present disclosure from another angle.
  • the optical module includes a circuit board 300, a silicon optical chip 400 and an optical fiber socket 600.
  • the silicon optical chip 400 can be disposed on the surface of the circuit board 300 and is electrically connected to the circuit board 300.
  • one side of the silicon optical chip 400 is provided with a row of chip pads
  • the circuit board 300 is provided with a row of circuit board pads corresponding to the row of chip pads.
  • the chip pads are electrically connected.
  • a mounting groove can also be provided on the circuit board 300, and the silicon optical chip 400 is embedded in the mounting groove and is electrically connected to the circuit board 300, so that the silicon optical chip 400 is directly fixed on the housing of the optical module through the mounting groove.
  • the heat generated by the silicon optical chip 400 can be quickly dissipated through the housing, which improves the heat dissipation efficiency of the optical module.
  • the size of the mounting groove is larger than the size of the silicon optical chip, that is, there are gaps between each side of the silicon optical chip and the inner wall of the mounting groove, so that the heat generated by the silicon optical chip 400 will not be conducted to the circuit board 300. Direct conduction to the housing further improves the heat dissipation efficiency of the optical module.
  • the distances between each chip pad provided on the silicon optical chip 400 and two parallel sides of the silicon optical chip 400 are equal, that is, the center of each chip pad is on a straight line.
  • the straight line is parallel to the two sides of the silicon optical chip 400.
  • the center of the die pad refers to the reference point that determines the location of the die pad.
  • the number of pads in the pad group on the silicon optical chip 400 can be set according to actual needs, which is not specifically limited in this embodiment.
  • FIG. 7 is a schematic diagram of the arrangement of pads on the circuit board and the silicon optical chip according to some embodiments of the present disclosure.
  • the signal attributes processed on the silicon optical chip 400 include data signals and ground signals.
  • the pads on the silicon optical chip can be used for grounding or data signal transmission, specifically including data signal input or Output.
  • the die pads on the silicon optical chip 400 include a first die pad 401 for data signal transmission, a second die pad 402 for data signal transmission, and a third die pad 403 for grounding.
  • the fourth die pad 404 is grounded, and the first die pad 401 and the second die pad 402 are located between the third die pad 403 and the fourth die pad 404.
  • the circuit board 300 is provided with a first circuit board pad 301 corresponding to the first die pad 401 for implementing data signal transmission, and a second circuit board pad 301 corresponding to the second die pad 402 for implementing data signal transmission.
  • the first circuit board pad 301 and the first die pad 401, the second circuit board pad 302 and the second die pad 402, the third circuit board pad 303 and the third die pad 403, and the fourth circuit board are welded Among the pads of the pad 304 and the fourth die pad 404, at least one pair of pads are electrically connected by a plurality of bonding wires 800 to realize the transmission of data signals between the circuit board 300 and the silicon optical chip 400.
  • the one chip pad used to realize data signal transmission can have multiple bonding wires corresponding to the circuit board 300 for realizing
  • the circuit board pads for data signal transmission are electrically connected, that is, data signal transmission is realized through multiple bonding wires; in other embodiments, there are at least two chip pads used for data signal transmission.
  • the two chip pads used for data signal transmission correspond to only one circuit board pad for data signal transmission. At this time, each chip pad used for data signal transmission can be bonded. Wire to the corresponding circuit board pad for data signal transmission, that is, data signal transmission is realized through multiple bonding wires.
  • each chip pad used to realize the connection can be connected with a bonding wire to the corresponding circuit board pad used to realize the grounding.
  • the silicon optical chip 400 and the circuit board 300 are respectively provided with multiple grounding pads, which can provide as many short return paths as possible for high-speed data signals, and prevent the multiple bonding wires 800 connecting the circuit board 300 and the silicon optical chip 400 The mutual crosstalk between the two ensures the quality of high-speed signals.
  • the optical module further includes a DSP (Digital Signal Processing, digital signal processing technology) chip 700.
  • the DSP chip 700 is arranged between the golden finger of the circuit board 300 and the silicon optical chip 400, and the output signal
  • the high-speed signal is connected to the edge of the silicon optical chip 400 through the differential signal line on the circuit board 300, and the high-speed signal is transmitted through the differential signal line.
  • the DSP chip 700 is connected to the pads on the circuit board 300 for data signal transmission through differential signal lines. Because the first circuit board pad 301 and the second circuit board pad 302 and the silicon optical chip 400 are on two parallel sides The distances are equal, so that the lengths of the bonding wires connecting a pair of pads are equal, and the bonding wires are parallel to each other. At this time, the bonding wires 800 connecting the first circuit board pad 301 and the first chip pad 401 are connected to the first chip pad 401.
  • the bonding wire 800 between the two circuit board pads 302 and the second chip pad 402 can be used as a differential pair for transmitting differential signals. And because the phase difference of the differential signal is 180 degrees, the two bonding wires can eliminate the common mode signal, thereby effectively enhancing the anti-interference of the differential pair and reducing their external energy radiation.
  • the bonding wire (signal wire) connecting the first die pad 401 and the first circuit board pad 301, and the bonding wire (signal wire) connecting the second die pad 402 and the second circuit board pad 302 ) Is used as a differential pair to transmit differential signals.
  • M the number of differential pairs
  • at least one bonding wire (ground wire) connected to the ground pad must be set between two adjacent differential pairs, so that each differential pair The signal line near this ground line and this ground line form a return path.
  • M (M ⁇ 2) differential pairs there are at least M-1 ground wires.
  • the number of ground lines can be M+1, so that each signal line in the differential pair can be formed with the nearest ground line.
  • the return path so that the differential signal transmitted on each differential pair can have the shortest return path, thereby reducing energy radiation and effectively reducing crosstalk between signal lines.
  • the first die pad 401 and the first circuit board pad 301 are connected by multiple bonding wires 800, and the second die pad 402 and the second circuit board pad 302 are connected by multiple bonding wires.
  • a bonding wire 800 is connected, the third die pad 403 and the third circuit board pad 303 are connected by multiple bonding wires 800, and the fourth die pad 404 and the fourth circuit board pad 304 are connected The connection is made by a plurality of bonding wires 800.
  • FIG. 8 is an equivalent circuit model of bonding wiring provided by an embodiment of the present application.
  • Port1 is the pad on the silicon optical chip 400
  • Port2 is the pad on the circuit board 300
  • Lb is the equivalent inductance of the silicon optical chip pad
  • Cb2 and Cb1 are the pads and parasitics of the silicon optical chip.
  • Capacitance, Cg is the distributed capacitance
  • Lw is the equivalent inductance of the bonding line
  • Rw is the equivalent resistance of the bonding line
  • La is the equivalent inductance of the circuit board pad
  • Ca1 and Ca2 are the circuit board pad and parasitic capacitance.
  • the bandwidth of the bonding line needs to be increased, and the bandwidth of the bonding line is related to the parasitic capacitance, equivalent resistance, and equivalent inductance.
  • Equation (1) is the equivalent inductance calculation formula of the bonding wire, where L is the equivalent inductance, in nH; lw is the length of the bonding wire, in mm; d is the diameter of the bonding wire, in um.
  • Equation (2) is the equivalent resistance calculation formula of the bonding line, where R is the equivalent resistance; ⁇ is the resistivity of the bonding line; L is the length of the bonding line; S is the cross-sectional area of the bonding line.
  • Equation (3) is the calculation formula of the bonding line model, where Z is the impedance of the signal line, L is the equivalent inductance, and f is the bandwidth frequency.
  • the number of bonding wires 800 connecting the first die pad 401 and the first circuit board pad 301, and the second die pad 402 and the second circuit board pad 302 is at least two, reduce The equivalent inductance and equivalent resistance of the bonding wires are improved, and the bonding wires connecting the first die pad 401 and the first circuit board pad 301, and the second die pad 402 and the second circuit board pad 302 are improved.
  • the 800 bandwidth improves the signal transmission rate.
  • the number of bonding wires connecting the circuit board 300 and the pair of bonding pads on the silicon optical chip 400 for grounding may be the same as that of the pair connecting the circuit board 300 and the silicon optical chip 400 for realizing data.
  • the multiple of the number of bonding wires of the pad for signal transmission For example, the number of bonding wires connecting a pair of pads for realizing grounding is twice the number of bonding wires connecting a pair of pads for realizing data signal transmission.
  • the number of bonding wires connecting a pair of pads for realizing data signal transmission is 2, and the number of bonding wires connecting a pair of pads for realizing grounding is 4 as an example.
  • first die pad 401 and the first circuit board pad 301 are connected by two bonding wires 800
  • the second die pad 402 and the second circuit board pad 302 are also connected by two bonding wires. 800 is connected, so that signal crosstalk may occur between the two bonding wires 800.
  • the wire heights of the two bonding wires 800 are not the same, that is, connect the first circuit board pad 301
  • the drop points of the two bonding wires on the pads are distributed one after the other; the multiple first circuit board pads adopt the same soldering method as described above, and the front and rear distribution of the drop points makes the overall distribution in two rows;
  • the drop points of the two bonding wires of the two circuit board pads 302 on the pads are also distributed in two rows, so that the lengths of the bonding wires connecting the same pad are different, and viewed from the side, the two do not overlap.
  • FIG. 9 is a schematic diagram of an assembly structure of a circuit board and a silicon optical chip provided by an embodiment of the disclosure
  • FIG. 10 is an enlarged schematic diagram of B in FIG. 9.
  • the first die pad 401 is connected to the first circuit board pad 301 through two bonding wires 800, and the two bonding wires 800 are placed on the first circuit board pad 301.
  • the connection line is not parallel to the side of the silicon optical chip 400, that is, the landing points of the two bonding wires 800 on the first circuit board pad 301 are not on the same straight line, and the two landing points are soldered on the first circuit board.
  • the disk 301 is distributed in two rows (set before and after the drop point), so that the bonding heights of the two bonding wires 800 are different, and the bonding height of the left bonding wire is higher than the bonding height of the right bonding wire.
  • the third chip pad 403 is connected to the third circuit board pad 303 through 4 bonding wires 800, and the connection of the 4 bonding wires 800 on the third circuit board pad 303 is not connected to the silicon optical chip 400
  • the sides are parallel, that is, the landing points of the 4 bonding wires 800 on the third circuit board pad 303 are not on the same straight line, and are distributed in two rows; the landing points of the middle 2 bonding wires are soldered on the third circuit board
  • the landing point of the two bonding wires on the second side is on the back side of the third circuit board pad 303, so that the bonding heights of the 4 bonding wires 800 are different, and the bonding of the two bonding wires in the middle is different.
  • the wire height is lower than the wire bonding height of the two bonding wires on both sides.
  • the fourth die pad 404 is connected to the fourth circuit board pad 304 through four bonding wires 800, and the connection of the two bonding wires 800 on the fourth circuit board pad 304 is not connected to the silicon.
  • the sides of the optical chip 400 are parallel, that is, the landing points of the four bonding wires 800 on the fourth circuit board pad 304 are not on the same straight line, and are distributed in two rows; the two bonding wires in the middle are placed on the fourth circuit board.
  • the landing points of the two bonding wires on both sides are on the back side of the fourth circuit board pad 304, so the four bonding wires 800 have different wire heights, and the two bonding wires in the middle are bonded
  • the bonding height of the wire is lower than the bonding height of the two bonding wires on both sides.
  • FIG. 11 is another perspective assembly schematic diagram of the circuit board and the silicon optical chip provided by the embodiment of the present disclosure
  • FIG. 12 is a side view of the assembly of the circuit board and the silicon optical chip provided by the embodiment of the present disclosure
  • FIG. 13 is the position C in FIG. 12 Enlarge the schematic diagram.
  • the bonding wire 800 is relatively smooth, and the bonding wire 800 that falls on the back side of the first circuit board pad 301 is relatively steep, that is, the curvature of the two bonding wires 800 is different, so that from the side, the left bonding wire
  • the height of the bonding wire is higher than that of the right bonding wire.
  • the two bonding wires do not overlap, and there is an angle between the two bonding wires. There will be no mutual inductance between the signal wires with the angle. It avoids the mutual inductance coupling between the two bonding wires to generate induced voltage, that is, crosstalk, and ensures the signal transmission quality of the bonding wire connecting the first chip pad 401 and the first circuit board pad 301.
  • the two bonding wires 800 are arranged before and after the landing point on the first circuit board pad 301, and their landing points on the first die pad 401 can be located in the same row, that is, the two bonding wires 800 are bonded on the first die.
  • the connection line of the landing point on the disk 401 is parallel to the side edge of the silicon optical chip 400; the landing points of the two bonding wires 800 on the first die pad 401 can also be set back and forth, that is, one bonding wire 800 is in the first
  • the drop point on the die pad 401 is set on the front side, close to the side of the silicon optical chip 400, and the other bonding wire 800 on the first die pad 401 is set on the back side, away from the silicon optical chip 400 Side.
  • the second die pad 402 is connected to the second circuit board pad 302 through two bonding wires 800, and the two bonding wires 800 are arranged before and after the landing point on the second circuit board pad 302, so from the side Look, these two bonding wires do not overlap, which can avoid the mutual inductance of the two bonding wires, avoid the mutual inductance coupling between the two bonding wires and form crosstalk, and ensure that the second chip pad 402 is connected to the second circuit board.
  • the bonding wires that connect the first die pad 401 and the first circuit board pad 301, and which are located in the rear row of the first circuit board pad 301, are soldered to the second die pad 402 and the second circuit board.
  • the bonding wires of the disk 302 and the landing point located in the rear row of the second circuit board pad 302 have the same bonding height, that is, the two bonding wires overlap when viewed from the side.
  • the bonding wire connecting the first die pad 401 and the first circuit board pad 301, and the landing point is located in the front row of the first circuit board pad 301, and the second die pad 402 and the second circuit board
  • the bonding wires of the bonding pad 302 and the landing point located in the front row of the bonding pad 302 of the second circuit board have the same bonding height, that is, the two bonding wires overlap when viewed from the side.
  • the bonding wire whose landing point is located in the rear row of the third circuit board pad 303 and the bonding wire whose landing point is located in the rear row of the first circuit board pad 301 have the same bonding height, that is, the bonding wire is viewed from the side.
  • the bonding wire whose landing point is located in the front row of the third circuit board pad 303 and the bonding wire whose landing point is located in the front row of the first circuit board pad 301 are also the same in height, that is, the bonding is viewed from the side
  • the lines are also coincident.
  • the bonding wire whose landing point is located in the rear row of the fourth circuit board pad 304 and the bonding wire whose landing point is located in the rear row of the first circuit board pad 301 have the same bonding height, that is, the bonding wire is viewed from the side It is coincident; the bonding wire whose landing point is located in the front row of the fourth circuit board pad 304 and the bonding wire whose landing point is located in the front row of the first circuit board pad 301 are also the same in height, that is, the bonding is viewed from the side
  • the closed lines are also coincident.
  • the bonding wires connecting the circuit board 300 and the silicon optical chip 400 are all overlapped with each other, and their landing points are located in the front row of the circuit board pads.
  • the bonding wires also overlap each other.
  • a first chip pad for data signal transmission and a second chip pad for data signal transmission are provided along the side of the silicon optical chip to realize The grounded third die pad and the fourth die pad for grounding, wherein the first die pad and the second die pad are located between the third die pad and the fourth die pad; on the circuit board Set a first circuit board pad corresponding to the first chip pad for data signal transmission, a second circuit board pad corresponding to the second chip pad for data signal transmission, and soldering to the third chip The third circuit board pad for grounding corresponding to the disk and the fourth circuit board pad for grounding corresponding to the fourth chip pad; wherein the third circuit board pad and the third chip pad , In the first circuit board pad and the first die pad, the second circuit board pad and the second die pad, the fourth circuit board pad and the fourth die pad, at least one pair of pads passes through a plurality of keys The bonding wire is electrically connected instead of connecting the chip pad and the circuit board pad through a bonding wire.
  • the addition of the number of bonding wires can reduce the equivalent inductance and equivalent resistance of the bonding wire, increase the bandwidth of the bonding wire, and then It can ensure the signal transmission rate between the silicon optical chip and the circuit board; in addition, the bonding heights of multiple bonding wires on the circuit board pads are not the same, avoiding mutual inductance between multiple bonding wires and forming crosstalk, ensuring Improve the high-speed signal performance of the optical module.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Semiconductor Lasers (AREA)
  • Optical Couplings Of Light Guides (AREA)

Abstract

本公开提供了一种光模块，包括电路板、硅光芯片与光纤插座，硅光芯片的一侧设有第一、第二芯片焊盘及第一、第四芯片焊盘，电路板上设有对应的第一、第二电路板焊盘及第一、第四电路板焊盘，电路板上的焊盘与硅光芯片上对应的焊盘中，至少一对焊盘通过多个键合线电连接，且多个键合线的打线高度不相同。

Description

一种光模块
本申请要求在2020年05月21日提交中国专利局、申请号为202010436947.2、发明名称为“一种光模块”的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及光通信技术领域，尤其涉及一种光模块。
背景技术
在光通信领域中，光模块封装了多种电子元器件，电子元器件之间的互连以及电子元器件与线路之间的连接广泛应用打线连接，特别是硅光芯片与电路板之间具有大量密集的打线连接。
发明内容
本公开实施例提供一种光模块，包括：电路板；硅光芯片，与电路板电连接；光纤插座，通过光纤带与硅光芯片的光口光连接；其中，硅光芯片的一侧设有第三芯片焊盘、第一芯片焊盘、第二芯片焊盘与第四芯片焊盘，第一芯片焊盘与第二芯片焊盘位于第三芯片焊盘和第四芯片焊盘之间；电路板上设有对应的第三电路板焊盘、第一电路板焊盘、第二电路板焊盘与第四电路板焊盘；
第三电路板焊盘与第三芯片焊盘、第一电路板焊盘与第一芯片焊盘、第二电路板焊盘与第二芯片焊盘、第四电路板焊盘与第四芯片焊盘中，至少一对焊盘通过多个键合线电连接，且多个键合线的打线高度不相同。
附图说明
为了更清楚地说明本公开的技术方案，下面将对实施例中所需要使用的附图作简单地介绍，显而易见地，对于本领域普通技术人员而言，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为根据本公开一些实施例的光通信终端连接关系示意图；
图2为根据本公开一些实施例的光网络终端结构示意图；
图3为根据本公开一些实施例的光模块的结构示意图；
图4为根据本公开一些实施例的光模块的分解结构示意图；
图5为根据本公开一些实施例的电路板、硅光芯片与光纤插座的组装结构示意图；
图6为根据本公开一些实施例的电路板、硅光芯片与光纤插座的另一角度组装示意图；
图7为图5中A处放大示意图；
图8为根据本公开一些实施例的键合打线的等效电路模型图；
图9为根据本公开一些实施例的电路板的俯视图；
图10为图9中B处放大示意图；
图11为根据本公开一些实施例的电路板的另一角度示意图；
图12为根据本公开一些实施例的电路板的侧视图；
图13为图12中C处放大示意图。
具体实施方式
下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
光纤通信的核心环节之一是光、电信号的相互转换。光纤通信使用携带信息的光信号在光纤/光波导等信息传输设备中传输，利用光在光纤/光波导中的无源传输特性可以实现低成本、低损耗的信息传输；而计算机等信息处理设备使用的是电信号，为了在光纤/光波导等信息传输设备与计算机等信息处理设备之间建立信息连接，就需要实现电信号与光信号的相互转换。
光模块在光纤通信技术领域中实现上述光、电信号的相互转换功能，光信号与电信号的相互转换是光模块的核心功能。光模块通过其内部电路板上的金手指实现与外部上位机之间的电连接，主要的电连接包括供电、I2C信号、数据信息以及接地等；采用金手指实现的电连接方式已经成为光模块行业的主流连接方式，以此为基础，金手指上引脚的定义形成了多种行业协议/规范。
图1为根据本公开一些实施例提供的光通信终端连接关系示意图。如图1所示，光通信终端的连接主要包括光网络终端100、光模块200、光纤101及网线103之间的相互连接。
光纤101的一端连接远端服务器，网线103的一端连接本地信息处理设备，本地信息处理设备与远端服务器的连接由光纤101与网线103的连接完成；而光纤101与网线103之间的连接由具有光模块200的光网络终端100完成。
光模块200的光口对外接入光纤101，与光纤101建立双向的光信号连接；光模块200的电口对外接入光网络终端100中，与光网络终端100建立双向的电信号连接；在光模块内部实现光信号与电信号的相互转换，从而实现在光纤与光网络终端之间建立信息连接。具体地，来自光纤的光信号由光模块转换为电信号后输入至光网络终端100中，来自光网络终端100的电信号由光模块转换为光信号输入至光纤中。
光网络终端具有光模块接口102，用于接入光模块200，与光模块200建立双向的电信号连接；光网络终端具有网线接口104，用于接入网线103，与网线103建立双向的电信号连接；光模块200与网线103之间通过光网络终端100建立连接。具体地，光网络终端将来自光模块的信号传递给网线，将来自网线的信号传递给光模块，光网络终端作为光模块的上位机监控光模块的工作。
至此，远端服务器通过光纤、光模块、光网络终端及网线，与本地信息处理设备之间建立双向的信号传递通道。
常见的信息处理设备包括路由器、交换机、电子计算机等；光网络终端是光模块的上位机，向光模块提供数据信号，并接收来自光模块的数据信号，常见的光模块上位机还有光线路终端等。
图2为根据本公开一些实施例提供的光网络终端结构示意图。如图2所示，光网络终端100包括电路板105，在电路板105的表面设置笼子106；在笼子106内部设置有电连接器，用于接入金手指等光模块电口；在笼子106上设置有散热器107，散热器107具有增大散热面积的翅片等凸起部。
光模块200插入光网络终端100中，具体为光模块的电口插入笼子106内部的电连接器，光模块的光口与光纤101连接。
笼子106位于电路板105上，电路板105上的电连接器包裹在笼子106中；光模块200插入笼子106中，由笼子106固定光模块200，光模块200产生的热量传导给笼子106，通过笼子上的散热器107进行扩散。
图3为根据本公开一些实施例的一种光模块结构示意图，图4为根据本公开一些实施例的光模块分解结构示意图。如图3、图4所示，光模块200包括上壳体201、下壳体202、解锁部件203、电路板300、硅光芯片400及光纤插座600。
上壳体201盖合在下壳体202上，以形成具有两个开口的包裹腔体；包裹腔体的外轮廓一般呈现方形体。具体地，下壳体202包括主板以及位于主板两侧、与主板垂直设置的两个侧板；上壳体201包括盖板，盖板盖合在上壳体的两个侧板上，以形成包裹腔体；上壳体还可以包括位于盖板两侧、与盖板垂直设置的两个侧壁，由两个侧壁与两个侧板结合， 以实现上壳体201盖合在下壳体202上。
两个开口可以是在相反方向的两个开口(204、205)，也可以是其他不同方向上的两个开口；图3中开口204和205为相反方向的两个开口，其中开口204为电口，电路板的金手指从电口204伸出，插入光网络终端等上位机中；开口205为电口，用于外部光纤接入以连接光模块内部的硅光芯片400；电路板300、硅光芯片400等光电器件位于包裹腔体中。
采用上壳体、下壳体结合的装配方式，便于将电路板300、硅光芯片400等器件安装到壳体中，由上壳体、下壳体形成光模块最外层的封装保护壳体；上壳体及下壳体一般采用金属材料，利用实现电磁屏蔽以及散热，一般不会将光模块的壳体做成一体部件，这样在装配电路板等器件时，定位部件、散热以及电磁屏蔽部件无法安装，也不利于生产自动化。
解锁部件203位于包裹腔体中下壳体202的外壁，用于实现光模块与上位机之间的固定连接，或解除光模块与上位机之间的固定连接。
解锁部件203具有与上位机笼子匹配的卡合部件；拉动解锁部件的末端可以使解锁部件在外壁的表面移动；光模块插入上位机的笼子里，由解锁部件的卡合部件将光模块固定在上位机的笼子里；通过拉动解锁部件，解锁部件的卡合部件随之移动，进而改变卡合部件与上位机的连接关系，以解除光模块与上位机的卡合关系，从而可以将光模块从上位机的笼子里抽出。
电路板300上设置有电路走线、电子元件(如电容、电阻、三极管、MOS管)及芯片(如MCU、激光驱动芯片、限幅放大芯片、时钟数据恢复CDR、电源管理芯片、数据处理芯片DSP)等。
电路板300通过电路走线将光模块中的用电器件按照电路设计连接在一起，以实现供电、电信号传输及接地等电功能。
电路板一般为硬性电路板，硬性电路板由于其相对坚硬的材质，还可以实现承载作用，如硬性电路板可以平稳的承载芯片；当光收发组件位于电路板上时，硬性电路板也可以提供平稳的承载；硬性电路板还可以插入上位机笼子中的电连接器中，具体地，在硬性电路板的一侧末端表面形成金属引脚/金手指，用于与电连接器连接；这些都是柔性电路板不便于实现的。
部分光模块中也会使用柔性电路板，作为硬性电路板的补充；柔性电路板一般与硬性电路板配合使用，如硬性电路板与光收发组件之间可以采用柔性电路板连接。
目前硅光芯片400一般贴在电路板(PCB)300的表面，通过打线与电路板300实现 电连接，之后硅光芯片400通过光纤带500与光纤插座600连接，可实现硅光芯片400将电信号转化为光信号后通过光纤带500、光纤插座600传送出去，也可实现硅光芯片400将来自外部的光信号转化为电信号后输出至电路板300。
硅光芯片400与电路板300上各设置有一排焊盘，电路板300上的焊盘与硅光芯片400上对应的焊盘通过一根键合(bonding)线连接，即键合线的一端固定于电路板300的焊盘上、另一端固定于硅光芯片400的焊盘上，通过键合线实现硅光芯片400与电路板300之间的电连接。但是，一根键合线的等效电感、等效电阻较高，容易造成键合线的带宽较低，影响硅光芯片400与电路板300之间的高速信号传输速率。
为了解决上述问题，本公开实施例提供了一种光模块，该光模块增设键合线的数量，即电路板300上的电路板焊盘通过多根键合线与硅光芯片400上对应的芯片焊盘电连接，可降低键合线的等效电感与等效电阻，提高键合线的带宽，保证硅光芯片400与电路板300之间的高速信号传输速率。
图5为根据本公开一些实施例的电路板、硅光芯片和光纤插座的组装结构示意图，图6为根据本公开一些实施例的电路板、硅光芯片和光纤插座的另一角度组装示意图。如图5、图6所示，光模块包括电路板300、硅光芯片400及光纤插座600，硅光芯片400可设置在电路板300的表面上，与电路板300电连接。具体地，硅光芯片400的一侧设有一排芯片焊盘，电路板300上设有与一排芯片焊盘对应的一排电路板焊盘，电路板焊盘通过多个键合线与对应的芯片焊盘电连接。
还可在电路板300上设置安装槽，硅光芯片400嵌在该安装槽内，且与电路板300电连接，如此通过该安装槽将硅光芯片400直接固定于光模块的壳体上，硅光芯片400产生的热量可通过壳体快速散热，提高了光模块的散热效率。
安装槽的尺寸大小大于硅光芯片的尺寸大小，即硅光芯片的各个侧边与安装槽的内壁之间均存在间隙，如此硅光芯片400产生的热量不会传导至电路板300上，其直接传导至壳体上，进一步提高了光模块的散热效率。
在一些实施例中，硅光芯片400上设置的各个芯片焊盘与硅光芯片400的侧边中平行的两个侧边的距离均相等，即各个芯片焊盘的中心在一条直线上，该直线与硅光芯片400的两个侧边平行。其中芯片焊盘的中心是指决定该芯片焊盘所在位置的基准点。硅光芯片400上焊盘组中焊盘的数量可以根据实际需要进行设置，本实施例对此不作具体限定。
图7为根据本公开一些实施例的电路板与硅光芯片上焊盘的设置示意图。如图7所示，硅光芯片400上处理的信号属性包括数据信号与接地信号，硅光芯片上的焊盘可以用于实现接地或用于实现数据信号的传输，具体包括数据信号的输入或输出。硅光芯片400上的 芯片焊盘包括用于实现数据信号传输的第一芯片焊盘401、由于实现数据信号传输的第二芯片焊盘402、用于实现接地的第三芯片焊盘403与用于实现接地的第四芯片焊盘404，且第一芯片焊盘401与第二芯片焊盘402位于第三芯片焊盘403和第四芯片焊盘404之间。电路板300上设有与第一芯片焊盘401相对应的用于实现数据信号传输的第一电路板焊盘301，与第二芯片焊盘402相对应的用于实现数据信号传输的第二电路板焊盘302，与第三芯片焊盘403相对应的用于实现接地的第三电路板焊盘303，以及与第四芯片焊盘404相对应的用于实现接地的第四电路板焊盘304。
第一电路板焊盘301与第一芯片焊盘401、第二电路板焊盘302与第二芯片焊盘402、第三电路板焊盘303与第三芯片焊盘403、第四电路板焊盘304与第四芯片焊盘404的焊盘中，至少一对焊盘通过多个键合线800电连接，以实现电路板300与硅光芯片400之间数据信号的传输。
在一些实施例中中，用于实现数据信号传输的芯片焊盘只有一个，此时该一个于实现数据信号传输的芯片焊盘可以打多个键合线与电路板300上对应的用于实现数据信号传输的电路板焊盘电连接，即通过多个键合线实现了数据信号的传输；在另一些实施例中，用于实现数据信号的传输的芯片焊盘有至少两个与该至少两个用于实现数据信号的传输的芯片焊盘对应的用于实现数据信号传输的电路板焊盘只有一个，此时每个用于实现数据信号的传输的芯片焊盘可以打一根键合线到对应的用于实现数据信号传输的电路板焊盘，即通过多个键合线实现了数据信号的传输。
在一些实施例中，芯片上用于实现接地的芯片焊盘只有一个，此时该一个用于实现接地芯片焊盘打多个键合线与电路板300上对应的用于实现接地的电路板焊盘电连接；在另一些实施例中，芯片上用于实现接地的焊盘有至少两个，与至少两个用于实现接地的芯片焊盘对应的用于实现接地的电路板焊盘只有一个，此时每个用于实现接得的芯片焊盘可以打一根键合线到对应的用于实现接地的电路板焊盘。
在一些实施例中，硅光芯片上每相邻的两个用于实现接地焊盘之间有至少两个用于实现数据信号传输的焊盘。
在用于实现数据信号传输的焊盘之间设置用于实现接地的焊盘可以增强地隔离，这样可以给高速的数据信号提供一个回流路径，以减少能量的辐射以及键合线800之间的串扰。硅光芯片400与电路板300分别设置多个接地焊盘，可以给高速数据信号提供尽可能多的较短的回流路径，防止连接电路板300与硅光芯片400的多根键合线800之间的相互串扰，保证高速信号的质量。
在本公开的一些实施例中，光模块还包括DSP(Digital Signal Processing，数字信号 处理技术)芯片700，该DSP芯片700设置在电路板300的金手指与硅光芯片400之间，其输出的高速信号通过电路板300上的差分信号线连接到硅光芯片400的边缘，通过差分信号线实现高速信号的传输。
DSP芯片700通过差分信号线连接至电路板300上用于实现数据信号传输的焊盘，由于第一电路板焊盘301与第二电路板焊盘302和硅光芯片400两个平行侧边的距离相等，从而使得连接一对焊盘的键合线的长度相等，且键合线相互平行，此时连接第一电路板焊盘301与第一芯片焊盘401的键合线800、连接第二电路板焊盘302与第二芯片焊盘402的键合线800可作为一个差分对，用于传输差分信号。且由于差分信号的相位相差180度，使这两条键合线可以消除共模信号，从而有效增强差分对的抗干扰性，并减小它们对外的能量辐射。
本示例中，连接第一芯片焊盘401与第一电路板焊盘301的键合线(信号线)、连接第二芯片焊盘402与第二电路板焊盘302的键合线(信号线)之间作为一个差分对，用于传输差分信号。一般来说，当差分对为M(M≥2)个时，相邻两个差分对之间至少需要设置一条连接接地焊盘的键合线(地线)，以使每一差分对中与这条地线较近的信号线和此地线构成回流路径。例如当差分对为M(M≥2)个时，设置的地线至少为M-1个。
在本公开的某些实施例中，当差分对为M(M≥2)个时，设置的地线可为M+1个，这样可以使差分对中每一条信号线与其最近的地线构成回流路径，进而使得每个差分对上传输的差分信号都可以有最短的回流路径，从而减小能量的辐射，有效降低信号线之间的串扰。
在一些实施例中，第一芯片焊盘401与第一电路板焊盘301之间通过多根键合线800进行连接，第二芯片焊盘402与第二电路板焊盘302之间通过多根键合线800进行连接，第三芯片焊盘403与第三电路板焊盘303之间通过多根键合线800进行连接，第四芯片焊盘404与第四电路板焊盘304之间通过多根键合线800进行连接。
图8是本申请实施例提供的一种Bonding打线的等效电路模型。如图8所示，Port1是硅光芯片400上的焊盘，Port2是电路板300上的焊盘，Lb是硅光芯片焊盘的等效电感，Cb2、Cb1是硅光芯片焊盘及寄生电容，Cg是分布电容，Lw是bonding线等效电感，Rw是bonding线等效电阻，La是电路板焊盘的等效电感，Ca1、Ca2是电路板焊盘及寄生电容。为了保证硅光芯片与电路板的高速信号性能，需要提高bonding线的带宽，而bonding线的带宽与寄生电容、等效电阻、等效电感等有关。
L＝2*lw*[In(4*10 3*lw/d)-0.75]      (1)
式(1)为bonding线的等效电感计算公式，其中，L为等效电感，单位nH；lw为bonding线长度，单位mm；d为bonding线直径，单位um。
根据式(1)可知，当bonding线的数量为2根或以上时，相对于1根bonding线，线的长度没有变化，线的总体直径d增大，则等效电感L减小。
R＝ρ(L/S)          (2)
式(2)为bonding线的等效电阻计算公式，其中，R为等效电阻；ρ为bonding线电阻率；L为bonding线长度；S为bonding线截面积。
根据式(2)可知，当bonding线的数量为2根或以上时，相对于1根bonding线，线的长度没有变化，线的截面积S增大，则等效电阻R减小。
Z＝W*L
W＝2πf            (3)
式(3)为bonding线模型计算公式，其中，Z为信号线阻抗，L为等效电感，f为带宽频率。差分信号线阻抗Z为100欧，单端为50欧，则50Ω＝W*L＝2πf*L，得到L＝50/2πf，f＝50/2πL，如此可知，当等效电感L减小，等效电阻R减小时，带宽W增大。
因此，当连接第一芯片焊盘401与第一电路板焊盘301、第二芯片焊盘402与第二电路板焊盘302之间连接的键合线800数量至少为2个时，减小了键合线的等效电感、等效电阻，提高了连接第一芯片焊盘401与第一电路板焊盘301、第二芯片焊盘402与第二电路板焊盘302之间键合线800的带宽，提高了信号传输速率。当连接第三芯片焊盘403与第三电路板焊盘303之间、连接第四芯片焊盘404与第四电路板焊盘304的键合线800的数量大于或等于连接连接芯片与电路板之间用于实现数据信号传输的的焊盘的键合线数量时，增加了给高速信号提供的回流路径，可以有效防止信号回流和防串扰。
在一些实施例中，连接电路板300与硅光芯片400上的一对用于实现接地的焊盘的键合线数量可为连接电路板300与硅光芯片400上的一对用于实现数据信号的传输的焊盘的键合线数量的倍数。示例行的，连接一对用于实现接地的焊盘的键合线数量为连接一对用于实现数据信号的传输的焊盘的键合线数量的两倍。下面以连接一对用于实现数据信号的传输的焊盘的键合线数量为2个，连接一对用于实现接地的焊盘的键合线数量为4个为例 进行说明。
由于第一芯片焊盘401与第一电路板焊盘301之间通过2根键合线800进行连接，第二芯片焊盘402与第二电路板焊盘302之间也通过2根键合线800进行连接，如此2根键合线800之间可能会产生信号串扰，为了防止键合线之间产生串扰，2根键合800的打线高度不相同，即连接第一电路板焊盘301的2根键合线在焊盘上的落点呈一前一后分布；多个第一电路板焊盘采用上述同样的焊接方式，落点的前后分布使得整体呈前后两排分布；接第二电路板焊盘302的2根键合线在焊盘上的落点也呈两排分布，如此连接同一焊盘的键合线的长度不同，从侧面看，两者不相重合。
图9为本公开实施例提供的电路板与硅光芯片的组装结构示意图，图10为图9中B处放大示意图。如图9、图10所示，第一芯片焊盘401通过2根键合线800与第一电路板焊盘301连接，2根键合线800在第一电路板焊盘301上落点的连线并不与硅光芯片400的侧边平行，即2根键合线800在第一电路板焊盘301上的落点并不位于同一直线上，2个落点在第一电路板焊盘301上呈两排分布(落点前后设置)，如此2根键合线800的打线高度不相同，左侧键合线的打线高度高于右侧键合线的打线高度。
第三芯片焊盘403通过4根键合线800与第三电路板焊盘303连接，4根键合线800在第三电路板焊盘303上落点的连线并不与硅光芯片400的侧边平行，即4根键合线800在第三电路板焊盘303上的落点并不在同一直线上，呈两排分布；中间2根键合线的落点在第三电路板焊盘303的前侧，2侧两根键合线的落点在第三电路板焊盘303的后侧，如此4根键合线800的打线高度不相同，中间2个键合线的打线高度低于两侧两个键合线的打线高度。
同理，第四芯片焊盘404通过4根键合线800与第四电路板焊盘304连接，2根键合线800在第四电路板焊盘304上落点的连线并不与硅光芯片400的侧边平行，即4根键合线800在第四电路板焊盘304上的落点并不在同一直线上，呈两排分布；中间2根键合线的落点在第四电路板焊盘304的前侧，两侧2根键合线的落点在第四电路板焊盘304的后侧，如此4根键合线800的打线高度不相同，中间2个键合线的打线高度低于两侧两个键合线的打线高度。
图11为本公开实施例提供的电路板与硅光芯片的另一角度组装示意图，图12为本公开实施例提供的电路板与硅光芯片的组装侧视图，图13为图12中C处放大示意图。如图11、图12、图13所示，连接第一芯片焊盘401与第一电路板焊盘301的2根键合线中，其落点在第一电路板焊盘301前侧的键合线800相对平缓些，其落点在第一电路板焊盘301后侧的键合线800相对陡峭些，即两根键合线800的弧度不同，从而从侧面看，左侧 键合线的打线高度高于右侧键合线的打线高度，这两根键合线不重合，且两根键合线之间存在夹角，具有夹角的信号线之间不会产生互感，避免了互感在两根键合线耦合而产生感应电压即形成串扰，保证了连接第一芯片焊盘401与第一电路板焊盘301的键合线信号传输质量。
2根键合线800在第一电路板焊盘301上的落点前后设置，其在第一芯片焊盘401上的落点可位于同一排，即2根键合线800在第一芯片焊盘401上落点的连线与硅光芯片400的侧边平行；2根键合线800在第一芯片焊盘401上的落点也可前后设置，即一根键合线800在第一芯片焊盘401上的落点设置在前侧，靠近硅光芯片400的侧边，另一根键合线800在第一芯片焊盘401上的落设置在后侧，远离硅光芯片400的侧边。
同理，第二芯片焊盘402通过2根键合线800与第二电路板焊盘302连接，2根键合线800在第二电路板焊盘302上的落点前后设置，如此从侧面看，这2根键合线不重合，可避免2根键合线产生互感，避免了互感在2根键合线耦合而形成串扰，保证了连接第二芯片焊盘402与第二电路板焊盘302的键合线信号传输质量。
另外，连接第一芯片焊盘401与第一电路板焊盘301、且落点位于第一电路板焊盘301后排的键合线，与连接第二芯片焊盘402与第二电路板焊盘302、且落点位于第二电路板焊盘302后排的键合线，其打线高度相同，即从侧面看这两根键合线相重合。
同理，连接第一芯片焊盘401与第一电路板焊盘301、且落点位于第一电路板焊盘301前排的键合线，与连接第二芯片焊盘402与第二电路板焊盘302、且落点位于第二电路板焊盘302前排的键合线，其打线高度相同，即从侧面看这两根键合线相重合。
另外，其落点位于第三电路板焊盘303后排的键合线与落点位于第一电路板焊盘301后排的键合线的打线高度相同，即从侧面看键合线是重合的；其落点位于第三电路板焊盘303前排的键合线与落点位于第一电路板焊盘301前排的键合线的打线高度也相同，即从侧面看键合线也是重合的。
同理，其落点位于第四电路板焊盘304后排的键合线与落点位于第一电路板焊盘301后排的键合线的打线高度相同，即从侧面看键合线是重合的；其落点位于第四电路板焊盘304前排的键合线与落点位于第一电路板焊盘301前排的键合线的打线高度也相同，即从侧面看键合线也是重合的。
如此，从侧面看，连接电路板300与硅光芯片400的键合线中，其落点位于电路板焊盘后排的键合线均相互重合，其落点位于电路板焊盘前排的键合线也均相互重合。
本公开实施例提供的光模块，通过在硅光芯片上沿侧边设置用于实现用于数据信号传输的第一芯片焊盘、用于实现数据信号传输的第二芯片焊盘、用于实现接地的第三芯片焊 盘与用于实现接地的第四芯片焊盘，其中第一芯片焊盘与第二芯片焊盘位于第三芯片焊盘与第四芯片焊盘之间；在电路板上设置与第一芯片焊盘对应的用于实现数据信号传输的第一电路板焊盘、与第二芯片焊盘对应的用于实现数据信号传输的第二电路板焊盘、与第三芯片焊盘相对应的用于实现接地的第三电路板焊盘以及与第四芯片焊盘相对应的用于实现接地的第四电路板焊盘；其中第三电路板焊盘与第三芯片焊盘、第一电路板焊盘与第一芯片焊盘、第二电路板焊盘与第二芯片焊盘、第四电路板焊盘与第四芯片焊盘中，至少一对焊盘通过多个键合线电连接，而不是通过一根键合线连接芯片焊盘与电路板焊盘，增设键合线数量可以降低键合线的等效电感与等效电阻，提高键合线的带宽，进而可以保证硅光芯片与电路板之间的信号传输速率；另外，多个键合线在电路板焊盘上的打线高度不相同，避免了多个键合线之间互感而形成串扰，保证了光模块的高速信号性能。
最后应说明的：以上实施例仅用以说明本公开的技术方案，而非对其限制；本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；本质未脱离本公开各实施例技术方案的精神和范围。

Claims (10)

  1. 一种光模块，包括：
    电路板；
    硅光芯片，与所述电路板电连接；
    光纤插座，通过光纤带与所述硅光芯片的光口光连接；
    其中，所述硅光芯片的一侧设有用于实现数据信号传输的第一芯片焊盘、用于实现数据信号传输的第二芯片焊盘、用于实现接地的第三芯片焊盘以及用于实现接地的第四芯片焊盘，所述第一芯片焊盘与所述第二芯片焊盘位于所述第三芯片焊盘与所述第四芯片焊盘之间；
    所述电路板上设有与所述第一芯片焊盘对应的用于实现数据信号传输的第一电路板焊盘、与所述第二芯片焊盘对应的用于实现数据信号传输的第二电路板焊盘、与所述第三芯片焊盘对应的用于实现接地的第三电路板焊盘以及与所述第四芯片焊盘对应的用于实现接地的第四电路板焊盘；
    所述第一电路板焊盘与所述第一芯片焊盘、所述第二电路板焊盘与所述第二芯片焊盘、所述第三电路板焊盘与所述第三芯片焊盘、所述第四电路板焊盘与所述第四芯片焊盘中，至少一对焊盘通过多个键合线电连接，且多个键合线的打线高度不相同。
  2. 根据权利要求1所述的光模块，其特征在于，用于连接芯片和电路板上用于实现接地的一对焊盘的键合线数量大于或等于用于连接芯片和电路板上用于实现数据信号传输的一对数焊盘的键合线数量。
  3. 根据权利要求2所述的光模块，其特征在于，用于连接芯片和电路板上用于实现接地的一对焊盘的键合线数量为用于连接芯片和电路板上用于实现数据信号传输的一对数焊盘的键合线数量的倍数。
  4. 根据权利要求3所述的光模块，其特征在于用于连接芯片和电路板上用于实现接地的一对焊盘的键合线数量为用于连接芯片和电路板上用于实现数据信号传输的一对数焊盘的键合线数量的两倍。
  5. 根据权利要求1所述的光模块，其特征在于，所述第一电路板焊盘通过两根键合线与所述第一芯片焊盘电连接，且所述键合线的打线高度不相同；
    所述第二电路板焊盘通过两跟键合线与所述第二芯片焊盘电连接，且所述键合线的打线高度不相同。
  6. 根据权利要求5所述的光模块，其特征在于，连接所述第一电路板焊盘的两根键 合线在焊盘上的落点呈两排分布；
    连接所述第二电路板焊盘的两个键合线在焊盘上的落点呈两排分布。
  7. 根据权利要求6所述的光模块，其特征在于，所述第三电路板焊盘通过4根键合线与所述第三芯片焊盘电连接，中间两根键合线的打线高度低于两侧两根键合线的打线高度；
    所述第四电路板焊盘通过四根键合线与所述第四芯片焊盘电连接，中间两根键合线的打线高度低于两侧两根键合线的打线高度。
  8. 根据权利要求7所述的光模块，其特征在于，所述4根键合线在第三电路板焊盘上的落点呈两排分布；
    所述四根键合线在第四电路板焊盘上的落点呈两排分布。
  9. 根据权利要求8所述的光模块，其特征在于，落点在所述第一电路板焊盘、所述第二电路板焊盘前排的键合线的打线高度与落点在所述第三电路板焊盘、所述第四电路板焊盘前排的键合线的打线高度相同。
  10. 根据权利要求8所述的光模块，其特征在于，落点在所述第一电路板焊盘、所述第二电路板焊盘后排的键合线的打线高度与落点在所述第三电路板焊盘、所述第四电路板焊盘后排的键合线的打线高度相同。
PCT/CN2020/114571 2020-05-21 2020-09-10 一种光模块 WO2021232624A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/481,798 US20220011510A1 (en) 2020-05-21 2021-09-22 Optical module

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010436947.2 2020-05-21
CN202010436947.2A CN113703099A (zh) 2020-05-21 2020-05-21 一种光模块

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US17/481,798 Continuation-In-Part US20220011510A1 (en) 2020-05-21 2021-09-22 Optical module

Publications (1)

Publication Number Publication Date
WO2021232624A1 true WO2021232624A1 (zh) 2021-11-25

Family

ID=78646104

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2020/114571 WO2021232624A1 (zh) 2020-05-21 2020-09-10 一种光模块

Country Status (3)

Country Link
US (1) US20220011510A1 (zh)
CN (1) CN113703099A (zh)
WO (1) WO2021232624A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114035287B (zh) * 2021-11-30 2023-07-18 青岛海信宽带多媒体技术有限公司 一种光模块

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4686492A (en) * 1985-03-04 1987-08-11 Tektronix, Inc. Impedance match connection using multiple layers of bond wires
JP2000252363A (ja) * 1999-03-01 2000-09-14 Kawasaki Steel Corp 半導体集積回路
US7675168B2 (en) * 2005-02-25 2010-03-09 Agere Systems Inc. Integrated circuit with staggered differential wire bond pairs
CN102804372A (zh) * 2009-12-22 2012-11-28 泰塞拉公司 具有降低电感的结合键合元件的微电子组件
CN106980158A (zh) * 2016-01-19 2017-07-25 青岛海信宽带多媒体技术有限公司 一种光模块

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108548102A (zh) * 2018-04-23 2018-09-18 青岛海信宽带多媒体技术有限公司 一种光模块

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4686492A (en) * 1985-03-04 1987-08-11 Tektronix, Inc. Impedance match connection using multiple layers of bond wires
JP2000252363A (ja) * 1999-03-01 2000-09-14 Kawasaki Steel Corp 半導体集積回路
US7675168B2 (en) * 2005-02-25 2010-03-09 Agere Systems Inc. Integrated circuit with staggered differential wire bond pairs
CN102804372A (zh) * 2009-12-22 2012-11-28 泰塞拉公司 具有降低电感的结合键合元件的微电子组件
CN106980158A (zh) * 2016-01-19 2017-07-25 青岛海信宽带多媒体技术有限公司 一种光模块

Also Published As

Publication number Publication date
US20220011510A1 (en) 2022-01-13
CN113703099A (zh) 2021-11-26

Similar Documents

Publication Publication Date Title
WO2021227317A1 (zh) 一种光模块
CN110780397B (zh) 一种光模块
WO2021227643A1 (zh) 一种光模块
CN111308620B (zh) 一种光模块
CN212647081U (zh) 一种光模块
WO2022083366A1 (zh) 一种光模块
CN213659029U (zh) 一种光模块
CN113325526A (zh) 一种光模块
WO2022016932A1 (zh) 一种光模块
CN114488439B (zh) 一种光模块
WO2021232624A1 (zh) 一种光模块
CN114488438A (zh) 一种光模块
WO2021114714A1 (zh) 一种光模块
CN218767433U (zh) 一种光模块
CN218350564U (zh) 一种光模块及交换机
CN218125029U (zh) 一种电路板与光模块
CN115220160B (zh) 一种光模块
CN217693343U (zh) 一种光模块
WO2021184844A1 (zh) 一种光模块
US20220337022A1 (en) Light Emission Assembly and an Optical Module
CN215186761U (zh) 一种光模块
CN113281859B (zh) 一种光模块
CN215181034U (zh) 一种光模块
CN114384648B (zh) 一种光模块
WO2022083339A1 (zh) 一种光模块

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 20936706

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 20936706

Country of ref document: EP

Kind code of ref document: A1