WO2011143919A1 - 发光二极管及其制造方法 - Google Patents

发光二极管及其制造方法 Download PDF

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Publication number
WO2011143919A1
WO2011143919A1 PCT/CN2010/080496 CN2010080496W WO2011143919A1 WO 2011143919 A1 WO2011143919 A1 WO 2011143919A1 CN 2010080496 W CN2010080496 W CN 2010080496W WO 2011143919 A1 WO2011143919 A1 WO 2011143919A1
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Prior art keywords
layer
substrate
emitting diode
light emitting
electrode
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PCT/CN2010/080496
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English (en)
French (fr)
Inventor
肖德元
张汝京
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映瑞光电科技(上海)有限公司
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Priority to US13/059,633 priority Critical patent/US20130207118A1/en
Priority to EP10809126.5A priority patent/EP2626916B1/en
Publication of WO2011143919A1 publication Critical patent/WO2011143919A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Definitions

  • the present invention relates to the field of semiconductor light-emitting, and in particular to a light-emitting diode and a method of fabricating the same.
  • LEDs Light Emitting Diodes
  • the III-V compound semiconductor represented by gallium nitride (GaN) has characteristics such as wide band gap, high luminous efficiency, high electron saturation drift speed, and stable chemical properties, and high-intensity blue light-emitting diodes, blue lasers, and the like.
  • GaN gallium nitride
  • the field of optoelectronic devices has great potential for application and has attracted widespread attention.
  • semiconductor light emitting diodes currently have a problem of low luminous efficiency.
  • the light-emitting efficiency is generally only a few percent.
  • a large amount of energy is concentrated inside the device and cannot be emitted, which causes energy waste and affects the service life of the device. Therefore, it is important to improve the light-emitting efficiency of semiconductor light-emitting diodes.
  • CN 1858918A discloses a full angle mirror structure GaN-based light emitting diode and a method of fabricating the same.
  • the light emitting diode includes: a substrate 1, a full-angle mirror 4 grown on the substrate 1, and a GaN LED chip 13 fabricated on the full-angle mirror 4.
  • the GaN LED chip 13 includes: a sapphire substrate 5, an N-type GaN layer 6, an active region quantum well layer 7, a P-type GaN layer 8, a P-type electrode 9, a P-type pad 10, an N-type electrode 11, N Type pad 12; wherein the full angle mirror 4 is grown on the substrate 1 which is stacked by the high refractive index layer 3 and the low refractive index layer 2, the high refractive index layer 3 and the sapphire substrate 5 Contact, low refractive index layer 2 is in contact with substrate 1, refractive index 1111 of high refractive index layer > refractive index nL of low refractive index layer > refractive index n of sapphire material, and satisfies -1 " ⁇ ⁇ ⁇ ! 1- 1 " ⁇ , where n, nH, nL are refractive indices.
  • the luminescence of the GaN material can be reflected upward at a high reflectance over the entire angular range to improve the light-emitting efficiency of the light-emitting diode.
  • the luminescence The diode manufacturing method requires forming a plurality of thin film structures formed by stacking a high refractive index layer and a low refractive index layer on a substrate, and the manufacturing process is very complicated, which is disadvantageous for popularization and application.
  • Another object of the present invention is to provide a method for fabricating a light emitting diode having a simple manufacturing process to improve the light extraction efficiency of the light emitting diode.
  • the present invention provides a light emitting diode, the light emitting diode comprising: a substrate; an epitaxial layer, an active layer and a cap layer sequentially disposed on the substrate; wherein the substrate is away from epitaxy
  • the surface of the layer has a plurality of bifocal microlens structures.
  • the substrate is a sapphire substrate, a silicon carbide substrate or a gallium nitride substrate.
  • the light emitting diode further includes a buffer layer between the substrate and the epitaxial layer.
  • the light emitting diode further includes a transparent conductive layer on the cap layer.
  • the light emitting diode further includes a first electrode, a second electrode, and an opening penetrating the transparent conductive layer, the cap layer and the active layer, wherein the first electrode is located on the transparent conductive layer, and is used for Connecting the transparent conductive layer and the power source positive electrode; the second electrode is located in the opening for connecting the epitaxial layer and the power source negative electrode.
  • the light emitting diode further includes a passivation layer on the transparent conductive layer.
  • the material of the epitaxial layer is N-type doped gallium nitride;
  • the active layer includes a multiple quantum well active layer, and the material of the multiple quantum well active layer is indium gallium nitride;
  • the material of the cap layer is P-type doped gallium nitride.
  • the present invention further provides a method for fabricating a light emitting diode, the method for manufacturing the light emitting diode comprising: providing a substrate; sequentially forming an epitaxial layer, an active layer and a cap layer on the substrate; and further comprising etching
  • the substrate is such that the substrate has a plurality of bifocal microlens structures on a surface remote from the epitaxial layer.
  • the step of etching the substrate comprises: forming a plurality of cylindrical photoresist pads on the surface of the substrate away from the epitaxial layer; baking the cylindrical photoresist pad Bake, the cylindrical photoresist stage is made into a spherical crown photoresist; and the spherical crown photoresist is used as a mask, and the first step is performed. And a second inductively coupled plasma etching process, wherein a coil power of the second inductively coupled plasma etching process is smaller than a coil power of the first inductively coupled plasma etching process.
  • the coil power in the first inductively coupled plasma etching process, is 300 W ⁇ 500 W; in the second inductively coupled plasma etching process, the coil power It is 270 W ⁇ 450W.
  • the etching gas is a mixed gas of boron trichloride, helium, and argon, and the cavity
  • the chamber pressure is 50mTorr ⁇ 2Torr, and the power of the bottom plate is 200W ⁇ 300W.
  • the cylindrical photoresist stage is baked in a temperature range of 120 ° C to 250 ° C to make the cylindrical photoresist stage into a spherical crown Photoresist.
  • the material of the epitaxial layer is N-type doped gallium nitride; the active layer includes a multiple quantum well active layer, and the multiple quantum well is active
  • the material of the layer is indium gallium nitride; the material of the cap layer is P-type doped gallium nitride.
  • the method further includes: growing a gallium nitride film on the substrate to form a buffer layer.
  • the method further includes: forming a transparent conductive layer on the cap layer.
  • the method further includes: forming a first electrode on the transparent conductive layer; forming through the transparent conductive layer, the cap layer, and An opening of the source layer; a second electrode is formed within the opening.
  • the method further includes: forming a passivation layer on the transparent conductive layer to cover the first electrode and the second electrode .
  • the substrate is further thinned prior to etching the substrate.
  • the present invention has the following advantages compared with the prior art:
  • the substrate of the light emitting diode has a plurality of bifocal microlens structures on a surface away from the epitaxial layer.
  • the incident angle is always less than the total reflection.
  • Critical angle so that total reflection does not occur, ensuring that most of the light is transmitted from the surface of the bifocal microlens structure Going, thereby improving the external quantum efficiency of the LED, improving the light-emitting efficiency of the LED, avoiding the increase of the internal temperature of the LED, and improving the performance of the LED.
  • FIG. 1 is a schematic view of a conventional light emitting diode
  • FIG. 2 is a schematic view of a light emitting diode according to an embodiment of the invention.
  • FIG. 3 is a schematic flow chart of a method for manufacturing a light emitting diode according to an embodiment of the invention.
  • 4A-4I are cross-sectional views showing a method of fabricating an LED according to an embodiment of the invention.
  • Figure 5 is a top plan view of a cylindrical photoresist stage in accordance with an embodiment of the present invention. detailed description
  • the core idea of the present invention is to provide a light emitting diode having a substrate having a plurality of bifocal microlens structures on a surface remote from the epitaxial layer, and light emitted from the active layer passes through the bifocal microlens When the surface of the structure emerges, the incident angle is always less than the critical angle of total reflection, so that total reflection does not occur, ensuring that most of the light can be transmitted from the surface of the bifocal microlens structure, thereby improving the external quantum efficiency of the LED. Avoid the rise of the internal temperature of the LED, which in turn improves the performance of the LED.
  • FIG. 2 is a schematic diagram of a light emitting diode according to an embodiment of the invention.
  • the light emitting diode is a light emitting diode based on sapphire, and the light emitting diode is a gallium nitride (GaN) based blue light diode.
  • the light emitting diode includes: a substrate 200, an epitaxial layer 220, an active layer 230, and a cap layer 240, which are sequentially disposed on the substrate 200, wherein the substrate 200 is away from the epitaxial layer 220.
  • the bifocal microlens structure 201 is composed of two parts, and the bottom portion (the portion directly connected to the surface of the substrate 200 away from the epitaxial layer 220) is a truncated cone-shaped structure having a large diameter, and the top is a diameter. Smaller truncated cone structure.
  • the bifocal microlens structure 201 can change the total reflection critical angle. When the light emitted from the active layer 230 is emitted through the surface of the bifocal microlens structure 201, the incident angle is always less than the total reflection threshold.
  • the substrate 200 is a sapphire substrate, however, it should be appreciated that the substrate 200 may also be a silicon carbide substrate or a gallium nitride substrate.
  • the light emitting diode further includes a buffer layer 210, and the buffer layer 210 is located between the substrate 200 and the epitaxial layer 220 (the bifocal microlens structure 201 is not in contact with the buffer layer 210).
  • the buffer layer 210 can further improve the problem of lattice constant mismatch between the substrate 200 and the gallium nitride material, which is generally a gallium nitride film grown under low temperature conditions.
  • the epitaxial layer 220, the active layer 230, and the cap layer 240 are sequentially disposed on the substrate 200 or the buffer layer 210, and the epitaxial layer 220, the active layer 230, and the cap layer 240 constitute a die of a light emitting diode;
  • the material of the epitaxial layer 220 is N-type doped gallium nitride (n-GaN);
  • the active layer 230 includes a multiple quantum well active layer, and the material of the multiple quantum well active layer is indium gallium nitride (InGaN) for emitting blue light having a wavelength of 470 nm;
  • the material of the cap layer 240 is P-type doped gallium nitride (p-GaN).
  • the N-type doped gallium nitride is driven by an external voltage to cause electrons to drift
  • the P-type doped gallium nitride is driven by an external voltage to cause holes to drift.
  • the holes and electrons recombine with each other in a multiple quantum well active layer (also referred to as an active layer) to reflect light.
  • the light emitting diode further includes a transparent conductive layer (TCL) 250, and the transparent conductive layer 250 is located on the cap layer 240. Since the conductivity of the P-doped gallium nitride is relatively small, a metal current diffusion layer, that is, the transparent conductive layer 250, is deposited on the surface of the cap layer 240 to help improve the electrical conductivity.
  • the material of 250 is, for example, a nickel gold material (M/Au).
  • the light emitting diode further includes a first electrode 260, a second electrode 270, and a transparent conductive layer 250 and a cap layer. And an opening of the active layer 230, wherein the first electrode 260 is located on the transparent conductive layer 250 for connecting the transparent conductive layer 250 and the power source positive electrode; the second electrode 270 is located in the opening, The epitaxial layer 220 and the negative electrode of the power source are connected.
  • the first electrode 260 is connected to the positive electrode of the power source
  • the second electrode 270 is connected to the negative electrode of the power source
  • the light emitting diode die is connected to the positive electrode of the power source through the first electrode 260, and the second electrode is connected.
  • the pole 270 is connected to the negative pole of the power source
  • the active layer 230 in the LED die emits light under the action of a current
  • the double focal length ⁇ lens structure 201 ensures that most of the light can be transmitted from the surface of the double focal length ⁇ lens structure 201, thereby The external quantum efficiency of the LED is improved, and the internal temperature of the LED is prevented from rising, thereby improving the performance of the LED.
  • the light emitting diode further includes a passivation layer 280 on the transparent conductive layer 250.
  • the passivation layer 280 covers the first electrode 260, the second electrode 270, and the transparent conductive layer 250, and is filled into In the opening, the passivation layer 280 is used to protect the die of the LED from damage.
  • the present invention further provides a method for manufacturing a light emitting diode.
  • FIG. 3 is a schematic flowchart of a method for manufacturing a light emitting diode according to an embodiment of the present invention.
  • the method for manufacturing the LED includes the following steps:
  • etching the substrate such that the substrate has a plurality of bifocal microlens structures on a surface remote from the epitaxial layer.
  • a substrate 400 is provided, which is a sapphire substrate formed of ⁇ 1 2 ⁇ 3 .
  • the substrate 400 is used to form a gallium nitride-based blue LED.
  • a buffer layer 410 is formed on the substrate 400, and the buffer layer 410 is generally used at a low temperature.
  • an epitaxial layer 420, an active layer 430, and a cap layer 440 are sequentially formed on the buffer layer 410.
  • the epitaxial layer 420, the active layer 430, and the cap layer 440 constitute a tube of a light emitting diode. core.
  • the material of the epitaxial layer 420 is N-type doped gallium nitride;
  • the active layer 430 includes a multiple quantum well active layer, and the material of the multiple quantum well active layer is indium gallium nitride;
  • the material of layer 440 is P-type doped gallium nitride.
  • a transparent conductive layer 450 is formed on the cap layer 440, and the transparent conductive layer 450
  • the material of the transparent conductive layer 450 can be made of a Ni/Au material.
  • the buffer layer 410, the epitaxial layer 420, the active layer 430, and the cap layer 440 may be formed using a conventional metal organic chemical vapor deposition (MOCVD) process, and the transparent conductive layer 450 may be formed using a physical vapor deposition (PVD) process.
  • MOCVD metal organic chemical vapor deposition
  • PVD physical vapor deposition
  • a first electrode 460 is formed on the transparent conductive layer 450 for connecting the transparent conductive layer 450 and the positive electrode of the power source; and is formed through the transparent conductive layer 450 by photolithography and etching. Opening the cap layer 440 and the active layer 430, and forming a second electrode 470 in the opening for connecting the epitaxial layer 420 and the power source negative electrode, preferably, the upper surfaces of the first electrode 460 and the second electrode 470 Located on the same level.
  • the depth of the opening may also extend to the epitaxial layer, i.e., the opening may also extend through a portion of the thickness of the epitaxial layer 420.
  • a passivation layer 480 is formed on the transparent conductive layer 450, and the passivation layer 480 covers the first electrode 460, the second electrode 470, and the transparent conductive layer 450, and is filled into the opening.
  • the passivation layer 480 is used to protect the die of the light emitting diode from damage.
  • the substrate 400 is then thinned.
  • the substrate 400 can be thinned by backside grinding or laser liftoff processing (LTO).
  • LTO laser liftoff processing
  • the thickness of the substrate 400 can be reduced to 10 to 100 ⁇ m.
  • the thinned substrate 400 is turned over, so that one side of the substrate 400 away from the epitaxial layer 420 (ie, the side not in contact with the buffer layer 410) faces upward, and then passes through the glue. And exposing and developing processes, a plurality of cylindrical photoresist stages 490 arranged in an array are formed on the substrate 400. As shown in Fig. 5, the cylindrical photoresist stage 490 means that the photoresist stage has a circular shape in plan view (parallel to the surface direction of the substrate 400).
  • the cylindrical photoresist 490 has a thickness hi of 0.1 ⁇ m to 5 ⁇ m, a diameter D of ⁇ 1010 ⁇ m, and a pitch of adjacent photoresist pads of 0.1 ⁇ m to 1 ⁇ m. It will be appreciated that those skilled in the art will be able to adjust the size of the cylindrical photoresist stage in accordance with the size of the bifocal microlens structure to be obtained.
  • the cylindrical photoresist stage 490 is subsequently baked to make the cylindrical photoresist stage 490 a spherical crown photoresist 491.
  • the cylindrical photoresist stage 490 is baked at a temperature ranging from 120 ° C to 250 ° C.
  • the cylindrical photoresist stage 490 is higher than the glass softening temperature of the photoresist.
  • the spherical crown photoresist 491 is formed by the action of the surface tension.
  • the cylindrical photoresist stage 490 can also be baked at other temperatures.
  • the two-step inductive coupling is performed by using the spherical crown photoresist 491 as a mask.
  • An Inductive Coupled Plasma (ICP) etching process until the spherical cap photoresist 491 is completely etched away, a plurality of bifocal microlenses can be formed on the surface of the substrate 400 near the epitaxial layer 420. Structure 401.
  • ICP Inductive Coupled Plasma
  • the first inductively coupled plasma etching process and the second inductively coupled plasma etching process are sequentially performed, wherein the coil power of the second inductively coupled plasma etching process (coil power)
  • the coil power is smaller than the first inductively coupled plasma etching process to form a bifocal microlens structure having a smaller top diameter and a larger bottom diameter.
  • the height h2 of the bifocal microlens structure 401 is, for example, 3 ⁇ to 5 ⁇ . Of course, the height of the bifocal microlens structure 401 can also be adjusted according to the requirements of the device.
  • the etching gas used may be boron trichloride (BC1 3 ), ⁇ a mixed gas of gas (He) and argon (Ar), wherein the flow rate of boron trichloride is, for example, 20 to 1000 sccm, the flow rate of helium gas is, for example, 20 to 500 sccm, and the flow rate of argon gas is, for example, 20 to 500 sccm;
  • the pressure is 50mTorr ⁇ 2Torr, the plate power is 200W ⁇ 300W, and the coil power is 300W ⁇ 500W.
  • the remaining spherical cap photoresist 491 is etched, the etching gas is the same as the first inductively coupled plasma etching process, and the chamber pressure is maintained.
  • the power of the backplane remains unchanged, and only the coil power is changed, so that the coil power of the second inductively coupled plasma etching process is smaller than that of the first inductively coupled plasma etching process, for example, 270W ⁇ 450W.
  • the top diameter and the bottom diameter of the bifocal microlens structure can be changed by adjusting the coil power of the two inductively coupled plasma etching processes; the bifocal microlens can be adjusted by controlling the reaction time of the two inductively coupled plasma etching processes.
  • the passivation layer 480 may be etched back by a conventional etching process to remove a portion of the passivation layer and utilize A conventional dicing and bumping packaging process encapsulates the light emitting diode, ie An LED package can be formed.
  • the present invention is not related to improvements in the packaging process and will not be described in detail herein, but will be known to those skilled in the art.
  • the above embodiment is exemplified by a blue light emitting diode, but the present invention is not limited thereto.
  • the above embodiment may also be a red light emitting diode or a yellow light emitting diode.
  • Those skilled in the art may The invention is modified, replaced and modified.
  • the present invention provides a light emitting diode having a plurality of bifocal microlens structures on a surface remote from the epitaxial layer, and a method of fabricating the same, wherein the double focal length microlens structure can be changed.
  • the incident angle is always less than the critical angle of total reflection, so that total reflection does not occur, ensuring that most of the light can be
  • the surface of the bifocal microlens structure is transmitted, thereby improving the external quantum efficiency of the LED, improving the light extraction efficiency of the LED, and avoiding the increase of the internal temperature of the LED, thereby improving the performance of the LED;
  • the light-emitting diode manufacturing method of the invention has a simple process and a low manufacturing cost.

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Description

技术领域
本发明涉及半导体发光领域， 特别是涉及一种发光二极管及其制造方法。
背景技术
发光二极管 （LED, Light Emitting Diode ) 由于具有寿命长、 耗能低等优点， 应用于各种领域， 尤其随着其照明性能指标日益大幅提高， LED在照明领域常用作 发光装置。其中， 以氮化镓（GaN )为代表的 III-V族化合物半导体由于具有带隙宽、 发光效率高、 电子饱和漂移速度高、 化学性质稳定等特点， 在高亮度蓝光发光二极 管、 蓝光激光器等光电子器件领域有着巨大的应用潜力， 引起了人们的广泛关注。
然而， 目前半导体发光二极管存在着发光效率低的问题。 对于普通的未经封装 的发光二极管， 其出光效率一般只有百分之几， 大量的能量聚集在器件内部不能出 射， 既造成能量浪费， 又影响器件的使用寿命。 因此， 提高半导体发光二极管的出 光效率至关重要。
基于上述的应用需求， 许多种提高发光二极管出光效率的方法被应用到器件结 构中， 例如表面粗糙化法， 金属反射镜结构等。
CN 1858918A公开了一种全角度反射镜结构 GaN基发光二极管及其制作方法。 参考图 1 , 所述发光二极管包括： 衬底 1、 生长在衬底 1上的全角度反射镜 4、 以及 制作在全角度反射镜 4上的 GaN LED芯片 13。 所述 GaN LED芯片 13包括： 蓝宝 石衬底 5、 N型 GaN层 6、 有源区量子阱层 7、 P型 GaN层 8、 P型电极 9、 P型焊 盘 10、 N型电极 11、 N型焊盘 12; 其中， 所述全角度反射镜 4生长在衬底 1上， 其是由高折射率层 3和低折射率层 2堆叠排列成的， 高折射率层 3与蓝宝石衬底 5 接触， 低折射率层 2和衬底 1接触， 高折射率层的折射率 1111 >低折射率层的折射率 nL>蓝宝石材料的折射率 n, 且满足 -1 "^ < ^!1-1 "^ , 其中， n、 nH、 nL为折射率。
nH nH
该专利通过在发光二极管下表面形成全角度反射镜结构，可以将 GaN材料所发光在 全角度范围内以高反射率向上反射， 来提高发光二极管的出光效率。 然而， 该发光 二极管制造方法需要在衬底上形成多层由高折射率层与低折射率层堆叠而成的薄 膜结构， 制作工艺非常复杂， 不利于推广应用。
发明内容
本发明的目的在于提供一种发光二极管， 以解决现有的发光二极管出光效率低 的问题。
本发明的另一目的在于提供一种制作工艺简单的发光二极管制造方法， 以提高 发光二极管的出光效率。
为解决上述技术问题， 本发明提供一种发光二极管， 所述发光二极管包括： 衬 底； 依次位于所述衬底上的外延层、 有源层和帽层； 其中， 所述衬底在远离外延层 的表面上具有多个双焦距微透镜结构。
进一步的， 所述衬底为蓝宝石衬底、 碳化硅衬底或氮化镓衬底。
进一步的， 所述发光二极管还包括位于衬底和外延层之间的緩冲层。
进一步的， 所述发光二极管还包括位于所述帽层上的透明导电层。
进一步的，所述发光二极管还包括第一电极、第二电极和贯穿所述透明导电层、 帽层和有源层的开口， 其中， 所述第一电极位于所述透明导电层上， 用于连接透明 导电层和电源正极； 所述第二电极位于所述开口内， 用于连接外延层和电源负极。
进一步的， 所述发光二极管还包括位于所述透明导电层上的钝化层。
进一步的， 所述外延层的材料为 N型掺杂的氮化镓； 所述有源层包括多量子阱 有源层， 所述多量子阱有源层的材料为铟氮化镓； 所述帽层的材料为 P型掺杂的氮 化镓。
相应的， 本发明还提供一种发光二极管的制造方法， 所述发光二极管的制造方 法包括： 提供衬底； 在所述衬底上依次形成外延层、 有源层和帽层； 还包括刻蚀所 述衬底， 以使所述衬底在远离外延层的表面上具有多个双焦距微透镜结构。
进一步的， 在所述的发光二极管的制造方法中， 刻蚀衬底的步骤包括： 在衬底 远离外延层的表面上形成多个圓柱形光刻胶台； 对圓柱形光刻胶台进行烘烤， 使所 述圓柱形光刻胶台成为球冠状光刻胶； 以所述球冠状光刻胶为掩膜， 依次执行第一 次和第二次感应耦合等离子体刻蚀工艺， 其中， 所述第二次感应耦合等离子体刻蚀 工艺的线圈功率小于第一次感应耦合等离子体刻蚀工艺的线圈功率。
进一步的， 在所述的发光二极管的制造方法中， 在第一次感应耦合等离子体刻 蚀工艺中， 线圈功率为 300 W~500W; 在第二次感应耦合等离子体刻蚀工艺中， 线 圈功率为 270 W~450W。
进一步的， 在所述的发光二极管的制造方法中， 在第一次和第二次感应耦合等 离子体刻蚀工艺中， 刻蚀气体为三氯化硼、 氦气和氩气的混合气体， 腔室压力为 50mTorr~2Torr, 底板功率为 200W~300W。
进一步的， 在所述的发光二极管的制造方法中， 在温度为 120°C~250°C的范围 内， 对圓柱形光刻胶台进行烘烤， 以使圓柱形光刻胶台成为球冠状光刻胶。
进一步的， 在所述的发光二极管的制造方法中， 所述外延层的材料为 N型掺杂 的氮化镓； 所述有源层包括多量子阱有源层， 所述多量子阱有源层的材料为铟氮化 镓； 所述帽层的材料为 P型掺杂的氮化镓。
进一步的， 在所述的发光二极管的制造方法中， 在形成所述外延层之前， 还包 括： 在所述衬底上生长氮化镓薄膜以形成緩冲层。
进一步的，在所述的发光二极管的制造方法中，在形成所述帽层之后，还包括： 在所述帽层上形成透明导电层。
进一步的， 在所述的发光二极管的制造方法中， 在形成所述透明导电层之后， 还包括： 在所述透明导电层上形成第一电极； 形成贯穿所述透明导电层、 帽层和有 源层的开口； 在所述开口内形成第二电极。
进一步的， 在所述的发光二极管的制造方法中， 在所述开口内形成第二电极之 后， 还包括： 在所述透明导电层上形成钝化层以覆盖所述第一电极和第二电极。
进一步的， 在所述的发光二极管的制造方法中， 在刻蚀所述衬底之前还包括减 薄所述衬底。
由于釆用了以上技术方案， 与现有技术相比， 本发明具有以下优点：
所述发光二极管的衬底在远离外延层的表面上具有多个双焦距微透镜结构， 自 有源层发出的光经所述双焦距微透镜结构表面出射时， 其入射角总是小于全反射临 界角， 从而不会发生全反射， 确保大部分的光可从该双焦距微透镜结构表面透射出 去， 从而提高了发光二极管的外量子效率， 提高了发光二极管的出光效率， 避免发 光二极管内部温度的升高， 提高了发光二极管的性能。 附图说明
图 1为现有的发光二极管的示意图；
图 2为本发明一实施例的发光二极管的示意图；
图 3为本发明一实施例的发光二极管制造方法的流程示意图；
图 4A~4I为本发明一实施例的发光二极管制造方法的剖面示意图；
图 5为本发明一实施例的圓柱形光刻胶台的俯视图。 具体实施方式
为使本发明的上述目的、 特征和优点能够更加明显易懂， 下面结合附图对本发 明的具体实施方式做详细的说明。
本发明的核心思想在于， 提供一种发光二极管， 所述发光二极管的衬底在远离 外延层的表面上具有多个双焦距微透镜结构， 自有源层发出的光经所述双焦距微透 镜结构表面出射时， 其入射角总是小于全反射临界角， 从而不会发生全反射， 确保 大部分的光可从该双焦距微透镜结构表面透射出去， 从而提高了发光二极管的外量 子效率， 避免发光二极管内部温度的升高， 进而提高了发光二极管的性能。
请参考图 2, 其为本发明一实施例的发光二极管的示意图。 所述发光二极管为 以蓝宝石 （sapphire )为衬底的发光二极管， 所述发光二极管为氮化镓（ GaN )基的 蓝光二极管。 如图 2所示， 所述发光二极管包括： 衬底 200, 依次位于所述衬底 200 上的外延层 220、 有源层 230、 帽层 240, 其中， 所述衬底 200在远离外延层 220的 表面上具有多个双焦距微透镜结构 201。
在本实施例中，所述双焦距微透镜结构 201是由两部分组成，底部（与衬底 200 远离外延层 220的表面直接相连的部分）为直径较大的圓台状结构， 顶部为直径较 小的圓台状结构。所述双焦距微透镜结构 201可以改变全反射临界角， 自有源层 230 发出的光经所述双焦距微透镜结构 201表面出射时， 其入射角总是小于全反射临界 角， 从而不会发生全反射， 确保大部分的光可从该双焦距微透镜结构 201表面透射 出去， 提高了发光二极管的外量子效率， 并可避免发光二极管内部温度的升高， 进 而提高了发光二极管的性能。
在本实施例中， 所述衬底 200为蓝宝石衬底， 然而应当认识到， 所述衬底 200 还可以是碳化硅衬底或氮化镓衬底。
进一步的， 所述发光二极管还包括緩冲层 210, 所述緩冲层 210位于所述衬底 200和外延层 220之间（双焦距微透镜结构 201不与緩冲层 210相接触）， 所述緩冲 层 210可进一步改善衬底 200与氮化镓材料之间的晶格常数失配的问题， 所述緩冲 层 210—般釆用低温条件下生长的氮化镓薄膜。
所述外延层 220、 有源层 230和帽层 240依次位于所述衬底 200或緩冲层 210 上， 所述外延层 220、 有源层 230和帽层 240构成发光二极管的管芯； 其中， 外延 层 220的材料为 N型掺杂的氮化镓（ n-GaN );所述有源层 230包括多量子阱有源层， 所述多量子阱有源层的材料为铟氮化镓（ InGaN ), 用于发出波长为 470nm的蓝光； 所述帽层 240的材料为 P型掺杂的氮化镓（p-GaN )。 由于所述外延层 220与帽层 240的掺杂类型相反， N型掺杂的氮化镓通过外部电压驱动使电子漂移， P型掺杂 的氮化镓通过外部电压驱动使空穴漂移， 所述空穴和电子在多量子阱有源层（也称 为活性层） 中相互重新结合， 从而反射光。
进一步的， 所述发光二极管还包括透明导电层 （TCL ) 250, 所述透明导电层 250位于帽层 240上。 由于 P型掺杂的氮化镓的电导率比较小， 因此在帽层 240表 面沉积一层金属的电流扩散层， 即所述透明导电层 250, 有助于提高电导率， 所述 透明导电层 250的材料例如是镍金材料（M/Au )。
此外， 由于衬底 200不导电， 为了将发光二极管的管芯连接到电源正负极， 所 述发光二极管还包括第一电极 260、 第二电极 270、 以及贯穿所述透明导电层 250、 帽层 240和有源层 230的开口， 其中， 所述第一电极 260位于所述透明导电层 250 上， 用于连接透明导电层 250和电源正极； 所述第二电极 270位于所述开口内， 用 于连接外延层 220和电源负极。
所述发光二极管用于发光时， 将第一电极 260连接至电源正极、 第二电极 270 连接至电源负极， 发光二极管管芯通过第一电极 260与电源正极相连， 通过第二电 极 270与电源负极相连， 发光二极管管芯中的有源层 230在电流作用下发光， 所述 双焦距敫透镜结构 201 确保大部分的光可从该双焦距敫透镜结构 201 表面透射出 去， 从而提高了发光二极管的外量子效率， 并避免发光二极管内部温度的升高， 进 而提高了发光二极管的性能。
进一步的， 所述发光二极管还包括位于所述透明导电层 250上的钝化层 280, 所述钝化层 280覆盖所述第一电极 260、 第二电极 270、 透明导电层 250, 并填充到 所述开口内， 所述钝化层 280用于保护发光二极管的管芯不受损伤。
相应的， 本发明还提供一种发光二极管的制造方法， 具体请参考图 3 , 其为本 发明一实施例的发光二极管制造方法的流程示意图， 所述发光二极管的制造方法包 括以下步骤：
530, 提供衬底；
531 , 在所述衬底上依次形成外延层、 有源层和帽层；
532, 刻蚀所述衬底， 以使所述衬底在远离外延层的表面上具有多个双焦距微 透镜结构。
下面将结合剖面示意图对本发明的发光二极管的制造方法进行更详细的描述， 其中表示了本发明的优选实施例， 应该理解本领域技术人员可以修改在此描述的本 发明， 而仍然实现本发明的有利效果。 因此， 下列描述应当被理解为对于本领域技 术人员的广泛知道， 而并不作为对本发明的限制。
参考图 4A, 首先，提供衬底 400, 所述衬底 400是由 Α12Ο3形成的蓝宝石衬底， 在本实施例中 , 所述衬底 400用以形成氮化镓基的蓝光二极管。
参考图 4B, 为了改善衬底 400与氮化镓材料之间的晶格常数失配的问题，接下 来， 在衬底 400上形成緩冲层 410, 所述緩冲层 410—般釆用低温条件下生长的氮 化镓薄膜。
在形成緩冲层 410之后，在所述緩冲层 410上依次形成外延层 420、有源层 430、 帽层 440, 所述外延层 420、 有源层 430和帽层 440构成发光二极管的管芯。 所述 外延层 420的材料为 N型掺杂的氮化镓； 所述有源层 430包括多量子阱有源层， 所 述多量子阱有源层的材料为铟氮化镓； 所述帽层 440的材料为 P型掺杂的氮化镓。
在形成帽层 440之后，在帽层 440上形成透明导电层 450,所述透明导电层 450 有助于提高电导率， 所述透明导电层 450的材料可釆用 Ni/Au材料。 可利用常规的 金属有机化学气相沉积（MOCVD ) 工艺形成緩冲层 410、 外延层 420、 有源层 430 和帽层 440, 可利用物理气相沉积（PVD ) 工艺形成透明导电层 450。
参考图 4C, 随后， 在所述透明导电层 450上形成第一电极 460, 用于连接透明 导电层 450和电源正极； 并利用光刻和刻蚀的方法， 形成贯穿所述透明导电层 450、 帽层 440和有源层 430的开口， 再在所述开口内形成第二电极 470, 用于连接外延 层 420和电源负极， 优选的， 所述第一电极 460和第二电极 470的上表面位于同一 水平面上。 当然， 在本发明其它实施例中， 所述开口的深度也可延伸至外延层， 即 所述开口也可贯穿部分厚度的外延层 420。
参考图 4D, 接着， 在所述透明导电层 450上形成钝化层 480, 所述钝化层 480 覆盖所述第一电极 460、 第二电极 470、 透明导电层 450, 并填充至开口内， 所述钝 化层 480用于保护所述发光二极管的管芯不受损害。
参考图 4E, 然后， 减薄所述衬底 400。 可利用背面减薄（backside grinding )或 激光剥离 （ laser liftoff processing, LTO ) 的方式减薄衬底 400。 在本实施例中， 可 将衬底 400的厚度减薄至 10~100μηι。
参考图 4F, 接下来， 将减薄后的衬底 400翻转过来， 使所述衬底 400远离外延 层 420的一面 （即未与緩冲层 410相接触的一面）朝上， 再通过涂胶、 曝光和显影 工艺， 在衬底 400上形成以阵列形式排布的多个圓柱形光刻胶台 490。 结合图 5所 示， 圓柱形光刻胶台 490是指光刻胶台的俯视（平行于衬底 400表面方向）形状为 圓形。 可选的， 所述圓柱形光刻胶台 490的厚度 hi是 0.1μηι ~5μηι, 直径 D是 Ιμηι ~10μηι, 相邻光刻胶台的间距是 0.1μηι ~1μηι。 可以理解的是， 本领域技术人员可根 据实际要获得的双焦距微透镜结构的尺寸相应的调整圓柱形光刻胶台的尺寸。
参考图 4G, 随后， 对所述圓柱形光刻胶台 490进行烘烤， 使所述圓柱形光刻 胶台 490成为球冠状光刻胶 491。 在本实施例中， 在温度为 120°C~250°C的范围内， 对圓柱形光刻胶台 490进行烘烤， 所述圓柱形光刻胶台 490在高于光刻胶的玻璃软 化温度下， 由于表面张力的作用成为球冠状光刻胶 491。 当然， 在本发明其它实施 例中， 也可在其它温度下烘烤圓柱形光刻胶台 490。
参考图 4H, 其后， 以所述球冠状光刻胶 491 为掩膜， 执行两步感应耦合等离 子体（ Inductive Coupled Plasma, ICP )刻蚀工艺， 直至所述球冠状光刻胶 491被完 全刻蚀掉， 即可在所述衬底 400靠近外延层 420的表面上形成多个双焦距微透镜结 构 401。
在本实施例中， 依次执行第一次感应耦合等离子体刻蚀工艺和第二次感应耦合 等离子体刻蚀工艺， 其中， 所述第二次感应耦合等离子体刻蚀工艺的线圈功率（coil power ) 小于第一次感应耦合等离子体刻蚀工艺的线圈功率， 以形成顶部直径较小、 底部直径较大的双焦距微透镜结构。 其中， 所述双焦距微透镜结构 401 的高度 h2 例如是 3μηι ~5μηι, 当然， 所述双焦距微透镜结构 401的高度还可根据器件的要求 做相应的调整。
可选的， 在第一次感应耦合等离子体刻蚀工艺中， 首先刻蚀掉部分所述球冠状 光刻胶 491 , 所釆用的刻蚀气体可以是三氯化硼 （BC13 )、 氦气（He )和氩气（Ar ) 的混合气体， 其中， 三氯化硼的流量例如是 20~1000sccm , 氦气的流量例如是 20~500sccm, 氩气的流量例如是 20~500sccm; 腔室压力为 50mTorr~2Torr, 底板功 率 （plate power ) 为 200W~300W, 线圈功率为 300W~500W。
可选的， 在第二次感应耦合等离子体刻蚀工艺中， 刻蚀掉剩余的球冠状光刻胶 491 , 刻蚀气体与第一次感应耦合等离子体刻蚀工艺相同， 且保持腔室压力不变， 同时， 底板功率也保持不变， 只需改变线圈功率， 使第二次感应耦合等离子体刻蚀 工艺的线圈功率小于第一次感应耦合等离子体刻蚀工艺的线圈功率， 例如 270W~450W。
通过调整两次感应耦合等离子体刻蚀工艺的线圈功率， 可以改变双焦距微透镜 结构的顶部直径和底部直径； 通过控制两次感应耦合等离子体刻蚀工艺的反应时 间， 可以调整双焦距微透镜结构 401中两部分（顶部、 底部） 的高度。
当然， 上述描述并不用于限定本发明， 本领域技术人员可根据刻蚀机台的实际 情况， 相应的调整刻蚀气体以及各项工艺参数， 并相应的调整刻蚀选择比， 以达到 在衬底上形成双焦距微透镜结构的目的。
参考图 41, 刻蚀所述衬底形成双焦距微透镜结构 401之后， 还可利用传统的刻 蚀工艺来回刻蚀 （etch back )钝化层 480, 以去除部分厚度的钝化层， 并利用传统 的切割 （dicing )及封装（ bumping packaging )工艺对所述发光二极管进行封装， 即 可形成 LED封装件。 本发明并不涉及封装工艺的改进， 在此不予详细描述， 但是本 领域技术人员应是知晓的。
需要说明的是，上述实施例以蓝色发光二极管为例，但是本发明并不限制于此， 上述实施例还可以是红色发光二极管、 黄色发光二极管， 本领域技术人员可以根据 上述实施例， 对本发明进行修改、 替换和变形。
综上所述， 本发明提供了一种发光二极管及其制造方法， 所述发光二极管的衬 底在远离外延层的表面上具有多个双焦距微透镜结构， 所双焦距微透镜结构可以改 变全反射临界角， 因此， 自有源层发出的光经所述双焦距微透镜结构表面出射时， 其入射角总是小于全反射临界角， 从而不会发生全反射， 确保大部分的光可从该双 焦距微透镜结构表面透射出去， 从而提高了发光二极管的外量子效率， 提高了发光 二极管的出光效率， 避免发光二极管内部温度的升高， 进而提高了发光二极管的性 能； 此外， 与现有技术相比， 本发明的发光二极管制造方法工艺简单， 制作成本较 低。
显然， 本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的 精神和范围。 这样， 倘若本发明的这些修改和变型属于本发明权利要求及其等同技 术的范围之内， 则本发明也意图包含这些改动和变型在内。

Claims

权利要求
1、 一种发光二极管， 包括：
衬底；
依次位于所述衬底上的外延层、 有源层和帽层；
其中， 所述衬底在远离外延层的表面上具有多个双焦距微透镜结构。
2、 如权利要求 1所述的发光二极管， 其特征在于， 所述衬底为蓝宝石衬底、 碳 化硅衬底或氮化镓衬底。
3、 如权利要求 1所述的发光二极管， 其特征在于， 所述发光二极管还包括位于 所述衬底和外延层之间的緩冲层， 所述緩冲层的材料为氮化镓。
4、 如权利要求 1所述的发光二极管， 其特征在于， 所述发光二极管还包括位于 所述帽层上的透明导电层。
5、 如权利要求 4所述的发光二极管， 其特征在于， 所述发光二极管还包括第一 电极、 第二电极和贯穿所述透明导电层、 帽层和有源层的开口， 其中，
所述第一电极位于所述透明导电层上， 用于连接透明导电层和一电源正极； 所述第二电极位于所述开口内， 用于连接外延层和一电源负极。
6、 如权利要求 5所述的发光二极管， 其特征在于， 所述发光二极管还包括位于 所述透明导电层上的钝化层， 所述钝化层覆盖所述第一电极和第二电极。
7、 如权利要求 1所述的发光二极管， 其特征在于， 所述外延层的材料为 N型 掺杂的氮化镓； 所述有源层包括多量子阱有源层， 所述多量子阱有源层的材料为铟 氮化镓； 所述帽层的材料为 P型掺杂的氮化镓。
8、 一种如权利要求 1所述的发光二极管的制造方法， 包括：
提供衬底；
在所述衬底上依次形成外延层、 有源层和帽层；
其特征在于， 还包括刻蚀所述衬底， 以使所述衬底在远离外延层的表面上具有 多个双焦距微透镜结构。
9、 如权利要求 8所述的制造方法， 其特征在于， 刻蚀衬底的步骤包括： 在衬底远离外延层的表面上形成多个圓柱形光刻胶台； 对圓柱形光刻胶台进行烘烤， 使所述圓柱形光刻胶台成为球冠状光刻胶； 以所述球冠状光刻胶为掩膜， 依次执行第一次和第二次感应耦合等离子体刻蚀 工艺， 其中， 所述第二次感应耦合等离子体刻蚀工艺的线圈功率小于第一次感应耦 合等离子体刻蚀工艺的线圈功率。
10、 如权利要求 9所述的制造方法， 其特征在于， 在第一次感应耦合等离子体 刻蚀工艺中， 线圈功率为 300 W~500W; 在第二次感应耦合等离子体刻蚀工艺中， 线圈功率为 270 W~450W。
11、 如权利要求 10所述的制造方法， 其特征在于， 在第一次和第二次感应耦合 等离子体刻蚀工艺中， 刻蚀气体为三氯化硼、 氦气和氩气的混合气体， 腔室压力为 50mTorr~2Torr, 底板功率为 200W~300W。
12、 如权利要求 9所述的制造方法， 其特征在于， 在温度为 120°C~250°C的范 围内， 对圓柱形光刻胶台进行烘烤， 以使圓柱形光刻胶台成为球冠状光刻胶。
13、 如权利要求 8~12中任一项所述的制造方法， 其特征在于， 所述外延层的材 料为 N型掺杂的氮化镓； 所述有源层包括多量子阱有源层， 所述多量子阱有源层的 材料为铟氮化镓； 所述帽层的材料为 P型掺杂的氮化镓。
14、 如权利要求 8~12中任一项所述的制造方法， 其特征在于， 在形成所述外延 层之前， 还包括： 在所述衬底上生长氮化镓薄膜以形成緩冲层。
15、 如权利要求 8~12中任一项所述的制造方法， 其特征在于， 在形成所述帽层 之后， 还包括： 在所述帽层上形成透明导电层。
16、 如权利要求 15 所述的制造方法， 其特征在于， 在形成所述透明导电层之 后， 还包括：
在所述透明导电层上形成第一电极；
形成贯穿所述透明导电层、 帽层和有源层的开口；
在所述开口内形成第二电极。
17、 如权利要求 16 所述的制造方法， 其特征在于， 在所述开口内形成第二电 极之后， 还包括：
在所述透明导电层上形成钝化层， 以覆盖所述第一电极和第二电极。
18、 如权利要求 8~12 中任一项所述的制造方法， 其特征在于， 在刻烛所述衬 底之前还包括：
减薄所述衬底。
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