WO2009113602A1 - Procédé de fabrication d'un substrat de résine et substrat de résine - Google Patents

Procédé de fabrication d'un substrat de résine et substrat de résine Download PDF

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Publication number
WO2009113602A1
WO2009113602A1 PCT/JP2009/054715 JP2009054715W WO2009113602A1 WO 2009113602 A1 WO2009113602 A1 WO 2009113602A1 JP 2009054715 W JP2009054715 W JP 2009054715W WO 2009113602 A1 WO2009113602 A1 WO 2009113602A1
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WO
WIPO (PCT)
Prior art keywords
resin layer
resin
layer
conductive paste
substrate
Prior art date
Application number
PCT/JP2009/054715
Other languages
English (en)
Japanese (ja)
Inventor
祐樹 山本
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2009113602A1 publication Critical patent/WO2009113602A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/063—Lamination of preperforated insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Definitions

  • the present invention relates to a method for producing a resin substrate and a resin having at least one resin layer and electrically connecting wiring patterns formed on upper and lower surfaces by a conductive paste filled in a through-hole formed in the resin layer Regarding the substrate.
  • this type of resin substrate is formed as follows.
  • components such as a semiconductor 601 and a chip component 604 are mounted on a wired transfer plate or a multilayer structure substrate (multilayer printed wiring board, etc.) 600.
  • a core layer 605 having a built-in component is formed by being embedded in a sheet-like material 602 made of a mixture of an inorganic filler and an uncured thermosetting resin.
  • Reference numeral 603 denotes an interlayer connection conductor formed by filling a through hole with a conductive paste.
  • a wiring layer 606 is formed.
  • the upper and lower wiring pattern layers are formed with a laser or the like on a sheet-like material composed of a mixture of an inorganic filler and an uncured thermosetting resin or an organic film having adhesive layers formed on both surfaces.
  • a through-hole for conducting is formed. Then, the through hole is filled with a conductive paste, and this is used as a wiring layer 606.
  • the wiring layer 606 is aligned and overlapped on the upper and lower surfaces of the core layer 605, and a copper foil 608 is further stacked. Then, these layers are superposed and heated and pressed to cure the thermosetting resin of the core layer 605 and the wiring layer 606 and the conductive paste filled in the through holes, whereby the wiring layer is formed on both surfaces of the core layer 605. Form.
  • a wiring pattern 609 is formed by subjecting the copper foil 608 to a chemical etching method.
  • a resin substrate is formed in which the wiring pattern layers on the upper and lower surfaces of the core layer are electrically connected.
  • the conductive paste is filled in the through holes, and then the uncured wiring layer and the core layer 605 containing the components are overlaid and heated and pressed.
  • the conductive paste filled in the through hole may wrap around the interface between the core layer 605 and the wiring layer 606 when the layer is pressed.
  • a short circuit occurs between the wiring pattern on the surface of the core layer 605 and the adjacent interlayer connection conductors due to the conductive paste that wraps around, causing a conduction abnormality.
  • the distance between wiring patterns tends to be closer, and the inflow phenomenon of the conductive paste as described above may hinder improvement in reliability.
  • an object of the present invention is to provide a highly reliable resin substrate that can prevent a short circuit due to the inflow of conductive paste even when the distance between wiring patterns is close.
  • a resin substrate manufacturing method includes a first step of preparing a substrate body having a via land on an upper surface, and a resin layer in which a through hole is formed at a position corresponding to the via land. A second step of forming a conductive paste on the substrate body, a third step of filling the through hole with a conductive paste, and forming a wiring pattern electrically connected to the conductive paste on the resin layer. And a fourth step. (Claim 1).
  • the metal foil is pressure-bonded to the uncured resin layer to cure the resin layer, and the metal foil is processed.
  • the method further includes a step of forming the wiring pattern.
  • the resin layer is irradiated with laser from the resin layer side to the uncured resin layer on which a metal foil is pasted.
  • the fourth step includes a step of forming a conductive layer covering the conductive paste on the metal foil, and the metal foil and the conductive layer. And a step of simultaneously processing (claim 4).
  • the third step is characterized in that the conductive paste is filled by printing (claim 5).
  • or 5 is equipped with the process of hardening the said resin layer and the said electrically conductive paste simultaneously after a said 3rd process (Claim). 6).
  • the resin substrate according to the present invention includes a substrate body having via lands on the upper surface, a resin layer formed on the substrate body, and a metal pasted on the uncured resin layer.
  • the resin substrate according to claim 7 may be formed by simultaneously processing a conductive layer formed by coating the conductive paste on the metal foil and the metal foil instead of the wiring pattern.
  • a wiring pattern electrically connected to the paste is provided (claim 8).
  • the conductive paste is filled into the through hole of the resin layer, so that the substrate body and the resin layer are in close contact with each other, and then the through hole is filled. It is possible to prevent the conductive paste from flowing into the interface between the substrate body and the resin layer. Accordingly, a short circuit of the wiring pattern due to the conductive paste flowing into the interface between the substrate body and the resin layer does not occur as in the prior art, and a highly reliable resin substrate can be obtained.
  • the metal foil is pressure-bonded to the resin layer, it is possible to form the wiring pattern more easily than forming the wiring pattern by forming a plating layer on the resin layer. Further, since the metal foil is pressure-bonded to the uncured resin layer, the metal foil is bonded to the resin layer simultaneously with the curing of the resin layer. Therefore, a wiring pattern can be formed by patterning the metal foil adhered to the resin layer. Therefore, the process of forming the wiring pattern can be simplified and the manufacturing cost can be reduced.
  • the conductive paste filled in the through hole of the resin layer is covered with the conductive layer, the conductive paste and the conductive layer are accurately conducted to form a more reliable wiring pattern. can do.
  • the side surface of the conductive paste can be covered with the metal foil, the contact area between the conductive paste and the wiring pattern can be increased, and the conduction resistance can be reduced.
  • the conductive paste when the conductive paste is filled by printing, the conductive paste is filled in the through hole by horizontally moving while pressing the squeegee on the resin layer. Can be filled without gaps.
  • the squeegee moves horizontally on the metal foil, so that the resin layer can be prevented from being deformed in the squeegee moving direction by the pressure of the squeegee.
  • FIGS. 1 is a cross-sectional view of a resin substrate in the first embodiment
  • FIG. 2 is a cross-sectional view of a substrate body in the resin substrate
  • FIGS. 3 to 6 are explanatory views of a manufacturing process of the resin substrate.
  • the resin substrate 1 in the present embodiment is formed by a substrate body 3 having a wiring pattern 2 including a plurality of via lands 2a on an upper surface, a resin layer 4, and a wiring pattern 5 including a plurality of via lands 5a. Has been.
  • the substrate body 3 has a structure in which the first layer 6 and the second layer 11 are stacked and integrated.
  • the first layer 6 is made of resin, the first wiring layer 7 including a plurality of via lands 7a is formed, and the first interlayer connection conductor 8 electrically connected to the predetermined via land 7a is formed. Is formed.
  • the interlayer connection conductor 8 may be a via conductor or a through conductor.
  • a second wiring layer 10 including a plurality of via lands 10 a is formed on the upper surface of the first layer 6 and connected to the first interlayer connection conductor 8. Furthermore, a second layer 11 made of resin is disposed on the upper surface of the second wiring layer 10.
  • a component 13 including an electrode 12 is embedded and connected to a land 10 a formed at a position corresponding to the electrode 12.
  • a second interlayer connection conductor 14 electrically connected to the second wiring layer 10 is also formed.
  • the second interlayer connection conductor 14 may also be a via conductor or a through conductor.
  • a wiring pattern 2 including a plurality of via lands 2 a is formed on the upper surface of the second layer 11, and the wiring pattern 2 is connected to the second interlayer connection conductor 14.
  • the first wiring layer 7 and the wiring pattern 2 are connected via the first interlayer connection conductor 8, the second wiring layer 10, and the second interlayer connection conductor 14, and the first wiring layer 7 and the electrode 12 of the component 13. Are connected via the first interlayer connection conductor 8 and the second wiring layer 10.
  • the wiring pattern 2 in FIG. 2 corresponds to the wiring pattern layer 2 formed on the upper surface of the substrate body 3 in FIG.
  • the first interlayer connection conductor 8 and the second interlayer connection conductor 14 are filled with conductive paste, respectively. Accordingly, the first wiring layer 7, the second wiring layer 10, the wiring pattern 2, and the components 13 embedded in the second wiring layer 10 and the second layer 11 are electrically connected to each other.
  • the first layer 6 and the second layer 11 are formed of a thermosetting resin such as an epoxy resin in consideration of the ease of the curing process. Moreover, you may form with the photocurable resin hardened
  • the substrate body 3 is not limited to the above structure, and may be a ceramic substrate, a transfer plate made of SUS or the like, another component built-in substrate, a via conductor built-in substrate, or the like as long as it has a wiring pattern on the upper surface.
  • a multilayer substrate in which these substrates are stacked in combination may be used.
  • a resin layer 4 is formed on the upper surface of the substrate body 3.
  • the resin layer 4 is formed of, for example, an epoxy thermosetting resin or a mixture of a thermosetting resin and an inorganic filler in consideration of the ease of the curing process.
  • a via conductor 15 is formed in the resin layer 4.
  • the via conductor 15 is formed by filling a via conductor hole with a conductive paste, and is electrically connected to a predetermined via land 2 a among a plurality of via lands 2 a formed on the upper surface of the substrate body 3.
  • a wiring pattern 5 including a plurality of via lands 5 a is formed on the upper surface of the resin layer 4 and is electrically connected to the via conductor 15. Therefore, the wiring pattern 2 and the wiring pattern 5 are electrically connected via the via conductor 15.
  • the thickness of the resin layer 4 on which the wiring pattern 5 is formed is, for example, 20 to 50 ⁇ m.
  • the resin layer 4 which consists of a mixture of an epoxy-type thermosetting resin and an inorganic filler is formed in the sheet form in the uncured state on the single side
  • a carbon dioxide laser is irradiated from the PET film 17 side to form a via conductor hole 18 at a desired position, thereby forming a resin sheet 16.
  • the resin sheet 16 and the substrate body 3 are integrated. As shown in FIG. 4A, alignment is performed so that the via conductor hole 18 formed in the resin sheet 16 corresponds to the position of the predetermined via land 2 a of the wiring pattern 2 on the upper surface of the substrate body 3. Then, as shown in FIG. 5B, the resin layer 4 of the resin sheet 16 is brought into contact with the upper surface of the substrate body 3 and heated and pressurized at 50 to 130 ° C., and the substrate body 3 and the resin layer 4 are temporarily bonded. And integrate. At this time, since the resin layer 4 is uncured, the via land 2a formed on the upper surface of the substrate body 3 is embedded in the resin layer 4 as shown in FIG. Further, the PET film 17 is positioned on the upper surface of the integrated substrate body 3 and the resin sheet 16.
  • the via conductor hole 18 is filled with the conductive paste 20 to form the via conductor 15.
  • the conductive paste 20 is filled by a screen printing method.
  • the conductive paste 20 is specifically a resin paste mixed with a conductive material (metal).
  • the squeegee 21 is moved in the horizontal direction (in the direction of the arrow in FIG. 5A) on the upper surface of the PET film 17 of the resin sheet 16 to the via conductor hole 18.
  • the conductive paste 20 is filled. Since the conductive paste 20 is filled while pressing the resin sheet 16 with the squeegee 21, the via conductor hole 18 is filled with the conductive paste 20 without any gap.
  • a wiring pattern 5 is formed on the upper surface of the resin layer 4.
  • the copper foil 23 is brought into contact with the upper surface of the resin layer 4 and pressed.
  • the roughened surface of the copper foil 23 is disposed opposite to the resin layer 4, and the resin layer 4 and the copper foil 23 are brought into contact with each other.
  • the resin layer 4 and the substrate body 3 to which the copper foil 23 is bonded are heated at 180 to 200 ° C.
  • the conductive paste 20 filled in the resin layer 4 and the via conductor hole 18 is cured.
  • the copper foil 23 that is pressure-bonded to the resin layer 4 is also bonded to the resin layer 4 at the same time.
  • the copper foil 23 has a thickness of about 12 ⁇ m, for example, but the thickness may be changed as appropriate.
  • the wiring pattern 5 including the plurality of via lands 5a is formed by processing the copper foil 23 into a pattern by, for example, photolithography and etching.
  • the conductive paste 20 is temporarily cured (heated to 100 ° C.) and then protruded from the resin layer 4 before the copper foil 23 is pressure-bonded to the resin layer 4.
  • the conductive paste 20 may be polished and then the copper foil may be pressure bonded.
  • the wiring pattern 5 is not limited to the copper foil 23 as described above, and a copper alloy or other metal foil may be formed and processed into a pattern. It is also possible to press-bond a copper foil patterned in advance to the upper surface of the resin layer 4. Alternatively, instead of metal foil, a conductive layer made of copper, copper alloy or other conductive metal is formed on the entire upper surface of the resin layer 4 by electrolytic plating or electroless plating, and the conductive layer is processed into a pattern. Can do.
  • the conductive paste 20 is filled in the via conductor holes 18 of the resin sheet 16. 4 and the conductive paste 20 can be prevented from flowing into the interface between the substrate body 3 and the resin layer 4. Therefore, a short circuit of the wiring pattern due to the conductive paste 20 flowing into the interface between the substrate body 3 and the resin layer 4 does not occur as in the conventional case, and the resin substrate 1 having excellent reliability can be obtained. .
  • the copper foil 23 is formed on the upper surface of the resin layer 4 by crimping and processed into the wiring pattern 5
  • a conductive layer by plating is formed on the upper surface of the resin layer 4 and processed into the wiring pattern. It is possible to form a wiring pattern more easily than this.
  • the copper foil 23 is pressure-bonded to the uncured resin layer 4, the copper foil 23 is bonded to the resin layer 4 simultaneously with the curing of the resin layer 4 and the conductive paste 20. Therefore, the process can be simplified and the manufacturing cost can be reduced.
  • FIG. 7 is a cross-sectional view of a resin substrate in the second embodiment
  • FIGS. 8 and 11 are explanatory views of the manufacturing process.
  • the resin substrate 30 of the present embodiment includes the substrate body 3 having the wiring pattern 2 including the via land 2a on the upper surface, like the resin substrate 1 in the first embodiment. Since the configuration of the substrate body 3 is the same as that of the first embodiment, description thereof is omitted.
  • a resin layer 31 is formed on the upper surface of the substrate body 3.
  • a via conductor 32 electrically connected to a predetermined via land 2 a among the plurality of via lands 2 a formed on the upper surface of the substrate body 3 is formed in the resin layer 31.
  • a copper foil 33 and a conductive layer 34 are formed on the upper surface of the resin layer 31.
  • the conductive layer 34 is formed by coating the via conductor 32 and the copper foil 33 by electrolytic plating or electroless plating with copper or a copper alloy or other conductive metal. Then, the copper foil 33 and the conductive layer 34 are simultaneously processed into a pattern to form a wiring pattern layer 35. Therefore, the wiring pattern 2, the via conductor 32, and the wiring pattern layer 35 are electrically connected.
  • the resin layer 31 which consists of a mixture of an epoxy-type thermosetting resin and an inorganic filler is formed in the sheet form in the uncured state on the single side
  • the copper foil 33 is temporarily crimped
  • the roughened surface of the copper foil 33 is disposed opposite to the resin layer 31 so that the resin layer 31 and the copper foil 33 are in contact with each other. Since the temporary pressure bonding is performed at a temperature of about 40 to 60 ° C., the resin layer 31 maintains an uncured state.
  • a copper foil having a thickness of about 12 ⁇ m is used, but the thickness may be changed as appropriate.
  • a carbon dioxide laser is irradiated to a desired position on the upper surface of the PET film 37 to form a via conductor hole 39.
  • the laser beam is reflected on the metal surface, it is difficult to form the via conductor hole in the copper foil 33 by the laser beam.
  • the carbon dioxide laser is irradiated from the upper surface of the PET film 37, the resin layer 31 and the copper are formed. Since heat due to laser light is stored at the interface of the foil 33, the via foil 39 can be formed by penetrating through the copper foil 33 simultaneously with the PET film 37 and the resin layer 31 by the heat.
  • the via conductor hole 39 is affected by the reflection of the laser light as the resin layer 31 becomes thicker, and as it goes from the PET film 37 side to the copper foil 33 side.
  • the hole diameter is small and formed in a taper shape.
  • the laser is not limited to a carbon dioxide laser, and may be other lasers.
  • the PET film 37 is peeled off, and the resin layer 31 and the copper foil 38 in which the via conductor holes 39 are formed are used as a sheet 36.
  • the sheet 36 and the substrate body 3 are integrated. As shown in FIG. 9A, the upper surface of the substrate body 3 having the via land 2 a and the resin layer 31 side of the sheet 36 are arranged to face each other, and the via conductor hole 39 formed in the sheet 36 has the upper surface of the substrate body 3.
  • the wiring pattern 2 is aligned so as to correspond to the position of a predetermined via land 2a.
  • the resin layer 31 is brought into contact with the upper surface of the substrate body 3 and heated and pressurized at 70 to 130 ° C. to press-bond the substrate body 3 and the resin layer 31.
  • the via land 2 a formed on the upper surface of the substrate body 3 is embedded in the resin layer 31 as shown in FIG.
  • the copper foil 33 is located on the upper surface of the integrated substrate body 3 and the resin layer 31.
  • the via conductor hole 39 is filled with the conductive paste 20, and the via conductor 32 is formed.
  • the filling of the conductive paste 20 is performed by the screen printing method as in the first embodiment.
  • the conductive paste 20 is specifically a resin paste mixed with a conductive material (metal).
  • the filling of the conductive paste 20 by the screen printing method generally moves the squeegee horizontally while pressing the upper surface of the layer having the through-hole. Therefore, when the rigidity of the upper surface is low, The shape may be deformed.
  • the shape of the via conductor 15 may be deformed.
  • the copper foil 33 since the copper foil 33 is located on the upper surface of the resin layer 31 as described above, as shown in FIG. Even if it moves in the direction of the arrow 10 (a), since the copper foil 33 has higher rigidity than the PET film 17 of the first embodiment, the copper foil 33 does not shift in the direction of the squeegee 21.
  • the via conductor 32 is not deformed in the moving direction of the squeegee 21, and from the position of the corresponding via land 2a. There is no significant shift. Therefore, the via conductor 32 with excellent positional accuracy can be formed.
  • the sheet 36 and the substrate body 3 are heated at 180 to 200 ° C. Accordingly, the resin layer 31 and the conductive paste 20 are cured, and the copper foil 33 temporarily bonded to the resin layer 31 is also bonded to the resin layer 31 at the same time.
  • the upper surface of the copper foil 33 is polished to flatten the via conductor 32 and the copper foil 33.
  • a conductive layer 34 is formed on the upper surface of the copper foil 33.
  • the conductive layer 34 is formed by covering the via conductor 32 and the copper foil 33 by electrolytic plating or electroless plating with copper or a copper alloy or other conductive metal.
  • each via land 35a includes a via land 33a obtained by processing the copper foil 33 and a via land 34a obtained by processing the conductive layer 34.
  • the wiring pattern 2, the via conductor 32, and the wiring pattern layer 35 are electrically connected.
  • the upper surface and the side surface of the via conductor 32 are covered with the via land 34a processed with the conductive layer 34 and the via land 33a processed with the copper foil 33, respectively.
  • the filled conductive paste 20 is not exposed, and the conductive paste 20 and the conductive layer 34 are in direct contact with each other to conduct accurately. Further, since the contact area between the via conductor 32 and the wiring pattern layer 35 is large, the conduction resistance is reduced.
  • the copper foil 33 described above is not limited to a copper foil, but may be a copper alloy or other metal foil.
  • the conductive paste 20 is filled in the via conductor hole 39 of the sheet 36 after the sheet 36 is pressure-bonded onto the substrate body 3, and thus the substrate body 3, the resin layer 31, and the like. And the conductive paste 20 can be prevented from flowing into the interface between the substrate body 3 and the resin layer 31. Therefore, unlike the conventional case, a short circuit of the wiring pattern due to the conductive paste 20 flowing into the interface between the substrate body 3 and the resin layer 31 does not occur, and a more reliable resin substrate can be obtained. .
  • the via paste 39 is filled with the conductive paste 20. Due to the rigidity of 33, deformation of the via conductor 32 when the conductive paste 20 is filled can be prevented. Therefore, the positional accuracy of the via land 2a, the via conductor 32, and the via land 35a can be improved.
  • the via conductor 32 is covered with the conductive layer 34, the via conductor 32 and the conductive layer 34 are accurately conducted, and a more reliable wiring pattern can be formed. Moreover, since the side surface of the via conductor 32 is covered with the copper foil 33, the contact area between the via conductor 32 and the wiring pattern layer 35 increases, and the conduction resistance can be reduced. Therefore, it is possible to provide a resin substrate with higher reliability.
  • the via conductor holes 18 and 39 are filled with the conductive paste 20 by the screen printing method, but other methods may be used.
  • the through hole is formed by irradiation with the carbon dioxide laser, but other lasers may be used. Moreover, you may form a through-hole not only by laser irradiation but by the other method.
  • the configurations and materials of the substrate body 3, the resin layers 4 and 31, the copper foils 23 and 33, the conductive layer 34, and the conductive paste 20 are not limited to those described in the above-described embodiments, and their shapes and dimensions Etc. may be anything.
  • the present invention relates to a method for producing a resin substrate and a resin having at least one resin layer and electrically connecting wiring patterns formed on upper and lower surfaces by a conductive paste filled in a through-hole formed in the resin layer
  • the resin substrate may be applied to a substrate, and the resin substrate may be a substrate having a plurality of resin layers or a component built-in substrate in which components are incorporated in the resin layer.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

Cette invention se rapporte à un substrat de résine extrêmement fiable qui empêche des courts-circuits dans le schéma de câblage grâce à un flux de pâte conductrice entre le substrat et la couche de câblage. Un trou de conduction d'interconnexion (39) est formé sur une couche de résine (31), une feuille de cuivre (33) y étant attachée. Ensuite, la couche de résine (31) est pressée sur un substrat (3) qui présente une pastille de trou d'interconnexion (2a) située sur sa surface supérieure. Le trou de conduction d'interconnexion (39) est ensuite rempli d'une pâte conductrice de manière à former un conducteur de trou d'interconnexion (32). La feuille de cuivre (33) et la couche conductrice (34) formée sur la feuille de cuivre (33), sont structurées de manière à former une couche de motif de câblage (35) qui présente une pastille de trou d'interconnexion (35a).
PCT/JP2009/054715 2008-03-13 2009-03-12 Procédé de fabrication d'un substrat de résine et substrat de résine WO2009113602A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2008-064469 2008-03-13
JP2008064469 2008-03-13

Publications (1)

Publication Number Publication Date
WO2009113602A1 true WO2009113602A1 (fr) 2009-09-17

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6021598A (ja) * 1983-07-15 1985-02-02 松下電工株式会社 多層配線基板の製造方法
JPH07221450A (ja) * 1994-02-01 1995-08-18 Hitachi Chem Co Ltd 多層配線板の製造法
JP2000315863A (ja) * 1999-04-30 2000-11-14 Toppan Printing Co Ltd 多層プリント配線板の製造方法
JP2002280741A (ja) * 2001-03-16 2002-09-27 Hitachi Chem Co Ltd 多層プリント配線板とその製造法
JP2003136265A (ja) * 2001-10-26 2003-05-14 Matsushita Electric Ind Co Ltd レーザ加工方法およびレーザ加工装置と電子デバイス

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6021598A (ja) * 1983-07-15 1985-02-02 松下電工株式会社 多層配線基板の製造方法
JPH07221450A (ja) * 1994-02-01 1995-08-18 Hitachi Chem Co Ltd 多層配線板の製造法
JP2000315863A (ja) * 1999-04-30 2000-11-14 Toppan Printing Co Ltd 多層プリント配線板の製造方法
JP2002280741A (ja) * 2001-03-16 2002-09-27 Hitachi Chem Co Ltd 多層プリント配線板とその製造法
JP2003136265A (ja) * 2001-10-26 2003-05-14 Matsushita Electric Ind Co Ltd レーザ加工方法およびレーザ加工装置と電子デバイス

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