WO2009050891A1 - 実装構造体 - Google Patents

実装構造体 Download PDF

Info

Publication number
WO2009050891A1
WO2009050891A1 PCT/JP2008/002927 JP2008002927W WO2009050891A1 WO 2009050891 A1 WO2009050891 A1 WO 2009050891A1 JP 2008002927 W JP2008002927 W JP 2008002927W WO 2009050891 A1 WO2009050891 A1 WO 2009050891A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor element
sealing resin
circuit board
groove section
mounting structure
Prior art date
Application number
PCT/JP2008/002927
Other languages
English (en)
French (fr)
Inventor
Koso Matsuno
Atsushi Yamaguchi
Shigeaki Sakatani
Hidenori Miyakawa
Mikiya Ueda
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to US12/738,430 priority Critical patent/US8378472B2/en
Priority to KR1020107001943A priority patent/KR101111586B1/ko
Priority to EP08839374.9A priority patent/EP2214204B1/en
Priority to JP2009537924A priority patent/JP5528114B2/ja
Priority to CN2008801042220A priority patent/CN101836293B/zh
Publication of WO2009050891A1 publication Critical patent/WO2009050891A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83102—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus using surface energy, e.g. capillary forces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
    • H01L2224/9212—Sequential connecting processes
    • H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224—Patterned shielding planes, ground planes or power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969—Apertured conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Wire Bonding (AREA)

Abstract

　封止樹脂の注入作業が簡単で、確実に封止が出来るように、端部が半導体素子に向かって延びるように回路基板の表面に溝部が形成されおり、滴下された低粘度の封止樹脂はこの溝部に導かれて回路基板と半導体素子の間へ流れ込んで半導体素子以外の範囲に広がりにくい。
PCT/JP2008/002927 2007-10-17 2008-10-16 実装構造体 WO2009050891A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US12/738,430 US8378472B2 (en) 2007-10-17 2008-10-16 Mounting structure for semiconductor element with underfill resin
KR1020107001943A KR101111586B1 (ko) 2007-10-17 2008-10-16 실장 구조체
EP08839374.9A EP2214204B1 (en) 2007-10-17 2008-10-16 Mounting structure
JP2009537924A JP5528114B2 (ja) 2007-10-17 2008-10-16 半導体実装構造の樹脂封止方法および実装構造体
CN2008801042220A CN101836293B (zh) 2007-10-17 2008-10-16 安装结构体

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-269588 2007-10-17
JP2007269588 2007-10-17

Publications (1)

Publication Number Publication Date
WO2009050891A1 true WO2009050891A1 (ja) 2009-04-23

Family

ID=40567177

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/002927 WO2009050891A1 (ja) 2007-10-17 2008-10-16 実装構造体

Country Status (6)

Country Link
US (1) US8378472B2 (ja)
EP (1) EP2214204B1 (ja)
JP (1) JP5528114B2 (ja)
KR (1) KR101111586B1 (ja)
CN (1) CN101836293B (ja)
WO (1) WO2009050891A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101889881A (zh) * 2010-07-21 2010-11-24 薛运章 腹腔镜疝修补用的双臂搭接式补片
TWI560847B (en) * 2011-03-16 2016-12-01 Toshiba Kk Semiconductor devices and memory system
JP2021517360A (ja) * 2018-03-15 2021-07-15 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 半導体素子パッケージ製造プロセスための平坦化

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103180943B (zh) * 2010-11-04 2016-04-13 阿尔卑斯电气株式会社 电子部件模块
US20130113084A1 (en) * 2011-11-04 2013-05-09 Roden R. Topacio Semiconductor substrate with molded support layer
US9349614B2 (en) 2014-08-06 2016-05-24 Invensas Corporation Device and method for localized underfill
US9972553B1 (en) 2016-01-06 2018-05-15 National Technology & Engineering Solutions Of Sandia, Llc Packaging system with cleaning channel and method of making the same
US11217555B2 (en) 2017-09-29 2022-01-04 Taiwan Semiconductor Manufacturing Company, Ltd. Aligning bumps in fan-out packaging process
KR102124892B1 (ko) * 2017-09-29 2020-06-22 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 팬-아웃 패키징 공정에서의 범프 정렬
US11282717B2 (en) * 2018-03-30 2022-03-22 Intel Corporation Micro-electronic package with substrate protrusion to facilitate dispense of underfill between a narrow die-to-die gap
TWI659507B (zh) * 2018-05-18 2019-05-11 南茂科技股份有限公司 半導體封裝結構及其製造方法
KR20220092690A (ko) 2020-12-24 2022-07-04 삼성전자주식회사 반도체 패키지
CN113645759B (zh) * 2021-08-09 2024-03-12 维沃移动通信有限公司 电路板组件、电子设备和电路板组件的加工方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001035886A (ja) * 1999-07-23 2001-02-09 Nec Corp 半導体装置及びその製造方法
JP2002208670A (ja) * 2001-01-10 2002-07-26 Matsushita Electric Ind Co Ltd 電子部品実装モジュール及び電子部品実装モジュールの基板補強方法
JP2006237367A (ja) 2005-02-25 2006-09-07 Mitsubishi Electric Corp プリント配線板
JP2006245187A (ja) * 2005-03-02 2006-09-14 Seiko Epson Corp 半導体装置の製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5647123A (en) * 1995-10-16 1997-07-15 Motorola, Inc. Method for improving distribution of underfill between a flip chip die and a circuit board
JP3367886B2 (ja) * 1998-01-20 2003-01-20 株式会社村田製作所 電子回路装置
JP4361658B2 (ja) * 2000-02-14 2009-11-11 富士通マイクロエレクトロニクス株式会社 実装基板及び実装方法
JP4149377B2 (ja) * 2001-06-07 2008-09-10 株式会社ルネサステクノロジ 半導体装置の製造方法
SG122743A1 (en) * 2001-08-21 2006-06-29 Micron Technology Inc Microelectronic devices and methods of manufacture
JP2003273317A (ja) * 2002-03-19 2003-09-26 Nec Electronics Corp 半導体装置及びその製造方法
JP2004158474A (ja) * 2002-11-01 2004-06-03 Murata Mfg Co Ltd ベアチップ部品を使用した電子部品の製造方法
US7075016B2 (en) * 2004-02-18 2006-07-11 Taiwan Semiconductor Manufacturing Co., Ltd. Underfilling efficiency by modifying the substrate design of flip chips
US7348666B2 (en) * 2004-06-30 2008-03-25 Endwave Corporation Chip-to-chip trench circuit structure
JP2006049804A (ja) 2004-07-07 2006-02-16 Shinko Electric Ind Co Ltd 配線基板の製造方法
JP2007134540A (ja) * 2005-11-11 2007-05-31 Murata Mfg Co Ltd 半導体装置およびその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001035886A (ja) * 1999-07-23 2001-02-09 Nec Corp 半導体装置及びその製造方法
JP2002208670A (ja) * 2001-01-10 2002-07-26 Matsushita Electric Ind Co Ltd 電子部品実装モジュール及び電子部品実装モジュールの基板補強方法
JP2006237367A (ja) 2005-02-25 2006-09-07 Mitsubishi Electric Corp プリント配線板
JP2006245187A (ja) * 2005-03-02 2006-09-14 Seiko Epson Corp 半導体装置の製造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2214204A4 *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101889881A (zh) * 2010-07-21 2010-11-24 薛运章 腹腔镜疝修补用的双臂搭接式补片
TWI560847B (en) * 2011-03-16 2016-12-01 Toshiba Kk Semiconductor devices and memory system
JP2021517360A (ja) * 2018-03-15 2021-07-15 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ 半導体素子パッケージ製造プロセスための平坦化
JP7258906B2 (ja) 2018-03-15 2023-04-17 アプライド マテリアルズ インコーポレイテッド 半導体素子パッケージ製造プロセスための平坦化

Also Published As

Publication number Publication date
US8378472B2 (en) 2013-02-19
US20100224398A1 (en) 2010-09-09
CN101836293A (zh) 2010-09-15
JP5528114B2 (ja) 2014-06-25
JPWO2009050891A1 (ja) 2011-02-24
CN101836293B (zh) 2012-02-01
EP2214204A1 (en) 2010-08-04
KR101111586B1 (ko) 2012-03-13
EP2214204A4 (en) 2012-05-09
KR20100054785A (ko) 2010-05-25
EP2214204B1 (en) 2013-10-02

Similar Documents

Publication Publication Date Title
WO2009050891A1 (ja) 実装構造体
WO2008093414A1 (ja) 半導体装置及びその製造方法
WO2008100403A3 (en) Spring loaded parallel pad clamp
WO2006107507A3 (en) Wafer level package including a device wafer integrated with a passive component
WO2007050287A3 (en) Semiconductor structure and method of assembly
TW200723457A (en) Semiconductor device and method for manufacturing semiconductor device
TW200735081A (en) Function element mounting module, manufacturing method thereof, and resin sealing board and substrate-structured unit for resin sealing used by the same
WO2008060447A8 (en) Microcircuit package having ductile layer
WO2012087556A3 (en) Device packaging with substrates having embedded lines and metal defined pads
WO2011097089A3 (en) Recessed semiconductor substrates
WO2010035944A3 (ko) 발광 장치
WO2010027890A3 (en) Mainboard assembly including a package overlying a die directly attached to the mainboard
WO2007109492A3 (en) Low profile semiconductor package-on-package
WO2010068652A3 (en) Semiconductor die package with clip interconnection
WO2010002787A3 (en) Framed device, seal, and method for manufacturing same
WO2009114392A3 (en) Semiconductor die package including embedded flip chip
WO2009143796A3 (de) Optoelektronisches halbleiterbauteil und leiterplatte
EP1827067A3 (en) Flexible circuit substrate for flip-chip-on-flex applications
WO2008019804A8 (de) Entwässerungsvorrichtung
WO2008012416A3 (fr) Entite electronique a microcircuit
WO2009057620A1 (ja) 圧力センサ及びその製造方法
WO2010007145A3 (de) Löt-stützstelle für solarmodule und halbleiterbauelement
WO2009069783A1 (ja) 回路部材接続用接着剤及び半導体装置
WO2009061886A3 (en) Tensile strained ge for electronic and optoelectronic applications
WO2007054894A3 (en) Chip assembly and method of manufacturing thereof

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200880104222.0

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08839374

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 20107001943

Country of ref document: KR

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 2009537924

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 12738430

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

WWE Wipo information: entry into national phase

Ref document number: 2008839374

Country of ref document: EP