WO2009035071A1 - 多層プリント配線板の製造法 - Google Patents

多層プリント配線板の製造法 Download PDF

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Publication number
WO2009035071A1
WO2009035071A1 PCT/JP2008/066524 JP2008066524W WO2009035071A1 WO 2009035071 A1 WO2009035071 A1 WO 2009035071A1 JP 2008066524 W JP2008066524 W JP 2008066524W WO 2009035071 A1 WO2009035071 A1 WO 2009035071A1
Authority
WO
WIPO (PCT)
Prior art keywords
printed wiring
wiring board
multilayer printed
insulating layer
manufacturing multilayer
Prior art date
Application number
PCT/JP2008/066524
Other languages
English (en)
French (fr)
Inventor
Shigeo Nakamura
Seiichiro Ohashi
Original Assignee
Ajinomoto Co., Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ajinomoto Co., Inc. filed Critical Ajinomoto Co., Inc.
Priority to CN2008801071473A priority Critical patent/CN101803485B/zh
Priority to JP2009532233A priority patent/JP5532924B2/ja
Priority to KR1020107007740A priority patent/KR101464142B1/ko
Publication of WO2009035071A1 publication Critical patent/WO2009035071A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0145—Polyester, e.g. polyethylene terephthalate [PET], polyethylene naphthalate [PEN]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1377—Protective layers
    • H05K2203/1383—Temporary protective insulating layer

Abstract

　多層プリント配線板の絶縁層形成にプリプレグを使用する場合に、該絶縁層に、良好なブラインドビアを高い生産性で形成可能とする、多層プリント配線板の製造方法を提供する。 　回路基板の両面又は片面にプリプレグが熱硬化されて形成された絶縁層に、該絶縁層表面に密着されたプラスチックフィルム上から炭酸ガスレーザーを照射して、ブラインドビアを形成する工程を含むことを特徴とする、多層プリント配線板の製造方法。
PCT/JP2008/066524 2007-09-14 2008-09-12 多層プリント配線板の製造法 WO2009035071A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2008801071473A CN101803485B (zh) 2007-09-14 2008-09-12 多层印刷电路板的制造方法
JP2009532233A JP5532924B2 (ja) 2007-09-14 2008-09-12 多層プリント配線板の製造法
KR1020107007740A KR101464142B1 (ko) 2007-09-14 2008-09-12 다층 프린트 배선판의 제조 방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007239672 2007-09-14
JP2007-239672 2007-09-14

Publications (1)

Publication Number Publication Date
WO2009035071A1 true WO2009035071A1 (ja) 2009-03-19

Family

ID=40452077

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/066524 WO2009035071A1 (ja) 2007-09-14 2008-09-12 多層プリント配線板の製造法

Country Status (5)

Country Link
JP (1) JP5532924B2 (ja)
KR (1) KR101464142B1 (ja)
CN (1) CN101803485B (ja)
TW (2) TWI535355B (ja)
WO (1) WO2009035071A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011171719A (ja) * 2010-01-22 2011-09-01 Sumitomo Bakelite Co Ltd プリプレグの積層方法、プリント配線板の製造方法およびプリプレグのロール
US11553593B2 (en) 2018-05-09 2023-01-10 Showa Denko Materials Co., Ltd. Resin film for interlayer insulating layer with support, multilayer printed circuit board, and method of manufacturing multilayer printed circuit board

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI613124B (zh) * 2015-02-05 2018-02-01 Kodama Plastics Co Ltd 透明性優良耐化學藥品性吹塑積層容器
CN106793535A (zh) * 2015-11-20 2017-05-31 富泰华工业（深圳）有限公司 电路板丝网印刷方法
CN109596557A (zh) * 2018-11-29 2019-04-09 健鼎（湖北）电子有限公司 决定无双氰胺材料除胶次数的方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10200264A (ja) * 1997-01-06 1998-07-31 Ibiden Co Ltd 多層プリント配線板およびその製造方法
JP2001156453A (ja) * 1999-11-29 2001-06-08 Karentekku:Kk プリント配線板における埋め込みヴィアの形成方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3861537B2 (ja) * 1998-12-02 2006-12-20 味の素株式会社 接着フィルムの真空積層法
US6224965B1 (en) * 1999-06-25 2001-05-01 Honeywell International Inc. Microfiber dielectrics which facilitate laser via drilling
JP4300687B2 (ja) * 1999-10-28 2009-07-22 味の素株式会社 接着フィルムを用いた多層プリント配線板の製造法
JP2004349357A (ja) * 2003-05-21 2004-12-09 Matsushita Electric Works Ltd 多層プリント配線板の製造方法
JP4811015B2 (ja) * 2005-12-21 2011-11-09 イビデン株式会社 プリント配線板の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10200264A (ja) * 1997-01-06 1998-07-31 Ibiden Co Ltd 多層プリント配線板およびその製造方法
JP2001156453A (ja) * 1999-11-29 2001-06-08 Karentekku:Kk プリント配線板における埋め込みヴィアの形成方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011171719A (ja) * 2010-01-22 2011-09-01 Sumitomo Bakelite Co Ltd プリプレグの積層方法、プリント配線板の製造方法およびプリプレグのロール
US11553593B2 (en) 2018-05-09 2023-01-10 Showa Denko Materials Co., Ltd. Resin film for interlayer insulating layer with support, multilayer printed circuit board, and method of manufacturing multilayer printed circuit board

Also Published As

Publication number Publication date
TW201503791A (zh) 2015-01-16
JPWO2009035071A1 (ja) 2010-12-24
CN101803485B (zh) 2012-01-25
KR101464142B1 (ko) 2014-11-25
TWI457062B (zh) 2014-10-11
TWI535355B (zh) 2016-05-21
JP5532924B2 (ja) 2014-06-25
KR20100058631A (ko) 2010-06-03
TW200934344A (en) 2009-08-01
CN101803485A (zh) 2010-08-11

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