WO2009034605A1 - 不揮発性半導体記憶装置およびその製造方法 - Google Patents

不揮発性半導体記憶装置およびその製造方法 Download PDF

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Publication number
WO2009034605A1
WO2009034605A1 PCT/JP2007/067570 JP2007067570W WO2009034605A1 WO 2009034605 A1 WO2009034605 A1 WO 2009034605A1 JP 2007067570 W JP2007067570 W JP 2007067570W WO 2009034605 A1 WO2009034605 A1 WO 2009034605A1
Authority
WO
WIPO (PCT)
Prior art keywords
film
silicon oxide
oxide film
silicon
semiconductor substrate
Prior art date
Application number
PCT/JP2007/067570
Other languages
English (en)
French (fr)
Inventor
Yoshiki Yonamoto
Original Assignee
Renesas Technology Corp.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp. filed Critical Renesas Technology Corp.
Priority to PCT/JP2007/067570 priority Critical patent/WO2009034605A1/ja
Priority to JP2009531989A priority patent/JP5103478B2/ja
Priority to US12/602,154 priority patent/US8053826B2/en
Priority to TW097119527A priority patent/TW200913155A/zh
Publication of WO2009034605A1 publication Critical patent/WO2009034605A1/ja

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/4234—Gate electrodes for transistors with charge trapping gate insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

Abstract

　不揮発性メモリ、特に、ＭＯＮＯＳ型不揮発性メモリの電荷保持特性を向上する。半導体基板上に順次形成されたトンネルシリコン酸化膜（１０７）、電荷蓄積膜であるシリコン窒化膜（１０４）、シリコン酸化膜（１０５）及びゲート電極（１０８）を備える不揮発性メモリセルにおいて、トンネルシリコン酸化膜（１０７）を、シリコン酸窒化膜（１０２）とシリコン酸化膜（１０３）の積層構造とする。このとき、シリコン酸窒化膜（１０２）に含まれる窒素原子の密度が半導体基板との界面からシリコン酸窒化膜（１０２）の膜厚方向に進むにつれて減少するように構成する。
PCT/JP2007/067570 2007-09-10 2007-09-10 不揮発性半導体記憶装置およびその製造方法 WO2009034605A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/JP2007/067570 WO2009034605A1 (ja) 2007-09-10 2007-09-10 不揮発性半導体記憶装置およびその製造方法
JP2009531989A JP5103478B2 (ja) 2007-09-10 2007-09-10 不揮発性半導体記憶装置の製造方法
US12/602,154 US8053826B2 (en) 2007-09-10 2007-09-10 Non-volatile semiconductor memory device and method of manufacturing the same
TW097119527A TW200913155A (en) 2007-09-10 2008-05-27 Nonvolatile semiconductor memory device and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/067570 WO2009034605A1 (ja) 2007-09-10 2007-09-10 不揮発性半導体記憶装置およびその製造方法

Publications (1)

Publication Number Publication Date
WO2009034605A1 true WO2009034605A1 (ja) 2009-03-19

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/067570 WO2009034605A1 (ja) 2007-09-10 2007-09-10 不揮発性半導体記憶装置およびその製造方法

Country Status (4)

Country Link
US (1) US8053826B2 (ja)
JP (1) JP5103478B2 (ja)
TW (1) TW200913155A (ja)
WO (1) WO2009034605A1 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101933096A (zh) * 2008-10-21 2010-12-29 松下电器产业株式会社 非易失性存储装置及向其存储单元的写入方法
JP5356005B2 (ja) 2008-12-10 2013-12-04 株式会社東芝 不揮発性半導体記憶装置及びその製造方法
US9443866B1 (en) 2015-03-24 2016-09-13 Sandisk Technologies Llc Mid-tunneling dielectric band gap modification for enhanced data retention in a three-dimensional semiconductor device
JP2019029376A (ja) * 2017-07-25 2019-02-21 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
JP2019079845A (ja) * 2017-10-20 2019-05-23 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08340056A (ja) * 1995-06-12 1996-12-24 Sony Corp シリコン系絶縁膜の形成方法と半導体装置
JPH10321740A (ja) * 1997-03-19 1998-12-04 Citizen Watch Co Ltd 半導体不揮発性メモリトランジスタおよびその製造方法
JP2001135735A (ja) * 1999-11-08 2001-05-18 Nec Corp 不揮発性半導体装置の製造方法
JP2002353343A (ja) * 2001-05-29 2002-12-06 Nec Corp 半導体装置およびその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960002066B1 (ko) 1992-10-20 1996-02-10 Lg반도체주식회사 옥시 나이트라이드 제조방법
JPH06291330A (ja) 1993-03-31 1994-10-18 Citizen Watch Co Ltd 半導体不揮発性記憶素子とその製造方法
JP3485403B2 (ja) 1995-11-28 2004-01-13 沖電気工業株式会社 半導体装置の製造方法
KR20000018524A (ko) * 1998-09-02 2000-04-06 김영환 비휘발성 메모리 소자 및 그의 제조방법
TW510047B (en) * 2001-11-09 2002-11-11 Macronix Int Co Ltd Structure and manufacture method of silicon nitride read only memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08340056A (ja) * 1995-06-12 1996-12-24 Sony Corp シリコン系絶縁膜の形成方法と半導体装置
JPH10321740A (ja) * 1997-03-19 1998-12-04 Citizen Watch Co Ltd 半導体不揮発性メモリトランジスタおよびその製造方法
JP2001135735A (ja) * 1999-11-08 2001-05-18 Nec Corp 不揮発性半導体装置の製造方法
JP2002353343A (ja) * 2001-05-29 2002-12-06 Nec Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US8053826B2 (en) 2011-11-08
JP5103478B2 (ja) 2012-12-19
TWI368971B (ja) 2012-07-21
US20100176439A1 (en) 2010-07-15
JPWO2009034605A1 (ja) 2010-12-16
TW200913155A (en) 2009-03-16

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