WO2009028297A1 - 電子回路 - Google Patents

電子回路 Download PDF

Info

Publication number
WO2009028297A1
WO2009028297A1 PCT/JP2008/063786 JP2008063786W WO2009028297A1 WO 2009028297 A1 WO2009028297 A1 WO 2009028297A1 JP 2008063786 W JP2008063786 W JP 2008063786W WO 2009028297 A1 WO2009028297 A1 WO 2009028297A1
Authority
WO
WIPO (PCT)
Prior art keywords
field effect
electronic circuit
effect transistor
magnetoresistive device
controlled
Prior art date
Application number
PCT/JP2008/063786
Other languages
English (en)
French (fr)
Inventor
Satoshi Sugahara
Shuichiro Yamamoto
Original Assignee
Tokyo Institute Of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Institute Of Technology filed Critical Tokyo Institute Of Technology
Publication of WO2009028297A1 publication Critical patent/WO2009028297A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165—Auxiliary circuits
    • G11C11/1659—Cell access
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Networks Using Active Elements (AREA)
  • Hall/Mr Elements (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

　本発明は、電界効果トランジスタ２０と、電界効果トランジスタ２０のソースＳに接続された磁気抵抗素子１０と、を具備する電子回路である。本発明によれば、磁気抵抗素子１０の磁化状態により、電界効果トランジスタ２０のゲート－ソース間に印加される電圧を制御できる。電界効果トランジスタ２０の電流駆動能力をの磁化状態で制御できることから擬似的にスピントランジスタとしての動作が可能となる。また、電界効果トランジスタ２０と磁気抵抗素子１０から電子回路を構成するため、容易に製造することができる。
PCT/JP2008/063786 2007-08-31 2008-07-31 電子回路 WO2009028297A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-225698 2007-08-31
JP2007225698A JP2009059884A (ja) 2007-08-31 2007-08-31 電子回路

Publications (1)

Publication Number Publication Date
WO2009028297A1 true WO2009028297A1 (ja) 2009-03-05

Family

ID=40387024

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/063786 WO2009028297A1 (ja) 2007-08-31 2008-07-31 電子回路

Country Status (2)

Country Link
JP (1) JP2009059884A (ja)
WO (1) WO2009028297A1 (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4516137B2 (ja) * 2008-03-27 2010-08-04 株式会社東芝 半導体集積回路
JP5234547B2 (ja) * 2009-03-27 2013-07-10 国立大学法人東京工業大学 電子回路

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566541A (en) * 1979-06-28 1981-01-23 Nec Corp Semiconductor logic circuit
JP2002008367A (ja) * 2000-06-19 2002-01-11 Nec Corp 磁気ランダムアクセスメモリ
JP2003157671A (ja) * 2001-11-22 2003-05-30 Internatl Business Mach Corp <Ibm> 不揮発性ラッチ回路
JP2003281878A (ja) * 2002-03-22 2003-10-03 Tdk Corp 抵抗素子を用いたデータ記憶素子及びその製造方法
JP2004200641A (ja) * 2002-12-16 2004-07-15 Hynix Semiconductor Inc Ｎａｎｄ型磁気抵抗ラム
JP2006526907A (ja) * 2003-05-08 2006-11-24 シーメンス　アクチエンゲゼルシヤフト 機能のコンフィギュレーション可能な論理回路デバイスを有する構成要素
JP2007228574A (ja) * 2006-02-22 2007-09-06 Samsung Electronics Co Ltd 磁気トンネル接合セルを利用した排他的論理和論理回路及び該論理回路の駆動方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS566541A (en) * 1979-06-28 1981-01-23 Nec Corp Semiconductor logic circuit
JP2002008367A (ja) * 2000-06-19 2002-01-11 Nec Corp 磁気ランダムアクセスメモリ
JP2003157671A (ja) * 2001-11-22 2003-05-30 Internatl Business Mach Corp <Ibm> 不揮発性ラッチ回路
JP2003281878A (ja) * 2002-03-22 2003-10-03 Tdk Corp 抵抗素子を用いたデータ記憶素子及びその製造方法
JP2004200641A (ja) * 2002-12-16 2004-07-15 Hynix Semiconductor Inc Ｎａｎｄ型磁気抵抗ラム
JP2006526907A (ja) * 2003-05-08 2006-11-24 シーメンス　アクチエンゲゼルシヤフト 機能のコンフィギュレーション可能な論理回路デバイスを有する構成要素
JP2007228574A (ja) * 2006-02-22 2007-09-06 Samsung Electronics Co Ltd 磁気トンネル接合セルを利用した排他的論理和論理回路及び該論理回路の駆動方法

Also Published As

Publication number Publication date
JP2009059884A (ja) 2009-03-19

Similar Documents

Publication Publication Date Title
JP2011519488A5 (ja)
JP2011181905A5 (ja)
ATE538473T1 (de) Magnetoresistiver speicher
JP2011103453A5 (ja)
WO2010039463A3 (en) Inductive load power switching circuits
JP2008089915A5 (ja)
DE602006017362D1 (de) Bidirektionale mos-strommessschaltung
JP2008089874A5 (ja)
JP2011205630A5 (ja) 半導体装置、表示モジュール及び電子機器
TW200723691A (en) Semiconductor integrated circuit apparatus and electronic apparatus
JP2010252318A5 (ja) 液晶表示装置
WO2009061108A3 (en) Spin transistor and method of operating the same
JP2011176870A5 (ja) 半導体装置、モジュール及び電子機器
TW200739500A (en) Semiconductor device
ATE536618T1 (de) Auswahlvorrichtung für einen magnetoresistiven speicher mit spin-transfer
JP2007279748A5 (ja)
JP2011059709A5 (ja)
WO2005104240A8 (en) Magneto-electric field effect transistor for spintronic applications
JP2005322899A5 (ja)
WO2008105228A1 (ja) 磁気センサモジュール及び、ピストン位置検出装置
WO2008015462A3 (en) Power supply circuit
TW200737497A (en) Electric element, memory device, and semiconductor IC circuit
WO2012115900A3 (en) Driver circuit for a semiconductor power switch
WO2009028426A1 (ja) 電子素子及び電気伝導度制御方法
WO2009028297A1 (ja) 電子回路

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 08792001

Country of ref document: EP

Kind code of ref document: A1

DPE1 Request for preliminary examination filed after expiration of 19th month from priority date (pct application filed from 20040101)
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 08792001

Country of ref document: EP

Kind code of ref document: A1