WO2008090023A1 - Elektronisches bauteil - Google Patents
Elektronisches bauteil Download PDFInfo
- Publication number
- WO2008090023A1 WO2008090023A1 PCT/EP2008/050199 EP2008050199W WO2008090023A1 WO 2008090023 A1 WO2008090023 A1 WO 2008090023A1 EP 2008050199 W EP2008050199 W EP 2008050199W WO 2008090023 A1 WO2008090023 A1 WO 2008090023A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- electronic component
- diffusion barrier
- barrier layer
- component according
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4827—Materials
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N27/00—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means
- G01N27/26—Investigating or analysing materials by the use of electric, electrochemical, or magnetic means by investigating electrochemical variables; by using electrolysis or electrophoresis
- G01N27/403—Cells and electrode assemblies
- G01N27/414—Ion-sensitive or chemical field-effect transistors, i.e. ISFETS or CHEMFETS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Definitions
- the invention relates to an electronic component according to the preamble of claim 1.
- An electronic component with a metallic layer on a substrate made of a semiconductor material is e.g. a semiconductor transistor.
- the metallic layer is e.g. an electrode of the semiconductor transistor.
- the metal for the metallic layer for example, platinum or palladium is used. This is generally deposited either directly on the surface of the semiconductor material or on electrical insulation layers on the semiconductor material. Common semiconductor material is eg gallium nitride.
- the electronic component is used at temperatures above 350 0 C, so the properties of the electronic component can irreversibly deteriorate. This is done, for example, by diffusing or migrating metal of the metallic layer into the electrical insulation layer or into the semiconductor material.
- the metal diffusion or migration to change the channel impedances but also lead to a dramatic increase in the gate leakage currents. It has also been found that semiconductor transistors with high gate leakage currents degrade much faster than electronic components with low leakage currents. This suggests that penetration of the platinum of the metallic layer into the semiconductor is promoted by electro-migration.
- Electronic components with gallium nitride as the semiconductor material are, for example, high-power and high-frequency field-effect transistors as well as blue, white and green LEDs used in optoelectronics. Due to the large band gap of 3.4 eV and the thermal stability of gallium nitride crystal forward based components are in principle for operating temperatures up to about 700 0 C.
- a chemically sensitive field effect transistor is known, for example, from US 4,437,969.
- the electrodes are formed in a layer structure.
- the field effect transistor is in liquid media operated at moderate temperatures.
- an ion diffusion barrier is formed between the substrate and the metallic layer. By means of this ion diffusion barrier, however, it is not prevented that at high temperatures metal of the metallic layer can diffuse into the semiconductor substrate.
- a diffusion barrier layer is formed between the metallic layer and the substrate or the metallic layer and an insulating layer, which is made of a material having a small diffusion coefficient for the metal having metallic layer.
- the diffusion barrier layer reduces the diffusion of metal into the semiconductor material or into the insulating layer.
- “Small diffusion coefficient” in the sense of the present invention means that during the application of the electronic component over the life of the electronic component, no loss of function due to migration of the metal is produced.For many applications, it is necessary that in the area to be protected by the diffusion barrier layer, ie For the given operating temperature, the metal concentration remains below a critical threshold c max (eg 0.1 atomic percent) over the entire service life t L According to Fick's law, the following requirement for diffusion coefficient D and barrier layer thickness d can be dependent to meet the required lifetime t L :
- the diffusion barrier layer is preferably pore-free or only shows closed pores in the sense that the layer is not crossed by continuous channels.
- the diffusion barrier layer is preferably made of an electrically conductive material. Suitable materials for the diffusion barrier layer are e.g. a suicide, titanium silicon nitride or tungsten silicon nitride.
- the suicide is preferably tantalum silicide, tungsten silicide or platinum silicide.
- the diffusion barrier layer is made of a material that is electrically insulating. If the material of the diffusion barrier layer is electrically insulating, it is not necessary to provide an additional electrically insulating layer in order to ensure the functionality of the electronic component or to produce transistors which exhibit low leakage currents even at high temperatures.
- the semiconductor material of the substrate is preferably gallium nitride.
- Gallium nitride is a III-V compound semiconductor used, for example, in high power and high frequency field effect transistors.
- gallium nitride is used in optoelectronics, especially for blue, white and green LEDs.
- Advantage of gallium nitride is due to the large band gap of 3.4 eV and the thermal crystal stability that in principle for operating temperatures are gallium nitride-based semiconductor devices to 700 0 C.
- the material of the metallic layer is preferably a metal of the 9th, 10th or 11th group of the Periodic Table of the Elements or a mixture of at least two of these metals.
- the material of the metallic layer is particularly preferably selected from platinum, palladium, iridium, gold, silver, rhodium or a mixture of at least two of these metals.
- the electronic component when used in sensor applications, for example in the form of a gas-sensitive field-effect transistor, the use of platinum or palladium as the material for the metallic layer is made of electrochemical View particularly advantageous.
- the metallic layer forms, in particular, the gate electrode of a field-effect transistor.
- an electrical insulation layer is additionally accommodated between the substrate made of the semiconductor material and the metallic layer. It is possible, on the one hand, for the electrical insulation layer to be formed between the substrate of the semiconductor material and the diffusion barrier layer, or for the electrically insulating layer to be formed between the diffusion barrier layer and the metallic layer. Furthermore, it is also possible for a diffusion barrier layer to be located above and below the electrical insulation layer. An additional electrical insulation layer is particularly advantageous when the diffusion barrier layer is made of an electrically conductive material.
- a protective layer is formed above the diffusion layer.
- This protective layer may be electrically insulating or conductive. If the protective layer is electrically insulating, it can, for example, also act as an electrical insulation layer.
- the use of the protective layer is particularly preferred when using suicides or silicide nitrides for the diffusion layer, since these can be impaired by oxidation in their stability and in their function as a diffusion barrier layer.
- a diffusion barrier layer of suicide or silicide nitride for example WSi or WSiN, S1 3 N 4 , for example, is suitable as the material for the protective layer.
- the protective layer is used in particular when used in a corrosive environment and / or at high temperatures.
- Preferred material for the electrical insulation layer is, for example, S1 3 N 4 .
- the diffusion barrier layer may also serve as an etch stop layer during manufacture of the electronic device. Without an etch stop layer, back etching of the passivation in the region of the gate electrode would automatically etch away the insulation as well.
- a porous metallic layer such as is necessary for gas sensors, could not fulfill this function.
- the diffusion barrier layer can serve as a bonding agent for the metallic layer on the substrate of a semiconductor material.
- the diffusion barrier layer serves as a bonding agent, the metallic layer remains on the diffusion barrier layer and does not delaminate.
- the uppermost layer of the diffusion barrier layer exhibits suitable chemical properties with respect to the gas environment.
- the layer offers adsorption sites for the measurement gas or dissociation or reaction products of the measurement gas which lead to charge separation or dipole formation at the boundary layer.
- NH 3 , HC, H 2 , CO and NO x have proven to be nitridic or oxidic or interfacial oxide-forming layers.
- this layer it is necessary for this layer to be chemically stable to the environment. This is especially true for the above-mentioned materials for the diffusion barrier layer.
- the single figure shows an example of a layer structure of a gate electrode of a semiconductor transistor.
- An inventively designed electronic component 1 comprises a substrate 3, which is made of a semiconductor material.
- Preferred semiconductor material is gallium nitride.
- gallium nitride is suitable as a semiconductor material but also aluminum nitride, gallium aluminum nitride and silicon carbide.
- gallium nitride is a III-V compound semiconductor used, for example, for high power and high frequency field effect transistors.
- gallium nitride is used in optoelectronics especially for blue, white and green LEDs.
- Electronic components with a substrate made of gallium nitride are suitable in principle for operating temperatures up to about 700 0 C. Thus, such devices can be used also in high temperature applications such as for gas sensors in exhaust gas streams from motor vehicles.
- An electrical insulation layer 5 is first applied to the substrate 3 made of the semiconductor material.
- the electrical insulation layer 5 is preferably made of the same material as the passivation of the chip.
- material for the electrical insulation Layer 5 is suitable eg SIsN 4 .
- the thickness of the electrical insulation layer 5 is preferably in the range of 1 to 100 nm.
- the material of the electrical insulation layer 5 is deposited on the substrate 3 of the semiconductor material.
- the electrical insulation layer 5 is an ex-situ-deposited CVD (chemical vapor deposition) Si 3 N 4 layer.
- the electrical insulation layer 5 is used to insulate the gate diode in order to minimize gate leakage currents and thus electrical migration, to stabilize the electrical operation and to ensure simple signal evaluation. Furthermore, it is possible if the electrical insulation layer 5, as shown in FIG. 1, has been deposited directly on the substrate 3, which serves as adhesion promoter for a diffusion barrier with a low interfacial density of states.
- the diffusion barrier layer 7 preferably has a thickness in the range of 1 to 300 nm.
- the material of the diffusion barrier layer 7 is preferably selected to have a small diffusion coefficient for the metal of a metallic layer 9 applied to the diffusion barrier layer 7.
- the diffusion barrier layer 7 is preferably substantially free of pores or only shows closed pores.
- the diffusion barrier layer 7 is made of an electrically conductive material.
- an electrically conductive material for the diffusion barrier layer 7, the distance between the semiconductor material 3 of the substrate and the source of an electric field is minimized. As a result, the transconductance of the semiconductor transistor is improved.
- the diffusion barrier layer 7 is made of an electrically conductive material, the distance between the electric field source and the semiconductor material of the substrate is only the thickness 11 of the electrical insulation layer 5.
- an electrically insulating material is used for the diffusion barrier layer 7, it adds the layer thickness 13 of the diffusion barrier layer 7 is added to the distance between the electric field source and the semiconductor material of the substrate 3, thus lowering the transconductance of the semiconductor transistor.
- the electric field source is only the metallic layer 9.
- the diffusion barrier layer 7 is made of an electrically insulating material, to dispense with an additional electrical insulation layer 5.
- the diffusion barrier layer 7 since, in general, the diffusion barrier layer 7 must have a substantially larger layer thickness 13 than an electrical insulation layer 5, it is preferable to combine an electrically conductive, thick diffusion barrier layer 7 and a thin electrical insulation layer 5 to form the transconductance of the electronic component 1 formed as a semiconductor transistor to improve.
- the larger layer thickness 13 of the diffusion barrier layer 7 in comparison to the thickness 11 of the electrical insulation layer 5 is required in order to obtain a sufficient barrier effect against diffusing metal from the metallic layer 9 and thus to prevent metal from the metallic layer 9 in the semiconductor material of the substrate 3 diffused.
- Another advantage of the electrical insulation layer 5 and the additional diffusion barrier layer 7 is that many materials, when deposited directly onto the semiconductor surface, particularly when the semiconductor material is gallium nitride, cause open dangling bonds At very high interfacial state densities, control of the transistor may even become impossible, and choosing a material which can be deposited with very low interfacial state densities for the electrical insulation layer 5 can thus be compared achieve direct deposition of the diffusion barrier layer 7 to the substrate 3 improved properties.
- gallium nitride as a semiconductor material in particular S1 3 N 4 is very low interface state densities. Since S1 3 N 4, however, not as a diffusion barrier, an additional diffusion barrier layer 7 is required.
- Preferred materials for the diffusion barrier layer 7 are e.g. Titanium nitride, an alloy of titanium and tungsten, tungsten or gold. Furthermore, suicides or nitrides, e.g. Tantalum silicide, tungsten silicide, molybdenum silicide or platinum silicide, titanium silicon nitride or tungsten silicon nitride or boron nitride. Particularly preferred as the material for the diffusion barrier layer 7 are tantalum silicide or tungsten silicide.
- the metallic layer 9 is generally connected to an electrical conductor for operating the electronic component 1.
- any metal is suitable.
- preferred metals are metals of the 9th, 10th or 11th group of the Periodic Table of the Elements. Particularly preferred are platinum, palladium, iridium, gold, silver, rhodium or a mixture of at least two of these metals. If that electronic component 1 is used as a gas sensor, the metallic layer 9 is preferably made of platinum or palladium.
- the thickness of the metallic layer 9 is preferably in the range of 1 to 100 nm.
- the metallic layer is preferably porous. If the metallic layer 9 is porous, the diffusion barrier layer 7 additionally serves for etching stop layer during the production of the electronic component 1.
- a passivation is first applied to the semiconductor material of the substrate 3. This is etched back to produce the electronic component. Without an etching stop layer, the etching back of the passivation would automatically cause the electrical insulation layer 5 to be etched away. If now the porous metallic layer 9 were applied directly to the electrical insulation layer 5, this would not be able to serve as an etch stop layer and the electrical insulation layer 5 would also be etched away. However, even with a porous metallic layer 9, the diffusion barrier layer 7 prevents the electrical insulation layer 5 from being etched away.
- the substrate 3 in which on the substrate 3 first electrical insulation layer 5, then the diffusion barrier layer 7 and finally the metallic layer 9 is applied, it is also possible to the substrate 3, first the diffusion barrier layer 7 and then subsequently the electrical insulation layer. 5 apply. Furthermore, it is also possible that an additional diffusion barrier layer is provided. This can then be e.g. between the substrate 3 and the electrical insulation layer 5 are located.
- an additional protective layer can be applied above the diffusion barrier layer 7, by which leakage of substances or oxidation products into the diffusion barrier layer 7 or oxidation of the diffusion barrier layer 7 is prevented.
- the additional protective layer is between the diffusion barrier layer 7 and the metallic layer 9.
- the electrical insulating layer 5 serves as an additional protective layer
- the additional protective layer may also be accommodated between the diffusion barrier layer 7 and the electrical insulation layer 5.
- the additional protective layer is applied to the diffusion barrier layer 7.
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- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Life Sciences & Earth Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Health & Medical Sciences (AREA)
- Molecular Biology (AREA)
- Analytical Chemistry (AREA)
- Computer Hardware Design (AREA)
- Materials Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Power Engineering (AREA)
- Biochemistry (AREA)
- General Health & Medical Sciences (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009546708A JP2010517280A (ja) | 2007-01-24 | 2008-01-09 | 電子的構成部材 |
CN200880002906.XA CN101589466B (zh) | 2007-01-24 | 2008-01-09 | 电子元件 |
EP08701362A EP2113131A1 (de) | 2007-01-24 | 2008-01-09 | Elektronisches bauteil |
US12/448,295 US8242599B2 (en) | 2007-01-24 | 2008-01-09 | Electronic component with diffusion barrier layer |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102007003541.3 | 2007-01-24 | ||
DE102007003541A DE102007003541A1 (de) | 2007-01-24 | 2007-01-24 | Elektronisches Bauteil |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2008090023A1 true WO2008090023A1 (de) | 2008-07-31 |
Family
ID=39323786
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2008/050199 WO2008090023A1 (de) | 2007-01-24 | 2008-01-09 | Elektronisches bauteil |
Country Status (6)
Country | Link |
---|---|
US (1) | US8242599B2 (de) |
EP (1) | EP2113131A1 (de) |
JP (1) | JP2010517280A (de) |
CN (1) | CN101589466B (de) |
DE (1) | DE102007003541A1 (de) |
WO (1) | WO2008090023A1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011002854A1 (de) | 2010-08-10 | 2012-02-16 | Robert Bosch Gmbh | Feldeffekt-Gassensor, Verfahren zur Herstellung eines Feldeffekt-Gassensors und Verfahren zur Detektion von Gas |
DE102012211460A1 (de) * | 2012-07-03 | 2014-01-09 | Robert Bosch Gmbh | Gassensor und Verfahren zum Herstellen eines solchen |
DE102013204262A1 (de) | 2013-03-12 | 2014-09-18 | Robert Bosch Gmbh | Funktionselement zum Anordnen vor dem aktiven Messbereich eines Sensorelements |
DE102015106002A1 (de) * | 2015-04-20 | 2016-10-20 | Gottfried Wilhelm Leibniz Universität Hannover | Elektrisches Bauteil, Konstruktionsbauteil eines technischen Gegenstands sowie Verfahren zu deren Herstellung |
DE102016208970A1 (de) * | 2016-05-24 | 2017-11-30 | Robert Bosch Gmbh | Verfahren zum Herstellen einer Elektromigration-resistenten kristallinen Übergangsmetall-Silizidschicht, entsprechende Schichtenfolge und Mikro-Heizer |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6376888B1 (en) | 1999-04-30 | 2002-04-23 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US20030129795A1 (en) * | 2002-01-07 | 2003-07-10 | Intel Corporation | Novel metal-gate electrode for CMOS transistor applications |
US20030143825A1 (en) * | 2001-12-27 | 2003-07-31 | Kouji Matsuo | Semiconductor device and method of manufacturing the same |
US20050151255A1 (en) * | 2002-06-17 | 2005-07-14 | Yuji Ando | Semiconductor device having schottky junction electrode |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2096824A (en) | 1981-04-09 | 1982-10-20 | Sibbald Alastair | Chemically sensitive field effect transistor |
JPS62298136A (ja) * | 1986-06-18 | 1987-12-25 | Oki Electric Ind Co Ltd | 半導体素子の製造方法 |
US4700462A (en) * | 1986-10-08 | 1987-10-20 | Hughes Aircraft Company | Process for making a T-gated transistor |
JPH02181920A (ja) * | 1989-01-09 | 1990-07-16 | Hitachi Ltd | 半導体集積回路装置 |
JPH07161659A (ja) * | 1993-12-07 | 1995-06-23 | Nec Corp | 半導体装置およびその製造方法 |
KR20010004598A (ko) * | 1999-06-29 | 2001-01-15 | 김영환 | 반도체 소자의 게이트 형성방법 |
US6787910B2 (en) * | 2002-07-23 | 2004-09-07 | National Chiao Tung University | Schottky structure in GaAs semiconductor device |
KR100459725B1 (ko) * | 2002-09-19 | 2004-12-03 | 삼성전자주식회사 | 금속 게이트 패턴을 갖는 반도체소자의 제조방법 |
JP4218557B2 (ja) * | 2004-03-12 | 2009-02-04 | 三菱電機株式会社 | 半導体装置 |
CN101019236A (zh) * | 2004-07-15 | 2007-08-15 | 斯平内克半导体股份有限公司 | 金属源极功率晶体管及其制造方法 |
US7400042B2 (en) * | 2005-05-03 | 2008-07-15 | Rosemount Aerospace Inc. | Substrate with adhesive bonding metallization with diffusion barrier |
US8304847B2 (en) * | 2005-11-01 | 2012-11-06 | Fuji Electric Co., Ltd. | Semiconductor pressure sensor |
US7389675B1 (en) * | 2006-05-12 | 2008-06-24 | The United States Of America As Represented By The National Aeronautics And Space Administration | Miniaturized metal (metal alloy)/ PdOx/SiC hydrogen and hydrocarbon gas sensors |
US7714386B2 (en) * | 2006-06-09 | 2010-05-11 | Northrop Grumman Systems Corporation | Carbon nanotube field effect transistor |
KR100781972B1 (ko) * | 2006-09-18 | 2007-12-06 | 삼성전자주식회사 | 메모리 소자 및 그의 제조방법 |
US20090214777A1 (en) * | 2008-02-22 | 2009-08-27 | Demetrius Sarigiannis | Multiple ampoule delivery systems |
-
2007
- 2007-01-24 DE DE102007003541A patent/DE102007003541A1/de not_active Withdrawn
-
2008
- 2008-01-09 JP JP2009546708A patent/JP2010517280A/ja active Pending
- 2008-01-09 WO PCT/EP2008/050199 patent/WO2008090023A1/de active Application Filing
- 2008-01-09 US US12/448,295 patent/US8242599B2/en not_active Expired - Fee Related
- 2008-01-09 CN CN200880002906.XA patent/CN101589466B/zh not_active Expired - Fee Related
- 2008-01-09 EP EP08701362A patent/EP2113131A1/de not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6376888B1 (en) | 1999-04-30 | 2002-04-23 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
US20030143825A1 (en) * | 2001-12-27 | 2003-07-31 | Kouji Matsuo | Semiconductor device and method of manufacturing the same |
US20030129795A1 (en) * | 2002-01-07 | 2003-07-10 | Intel Corporation | Novel metal-gate electrode for CMOS transistor applications |
US20050151255A1 (en) * | 2002-06-17 | 2005-07-14 | Yuji Ando | Semiconductor device having schottky junction electrode |
Also Published As
Publication number | Publication date |
---|---|
US20100072621A1 (en) | 2010-03-25 |
US8242599B2 (en) | 2012-08-14 |
CN101589466A (zh) | 2009-11-25 |
JP2010517280A (ja) | 2010-05-20 |
DE102007003541A1 (de) | 2008-07-31 |
EP2113131A1 (de) | 2009-11-04 |
CN101589466B (zh) | 2011-09-28 |
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