WO2006118141A1 - 多層配線基板およびその製造方法 - Google Patents
多層配線基板およびその製造方法 Download PDFInfo
- Publication number
- WO2006118141A1 WO2006118141A1 PCT/JP2006/308724 JP2006308724W WO2006118141A1 WO 2006118141 A1 WO2006118141 A1 WO 2006118141A1 JP 2006308724 W JP2006308724 W JP 2006308724W WO 2006118141 A1 WO2006118141 A1 WO 2006118141A1
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- WO
- WIPO (PCT)
- Prior art keywords
- wiring board
- multilayer wiring
- base material
- insulating base
- thickness
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 53
- 239000000758 substrate Substances 0.000 claims abstract description 84
- 239000010410 layer Substances 0.000 claims abstract description 51
- 239000013039 cover film Substances 0.000 claims abstract description 50
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- 239000000463 material Substances 0.000 claims description 122
- 239000010408 film Substances 0.000 claims description 25
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 24
- 238000010438 heat treatment Methods 0.000 claims description 23
- 239000000945 filler Substances 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 21
- 239000002184 metal Substances 0.000 claims description 21
- 239000011889 copper foil Substances 0.000 claims description 20
- 229920001187 thermosetting polymer Polymers 0.000 claims description 19
- 239000002131 composite material Substances 0.000 claims description 13
- 239000000853 adhesive Substances 0.000 claims description 12
- 230000001070 adhesive effect Effects 0.000 claims description 12
- 239000011229 interlayer Substances 0.000 claims description 5
- 239000004745 nonwoven fabric Substances 0.000 claims description 4
- 239000002759 woven fabric Substances 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims 1
- 239000012792 core layer Substances 0.000 abstract description 4
- 239000010409 thin film Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 description 27
- 238000007796 conventional method Methods 0.000 description 19
- 238000003825 pressing Methods 0.000 description 13
- 239000003822 epoxy resin Substances 0.000 description 10
- 229920000647 polyepoxide Polymers 0.000 description 10
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- 238000012545 processing Methods 0.000 description 9
- 238000012546 transfer Methods 0.000 description 8
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- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
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- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000004308 accommodation Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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- 238000009713 electroplating Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
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- 239000011256 inorganic filler Substances 0.000 description 1
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- 238000009413 insulation Methods 0.000 description 1
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- 239000011135 tin Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
- H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Definitions
- the present invention has a particularly thin all-layer inner via hole (IVH) structure in which vias that electrically connect each wiring layer of a multilayer wiring board and lands formed in the wiring layer are positioned with high accuracy.
- IVH all-layer inner via hole
- the present invention relates to a method for manufacturing a multilayer wiring board.
- Japanese Patent Publication No. Hei 06-26 8345 discloses that an arbitrary electrode of a multilayer wiring board is placed at an arbitrary wiring pattern position.
- An inner via hole (IVH) connection method capable of interlayer connection that is, an all-layer IVH structure resin multilayer wiring board is disclosed.
- the all-layer IVH-structured resin multilayer wiring board was an alternative to the previous multilayer wiring board, in which the metal-plated conductor on the inner wall of the through hole was the main component of interlayer insulation.
- the all-layer IVH structure resin multilayer wiring board can be filled with a conductor in the via hole of the multilayer wiring board to connect only necessary layers, and an inner via hole can be provided directly under the component land. Therefore, the substrate size can be reduced and high-density mounting can be realized.
- conductive paste is used for the electrical connection in the inner via hole, the stress applied to the via hole can be relieved, and a stable electrical connection can be achieved against dimensional changes due to thermal shock or the like. Can be realized.
- 3A-3I are manufactured in steps as shown in FIGS.
- An electrically insulating substrate 301 shown in FIG. 3A includes a porous substrate having compressibility, a substrate having a three-layer structure in which an adhesive layer is formed on both sides of a core film, or a fiber and a resin.
- Composite substrate Etc As shown in FIG. 3A, cover films 302 are attached to both sides of the electrically insulating substrate 301 by laminating.
- a via hole 303 penetrating all of the electrically insulating base material 301 and the cover film 302 is formed using a laser or the like.
- a conductive paste 304 is filled into the via hole 303.
- the cover film plays a role of preventing the conductive paste from remaining on the electrically insulating substrate.
- the wiring material 305 is bonded to the electrically insulating substrate 301 by heating and pressurizing.
- the electrically insulating substrate 301 is compressible, it shrinks in the thickness direction by heating and pressing.
- the conductive paste 304 is also compressed in the thickness direction.
- the metal fillers in the conductive paste come into contact with each other at high density, and electrical connection between the wiring material 305 and the conductive paste 304 is realized.
- the state of high-density contact includes both that many metal fillers are in contact with each other and that the contact area between metal fillers is large.
- an electrically insulating base material in which one side of a double-sided wiring board 306 is filled with a conductive paste produced in the same steps as shown in FIGS. 3A to 3D. Is positioned and stacked by recognizing the position of the wiring pattern of the double-sided wiring board 306 already formed, and wiring material 308 is stacked on the other surface.
- the via hole is formed in the electrically insulating base material 307, the laser processing data is corrected based on the measurement result of the dimensional change in the surface direction of the double-sided wiring board 306.
- the wiring material 308 is bonded to the electrically insulating substrate 307 by heating and pressurizing.
- the double-sided wiring board 306 and the electrically insulating base material 307 are also bonded at the same time.
- the scan shown in Fig. 3E is performed. Similar to the tape, the electrically insulating substrate 307 is compressed in the thickness direction, and the conductive paste 309 is also compressed in the thickness direction. By this compression, the conductive paste 309 comes into contact with the wiring material 308 and the wiring 310 on the double-sided wiring board with high density, and electrical connection is realized.
- the multilayer wiring board shown in FIG. 31 is completed by patterning the surface wiring material 308.
- an example of a four-layer board is shown as the multilayer wiring board.
- the number of layers of the multilayer wiring board is not limited to four, and the number of layers can be increased by repeating the same steps. .
- Japanese Patent Publication No. 2000-77800 discloses a technique for reducing the size of the inner via hole and realizing high reliability in order to realize higher-density interlayer connection. Disclose the structure.
- Another conventional wiring board manufacturing method and structural features will be described with reference to FIG. Note that the description of parts that already overlap the example shown in Fig. 3 will be simplified.
- 4A to 4I are cross-sectional views showing a method of manufacturing a wiring board of another conventional example for each main step.
- an electrically insulating adhesive 411 is formed on both surfaces of an electrically insulating substrate 401, and a cover film 402 is formed on both sides thereof.
- a via hole 403 penetrating the electrically insulating base material 401 is formed.
- the electrically insulating substrate 401 as in the conventional example described above, a porous substrate having compressibility, a substrate having a three-layer structure in which an adhesive layer is formed on both sides of the core film, or fibers and resin A composite base material or the like is used.
- the via hole is formed by laser processing using a carbon dioxide laser, excimer laser, YAG laser or the like.
- a wiring transfer base material 405 shown in FIG. 4D includes a supporting base material 406 and wiring 407 formed on the supporting base material in a desired pattern.
- the wiring transfer substrate is formed by selectively etching only a copper foil into a desired pattern from a composite foil in which a copper foil is laminated on an aluminum foil. Copper foil formation on aluminum foil is usually performed by electrolytic plating, and the stress between aluminum and copper is very small. In other words, when the copper foil is etched to form a wiring pattern, the dimensional change in the surface direction is reduced. It becomes a simple structure.
- FIG. 4D shows a state in which the wiring material 408 is disposed on the other surface.
- the force described by the step of forming the electrically insulating base material is simplified.
- the wiring transfer base material 405 may be formed first.
- via processing can be performed by recognizing the position of the already formed wiring pattern and correcting the laser processing data in accordance with the position of the wiring 407.
- the wiring transfer base material 405, the electrically insulating base material 401, and the wiring material 408 are bonded by heating and pressing. At this time, the wiring on the wiring transfer base material 405 is embedded in the electrically insulating base material 401.
- the conductive base 404 filled in the via hole 403 is effectively compressed by embedding the wiring 407, and the metal filler in the conductive paste 404 is brought into high density contact. Thus, the electrical connection between the conductive paste 404 and the wiring material 408 is ensured.
- a wiring substrate 409 having two layers of wiring 407 is formed as shown in FIG. 4F.
- the electrically insulating base material 410 is manufactured by the same manufacturing method as that for the electrically insulating base material 401 already described.
- the wiring transfer base materials to be laminated in a simplified manner are shown by the same wiring pattern, but actually, different wiring patterns are generally used.
- a multilayer wiring board is completed as shown in FIG.
- the removal of the support substrate 406 shown here can be performed by different methods depending on the material used.
- a metal material is used as the support substrate 406
- removal by dissolution with a chemical solution is a method with excellent productivity.
- a resin sheet is used as a support substrate, it is generally peeled mechanically.
- the force shown in the example of a four-layer board as a multilayer wiring board is four. Further multilayering can be performed by the same steps that are not limited to layers.
- the conductive paste is compressed in the thickness direction or the wiring is embedded in the electrically insulating substrate depending on the compressibility characteristics of the electrically insulating substrate.
- the conductive paste is effectively compressed, so that the metal fillers in the conductive paste are brought into high-density contact with each other, and electrical connection between the wiring material and the conductive paste is realized.
- the conventional manufacturing method has the following problems when a multilayer wiring board having an all-layer IVH structure is manufactured using a thin electrical insulating base material.
- One problem is that the electrical connection resistance between the wiring material and the conductive paste varies widely because it is difficult to effectively compress the conductive paste.
- Another problem is that via resistance stability deteriorates in reliability tests. For this reason, it has been difficult to reduce the thickness of a multilayer wiring board having an all-layer IVH structure.
- the present invention has no compressibility effect other than the resin flow, and in a multilayer wiring board using a thin insulating base material, there are few insulating base materials formed without the wiring being embedded. It is a multilayer wiring board with an all-layer IVH (inner via hole) structure that has one or more layers.
- an all-layer IVH inner via hole
- the conductor filled in the via hole formed in the thin insulating substrate can be effectively compressed.
- FIG. 1A is a step sectional view showing a method for manufacturing the multilayer wiring board in accordance with the first exemplary embodiment of the present invention.
- FIG. 1B is a step sectional view showing the method for manufacturing the multilayer wiring board in Embodiment 1 of the present invention.
- FIG. 1C is a step sectional view showing the method for manufacturing the multilayer wiring board in Embodiment 1 of the present invention.
- FIG. 1D is a step cross-sectional view showing the method for manufacturing the multilayer wiring board in accordance with the first exemplary embodiment of the present invention.
- FIG. 1E is a step sectional view showing the method for manufacturing the multilayer wiring board in Embodiment 1 of the present invention.
- FIG. 1F is a step cross-sectional view showing the method for manufacturing the multilayer wiring board in Embodiment 1 of the present invention.
- FIG. 1G is a step sectional view showing the method for manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 1H is a step sectional view showing the method for manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. II is a step sectional view showing the method for manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 1J is a step sectional view showing the method for manufacturing the multilayer wiring board in the first embodiment of the present invention.
- FIG. 2A is a step sectional view showing the method for manufacturing the multilayer wiring board in Embodiment 2 of the present invention.
- FIG. 2B is a step sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 2C is a step sectional view showing the method for manufacturing the multilayer wiring board in Embodiment 2 of the present invention.
- FIG. 2D is a step sectional view showing the method for manufacturing the multilayer wiring board in accordance with the second exemplary embodiment of the present invention.
- FIG. 2E is a step sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 2F is a step sectional view showing the method for manufacturing the multilayer wiring board in accordance with the second exemplary embodiment of the present invention.
- FIG. 2G is a step sectional view showing the method for manufacturing the multilayer wiring board in accordance with the second exemplary embodiment of the present invention.
- FIG. 2H is a step sectional view showing the method for manufacturing the multilayer wiring board in accordance with the second exemplary embodiment of the present invention.
- FIG. 21 is a step sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 2J is a step sectional view showing the method for manufacturing the multilayer wiring board in the second embodiment of the present invention.
- FIG. 3A is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 3B is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 3C is a step sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 3D is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 3E is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 3F is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 3G is a step sectional view showing a conventional method for producing a multilayer wiring board.
- FIG. 3H is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 31 is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 4A is a step sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 4B is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 4C is a step sectional view showing a conventional method for producing a multilayer wiring board.
- FIG. 4D is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 4E is a step sectional view showing a conventional method for producing a multilayer wiring board.
- FIG. 4F is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 4G is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 4H is a step sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 41 is a step cross-sectional view showing a conventional method for manufacturing a multilayer wiring board.
- FIG. 1A to LJ are step sectional views of a method for manufacturing a multilayer wiring board according to Embodiment 1 of the present invention.
- cover films 102 are attached to both sides of an electrically insulating base material 101.
- the electrically insulating substrate 101 is a substrate having a substrate compressibility of 5% or less in the thickness direction.
- a composite base material of a porous base material and a resin a base material that can be used only by a thermosetting resin, a composite base material of fibers and a resin, and the like are used.
- a composite substrate of porous substrate and resin for example, a composite substrate in which a porous film obtained by stretching PTFE is impregnated with epoxy resin or cyanate resin can be used.
- a single thermosetting resin generally, an epoxy resin-coated one can be used.
- a commonly used pre-preparer having a thickness of 80 m has a base material compressibility of 10% or more.
- the base material compressibility in the thickness direction tends to decrease accordingly.
- the porosity of the prepreg is increased to increase the porosity, or the impregnated epoxy resin is impregnated. It can be realized by increasing the amount and increasing the flowability of the fat.
- the thickness of the prepreader is reduced, it is impossible to expect a compression effect other than the resin flowability. For example, when the pre-preder thickness is less than 40 m, the base material compression ratio is less than 5%.
- a composite base material in which a nonwoven fabric or woven fabric using aramid glass fibers is impregnated with epoxy resin is used.
- a substrate having a thickness force of 5 to 40 ⁇ m is used. When this thickness is reached, the base material compression ratio is 5% or less, which is not compressed in the thickness direction except for the resin flow even when pressed in the vacuum hot press step.
- Conductor compressibility (conductor collapse white Z conductor filling height) + base material compressibility (Equation 1)
- Conductivity using, for example, a commonly used 80 m thick pre-preda is as follows.
- the base material compressibility in the thickness direction of the prepreg itself is 10% or more. Therefore, to ensure via resistance stability, the cover film thickness should be sufficient to ensure that the conductor collapses 16 ⁇ m or more.
- a cover film having a thickness of 8 ⁇ m or more may be used. Therefore, when manufacturing a conventional multilayer wiring board having a general all-layer IVH structure, a cover film having a thickness of 12 to 19 m was used! /.
- cover films 102 are attached to both sides of an electrically insulating base material 101 having a thickness of 25 to 40 / zm by a laminate cache.
- the cover film may be a 6 to 10 ⁇ m thick cocoon film or a resin film such as PEN.
- via holes 103 penetrating all of the electrically insulating substrate 101 and the cover film 102 are formed by laser processing, punching, or the like.
- laser processing punching, or the like.
- the state of exposure to laser energy on the front and back surfaces of the electrically insulating substrate is different. It is easy to control.
- the conductive paste 104 was filled into the via hole 103 by squeezing.
- a material containing a metal filler and a resin binder is used as the conductive paste.
- the metal filler copper, silver, gold, tin, solder, and alloys thereof can be used.
- the resin binder thermosetting resin such as epoxy and polyimide can be used.
- copper was used as the metal filler, and copper conductive paste was prepared using epoxy as the resin binder, and used as a connection body.
- the conductive paste of the present invention is excellent in fillability in the via hole 103 and is a connection body suitable for securing a crushing white for effective compression for interlayer conduction.
- the state shown in FIG. 1D is obtained.
- the electrically insulating base material 101 is in a state where the conductive paste 104 protrudes from the surface by the thickness of the cover film 102, and a large amount of the conductive paste can be secured.
- the above-described problem is solved by securing as large a protruding portion of the conductive paste 104 as possible.
- the thickness force of the cover film was 20% or less of the via hole diameter, the paste was taken and the phenomenon did not occur.
- a cover film having a thickness of about 20% of the thickness of the electrically insulating substrate has been used.
- a thicker cover film 102 is necessary in order to ensure as large a protruding portion of the conductive paste 104 as possible.
- the cover film 102 needs to have a thickness of about 25% or more of the electrically insulating base material thickness. It was found from the results of the experiment.
- a cover film that satisfies the cover film thickness Z via hole diameter ⁇ 0.2 and has a thickness of about 25% or more of the electrically insulating base material thickness is used.
- the cover film is laminated using a 9 ⁇ m thick PEN film. ing.
- the hole diameter formed as the via hole 103 was about 80 ⁇ m, and was formed by laser processing.
- the copper foil 105 is disposed on both surfaces of the electrically insulating base material 101 shown in FIG. 1D (FIG. 1E), and the copper foil 105 is bonded by heating and pressing in this state, whereby FIG. 1F is obtained. It will be in the state shown.
- This heating and pressing step is performed under the condition that the electrically insulating substrate 101 is completely bonded to the copper foil 105.
- the electrically insulating substrate 101 contains a thermosetting resin
- the thermosetting resin is completely cured.
- the thermosetting resin is contained in the conductive paste 104, it is necessary to cure the resin in the conductive paste 104 in this heating and pressing step.
- epoxy resin is used as a thermosetting resin, Epoxy resin can be cured at 200 ° C for 1 hour under heat and pressure.
- the metal fillers included in the conductive paste 104 come into high-density contact during the heating and pressing step in order to stabilize the electrical connection in the via hole 103. .
- the metal filler is prevented from flowing at the same time.
- the electrically insulating substrate 101 can maintain a shape wall.
- the electrically insulating base material 101 for example, a base material in which a porous sheet having PTFE force is impregnated with resin, or a fiber nonwoven fabric or fiber woven fabric made of aramid glass fiber is impregnated with resin. It is preferable to use a different base material. By using such a base material, the metal filler is compressed in the thickness direction without flowing in the surface direction of the electrically insulating base material 101 during the heating caloric pressure step, so that a higher density contact is achieved. Is realized. Furthermore, it is preferable to secure as large a protruding portion of the conductive paste 104 as possible in order to achieve high-density contact because the metal filler can be compressed in the thickness direction.
- the electrically insulating substrate 101 a material impregnated with a resin composition containing an inorganic filler such as silica or alumina can be used.
- a resin composition containing an inorganic filler such as silica or alumina
- the electrically insulating base material 101 exhibits brittleness, making it difficult to maintain the self-shape during the step, but the electrical insulating base material 101 has a thermal expansion in the thickness direction. Since it can be made small, the electrical connection in the via hole can be made highly reliable.
- the core substrate 112 forms a via hole after pasting a cover film on both surfaces of the uncured electrical insulating base material 101, and then peels off the cover film to form a conductor in the via hole.
- Copper foil 105 is bonded and notched on both sides.
- Core substrate 1 No. 12 has a shape in which a part of the conductor protrudes more convexly than the surface of the electrically insulating substrate after the cover film is peeled off, so that the conductor can be prevented from being crushed. Therefore, even if the copper foil 105 serving as the wiring is formed without being embedded in the core substrate 112, the conductor can be sufficiently compressed.
- the electrically insulating base materials 11 la and 11 lb are arranged on both surfaces of the core substrate 112 so as to match the desired position of the wiring pattern formed on the core substrate 112. Further, the copper foil 105 is arranged and laminated on both outer sides thereof.
- the layered body shown in Fig. II is obtained by heating and pressing the stacked layers using a vacuum hot press.
- the electrically insulating base materials 11 la and 11 lb are produced in the same steps as in FIG.
- the multilayer wiring board 113 shown in the present embodiment has no compressibility effect other than the resin flow, and although it is formed using a thin electrically insulating base material.
- a multilayer wiring board having a very thin all-layer IVH structure can be obtained as a multilayer wiring board.
- the four-layer wiring board shown in FIG. 1J is formed as the multilayer wiring board.
- the number of layers is not limited to four.
- FIGS. 2A to 2J are cross-sectional views illustrating steps in a method for manufacturing a multilayer wiring board according to Embodiment 2 of the present invention. Note that the description of the same parts as those in Embodiment 1 is simplified. I will abbreviate it.
- an electrically insulating adhesive 202 is applied to both surfaces of an electrically insulating substrate 201, and a cover film 203 is attached to both sides thereof.
- An electrically insulating substrate 201 shown in FIG. 2A is an electrically insulating substrate having a substrate compressibility of 5% or less in the thickness direction.
- the electrically insulating substrate 201 of this embodiment uses a heat resistant film material.
- a film material that does not melt when heated to a reflow temperature of about 280 ° C is preferable. Further, it is more preferable that the material has a small dimensional variation after heating.
- a film material for example, a polyimide film aramide film or the like can be used.
- a polyimide film having a thickness of 12.5 ⁇ m was used as the electrically insulating substrate 201.
- An electrically insulating adhesive 202 is applied to both surfaces of the electrically insulating substrate 201.
- the electrical insulating adhesive 202 it is preferable to use a thermosetting adhesive such as epoxy resin or epoxy-modified polyimide resin.
- a thermosetting epoxy adhesive having a curing temperature of 170 ° C. was applied to a thickness of 5 to 10 m.
- cover films 203 are attached to both sides of the electrical insulating adhesive 202 by laminating.
- a resin film such as PET or PEN is used, and a film having a thickness of 6 to 10 ⁇ m can be used.
- a PEN film having a thickness of 9 m was used.
- the film substrate used in Embodiment 2 an electrically insulating substrate thinner than the substrate using the pre-preder described in Embodiment 1 can be obtained.
- the film material is not compressed in the vacuum hot press step applied in the manufacturing step of the present embodiment. Therefore, since only the uncured thermosetting adhesive applied on both sides is cured while flowing, the amount of compression of the film substrate as a whole is very small, but the multilayer wiring of the present invention with all layers IVH structure The material constituting the substrate is applicable.
- the electrically insulating base material 201 that is hardly compressed in the thickness direction other than the resin flow after the vacuum hot pressing step is used. Therefore, conventional It is difficult to effectively compress the conductive paste 205 with the connection mechanism by compression, and the electrical connection resistance between the wiring material and the conductive paste 205 varies widely, and the via resistance is stable in the reliability test. There is a problem such as deterioration in performance.
- the aspect ratio of the via hole 204 formed in the cover film 203 is increased to such an extent that the paste is removed and does not cause a phenomenon. Formed. Also in this embodiment, it is known that if the force bar film thickness Z via hole diameter ⁇ 0.2, the paste is taken and the phenomenon does not occur.
- the cover film 203 has a thickness of about 20% of the thickness of the electrically insulating substrate.
- the thickness and cover film 203 are necessary to secure the protruding portion of the conductive paste 205 as large as possible.
- the cover film 203 has a thickness of about 25% or more of the electrically insulating base material thickness. is necessary.
- an epoxy adhesive was applied to both surfaces of a 12.5 ⁇ m polyimide film as an electrically insulating substrate for 5 to 10 m.
- a PEN film having a thickness of 9 ⁇ m was laminated on the cover film 203 using a composite substrate having a total thickness of 22.5 to 32.5 ⁇ m.
- via holes 204 having a hole diameter of about 50 to 80 ⁇ m were formed in the laminated body after lamination by laser processing (FIG. 2B).
- the conductive paste 205 is filled in the via hole 204 (FIG. 2C), and then the cover film 203 is peeled off to remove the conductive paste 205 having a protruding portion as shown in FIG. 2D. Create a body.
- the copper foil 206 is disposed on both surfaces of the electrically insulating base material 201 shown in FIG. 2D (FIG. 2E), and the copper foil 206 is bonded by heating and pressing in this state. It will be in the state shown.
- the heating and pressing step shown in FIG. 2F is performed under the condition that the electrically insulating adhesive 202 is completely bonded to the copper foil 206.
- a thermosetting resin is contained in the electrically insulating adhesive, it is performed under the condition that the thermosetting resin is completely cured.
- the thermosetting resin is contained in the conductive paste 205, it is necessary to cure the resin in the conductive paste in this heating and pressurizing step.
- epoxy resin is used as thermosetting resin. In the case of using the resin, the epoxy resin can be cured under the heating and pressing conditions of 50 kgfZcm 2 , 200 ° C and 1 hour.
- thermosetting resin contained in the electrically insulating base material 201 is cured and bonded in the heating and pressing step, and when it flows in a liquid state, the metal filler is prevented from flowing simultaneously.
- thermosetting resin contained in the electrically insulating base material 201 is cured and bonded in the heating and pressing step, and when it flows in a liquid state, the metal filler is prevented from flowing simultaneously.
- the metal filler is compressed in the thickness direction without flowing in the surface direction of the electrically insulating substrate 201 in the heating and pressurizing step, so a higher density contact is realized.
- the protruding portion of the conductive paste 205 is preferably as large as possible because it can compress the metal filler in the thickness direction, which is preferable for achieving high-density contact.
- the electrically insulating base materials 21 la and 21 lb are arranged on both surfaces of the core substrate 212 so as to match the desired position of the wiring pattern formed on the core substrate 212.
- the copper foil 206 is further arranged on both outer sides.
- the laminate shown in FIG. 21 is obtained by heating and pressurizing using a vacuum heat press.
- the electrically insulating base materials 21 la and 21 lb are base materials prepared in advance in the same steps as in FIGS.
- the outermost copper foil 206 is patterned to complete the multilayer wiring board 213 shown in FIG. 2J.
- the multilayer wiring board 213 produced in this way has no compressibility effect other than the resin flow, and is a composite base material in which an electrical insulating adhesive 202 is applied to a film-like electrical insulating base material 201. Is used. Nevertheless, by increasing the ratio of the thickness of the cover film 203 to the total thickness of the electrically insulating base material, it is possible to sufficiently secure the collapse of the conductor. Since the crushing opening of the conductor can be secured, the metal filler can be compressed in the thickness direction even if the wiring 207 is not embedded in the electrically insulating base material, so the density is high. Contact can be realized, and electrical connection in the via hole can be made highly reliable. Also, a multilayer wiring board having a very thin thickness and an all-layer IVH structure can be obtained as a multilayer wiring board.
- FIG. 2J an example is shown in which the four-layer wiring board shown in FIG. 2J is formed as the multilayer wiring board.
- FIGS. 2A to 2J illustrate an example.
- the number of layers is not limited to four, and the same number of steps can be repeated to further increase the number of layers.
- the present invention it is possible to sufficiently secure the collapse of the conductor by increasing the thickness ratio of the cover film with respect to the thickness of the electrically insulating substrate. As a result, the conductor can be effectively compressed, and the via resistance stability can be secured. In addition, it is possible to form vias in the core layer without embedding the wiring even when a thin insulating base material having a compressibility effect other than the resin flow is used as the insulating base material. Become. As a result, it is possible to form a core layer in which no wiring is embedded on both surfaces, and to form a multilayer wiring board having an all-layer IVH structure using an electrically insulating base material having a thin total thickness as in the present invention. If you can!
- the multi-layer IVH structure multi-layer wiring board using the thin-layer electric insulating base material of the present invention is a multi-layer wiring board capable of realizing high-density component mounting and wiring accommodation with a very thin thickness. Furthermore, since it is thin, it is easy to impart some flexibility, so that it is possible to mount it by effectively using the gap in the casing of the device. Therefore, it is a very useful wiring board for electronic devices that require thin and light weight and high functionality, especially portable electronic devices.
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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JP2006526471A JPWO2006118141A1 (ja) | 2005-04-28 | 2006-04-26 | 多層配線基板およびその製造方法 |
US11/629,311 US8076589B2 (en) | 2005-04-28 | 2006-04-26 | Multilayer wiring board and its manufacturing method |
Applications Claiming Priority (2)
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JP2005131964 | 2005-04-28 | ||
JP2005-131964 | 2005-04-28 |
Publications (1)
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WO2006118141A1 true WO2006118141A1 (ja) | 2006-11-09 |
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PCT/JP2006/308724 WO2006118141A1 (ja) | 2005-04-28 | 2006-04-26 | 多層配線基板およびその製造方法 |
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Country | Link |
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US (1) | US8076589B2 (ja) |
JP (1) | JPWO2006118141A1 (ja) |
CN (1) | CN100558222C (ja) |
TW (1) | TW200704298A (ja) |
WO (1) | WO2006118141A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008244325A (ja) * | 2007-03-28 | 2008-10-09 | Japan Gore Tex Inc | プリント配線基板およびボールグリッドアレイパッケージ |
JP2014090110A (ja) * | 2012-10-31 | 2014-05-15 | Kyocer Slc Technologies Corp | 配線基板の製造方法 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4798237B2 (ja) * | 2009-03-09 | 2011-10-19 | 株式会社デンソー | Ic搭載基板、及び多層プリント配線板 |
JPWO2011155162A1 (ja) * | 2010-06-08 | 2013-08-01 | パナソニック株式会社 | 多層配線基板および多層配線基板の製造方法 |
JP5587139B2 (ja) * | 2010-11-04 | 2014-09-10 | 日本特殊陶業株式会社 | 多層配線基板 |
CN106735922B (zh) * | 2017-01-16 | 2018-10-09 | 深圳顺络电子股份有限公司 | 一种叠层电子元件及其制备方法 |
JP7066852B2 (ja) * | 2018-07-30 | 2022-05-13 | 京セラ株式会社 | 複合基板 |
CN113473748A (zh) * | 2020-03-30 | 2021-10-01 | 健鼎(湖北)电子有限公司 | 一种多层连接板的制造方法 |
US20240049397A1 (en) * | 2022-08-08 | 2024-02-08 | Reophotonics, Ltd. | Methods to fill through-holes of a substrate with metal paste |
Citations (3)
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JPH0818238A (ja) * | 1994-06-24 | 1996-01-19 | Matsushita Electric Ind Co Ltd | 多層プリント配線板及びその製造方法 |
JPH11298105A (ja) * | 1998-04-07 | 1999-10-29 | Asahi Chem Ind Co Ltd | ビアホール充填型プリント基板およびその製造方法 |
JP2002064270A (ja) * | 2000-08-17 | 2002-02-28 | Matsushita Electric Ind Co Ltd | 回路基板とその製造方法 |
Family Cites Families (5)
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JP2991032B2 (ja) | 1994-04-15 | 1999-12-20 | 松下電器産業株式会社 | 多層基板の製造方法 |
JP3889856B2 (ja) * | 1997-06-30 | 2007-03-07 | 松下電器産業株式会社 | 突起電極付きプリント配線基板の製造方法 |
TW410534B (en) * | 1997-07-16 | 2000-11-01 | Matsushita Electric Ind Co Ltd | Wiring board and production process for the same |
JP3215090B2 (ja) | 1998-06-16 | 2001-10-02 | 松下電器産業株式会社 | 配線基板、多層配線基板、及びそれらの製造方法 |
TW545092B (en) * | 2001-10-25 | 2003-08-01 | Matsushita Electric Ind Co Ltd | Prepreg and circuit board and method for manufacturing the same |
-
2006
- 2006-04-26 US US11/629,311 patent/US8076589B2/en not_active Expired - Fee Related
- 2006-04-26 TW TW095114938A patent/TW200704298A/zh unknown
- 2006-04-26 WO PCT/JP2006/308724 patent/WO2006118141A1/ja active Application Filing
- 2006-04-26 JP JP2006526471A patent/JPWO2006118141A1/ja active Pending
- 2006-04-26 CN CN200680000919.4A patent/CN100558222C/zh not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0818238A (ja) * | 1994-06-24 | 1996-01-19 | Matsushita Electric Ind Co Ltd | 多層プリント配線板及びその製造方法 |
JPH11298105A (ja) * | 1998-04-07 | 1999-10-29 | Asahi Chem Ind Co Ltd | ビアホール充填型プリント基板およびその製造方法 |
JP2002064270A (ja) * | 2000-08-17 | 2002-02-28 | Matsushita Electric Ind Co Ltd | 回路基板とその製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008244325A (ja) * | 2007-03-28 | 2008-10-09 | Japan Gore Tex Inc | プリント配線基板およびボールグリッドアレイパッケージ |
JP2014090110A (ja) * | 2012-10-31 | 2014-05-15 | Kyocer Slc Technologies Corp | 配線基板の製造方法 |
Also Published As
Publication number | Publication date |
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CN100558222C (zh) | 2009-11-04 |
CN101032194A (zh) | 2007-09-05 |
TW200704298A (en) | 2007-01-16 |
US20080308304A1 (en) | 2008-12-18 |
US8076589B2 (en) | 2011-12-13 |
JPWO2006118141A1 (ja) | 2008-12-18 |
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