WO2005112117A2 - Leistungs-halbleiterbauteil - Google Patents
Leistungs-halbleiterbauteil Download PDFInfo
- Publication number
- WO2005112117A2 WO2005112117A2 PCT/DE2005/000848 DE2005000848W WO2005112117A2 WO 2005112117 A2 WO2005112117 A2 WO 2005112117A2 DE 2005000848 W DE2005000848 W DE 2005000848W WO 2005112117 A2 WO2005112117 A2 WO 2005112117A2
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- WIPO (PCT)
- Prior art keywords
- semiconductor component
- connection
- components
- active
- power semiconductor
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Definitions
- the invention relates to a power semiconductor component according to the preamble of patent claim 1.
- the document DE 101 34 986 AI teaches to use adapter modules.
- the documents DE 199 23 523 AI and DE 101 23 869 AI show ways to increase the integration density of the electronic components themselves.
- DE 199 33 265 AI describes how to arrange electronic components one above the other using composite bodies.
- the object underlying the invention is high
- the invention provides a power semiconductor component according to claim 1.
- Advantageous refinements or developments of the inventive concept can be found in the subclaims.
- the power semiconductor component has a first and a second active semiconductor component.
- Each semiconductor device has electrical connections provided, which are led out from the semiconductor components in the form of connection legs.
- the first semiconductor component is at least partially electrically connected to the second semiconductor component by a plug connection.
- the plug connection is realized by intermeshing the connection pins of the second semiconductor component in the electrical connections of the first semiconductor component.
- Active semiconductor component means in particular controlling components such as transistors, but also integrated circuits or chips.
- the active semiconductor components preferably represent power semiconductor components.
- connection pins of the second semiconductor component preferably engage in the connection pins of the first semiconductor component.
- the (at least one) connection pins of the second semiconductor component each have a groove
- the (at least one) connection pins of the first semiconductor component each have a bore.
- the dimensions of the groove and bore are matched to one another such that when the leads of the second semiconductor component are inserted into the respective bores of the leads of the first semiconductor component, the leads lock together. In this way, reliable and highly integrated contacting can be achieved.
- the second semiconductor component is arranged, for example, above the first semiconductor component, but can also be arranged next to the first semiconductor component.
- the invention is not restricted to a power semiconductor component with only two active semiconductor components. Rather, the number of active semiconductor components be arbitrary. For example, if the second semiconductor component is above the first
- semiconductor component is arranged, further semiconductor components are arranged above the second semiconductor component, the connection legs of which each in the connection legs of the one below
- Intervene semiconductor device In this way, any complex layer structures can be realized from active semiconductor components.
- the power semiconductor component according to the invention can have passive components, the electrical connections or connecting pins of which are electrically connected to electrical connections or connecting pins of the active semiconductor components via plug connections.
- the principle of the plug connection according to the invention can also be applied to power semiconductor components which, in addition to active semiconductor components, also have passive components, for example capacitors or resistors. In this way, power semiconductor components can be constructed which have any number of active and passive components which are electrically connected to one another by means of plug connections.
- the plug connections it is possible for the plug connections to be located within one of the active semiconductor components or within one of the passive components and / or outside of the active semiconductor components or the passive components.
- the electrical connections and / or the connection pins of the active semiconductor elements or of the passive components can be configured such that electrical contacts are formed by the plug connections, the resilient ones
- Connection pins are caused such that when the connection pin is inserted into a further connection pin or an electrical connection, the connection pin exerts a sideways force on the electrical connection / connection pin and thus forms a press / clamp contact.
- the power semiconductor component according to the invention therefore makes it possible to reduce the number of conductor tracks on circuit boards and substrates. Furthermore, line-related
- An essential aspect of the invention is to "misuse" existing components of electronic components for plug connections or as rewiring levels. This means that additional modules or conductor tracks can be saved.
- FIG. 1 shows a first embodiment of a power semiconductor component according to the invention in cross-sectional representation
- FIG. 2 shows a preferred embodiment of the plug connection shown in FIG. 1,
- FIG. 3 shows a schematic illustration of an application example for the power semiconductor component according to the invention
- FIG. 4 shows a possible bond diagram of the power semiconductor component shown in FIG. 3, FIG.
- 5 shows a second embodiment of a power semiconductor component according to the invention in cross-sectional representation
- 6 shows a third embodiment of a power semiconductor component according to the invention in cross-sectional representation
- the first embodiment 1 shown in FIG. 1 has a first active semiconductor component 2 and a second active semiconductor component 3, which is arranged above the first active semiconductor component 2.
- the first active semiconductor component 2 has a housing 4 in which a semiconductor component 5 is provided on a carrier element 6.
- the semiconductor component 5 is contacted by contact elements 7, which in turn are connected to electrical connections 8.
- the electrical connections 8 are led out of the housing 5 in the form of connection legs 9.
- the second active semiconductor component 4 has a housing 10, in which a carrier element 11 and a semiconductor component 12 provided thereon are arranged.
- the semiconductor component 12 is contacted by means of contact elements 13, which in turn are connected to electrical connections 14.
- the electrical connections 14 are led out of the housing 10 as connection legs 15, inserted into the housing 4 of the first active semiconductor component 2 via corresponding bores and engage in the electrical connections 8, so that an electrical connection is created between the ends of the connection legs 15 and the electrical connections 8.
- Component components of the first active semiconductor component 2 (the electrical connections 8) are therefore used to contact the second active semiconductor component 3. On the one hand, this enables the integration density to be increased, and on the other hand, line-related losses or interference are reduced.
- each electrical connection 8 has a bore 16 through which the ends of the connection legs 15 can be passed. Furthermore, a groove 17 is provided at the ends of the connection legs 15, which can snap into the profile of the bores 16 and thus forms a stable plug connection between the active semiconductor components 2, 3.
- the second active semiconductor component 3 is a control chip (IC) and the first active semiconductor component 2 is a power semiconductor component, for example a power transistor.
- a first to third active semiconductor component 2, 3 and 17 are interconnected to form a power semiconductor component 22 (a bridge circuit).
- the invention can be applied to the power semiconductor device 22 in two ways:
- connection pin 18, which is led out of the second active semiconductor component 3 can be electrically connected on the basis of a plug connection to a connection leg 19, which is led out of the first active semiconductor component 2;
- a Terminal pins 20, which are led out of the third active semiconductor component 17, are electrically connected to a terminal legs 21, which are led out of the first active semiconductor component 2, on the basis of a plug connection.
- the plug connection according to the invention enables the active semiconductor components 2, 3 and 17 to be connected together in a simple, reliable and highly integrated manner.
- the power semiconductor component shown in FIG. 3 is used, for example, to connect electric motors or
- Switched-mode power supplies the individual components in turn being able to be controlled or regulated via one or more ICs.
- additional semiconductor components can be plugged onto the power semiconductor component 22 by means of a plug connection. This is shown by way of example with reference to FIG. 4.
- FIG. 4 shows a possible bond diagram of the power semiconductor component 22 shown in FIG. 3.
- some of the contact areas 24 are not required for contacting the power semiconductor component 22, for example the contact areas identified by reference numerals 25.
- the contact surfaces 25 can therefore be used to make contact with an overlying one (not shown here)
- Semiconductor component for example a control chip or another semiconductor power component
- semiconductor component for example a control chip or another semiconductor power component
- connection pins of the active semiconductor component arranged above them can be inserted in order to form an electrical connection with the contact surfaces 25.
- existing conductor tracks of the power semiconductor component 22, which, however, are not required for contacting the same, can be used and in this way and Saving space, increasing the integration density and achieving an electrical performance gain.
- FIG. 5 shows a second embodiment 30 of a power semiconductor component according to the invention.
- a first, a second and a third active semiconductor component 2, 3, 17 are stacked one above the other, with a connection leg 31 of the third active semiconductor component 17 in the form of a plug connection in a connection leg 32 of the second active
- connection legs 32 of the second active one engages. Furthermore, the connection legs 32 of the second active one
- connection pins of the upper active semiconductor components each have to connect to the connection pins of the one below
- connection legs 33 are soldered to a circuit board 34.
- the loop-shaped shape of the connecting pins 31, 32 can cause a sideways force when the connecting pin 31 engages in the connecting pin 32 to be exerted by the connecting pin 31 on the connecting pin 32.
- a stable electrical clamping contact between the connecting legs 31, 32 and 33 can be achieved in a simple manner.
- the quality of the electrical contacts between the connection legs can be optimized by a special leg geometry of the connection legs 31 to 33.
- the third embodiment 40 shown in FIG. 6 shows a first, a second and a third active
- Semiconductor component 17 engages in a lead 33 of the first active semiconductor component 2, and another lead 31 of the third active semiconductor component 17 engages in a lead 32 of the second active semiconductor component 3.
- the third active semiconductor element 17 is, for example, a control chip, and the first and second active semiconductor components
- 2, 3 can be power elements, for example transistors.
- the invention is not limited to this.
- FIG. 7 shows an active semiconductor component 50 according to the prior art, in whose housing (molding compound and lead frame) 51 bores 52 are made. These holes are required for the assembly of the semiconductor component 50, so they are present anyway and can, according to the invention, be used to insert connection pins of a semiconductor component arranged above them (not shown here) into the housing 51 of the semiconductor component 50. In this way, electrical connections (not shown here) which run through the bores 52 can be brought into contact with the connection pins of the semiconductor component arranged above them. In this special case, therefore, no additional holes have to be produced in order to implement a plug connection, as shown for example in FIG. 1.
- the bores 52 could also be arranged in other areas of the molding compound and the lead frame or the connecting legs.
- a first, second and third active semiconductor component 2, 3, 17 are provided on a circuit board 53.
- the third active semiconductor component 17 is on the first active Semiconductor component 2 is provided, and the second active semiconductor component 3 is arranged next to the first active semiconductor component 2.
- the first and the second active semiconductor component 2, 3 are power semiconductor elements
- the third active semiconductor component 17 is a control chip.
- the semiconductor component 17 is connected by means of electrical connections 54 to the second and third active semiconductor components 2, 3 and to contact areas 55 of the circuit board 53.
- the first active semiconductor component 2 is connected to the contact surfaces 55 by means of electrical connections 56 and the second active semiconductor component 3 is connected by means of electrical connections 57.
- the design rules of the active semiconductor components 2, 3 and 17 have to be coordinated intensively with one another, which has the disadvantage that the available space on the circuit board 53 can only be used insufficiently.
- the active semiconductor components 2, 3 cannot be controlled by different control chips, since due to the small dimensions, in particular of the second active semiconductor component 3, there is often no space for optional semiconductor components such as control chips on the active semiconductor components 2, 3.
- Semiconductor components 2, 3 are largely independent, so that even semiconductor components that are larger than the underlying semiconductor components can be stacked on top of them. LIST OF REFERENCE NUMBERS
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Details Of Connecting Devices For Male And Female Coupling (AREA)
- Semiconductor Integrated Circuits (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007511853A JP4444335B2 (ja) | 2004-05-11 | 2005-05-04 | 電力半導体装置 |
US11/568,885 US8299585B2 (en) | 2004-05-11 | 2005-05-04 | Power semiconductor device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004023307A DE102004023307B3 (de) | 2004-05-11 | 2004-05-11 | Leistungs-Halbleiterbauteil |
DE102004023307.1 | 2004-05-11 |
Publications (2)
Publication Number | Publication Date |
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WO2005112117A2 true WO2005112117A2 (de) | 2005-11-24 |
WO2005112117A3 WO2005112117A3 (de) | 2006-02-02 |
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ID=34969652
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Application Number | Title | Priority Date | Filing Date |
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PCT/DE2005/000848 WO2005112117A2 (de) | 2004-05-11 | 2005-05-04 | Leistungs-halbleiterbauteil |
Country Status (5)
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US (1) | US8299585B2 (de) |
JP (1) | JP4444335B2 (de) |
CN (1) | CN100557799C (de) |
DE (1) | DE102004023307B3 (de) |
WO (1) | WO2005112117A2 (de) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008002836A2 (en) * | 2006-06-29 | 2008-01-03 | Sandisk Corporation | Stacked, interconnected semiconductor packages |
US7550834B2 (en) | 2006-06-29 | 2009-06-23 | Sandisk Corporation | Stacked, interconnected semiconductor packages |
US7615409B2 (en) | 2006-06-29 | 2009-11-10 | Sandisk Corporation | Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006034679A1 (de) | 2006-07-24 | 2008-01-31 | Infineon Technologies Ag | Halbleitermodul mit Leistungshalbleiterchip und passiven Bauelement sowie Verfahren zur Herstellung desselben |
US8853849B2 (en) | 2013-03-06 | 2014-10-07 | Infineon Technologies Austria Ag | Package arrangement and a method of manufacturing a package arrangement |
Citations (1)
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US20030042564A1 (en) * | 2000-12-04 | 2003-03-06 | Fujitsu Limited | Semiconductor device having an interconnecting post formed on an interposer within a sealing resin |
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JPS56116650A (en) * | 1980-02-20 | 1981-09-12 | Hitachi Ltd | Semiconductor device |
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JPS61108154A (ja) * | 1984-11-01 | 1986-05-26 | Nec Corp | 集積回路ケ−ス実装方式 |
JPH02271655A (ja) | 1989-04-13 | 1990-11-06 | Hitachi Ltd | 半導体装置およびモジュール |
JPH053082A (ja) | 1991-06-24 | 1993-01-08 | Hitachi Maxell Ltd | エレクトロルミネツセント素子および光感応装置 |
JP3293334B2 (ja) | 1993-08-25 | 2002-06-17 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
JPH0794674A (ja) | 1993-09-20 | 1995-04-07 | Hitachi Ltd | 半導体装置およびその製造方法 |
US6277225B1 (en) * | 1996-03-13 | 2001-08-21 | Micron Technology, Inc. | Stress reduction feature for LOC lead frame |
JPH1012811A (ja) * | 1996-06-21 | 1998-01-16 | Hitachi Ltd | 半導体集積回路装置及びその製造方法 |
DE19833713C1 (de) * | 1998-07-27 | 2000-05-04 | Siemens Ag | Verfahren zur Herstellung eines Verbundkörpers aus wenigstens zwei integrierten Schaltungen |
DE19923523B4 (de) * | 1999-05-21 | 2004-09-30 | Infineon Technologies Ag | Halbleitermodul mit übereinander angeordneten, untereinander verbundenen Halbleiterchips |
DE19933265A1 (de) * | 1999-07-15 | 2001-02-01 | Siemens Ag | TSOP-Speicherchipgehäuseanordnung |
DE10134986B4 (de) * | 2001-07-18 | 2004-04-29 | Infineon Technologies Ag | Verbindung gehäusegefaßter integrierter Speicherbausteine mit einer Leiterplatte |
JP2003347509A (ja) * | 2002-05-28 | 2003-12-05 | Omron Corp | 高熱伝導性樹脂封止電子回路基板とその製造方法 |
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2004
- 2004-05-11 DE DE102004023307A patent/DE102004023307B3/de not_active Expired - Fee Related
-
2005
- 2005-05-04 US US11/568,885 patent/US8299585B2/en active Active
- 2005-05-04 JP JP2007511853A patent/JP4444335B2/ja not_active Expired - Fee Related
- 2005-05-04 WO PCT/DE2005/000848 patent/WO2005112117A2/de active Application Filing
- 2005-05-04 CN CNB2005800151532A patent/CN100557799C/zh not_active Expired - Fee Related
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US20030042564A1 (en) * | 2000-12-04 | 2003-03-06 | Fujitsu Limited | Semiconductor device having an interconnecting post formed on an interposer within a sealing resin |
Non-Patent Citations (1)
Title |
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PATENT ABSTRACTS OF JAPAN Bd. 005, Nr. 197 (E-086), 15. Dezember 1981 (1981-12-15) & JP 56 116650 A (HITACHI LTD), 12. September 1981 (1981-09-12) * |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2008002836A2 (en) * | 2006-06-29 | 2008-01-03 | Sandisk Corporation | Stacked, interconnected semiconductor packages |
WO2008002836A3 (en) * | 2006-06-29 | 2008-02-14 | Sandisk Corp | Stacked, interconnected semiconductor packages |
US7550834B2 (en) | 2006-06-29 | 2009-06-23 | Sandisk Corporation | Stacked, interconnected semiconductor packages |
US7615409B2 (en) | 2006-06-29 | 2009-11-10 | Sandisk Corporation | Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages |
US8053276B2 (en) | 2006-06-29 | 2011-11-08 | SanDisk Technologies, Inc. | Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages |
US8053880B2 (en) | 2006-06-29 | 2011-11-08 | SanDisk Technologies, Inc. | Stacked, interconnected semiconductor package |
US8110439B2 (en) | 2006-06-29 | 2012-02-07 | Sandisk Technologies Inc. | Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages |
Also Published As
Publication number | Publication date |
---|---|
WO2005112117A3 (de) | 2006-02-02 |
CN1954427A (zh) | 2007-04-25 |
CN100557799C (zh) | 2009-11-04 |
US8299585B2 (en) | 2012-10-30 |
JP4444335B2 (ja) | 2010-03-31 |
US20090045446A1 (en) | 2009-02-19 |
JP2007536749A (ja) | 2007-12-13 |
DE102004023307B3 (de) | 2005-10-20 |
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