WO2005112117A3 - Leistungs-halbleiterbauteil - Google Patents

Leistungs-halbleiterbauteil Download PDF

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Publication number
WO2005112117A3
WO2005112117A3 PCT/DE2005/000848 DE2005000848W WO2005112117A3 WO 2005112117 A3 WO2005112117 A3 WO 2005112117A3 DE 2005000848 W DE2005000848 W DE 2005000848W WO 2005112117 A3 WO2005112117 A3 WO 2005112117A3
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WO
WIPO (PCT)
Prior art keywords
semiconductor component
power semiconductor
semiconductor assembly
semiconductor
electrical connections
Prior art date
Application number
PCT/DE2005/000848
Other languages
English (en)
French (fr)
Other versions
WO2005112117A2 (de
Inventor
Ralf Otremba
Original Assignee
Infineon Technologies Ag
Ralf Otremba
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Ralf Otremba filed Critical Infineon Technologies Ag
Priority to JP2007511853A priority Critical patent/JP4444335B2/ja
Priority to US11/568,885 priority patent/US8299585B2/en
Publication of WO2005112117A2 publication Critical patent/WO2005112117A2/de
Publication of WO2005112117A3 publication Critical patent/WO2005112117A3/de

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
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    • H01L25/10Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
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    • H01L25/117Stacked arrangements of devices
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Abstract

Ein Leistungs-Halbleiterbauteil (1, 30, 40) weist ein erstes und ein zweites aktives Halbleiterbauelement (2, 3) auf, deren elektrische Anschlüsse (8, 14) in Form von Anschlussbeinchen (9, 15) aus den Halbleiterbauelementen herausgeführt werden. Das erste Halbleiterbauelement (2) ist mit dem zweiten Halbleiterbauelement (3) wenigstens teilweise durch eine Steckverbindung elektrisch verbunden. Die Steckverbindung ist durch Ineinandergreifen der Anschlussbeinchen (15) des zweiten Halbleiterbauelements (3) in die elektrischen Anschlüsse (8) des ersten Halbleiterbauelements realisiert.
PCT/DE2005/000848 2004-05-11 2005-05-04 Leistungs-halbleiterbauteil WO2005112117A2 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007511853A JP4444335B2 (ja) 2004-05-11 2005-05-04 電力半導体装置
US11/568,885 US8299585B2 (en) 2004-05-11 2005-05-04 Power semiconductor device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004023307A DE102004023307B3 (de) 2004-05-11 2004-05-11 Leistungs-Halbleiterbauteil
DE102004023307.1 2004-05-11

Publications (2)

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WO2005112117A2 WO2005112117A2 (de) 2005-11-24
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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI376777B (en) * 2006-06-29 2012-11-11 Sandisk Corp Stacked, interconnected semiconductor packages and method of stacking and interconnecting semiconductor packages
US7550834B2 (en) 2006-06-29 2009-06-23 Sandisk Corporation Stacked, interconnected semiconductor packages
US7615409B2 (en) 2006-06-29 2009-11-10 Sandisk Corporation Method of stacking and interconnecting semiconductor packages via electrical connectors extending between adjoining semiconductor packages
DE102006034679A1 (de) 2006-07-24 2008-01-31 Infineon Technologies Ag Halbleitermodul mit Leistungshalbleiterchip und passiven Bauelement sowie Verfahren zur Herstellung desselben
US8853849B2 (en) 2013-03-06 2014-10-07 Infineon Technologies Austria Ag Package arrangement and a method of manufacturing a package arrangement

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116650A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor device
US20030042564A1 (en) * 2000-12-04 2003-03-06 Fujitsu Limited Semiconductor device having an interconnecting post formed on an interposer within a sealing resin

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH664250A5 (de) * 1984-04-02 1988-02-15 Sprecher & Schuh Ag Steckbares gehaeuse zur auswechselbaren aufnahme eines integrierten schaltungsbausteines.
JPS61108154A (ja) * 1984-11-01 1986-05-26 Nec Corp 集積回路ケ−ス実装方式
JPH02271655A (ja) 1989-04-13 1990-11-06 Hitachi Ltd 半導体装置およびモジュール
JPH053082A (ja) 1991-06-24 1993-01-08 Hitachi Maxell Ltd エレクトロルミネツセント素子および光感応装置
JP3293334B2 (ja) 1993-08-25 2002-06-17 セイコーエプソン株式会社 半導体装置及びその製造方法
JPH0794674A (ja) 1993-09-20 1995-04-07 Hitachi Ltd 半導体装置およびその製造方法
US6277225B1 (en) * 1996-03-13 2001-08-21 Micron Technology, Inc. Stress reduction feature for LOC lead frame
JPH1012811A (ja) * 1996-06-21 1998-01-16 Hitachi Ltd 半導体集積回路装置及びその製造方法
DE19833713C1 (de) * 1998-07-27 2000-05-04 Siemens Ag Verfahren zur Herstellung eines Verbundkörpers aus wenigstens zwei integrierten Schaltungen
DE19923523B4 (de) * 1999-05-21 2004-09-30 Infineon Technologies Ag Halbleitermodul mit übereinander angeordneten, untereinander verbundenen Halbleiterchips
DE19933265A1 (de) * 1999-07-15 2001-02-01 Siemens Ag TSOP-Speicherchipgehäuseanordnung
DE10134986B4 (de) * 2001-07-18 2004-04-29 Infineon Technologies Ag Verbindung gehäusegefaßter integrierter Speicherbausteine mit einer Leiterplatte
JP2003347509A (ja) * 2002-05-28 2003-12-05 Omron Corp 高熱伝導性樹脂封止電子回路基板とその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116650A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor device
US20030042564A1 (en) * 2000-12-04 2003-03-06 Fujitsu Limited Semiconductor device having an interconnecting post formed on an interposer within a sealing resin

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 005, no. 197 (E - 086) 15 December 1981 (1981-12-15) *

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CN1954427A (zh) 2007-04-25
US8299585B2 (en) 2012-10-30
WO2005112117A2 (de) 2005-11-24
JP2007536749A (ja) 2007-12-13
US20090045446A1 (en) 2009-02-19
CN100557799C (zh) 2009-11-04
DE102004023307B3 (de) 2005-10-20

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