WO2005022640A1 - 半導体量子ドット素子及びその製造方法 - Google Patents
半導体量子ドット素子及びその製造方法 Download PDFInfo
- Publication number
- WO2005022640A1 WO2005022640A1 PCT/JP2004/012355 JP2004012355W WO2005022640A1 WO 2005022640 A1 WO2005022640 A1 WO 2005022640A1 JP 2004012355 W JP2004012355 W JP 2004012355W WO 2005022640 A1 WO2005022640 A1 WO 2005022640A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- semiconductor
- buffer layer
- quantum dot
- layer
- semiconductor buffer
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 226
- 239000002096 quantum dot Substances 0.000 title claims abstract description 134
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- 239000013078 crystal Substances 0.000 claims abstract description 41
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 29
- 150000001875 compounds Chemical class 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 13
- 239000002994 raw material Substances 0.000 claims description 6
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 5
- 229910000673 Indium arsenide Inorganic materials 0.000 claims 2
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 claims 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims 1
- 229910052733 gallium Inorganic materials 0.000 claims 1
- 238000005424 photoluminescence Methods 0.000 abstract description 10
- 239000010410 layer Substances 0.000 description 182
- 238000000089 atomic force micrograph Methods 0.000 description 15
- 238000009826 distribution Methods 0.000 description 12
- 230000008878 coupling Effects 0.000 description 11
- 238000010168 coupling process Methods 0.000 description 11
- 238000005859 coupling reaction Methods 0.000 description 11
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- 239000000463 material Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 238000010030 laminating Methods 0.000 description 4
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 3
- 238000003887 surface segregation Methods 0.000 description 3
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 229910021478 group 5 element Inorganic materials 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000001451 molecular beam epitaxy Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000001338 self-assembly Methods 0.000 description 2
- 230000003595 spectral effect Effects 0.000 description 2
- QTQRGDBFHFYIBH-UHFFFAOYSA-N tert-butylarsenic Chemical compound CC(C)(C)[As] QTQRGDBFHFYIBH-UHFFFAOYSA-N 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000002109 crystal growth method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/122—Single quantum well structures
- H01L29/127—Quantum box structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/341—Structures having reduced dimensionality, e.g. quantum wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/341—Structures having reduced dimensionality, e.g. quantum wires
- H01S5/3412—Structures having reduced dimensionality, e.g. quantum wires quantum box or quantum dash
Definitions
- the present invention relates to a semiconductor quantum dot device and a method for manufacturing the same, and in particular, has high uniformity.
- the present invention relates to a semiconductor quantum dot device having quantum dots formed at high density and a method of manufacturing the same.
- quantum dot lasers and the like have been actively developed with the development of self-assembly forming technology of semiconductor nanostructures such as quantum dots.
- a quantum dot has a structure that confines electrons and holes in a very narrow three-dimensional energy potential. In such a structure, the energy levels of electrons and holes are completely discretized, and the state density function becomes a sharp pulse.
- the basic characteristics of a laser are greatly improved.
- Typical characteristics that can be improved include three characteristics: (1) threshold current, (2) modulation characteristics, and (3) spectral characteristics.
- the threshold current is a basic characteristic of the semiconductor laser.
- the dynamic characteristics of the laser such as the modulation characteristics and the spectral characteristics, show that the rate of increase of the gain with increasing carrier density, that is, the differential gain, increases because the spread of the state density function is suppressed and the gain spectrum narrows. Become. Since the relaxation oscillation frequency is proportional to the square root of the differential gain, a large increase in the modulation bandwidth can be expected by using quantum dots for the active layer.
- InAsZGaAs quantum dots can oscillate in the 1.3 m band required for optical communication in the optical communication field, and in recent years, the wavelength range has been expanded to the 1.52 m band. It is also approaching another important wavelength band, the 1.55 m band.
- quantum dots In order to realize the above-described quantum dot laser, it is necessary to form quantum dots with high uniformity and high density without causing deterioration in crystallinity.
- relatively simple quantum Dot fabrication methods include self-assembly or Stranski-Krastanow growth mode.
- MBE molecular beam epitaxy
- MOCVD organic metal vapor deposition
- a semiconductor quantum dot device has a semiconductor buffer layer 110 laminated by crystal growth on a semiconductor substrate (not shown), and has a lattice constant different from that of the semiconductor buffer layer 110.
- the quantum dot layer 120 includes a quantum dot layer 120 having a dot structure and a buried layer 130 formed so as to embed the dot structure.
- the semiconductor buffer layer 110 and the buried layer 130 are formed of GaAs
- the quantum dot layer 120 is formed of InAs.
- Non-Patent Document 1 "Optronitus” Optronitus Publishing Co., Ltd., Vol. 222, No. 8, p. 91-99 "Special Issue on Light and Nanotechnology"
- forming quantum dots using the MBE apparatus and MOCVD apparatus is a relatively simple method, but has the problem that the two-dimensional uniformity of the dot structure formed in the quantum dot layer 120 is low. is there. This problem has a direct effect on the optical properties.
- the photoluminescence half width outputted from one quantum dot is the limit, and the photoluminescence half width of the entire semiconductor quantum dot element approaches the limit.
- the semiconductor quantum dot device having the structure shown in FIG. 11 has a photoluminescence half-value width as large as 50 to 80 meV and is difficult to be put to practical use.
- the photoluminescence half-width has been improved to 25-30 meV by adjusting the conditions of low growth rate and low As pressure in the manufacturing method to appropriate values. Further improvement is necessary for practical use.
- the present invention has been made in view of the above problems, and an object of the present invention is to find a manufacturing condition of a quantum dot with high uniformity, so that a photoluminescence half width can be reduced to the limit.
- An object of the present invention is to provide a quantum dot device and a method for manufacturing the same.
- a semiconductor quantum dot device of the present invention is provided on a semiconductor substrate.
- a first semiconductor buffer layer formed by crystal growth, and a critical film thickness formed by crystal growth on the first semiconductor buffer layer, having a different lattice constant from the first semiconductor buffer layer, and not causing three-dimensional growth.
- a second semiconductor buffer layer formed by laminating the following film thicknesses; a third semiconductor buffer layer formed on the second semiconductor buffer layer and having a thickness at which monoatomic layer flattening occurs; It is essential to have a quantum dot layer formed on the third semiconductor buffer layer, having a different lattice constant from that of the third semiconductor buffer layer, and having a thickness greater than a critical thickness at which three-dimensional growth occurs. .
- the method for manufacturing a semiconductor quantum dot device of the present invention includes a step of forming a first semiconductor buffer layer by stacking on a semiconductor substrate by crystal growth, and a step of forming a first semiconductor buffer layer by crystal growth.
- After annealing the surface of the buffer layer forming a third semiconductor buffer layer so as to have a monoatomic layer flat on the second semiconductor buffer layer by crystal growth, Forming a quantum dot layer by laminating on the third semiconductor buffer layer a film thickness equal to or more than a critical film thickness at which three-dimensional growth due to lattice mismatch occurs with the second semiconductor buffer layer.
- a monoatomic layer is flattened by providing a coupling strain buffer layer including a second semiconductor buffer layer and a third semiconductor buffer layer below the quantum dot layer. Therefore, steps that spread in various directions in the two-dimensional in-plane direction on the third semiconductor buffer layer can be formed densely.
- quantum dots can be grown in a two-dimensional plane uniformly and with high density.
- the quantum dots can be grown uniformly, the probability that adjacent quantum dots are polymerized is reduced, and the dot can be prevented from being enlarged.
- the quality of the environment in which the quantum dots are grown is the same in any region, the size of the quantum dots can be made uniform.
- FIG. 1 is a cross-sectional view of a semiconductor quantum dot device according to an embodiment of the present invention.
- FIG. 2 is a sectional view of a semiconductor quantum dot device according to an embodiment of the present invention. Explain the manufacturing process FIG.
- FIG. 3 is an AFM image of the surface of the first semiconductor buffer layer shown in FIG. 2 (a).
- FIG. 4 is an AFM image of the surface of the second semiconductor buffer layer shown in FIG. 2 (b).
- FIG. 5 is an AFM image of the surface of the second semiconductor buffer layer when annealing the second semiconductor buffer layer shown in FIG. 2 (b).
- FIG. 6 is an AFM image of the surface of the third semiconductor buffer layer shown in FIG. 2 (c).
- FIG. 7 is an AFM image showing a quantum dot distribution state when quantum dots are grown on the first semiconductor buffer layer shown in FIG. 2 (a).
- FIG. 8 is a graph of the quantum dot distribution shown in FIG. 7.
- FIG. 9 is an AFM image showing a quantum dot distribution state when quantum dots are grown on the first semiconductor buffer layer shown in FIG. 2 (c).
- FIG. 10 is a graph of the quantum dot distribution shown in FIG. 9.
- FIG. 11 is a cross-sectional view of a configuration of a conventional semiconductor quantum dot device.
- FIG. 1 is a cross-sectional configuration diagram of a semiconductor quantum dot device according to an embodiment of the present invention.
- the second semiconductor buffer layer 20 and the third semiconductor buffer layer 30 are formed on the first semiconductor buffer layer 10.
- a coupling strain buffer layer 60 formed by continuous lamination is formed, and a quantum dot layer 40 is formed on the coupling strain buffer layer 60.
- An embedding layer 50 is provided so as to embed the quantum dot layer 40.
- the first semiconductor buffer layer 10 formed on the semiconductor substrate has a larger lattice constant than the first semiconductor buffer layer 10.
- Forming a second semiconductor buffer layer 20 by crystal-growing a compound semiconductor having the following formula, forming a strain on the second semiconductor buffer layer 20, and adjusting the film thickness of the second semiconductor buffer layer 20.
- a surface layer in which only a defect-free strain is formed on the surface of the second semiconductor buffer layer 20 is formed.
- a third semiconductor buffer layer 30 is formed by crystal-growing a compound semiconductor on the strained second semiconductor buffer layer 20, and the strain on the second semiconductor buffer layer 20 is reduced to a third level.
- a step of a monoatomic layer is formed in the two-dimensional plane of the third semiconductor buffer layer 30 while inheriting the surface of the third semiconductor buffer layer 30.
- the first semiconductor buffer layer 10 is a layer formed by crystal growth on a semiconductor substrate (not shown).
- the crystal growth material is preferably GaAs, which is preferably an mV group compound semiconductor. Not limited to GaAs, it may be InAlAs or InAlGaAs in which a small amount of In or A1 is bonded to GaAs.
- the second semiconductor buffer layer 20 of the coupling strain buffer layer 60 is a layer formed on the first semiconductor buffer layer 10 by crystal growth.
- a crystal growth material a group III-V compound semiconductor containing an In element is preferable, and specifically, InxGal-xAs is preferable.
- InGaAs it is not limited to InGaAs but may be a quaternary mixed crystal semiconductor such as InGaAlAs!
- the second semiconductor buffer layer 20 needs to be crystal-grown at a critical thickness or less that does not cause distortion due to lattice mismatch, does not impair crystal quality, and does not cause three-dimensional growth.
- the degree of lattice mismatch between GaAs and InAs is at least smaller than about 7%, preferably larger than 0 and less than 2.1%.
- the crystal quality is not impaired when the composition x is within the range of 0 and x ⁇ 0.3.
- this composition range is converted to the degree of lattice mismatch, the degree of lattice mismatch between GaAs and InAs is approximately 7% .Therefore, multiplying this value by the composition X does not impair the crystal quality.
- the degree is expected to be about 2.1%.
- the relationship between the composition X and the film thickness changes according to the change in the composition X.
- the film thickness dl is 0 and dl ⁇ 10 nm.
- the crystal quality can be grown within a range that does not impair the crystal quality and does not cause three-dimensional growth.
- three-dimensional growth is a phenomenon caused by a lattice constant difference between crystals, and means that three-dimensional island growth occurs after two-dimensional layer growth. . Therefore, “below the critical film thickness at which three-dimensional growth does not occur” means a film thickness below which the defect is not introduced and which includes the critical film thickness just before island-like three-dimensional growth occurs.
- the third semiconductor buffer layer 30 of the coupling strain buffer layer is a layer formed on the second semiconductor buffer layer 20 by crystal growth.
- III-V compound semiconductor is preferred, and specifically, GaAs is desirable.
- the thickness d2 of the GaAs layer is from several atomic layers (several monolayers: ML) to several nm. Specifically, 0 ⁇ d2 ⁇ lOnm is desirable!
- the third semiconductor buffer layer 30 has an effect of reducing the uneven surface segregation distribution of In which is generated when the second semiconductor buffer layer 20 is annealed. As a result, a flat surface can be obtained in which the steps of the single atomic layer are almost uniformly present. This also makes the uniformity and density change within the range of zero power nm of the thickness d2 of the third semiconductor buffer layer 30 as compared with the case where the quantum dot layer is grown directly on the first semiconductor buffer layer 10. . However, when the thickness d2 of the third semiconductor buffer layer 30 exceeds a few nm, the state is the same as when dots are directly grown on the first semiconductor buffer layer 10.
- the thickness d2 of the third semiconductor buffer is equal to zero even with uniformity and density when dots are directly formed on the first semiconductor buffer layer 10. It must be within the range. That is, d2 ⁇ 10 nm.
- “flattening of a monoatomic layer” means flattening at an atomic level, in other words, that the height difference of a monoatomic layer step is 1 atom and that it is a substantially flat surface.
- the quantum dot layer 40 is a layer formed on the third semiconductor buffer layer 30 by crystal growth.
- a crystal growth material a group III compound semiconductor is preferred, and specifically, InAs is mentioned.
- the crystal growth material is not limited to this, and may be a ternary mixed crystal semiconductor containing a small amount of Ga.
- the crystal growth material desirably has a large degree of lattice mismatch with the third semiconductor buffer layer so that three-dimensional growth occurs on the third semiconductor buffer layer. Accordingly, the quantum dot layer 40 is formed by three-dimensionally growing dots by continuing the crystal growth of a certain film thickness or more by utilizing the effect of lattice mismatch.
- the buried layer 50 is a layer formed on the quantum dot layer 40 by crystal growth.
- Crystal growth The material is preferably III-V compound semiconductor, more preferably GaAs.
- GaAs there is no particular limitation on the InGaAs in which a small amount of In is combined with GaAs, or the laminated form in which GaAs may be laminated after laminating InGaAs.
- TAG triethylgallium
- the coupling strain buffer layer including the second semiconductor buffer layer and the third semiconductor buffer layer is provided below the quantum dot layer, so that the monoatomic layer is formed. Since the flattening can be performed, steps can be densely formed in various directions in the two-dimensional plane of the third semiconductor buffer layer. As a result, quantum dots can be grown uniformly and at high density in a two-dimensional plane. In addition, since the quantum dots can be grown uniformly, the probability that adjacent quantum dots are polymerized is reduced, and the dot can be prevented from being enlarged. Further, since the quality of the environment in which the quantum dots are grown is equalized in any region, the size of the quantum dots can be made uniform.
- the number of quantum dot layers is one, but the number of layers is not limited to this, and for example, the quantum dot layer may have a multilayer structure.
- a coupling strain buffer layer (second and third semiconductor buffer layers) may be formed on the buried layer 50, and a quantum dot layer may be grown thereon by self-organization. .
- GaAs is used for the first semiconductor buffer layer 10
- InGaAs is used for the second semiconductor buffer layer 20
- GaAs is used for the third semiconductor buffer layer 30.
- MOCVD metal organic chemical vapor deposition
- a GaAs (001) substrate is prepared as a semiconductor substrate, the substrate temperature is set to 700 ° C., and GaAs is grown to a thickness of 250 nm.
- the semiconductor buffer layer 11 is formed.
- trimethylgallium (TMG) is used as a raw material for group III elements V
- tert-butylarsine (TBA) is used as a raw material for group V elements.
- TMI trimethylindium
- the fa layer 21 is formed.
- Ga As has approximately 1% lattice mismatch with GaAs
- the supply of TMI was stopped and the substrate temperature was raised to 600 ° C. (At this time, it took 450 seconds to raise the temperature to 600 ° C. During this time, the sample was annealed. State). Then, GaAs is grown to a thickness of 2 nm on the second semiconductor buffer layer 21 to form a third semiconductor buffer layer 31.
- the supply of TMG is stopped and the TMI is supplied again, as shown in FIG. 2D.
- the substrate temperature is lowered to 500 ° C., and InAs is grown on the third semiconductor buffer layer 31 to form the quantum dot layer 41. Since InAs has a lattice mismatch with GaAs of about 7%, three-dimensional growth occurs near the growth thickness exceeding 0.57 nm, and InAs quantum dots are formed by self-organization.
- the raw material of the group III element is switched to triethyl gallium (TEG), and the substrate temperature is maintained at 500 ° C. Then, GaAs is grown to a thickness of 100 nm to form a buried layer 51.
- TAG triethyl gallium
- the coupling strain buffer layer composed of the second semiconductor buffer layer 21 and the third semiconductor buffer layer 31 is provided under the quantum dot layer 41, A single atomic layer can be flattened while the third semiconductor buffer layer 31 inherits the strain formed on the surface of the semiconductor buffer layer 21 of the third semiconductor buffer layer 21. Steps extending in various directions can be formed. As a result, the quantum dots can be made highly uniform in the two-dimensional direction, and at the same time, the density can be made high.
- the crystal growth is improved as compared with the related art, and the emission wavelength of 1.3 m can be controlled.
- the steps formed on the second semiconductor buffer layer 21 can be more two-dimensionally flattened. Can be done.
- the third semiconductor buffer layer (GaAs) 31 can reduce the uneven surface segregation distribution of In which is generated when the second semiconductor buffer layer (InGaAs) 21 is annealed. As a result, the surface of the third semiconductor buffer layer, which also has a monoatomic layer force, becomes a more atomically uniform flat surface.
- the thickness dl of the second semiconductor buffer layer 21 has a correlation with the composition X of InxGal-xAs. Therefore, when the composition is within the range of 0 ⁇ x ⁇ 0.3, Even if the thickness is changed within the range of dl ⁇ 10 nm, dl can be grown without impairing crystallinity.
- the thickness d2 of the third semiconductor buffer layer 31 is not limited to 2 nm, but can be converted into atoms without losing the strain of the second semiconductor buffer layer 21 within the range of 0 ⁇ d2 ⁇ lOnm. A uniform flat surface can be formed.
- the annealing temperature is not limited to 600 ° C. If it is between 500 ° C and 700 ° C, the uneven surface segregation distribution of In can be reduced.
- the surface of each layer is composed of an atomic force microscope (AFM,
- Nanoscope Ilia an image taken by an atomic force microscope is called an AFM image.
- FIG. 3 is an AFM image of the layer surface 11a of the first semiconductor buffer layer 11 produced in the step of FIG. 2 (a).
- This first semiconductor buffer layer is formed of GaAs. As described above, when GaAs is crystal-grown, step bunching having a waveform in a one-dimensional direction occurs on 1 la of the layer surface.
- FIG. 4 is an AFM image of the layer surface 21a of the second semiconductor buffer layer 21 produced in the step of FIG. 2B.
- the second semiconductor buffer layer 21 is formed of InGaAs having a different lattice constant from that of the first semiconductor buffer layer 11. Therefore, spot-like islands caused by In are formed on the surface 21a of the second semiconductor buffer layer.
- FIG. 5 is an AFM image when the second semiconductor buffer layer surface 21a is annealed at 600 ° C.
- annealing the second semiconductor buffer layer 21 In is biased toward the surface and the surface is relaxed. (In this state, dots are still formed due to the large island boundaries.)
- FIG. 6 is an AFM image of the layer surface 31a of the third semiconductor buffer layer 31 produced in the step of FIG. 2 (c).
- This third semiconductor buffer layer 31 is formed of GaAs.
- the step changes to a monoatomic flat surface that exists uniformly in various directions in the two-dimensional plane. The distance between these steps is several tens of nanometers and hundreds of nanometers, and the size of the islands (near a spot or disk) formed on a flat step is about 150 nm to 500 nm.
- FIG. 7 is an AFM image when quantum dots are grown directly on the layer surface 11a shown in FIG.
- the layer surface 11a of the first semiconductor buffer layer 11 is formed with a wavy step bunching in the one-dimensional direction, so that the quantum dots also depend on the step bunching in the one-dimensional direction. Is formed.
- the size of the formed quantum dots is uneven.
- FIG. 8 is a distribution diagram where the horizontal axis represents the height of quantum dots and the vertical axis represents the number of quantum dots.
- the number of dots was counted by performing image processing on the AFM image.
- several to several tens of quantum dots having a height of 2 nm to 13 nm were formed, respectively.
- the density was 1.49 ⁇ 10 1 Q cm— 2
- the average height h of the quantum dots was 9.3 nm
- the average width d was 31.9 nm.
- FIG. 9 shows an AFM image of the quantum dots formed on the layer surface 31a shown in FIG.
- the quantum dots are also formed to spread uniformly in the two-dimensional in-plane direction depending on these steps. . From the same image, it can be observed that the size of the formed quantum dots is substantially uniform.
- Figure 10 shows the dot distribution diagram.
- quantum dots having a height of about lOnm accounted for 80% of the whole.
- the density at this time was 1.74 ⁇ 10 1 Q cm 2
- the average height h of the quantum dots was 9.7 nm
- the average width d was 39. Onm.
- the quantum dot density of the InAs quantum dot manufactured by inserting the coupling strain buffer layer 60 is 16.8% higher than the conventional 1.49 ⁇ 10 1 Q cm ⁇ 2 . Increased to 74 X 10 1Q cm- 2 .
- the half-width of photoluminescence of the semiconductor quantum dot device according to the present embodiment and the half-width of photoluminescence manufactured by the conventional technique (FIG. 11) were measured.
- the InAs quantum dots according to the present embodiment have 20. It decreased to 5 meV, and the effect of high uniformity appeared.
- a second semiconductor buffer layer eg, InGaAs 21 which causes distortion due to lattice mismatch with the first semiconductor buffer layer (eg, GaAs) 21.
- the strain of the second semiconductor buffer layer 21 is relaxed and a monoatomic layer flat surface is formed.
- Crystal growth of the third semiconductor buffer layer (GaAs) 31 within the range of 0 ⁇ d2 ⁇ 10 nm reduces the steps of the single atomic layer that spreads uniformly in the two-dimensional in-plane direction of the third semiconductor buffer layer 31. Since it can be formed, quantum dots (InAs) can be grown with high uniformity and high density. As a result, the growth environment of the quantum dots can be made uniform, so that the photoluminescence half width can be reduced to the limit.
- the present invention by providing a coupling strain buffer layer composed of the second semiconductor buffer layer and the third semiconductor buffer layer below the quantum dot layer, the third semiconductor buffer Since the steps can be formed densely in the two-dimensional in-plane direction of the layer, quantum dots can be formed with high uniformity and high density. As a result, it is possible to provide a semiconductor quantum dot device in which the photoluminescence half-value width of the quantum dot is reduced to the limit and a method of manufacturing the same.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Nanotechnology (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Electromagnetism (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biophysics (AREA)
- Recrystallisation Techniques (AREA)
- Semiconductor Lasers (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003-304978 | 2003-08-28 | ||
JP2003304978A JP3692407B2 (ja) | 2003-08-28 | 2003-08-28 | 半導体量子ドット素子の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2005022640A1 true WO2005022640A1 (ja) | 2005-03-10 |
Family
ID=34269285
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/012355 WO2005022640A1 (ja) | 2003-08-28 | 2004-08-27 | 半導体量子ドット素子及びその製造方法 |
Country Status (2)
Country | Link |
---|---|
JP (1) | JP3692407B2 (ja) |
WO (1) | WO2005022640A1 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4972995B2 (ja) * | 2006-05-17 | 2012-07-11 | 富士通株式会社 | 量子ドット半導体装置 |
US20120119188A1 (en) * | 2009-07-24 | 2012-05-17 | Pioneer Corporation | Semiconductor apparatus manufacturing method and semiconductor apparatus |
TWI442455B (zh) | 2010-03-29 | 2014-06-21 | Soitec Silicon On Insulator | Iii-v族半導體結構及其形成方法 |
GB2480265B (en) | 2010-05-10 | 2013-10-02 | Toshiba Res Europ Ltd | A semiconductor device and a method of fabricating a semiconductor device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002058200A2 (en) * | 2000-10-06 | 2002-07-25 | Science & Technology Corporation @ Unm | Quantum dot lasers |
-
2003
- 2003-08-28 JP JP2003304978A patent/JP3692407B2/ja not_active Expired - Lifetime
-
2004
- 2004-08-27 WO PCT/JP2004/012355 patent/WO2005022640A1/ja active Application Filing
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2002058200A2 (en) * | 2000-10-06 | 2002-07-25 | Science & Technology Corporation @ Unm | Quantum dot lasers |
Non-Patent Citations (3)
Title |
---|
LIU, H.Y. ET AL.: "Tuning the structural and optical properties of 1.3-um InGaAs quantum dots by a combined InAlAs and GaAs strained buffer layer", APPLIED PHYSICS LETTERS, vol. 82, no. 21, 26 May 2003 (2003-05-26), pages 3644 - 3646, XP012034183 * |
NEN ET AL.: "Shuki Dai 64 Kai Extended abstracts", THE JAPAN SOCIETY OF APPLIED PHYSICS, 30 August 2003 (2003-08-30), pages 268, XP002985769 * |
YAMAGUCHI, K. ET AL.: "One-Dimensional InAs Quantum-Dot Chains Grown on Strain-Controlled GaAs/InGaAs Buffer Layer by Molecular Beam Epitaxy", JAPANESE JOURNAL OF APPLIED PHYSICS, PART 2, vol. 41, no. 9A/B, 15 September 2002 (2002-09-15), pages L996 - L998, XP001162432 * |
Also Published As
Publication number | Publication date |
---|---|
JP3692407B2 (ja) | 2005-09-07 |
JP2005079182A (ja) | 2005-03-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Arakawa | Progress in GaN-based quantum dots for optoelectronics applications | |
JP4696285B2 (ja) | R面サファイア基板とそれを用いたエピタキシャル基板及び半導体装置、並びにその製造方法 | |
JP3987898B2 (ja) | 量子ドット形成方法及び量子ドット構造体 | |
JP2007042840A (ja) | 量子ドット光半導体素子の製造方法 | |
US6696372B2 (en) | Method of fabricating a semiconductor structure having quantum wires and a semiconductor device including such structure | |
WO2012114074A1 (en) | Semiconductor device and fabrication method | |
JP4651759B2 (ja) | 量子ドットを備えた素子 | |
JP2000196193A (ja) | 半導体装置及びその製造方法 | |
JP4041877B2 (ja) | 半導体装置 | |
JP2005534164A (ja) | 拡張された波長で作動する量子ドットを形成する方法 | |
JP3692407B2 (ja) | 半導体量子ドット素子の製造方法 | |
KR101697824B1 (ko) | 광자 다이오드 및 이의 제조방법 | |
JP3768790B2 (ja) | 量子ドット構造体及びそれを有する半導体デバイス装置 | |
JP4575173B2 (ja) | 量子井戸構造の製造方法 | |
JP4284633B2 (ja) | 半導体発光装置の製造方法 | |
JP2980175B2 (ja) | 量子ドット構造の製造方法及びそれを用いた半導体発光素子の製造方法 | |
JP4440876B2 (ja) | 半導体量子ドット構造の製造方法 | |
JP2006005256A (ja) | 半導体素子 | |
WO2005022641A1 (ja) | 半導体量子ドット素子及びその製造方法 | |
JP3169064B2 (ja) | 半導体立体量子構造の作製方法 | |
JP6635462B2 (ja) | 半導体量子ドット素子の製造方法 | |
Kovalenkov et al. | MOVPE self-assembling growth of nanoscaie InP and InAsP islands | |
JP4041887B2 (ja) | アンチモン系量子ドットの形成方法 | |
Akahane et al. | Highly-ordered and highly-stacked (150-layers) quantum dots | |
JPH1131811A (ja) | 歪多重量子井戸構造の成長方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
122 | Ep: pct application non-entry in european phase |