WO2005002224A1 - 字幕等の情報を含むビデオ信号の処理回路 - Google Patents
字幕等の情報を含むビデオ信号の処理回路 Download PDFInfo
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- WO2005002224A1 WO2005002224A1 PCT/JP2003/008210 JP0308210W WO2005002224A1 WO 2005002224 A1 WO2005002224 A1 WO 2005002224A1 JP 0308210 W JP0308210 W JP 0308210W WO 2005002224 A1 WO2005002224 A1 WO 2005002224A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/08—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division
- H04N7/087—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only
- H04N7/088—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only the inserted signal being digital
- H04N7/0884—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only the inserted signal being digital for the transmission of additional display-information, e.g. menu for programme or channel selection
- H04N7/0885—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only the inserted signal being digital for the transmission of additional display-information, e.g. menu for programme or channel selection for the transmission of subtitles
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K31/00—Medicinal preparations containing organic active ingredients
- A61K31/12—Ketones
- A61K31/122—Ketones having the oxygen directly attached to a ring, e.g. quinones, vitamin K1, anthralin
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K31/00—Medicinal preparations containing organic active ingredients
- A61K31/28—Compounds containing heavy metals
- A61K31/295—Iron group metal compounds
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K31/00—Medicinal preparations containing organic active ingredients
- A61K31/28—Compounds containing heavy metals
- A61K31/30—Copper compounds
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K31/00—Medicinal preparations containing organic active ingredients
- A61K31/33—Heterocyclic compounds
- A61K31/335—Heterocyclic compounds having oxygen as the only ring hetero atom, e.g. fungichromin
- A61K31/365—Lactones
- A61K31/375—Ascorbic acid, i.e. vitamin C; Salts thereof
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K33/00—Medicinal preparations containing inorganic active ingredients
- A61K33/24—Heavy metals; Compounds thereof
- A61K33/26—Iron; Compounds thereof
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K33/00—Medicinal preparations containing inorganic active ingredients
- A61K33/24—Heavy metals; Compounds thereof
- A61K33/32—Manganese; Compounds thereof
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K33/00—Medicinal preparations containing inorganic active ingredients
- A61K33/24—Heavy metals; Compounds thereof
- A61K33/34—Copper; Compounds thereof
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K33/00—Medicinal preparations containing inorganic active ingredients
- A61K33/40—Peroxides
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61K—PREPARATIONS FOR MEDICAL, DENTAL OR TOILETRY PURPOSES
- A61K45/00—Medicinal preparations containing active ingredients not provided for in groups A61K31/00 - A61K41/00
- A61K45/06—Mixtures of active ingredients without chemical characterisation, e.g. antiphlogistics and cardiaca
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/79—Processing of colour television signals in connection with recording
- H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
- H04N9/804—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components
- H04N9/8042—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components involving data reduction
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/78—Television signal recording using magnetic recording
- H04N5/781—Television signal recording using magnetic recording on disks or drums
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/84—Television signal recording using optical recording
- H04N5/85—Television signal recording using optical recording on discs or drums
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/08—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division
- H04N7/087—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only
- H04N7/088—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical blanking interval only the inserted signal being digital
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/79—Processing of colour television signals in connection with recording
- H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
- H04N9/804—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components
- H04N9/806—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components with processing of the sound signal
- H04N9/8063—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback involving pulse code modulation of the colour picture signal components with processing of the sound signal using time division multiplex of the PCM audio and PCM video signals
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/79—Processing of colour television signals in connection with recording
- H04N9/80—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback
- H04N9/82—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback the individual colour picture signal components being recorded simultaneously only
- H04N9/8205—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback the individual colour picture signal components being recorded simultaneously only involving the multiplexing of an additional signal and the colour video signal
- H04N9/8233—Transformation of the television signal for recording, e.g. modulation, frequency changing; Inverse transformation for playback the individual colour picture signal components being recorded simultaneously only involving the multiplexing of an additional signal and the colour video signal the additional signal being a character code signal
Definitions
- the present invention generally relates to a video signal processing circuit, and more particularly to a video signal processing circuit that encodes a video signal into which data such as subtitle information has been inserted.
- Recent television signals include closed caption information such as closed captions, character broadcast information, program guide information, and copy guard signals.
- closed caption information such as closed captions, character broadcast information, program guide information, and copy guard signals.
- these pieces of information and signals are input to a plurality of horizontal line portions located above the image field, in the top field and the bottom field.
- FIGS. 1A and 1B are diagrams showing the fields of the interlaced system in the NTSC system and the insertion positions of character information and the like.
- FIG. 1A shows the top field
- FIG. 1B shows the bottom field
- the top field consists of horizontal tracks from line 1 to line 263. Of these 23 horizontal scanning lines, lines 1 to 21 at the top of the field are blanking periods that are not displayed on the screen corresponding to the vertical blanking period, and the vertical sync pulse is inserted here. You. During the blanking period, test signals, subtitle information, teletext information, program guide information, copy guard signals, etc. can be inserted.
- the bottom field shown in Figure 1B consists of horizontal scan lines from line 26 4 to line 5 25, of which the top line from line 26 4 to line 28 4 is used during the blanking period. Yes, subtitle information etc. can be inserted here.
- Character data of the closed caption method is input to the line 21 of the top field and the line 284 of the bottom field as 16-bit data in each field. Of these 16 bits, 2 bits are used as a knowledge bit You can. For each frame, for example, character data inserted for one character is extracted to form a group of subtitles consisting of multiple characters, and superimposed on video information for a period specified by control information to display subtitles such as movies. Can be created.
- the video and audio signal when recording a video and audio signal supplied as an analog signal by television broadcasting as a digital signal, the video and audio signal is converted to a digital signal by an NTSC decoder and an audio DAC (digital analog converter). .
- the converted digital signal is input to the MPEG2 codec and encoded to compress the stream into the MPEG2PS or MPEG2TS format.
- the compressed stream is output from the stream dedicated port of the MPEG-2 codec, and is transferred by DMA to the recording device by the CPU and stored.
- the character data inserted into the lines 21 and 284 of the video frame encoded by the MPEG2 codec is extracted by the MPEG2 codec and inserted into the stream.
- the clock frequency of digital data output from the NTSC decoder that is, the supply speed of analog signals
- the frequency of the operating clock of the MPEG2 codec that is, the speed of encoding
- the digital data of each frame output from the NTSC decoder is temporarily stored in a buffer, and the frame data is sequentially read from the buffer and encoded. Is used. With such a buffer, the MPEG2 codec skips certain frames or repeats certain frames as necessary to absorb the difference between the data supply speed and the encoding speed as needed. Encoding.
- Patent Literature 1 Japanese Patent Publication No. 9-501088
- Patent Document 2 Japanese Patent Application Laid-Open No. 2000-21049
- Patent Literature 3 Japanese Patent Application Laid-Open No. 2000-01694939
- Patent Document 2 Japanese Patent Application Laid-Open No. H11-17511 Disclosure of the Invention
- a general object of the present invention is to provide a video signal processing circuit that solves one or more problems of the related art.
- the present invention absorbs a difference between a signal supply speed and a processing speed without deteriorating the consistency of character information when processing a video signal in which character information or the like is inserted for each frame or each field. It is a further specific object to provide a video signal processing circuit capable of performing the following.
- a video signal processing circuit comprises: a frame memory for receiving and storing at a first rate each frame of a digital video signal in which additional information is associated with each frame; A frame synchronization unit for reading out each frame of the digital video signal at a second rate; and without repeating the additional information when the frame synchronization unit repeatedly reads the same frame of the digital video signal, and A processing unit for associating the additional information with the digital video signal read by the frame synchronization unit without skipping the additional information when the frame synchronization unit skips and reads a certain frame of the digital video signal. It is characterized by the following.
- the video signal processing circuit even if a frame is repeatedly read due to a difference between the first rate and the second rate, or even if a frame is skipped and read, character information and the like are read.
- the additional information is processed so as to be associated with the video stream without being repeated or skipped. Therefore, the character
- processing a video signal in which information or the like is inserted for each frame or for each field it is possible to absorb the difference between the signal supply speed and the processing speed without deteriorating the consistency of character information and the like.
- FIG. 1A and 1B are diagrams showing each interlaced field and the insertion position of character information and the like.
- FIG. 2 is a diagram illustrating an example of a video signal processing circuit to which the present invention is applied.
- FIG. 3 is a block diagram showing a configuration of the MPEG2 codec and a connected memory.
- FIG. 4 is a flowchart showing a process performed by the CPU on the CCD in accordance with the frame skip 'repeat process.
- FIGS. 5A to 5E are diagrams showing a comparison between the present invention and the related art regarding correspondence between frames of video data and closed caption data.
- FIG. 2 is a diagram illustrating an example of a video signal processing circuit to which the present invention is applied.
- the video signal processing circuit 10 in Fig. 2 is composed of the MPEG2 codec 11, CPU & interface 12, data storage device 13, NTSC decoder 14, audio ADC 15, audio DAC 16, And NTSC encoder 17.
- ADC is the analog-to-digital converter
- DAC is the digital-to-analog converter.
- an analog video signal and an analog audio signal supplied by a television broadcast are input to an NTSC decoder 14 and an audio ADC 15, respectively.
- the NTSC decoder 14 converts an analog video signal into a digital video signal and supplies it to the MPEG2 codec 11.
- Audio AD C 1 5 converts an analog audio signal into a digital audio signal and supplies it to the MPE G2 codec 11.
- the MPEG 2 codec 11 temporarily stores a digital video signal in a frame memory according to a frame rate at which data is supplied.
- the MPEG2 codec 11 reads one frame of data from the frame memory according to the frame rate requested by itself. By this operation, when the requested frame rate is higher than the supply frame rate, the same frame is repeatedly read, and when the requested frame rate is lower than the supply frame rate, the frame is skipped halfway. Become.
- the MPEG2 codec 11 encodes the video data read from the frame memory, multiplexes it with audio data encoded by another path, and supplies it to the CPU & interface 12 as a compressed MPEG2 stream.
- the CPU & interface 12 transfers the supplied stream to the data storage device 13.
- the data storage device 13 is, for example, a node disk drive, a DVD drive, or the like, and stores a stream including video data and audio data in a storage medium.
- the CPU & interface 12 reads a stream including video data and audio data from the data storage device 13, separates video data and audio data, and decodes each data.
- the decoded audio data is converted by the audio DAC 16 into an analog audio signal.
- the decoded video data is converted by the NTSC encoder 17 into an analog video signal.
- FIG. 3 is a block diagram showing a configuration of the MPEG2 codec 11 and a connected memory.
- the RAM 21 includes a frame memory 21A for storing video signals for each frame and a CCD table 21B for storing closed-caption data (CCD).
- CCD closed-caption data
- the MPEG2 codec 11 in Fig. 3 has a frame synchronizer 31, a CCD slicer 32, a CPU 33, an MPEG2 video encoder 34, and an MPEG1 audio And a MPEG2 multiplexer 36, an MPEG2 demultiplexer 37, a MPEG2 video decoder 38, and an MPEG1 audio decoder 39.
- the frame sync port nitrogenizer 31 writes the input digital video signal to the frame memory 21 A of the RAM 21 via the CCD slicer 32.
- the frame memory 21A has a two-bank configuration, and each puncture has a memory capacity for one frame and stores video data for one frame.
- the frame synchronizer 31 writes the input video signal alternately to two banks of the frame memory 21A. When one frame of video data has been written to one bank, an interrupt is issued to CPU 33 (frame interrupt).
- the frame synchronizer 31 reads one frame of video data from the frame memory 21A and transfers the read video data to the MPEG 2 video encoder 3. Transfer to 4. At this time, the transfer source bank from which one frame of video data is to be read is a bank to which time-old video data is written. Therefore, of the two frames stored in the frame memory 21A, the one stored first is always transferred first.
- the video signal input from outside and the request of the MPEG2 video encoder 34 are not synchronized. Therefore, a slight difference may occur between the frame rate of the externally input video signal and the frame rate required by the MPEG2 video encoder 34. Even in this case, as described above, the frame synchronizer 31 operates in such a manner that the older one of the two frame data is always read out in response to the request of the MPEG 2 video encoder 34. Rate deviations are absorbed. That is, if the request rate of the MPEG2 video encoder 34 is high, a process of skipping frames (skip processing) is executed as a result, and if the request rate of the MPEG2 video encoder 34 is low, the result is Then, the same frame is transferred (repeat processing).
- the frame synchronizer 31 detects that the skip processing or the repeat processing has been executed, and outputs data indicating which processing has been executed to the frame synchronizer 31. It is stored in the register inside the decoder at the start of frame transfer.
- the frame synchronizer 31 interrupts the CPU 33 when the transfer of the head data of the frame is started (after skip / repeat, after register setting). Apply (encode start interrupt).
- the CPU 33 can know which processing has been executed by reading data indicating the skip processing or the repeat processing from the register in response to this interrupt.
- the CCD slicer 32 extracts a 16-bit CCD (closed caption data) from each field of the input video signal, and stores the extracted CCD in an internal register.
- a register is also provided to indicate whether or not the force detected the CCD.
- the CPU 33 extracts the CCD of the presence or absence of the CCD and the CCD of both fields and stores the CCD in the work memory of the CPU 33.
- the CPU 33 performs predetermined processing on the CCD according to the frame skip / repeat processing, and then writes the CCD data into the CCD table 21B secured in a predetermined area of the RAM 21. Note that the timing of this writing is the timing of responding to the encoder start interrupt.
- the MPEG2 video encoder 34 sequentially encodes the video data of each frame transferred from the frame memory 21A by the frame synchronizer 31, and generates an MPEG2 video stream.
- the MPEG2 video encoder 34 further inserts the CCDs stored in the CCD table 21B into the MPEG2 video stream in order.
- the MPEG1 audio encoder 35 encodes audio data supplied from the outside and supplies the encoded audio data to the MPEG2 multiplexer 36.
- the MPEG 2 multiplexer 36 multiplexes the MP EG 2 video stream supplied from the MP EG 2 video encoder 34 with the MPEG 1 video stream supplied from the MPEG 1 audio encoder 35, and outputs the multiplexed MP EG 2 PSZTS stream. Output to
- the MPEG2 demultiplexer 37 separates the MPEG2PSZTS stream input from the outside into a video stream and an audio stream, and supplies them to the MPEG2 video decoder 38 and the MPEG1 audio decoder 39.
- M The PEG2 video decoder 38 decodes the video stream and supplies it to the outside as a video output.
- the MPEG1 audio decoder 39 decodes the audio stream and supplies it as an audio output to the outside.
- FIG. 4 is a flowchart showing processing performed by the CPU 33 on the CCD in accordance with the frame skip / repeat processing. This processing is executed when the CPU 33 writes the CCD data into the CCD table 21B as described above.
- step ST1 of FIG. 4 the CPU 33 reads data indicating skip processing or repeat processing from a register (skip repeat register) in the frame synchronizer 31.
- step ST2 the CPU 33 determines whether or not the content of the skip repeat register indicates a repetition process. Since this is a normal case other than the repeat process, the process proceeds to step ST4.
- step ST4 the CPU 33 determines whether or not the content of the skip repeat register indicates a skip process. Since skip processing is a normal case, the process proceeds to step ST6.
- step ST6 the CPU 33 determines whether or not N is 0 or more.
- N has an initial value of 0, and is a force value that is incremented by 1 each time skip processing is performed (step ST5).
- N is 0 or more will be described later.
- step ST8 the CPU 33 writes data A to the CCD table 21B (CCD insertion register).
- the data A is the oldest CCD held in the CPU work memory area.
- step ST10 data A is deleted from the work memory area of the CPU 33.
- the CCD is transferred from the work memory area of the CPU 33 to the CCD table 21B in the order of the frame.
- the processing when the repeat processing is executed will be described.
- step ST1 of FIG. 4 the CPU 33 reads data indicating skip processing or repeat processing from a register (skip repeat register) inside the frame sink opening niser 31.
- step ST2 the CPU 33 determines whether or not the content of the skip repeat register indicates repeat processing. In this case, a repeat process is indicated, and the process proceeds to step ST3.
- step ST3 the CPU 33 writes NULL (code indicating no data) in the CCD table 21B (CCD insertion register).
- step ST10 the data A is deleted from the work memory area of the CPU 33.
- NULL is written in the repeated frame instead of repeating the corresponding CCD. This can prevent the character data of the repeated frame from being repeatedly displayed.
- the operation of writing NULL at the time of repeat processing does not necessarily need to be performed at the time of the frame where the repeat processing is executed.
- the repeat processing is executed, the fact that the repeat processing has been executed is stored without writing anything, and NULL may be written at an appropriate timing in any of the subsequent frames. Even by such an operation, the correspondence between the frame shifted by the repeat processing and the character data can be returned to the correct timing relation.
- extra NULL may be written in advance, and nothing may be written when the repeat processing is executed. In other words, stagger the timing in advance and repeat When executed, the timing may be returned to the correct timing. Regardless of which method is used, it is important that the same number of NULLs as the number of times of repeat processing is inserted at any time, so that the frame and the character data can be compared when viewed at long intervals. It is to keep the response right.
- step ST1 of FIG. 4 the CPU 33 reads data indicating a skip process or a repeat process from a register (skip repeat register) in the frame synchronizer 31.
- step ST2 the CPU 33 determines whether or not the content of the skip repeat register indicates a repeat process. Since this is a skip process other than the repeat process, the process proceeds to step ST4.
- step ST4 the CPU 33 determines whether or not the content of the skip repeat register indicates skip processing. In this case, since the skip processing is performed, the process proceeds to step ST5.
- step ST5 the count value N is increased by one.
- N is an initial value of 0, and is a count value incremented by 1 each time skip processing is performed.
- step ST6 the CPU 33 determines whether or not N is 0 or more. In this case, N is equal to or greater than 0, and the process proceeds to step ST7.
- step ST7 the CPU 33 determines whether or not the data A that is the oldest CCD in the CPU work memory area is NULL.
- the data A that is the oldest CCD in the CPU work memory area is NULL.
- the CPU 33 writes data A to the CCD tape holder 21B (CCD insertion register).
- step ST10 data A is deleted from the work memory area of the CPU 33.
- step ST7 the data that is the oldest CCD in the CPU work memory area If A is determined to be NULL, N is decremented by 1 in step ST9, and data A is deleted in step ST10 without writing data A (NULL) to the CCD table 21B. Therefore, even when a frame is skipped, if the corresponding CCD is unnecessary data (NULL), the CCD is discarded to maintain the timing relationship between the frame and the CCD correctly. be able to.
- step ST7 If the frame is skipped and the corresponding CCD is required data (N in step ST7), the CCD is written in step ST8. Therefore, the timing relationship between the frame and the CCD is shifted. In this case, N remains at a value of 0 or more because step ST9 is not executed. After that, when neither the skip process nor the repeat process is executed (when the frame is transferred as usual), N is set to 0 or more in step ST6, and step ST7 is executed. In step ST7, if it is determined that the data A, which is the oldest CCD in the work memory area, is NULL, it is possible to return the timing between the frame and the CCD to the correct relationship by discarding the CCD. it can. When skip processing is performed multiple times and N is a large number, the timing does not return to the correct relationship with one discard of CCD, but the timing is corrected only after multiple discards are repeated. Let's go back to the relationship.
- 5A to 5E are diagrams showing a comparison between the present invention and the conventional technology.
- FIG. 5A is a diagram showing a relationship between a frame “image” and closed caption data “CCD” of video data supplied from the outside as input.
- CCD (A, B) is inserted in image 1
- CCD (C, D) in image 2
- CCD (E, F) in image 3
- CCD (E) in image 4.
- G, H) are inserted.
- FIG. 5B is a diagram showing a video stream conventionally obtained when frame 2 is skipped. As shown in the figure, at the same time as image 2 is skipped, CC D (C, D) is also skipped, and subtitles that should be “ABCDEFGH”
- FIG. 5C is a diagram showing a video stream obtained by the present invention when frame 2 is skipped. As shown in the figure, even if image 2 is skipped, the corresponding CCD (C, D) is retained without discarding the data, so subtitles that should originally be “ABCD EFGH” will be displayed correctly. .
- FIG. 5D is a diagram showing a video stream conventionally obtained when frame 2 is repeated. As shown in the figure, at the same time as image 2 is repeated, CCD (C, D) is also repeated. As a result, the subtitle that should originally be “ABCDEFGH” becomes “ABCDCDEFGH”.
- FIG. 5E is a diagram showing the video stream obtained by the present invention when the frame is subjected to S-power S-repeat. As shown in the figure, even if image 2 is repeated, the corresponding CCD (C, D) is processed without being repeated, so the subtitles that should originally be “ABCDE FGH” will be displayed correctly.
- the present invention has been described based on the embodiments.
- the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the claims.
- the skip processing and the repeat processing are detected by the hardware.
- the number of frame interrupts and the number of encoding start interrupts are counted and compared, so that the skip processing and the repeat processing can be detected by the software processing by the CPU. Good.
- the CCD is detected by hardware.
- the CCD may be detected by software soft-processing by the CPU by directly reading the image data held in the frame memory.
- the closed caption is described as an example, but the present invention is not limited to caption information, but also includes a test signal, teletext information, program guide information, a copy guard signal, etc.
- the information to be inserted is generally applicable.
- it is determined whether or not the additional data (CCD) of the skipped frame is NULL, and if NULL, the additional data is also skipped.
- CCD additional data
- a configuration may be adopted in which it is determined whether or not the additional data of the skipped frame is important, and if not, the additional data is also skipped.
- Whether or not certain data is important depends on the type of additional information (type of program guide information, copy guard signal, etc.), so data that can be skipped in advance according to the type of additional information (data of low importance) It is only necessary to determine data that cannot be skipped (data with high importance).
Abstract
Description
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Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB038256533A CN100397890C (zh) | 2003-06-27 | 2003-06-27 | 包含字幕等信息的视频信号的处理电路 |
PCT/JP2003/008210 WO2005002224A1 (ja) | 2003-06-27 | 2003-06-27 | 字幕等の情報を含むビデオ信号の処理回路 |
JP2005503225A JP4327796B2 (ja) | 2003-06-27 | 2003-06-27 | 字幕等の情報を含むビデオ信号の処理回路 |
EP03736288A EP1641262B1 (en) | 2003-06-27 | 2003-06-27 | Circuit for processing video signal containing information such as closed caption |
DE60326015T DE60326015D1 (de) | 2003-06-27 | 2003-06-27 | Schaltung zur verarbeitung von einem videosignal mit informationen wie etwa geschlossenen untertiteln |
US11/136,704 US7460182B2 (en) | 2003-06-27 | 2005-05-25 | Circuit for processing video signal including information such as caption |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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PCT/JP2003/008210 WO2005002224A1 (ja) | 2003-06-27 | 2003-06-27 | 字幕等の情報を含むビデオ信号の処理回路 |
Related Child Applications (1)
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US11/136,704 Continuation US7460182B2 (en) | 2003-06-27 | 2005-05-25 | Circuit for processing video signal including information such as caption |
Publications (1)
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WO2005002224A1 true WO2005002224A1 (ja) | 2005-01-06 |
Family
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PCT/JP2003/008210 WO2005002224A1 (ja) | 2003-06-27 | 2003-06-27 | 字幕等の情報を含むビデオ信号の処理回路 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7460182B2 (ja) |
EP (1) | EP1641262B1 (ja) |
JP (1) | JP4327796B2 (ja) |
CN (1) | CN100397890C (ja) |
DE (1) | DE60326015D1 (ja) |
WO (1) | WO2005002224A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9687255B2 (en) | 2008-06-17 | 2017-06-27 | Globus Medical, Inc. | Device and methods for fracture reduction |
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WO2005074272A1 (ja) * | 2004-01-30 | 2005-08-11 | Fujitsu Limited | エンコード中に抽出画像を外部に送信するビデオエンコーダ |
WO2006054639A1 (ja) * | 2004-11-19 | 2006-05-26 | Pioneer Corporation | 情報多重装置及び方法、並びにコンピュータプログラム |
JP2006174363A (ja) * | 2004-12-20 | 2006-06-29 | Nec Electronics Corp | フレームシンクロナイザ、光ディスク装置、情報記録/再生装置及び信号同期方法。 |
US8184660B2 (en) * | 2005-09-15 | 2012-05-22 | Lsi Corporation | Transparent methods for altering the video decoder frame-rate in a fixed-frame-rate audio-video multiplex structure |
AU2009200990A1 (en) | 2008-03-13 | 2009-10-01 | Aristocrat Technologies Australia Pty Limited | Method and system of distributing progressive gaming related information |
US20100039558A1 (en) * | 2008-08-12 | 2010-02-18 | Richard Detore | Real time high definition caption correction |
US8724968B2 (en) * | 2011-04-07 | 2014-05-13 | Prime Image Delaware, Inc. | Embedded ancillary data processing method and system with program duration alteration |
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- 2003-06-27 WO PCT/JP2003/008210 patent/WO2005002224A1/ja active Application Filing
- 2003-06-27 CN CNB038256533A patent/CN100397890C/zh not_active Expired - Fee Related
- 2003-06-27 EP EP03736288A patent/EP1641262B1/en not_active Expired - Fee Related
- 2003-06-27 DE DE60326015T patent/DE60326015D1/de not_active Expired - Lifetime
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9687255B2 (en) | 2008-06-17 | 2017-06-27 | Globus Medical, Inc. | Device and methods for fracture reduction |
US10588646B2 (en) | 2008-06-17 | 2020-03-17 | Globus Medical, Inc. | Devices and methods for fracture reduction |
Also Published As
Publication number | Publication date |
---|---|
CN1714571A (zh) | 2005-12-28 |
EP1641262B1 (en) | 2009-01-21 |
JPWO2005002224A1 (ja) | 2006-08-10 |
EP1641262A1 (en) | 2006-03-29 |
DE60326015D1 (de) | 2009-03-12 |
US20050231646A1 (en) | 2005-10-20 |
CN100397890C (zh) | 2008-06-25 |
JP4327796B2 (ja) | 2009-09-09 |
EP1641262A4 (en) | 2006-07-26 |
US7460182B2 (en) | 2008-12-02 |
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