WO2004076714A1 - Procede de production de tranches de silicium au moyen d'une couche de silicate de praseodyme - Google Patents

Procede de production de tranches de silicium au moyen d'une couche de silicate de praseodyme Download PDF

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Publication number
WO2004076714A1
WO2004076714A1 PCT/EP2003/014958 EP0314958W WO2004076714A1 WO 2004076714 A1 WO2004076714 A1 WO 2004076714A1 EP 0314958 W EP0314958 W EP 0314958W WO 2004076714 A1 WO2004076714 A1 WO 2004076714A1
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WO
WIPO (PCT)
Prior art keywords
lanthanoid
water
wetting
oxide
praseodymium
Prior art date
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PCT/EP2003/014958
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German (de)
English (en)
Inventor
Hans-Joachim MÜSSIG
Dieter Schmeisser
Original Assignee
Ihp Gmbh - Innovations For High Performance Microelectronics / Institut Für Innovative Mikroelektronik
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Application filed by Ihp Gmbh - Innovations For High Performance Microelectronics / Institut Für Innovative Mikroelektronik filed Critical Ihp Gmbh - Innovations For High Performance Microelectronics / Institut Für Innovative Mikroelektronik
Publication of WO2004076714A1 publication Critical patent/WO2004076714A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02156—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing at least one rare earth element, e.g. silicate of lanthanides, scandium or yttrium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C26/00—Coating not provided for in groups C23C2/00 - C23C24/00
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C4/00—Coating by spraying the coating material in the molten state, e.g. by flame, plasma or electric discharge
    • C23C4/12—Coating by spraying the coating material in the molten state, e.g. by flame, plasma or electric discharge characterised by the method of spraying
    • C23C4/123—Spraying molten metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02192—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating

Definitions

  • the invention relates to a method for the wet chemical production of a layer containing zirconium oxide or lanthanide oxide on a substrate with a silicon-containing substrate surface.
  • Lanthanoid elements in oxide compounds are currently favored as alternative materials to SiO 2 with a comparatively large dielectric constant for use in highly scaled MOS semiconductor components.
  • a lanthanoid oxide which is already known to be suitable is praseodymium oxide, cf. DE100 39 327 A1. It has been shown that an oxide layer suitable as a dielectric can also be present in a silicate phase which consists of praseodymium oxide and silicon oxide, cf. DE 10245590, still unpublished on the filing date.
  • an unresolved problem is the integration of the production of lanthanide oxide layers in the highly developed MOS process technology. To date, only processes are known which describe the deposition of a lanthanide oxide layer on a substrate surface from the gas phase.
  • the technical problem on which the invention is based is to specify a method for producing a lanthanoid-silicate layer, in particular a praseodymium silicate layer, on a substrate with a silicon-containing substrate surface, which can be easily integrated into a large-scale component manufacturing process.
  • the substrate surface is wetted with a solution of a lanthanide salt or lanthanide oxide and then subjected to a heat treatment.
  • a lanthanide salt such as a lanthanide nitrate
  • the heat treatment causes a chemical conversion of the dissolved lanthanide salt into the corresponding lanthanide oxide and its reaction with a silicon oxide layer or silicon oxynitride layer on the substrate surface to form a stable lanthanide silicate phase.
  • a lanthanoid-silicate layer is formed.
  • the heat treatment causes the lanthanide oxide to react with a silicon oxide layer or silicon oxynitride layer on the substrate surface to form a stable lananoid silicate phase. As a result of this reaction, a lanthanoid-silicate layer is formed.
  • the oxynitride layer may have been deliberately deposited beforehand.
  • the oxide layer already on the substrate before the reaction can, of course, have arisen or be deposited in a targeted manner.
  • the solution of the lanthanide salt or lanthanide oxide used is organic in one embodiment.
  • the use of an inorganic, for example aqueous, solution is also possible.
  • a mixed aqueous and organic solution can also be used.
  • the achievable layer thicknesses can be influenced by the wet chemical treatment and the selected temperature and can be varied in the range between 1 and 10 nm.
  • the duration of the temperature treatment also has an influence on the layer thickness and can be set according to the desired layer thickness.
  • the method according to the invention makes it possible to integrate the production of layers containing lanthanoid oxide into known production processes for electronic components, in particular into the highly developed silicon-based technology.
  • Silicon silicon compounds (e.g. As silicon carbide) or silicon-containing alloys (z. B. silicon germanium) preferred.
  • a silicon substrate with a silicon germanium or silicon carbide layer covering the substrate surface can also be considered for the application.
  • the lanthanoid oxide-containing layer can be deposited immediately after the wet chemical cleaning process of the substrate surface without having to remove the oxide layer.
  • the coated substrate can then be fed to the further known process control.
  • the method according to the invention is preferably used in conjunction with the lanethoid element praseodymium in order to produce a layer containing praseodymium oxide on the surface of a silicon wafer.
  • a praseodymium silicate is finally formed from the praseodymium nitrate via a praseodymium oxide. If a solution of praseodymium oxide is used, the step of converting the nitrate into an oxide is of course omitted.
  • Praseodymium oxide has proven to be a particularly suitable alternative gate dielectric in MOS transistors.
  • a stable praseodymium silicate phase is created by reaction of the praseodymium oxide solution with the natural silicon dioxide layer or with previously applied oxide or oxynitride layers.
  • the silicate layer is heated to 1000 ° C. under ultra-high vacuum conditions, a layer stack of the type Si substrate / (SiO 2 ) ⁇ is formed.
  • x (Pr 2 O 3 ) x / SiO 2 cover layer is formed.
  • the thickness of the ultra-thin SiO 2 cover layer depends on the heat treatment and is preferably up to 1 nm.
  • the layer sequence itself is stable against atmospheric oxygen and atmospheric moisture and is compatible with established microstructuring processes.
  • the wetting is carried out by spraying on the solution.
  • Wetting can be especially in connection with a chemical separation The lanthanide-silicate layer from the gas phase (Chemical Vapor Deposition, CVD).
  • CVD Chemical Vapor Deposition
  • the wetting takes place by immersion in the solution.
  • the wetting is carried out by chemical polishing with the solution.
  • the heat treatment is preferably carried out at a temperature between 200 ° C and 400 ° C.
  • the interval between 300 ° C and 400 ° C has proven to be a particularly suitable temperature range.
  • Water or isopropanol or acetone or their mixtures with water are preferred as solvents.
  • the heat treatment is preferably carried out in air. If the influence of water vapor and air pollution is to be excluded, heat treatment under an argon gas atmosphere has proven itself.
  • the substrate surface to be coated has at least one trench-shaped recess.
  • a deepening is also common in semiconductor technology under the name trench structure.
  • Such a substrate surface can in principle be coated using all of the wetting techniques mentioned. If the depth of a trench is large in relation to its width, dipping processes or CVD are preferred.
  • Another aspect of the invention consists in a solution containing praseodymium oxide or praseodymium nitrate and water, isopropanol, acetone or mixtures of isopropanol and water and also acetone and water.
  • the solution according to the invention enables the wet chemical production of a praseodymium oxide layer on a silicon-containing substrate surface. By choosing the concentration of praseodymium oxide or praseodymium nitrate, both the thickness and the properties of the praseodymium oxide layer can be influenced.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Materials Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Ceramic Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

L'invention concerne un procédé de production par voie humide d'une couche de silicate-lanthanide sur un substrat dont une surface contient du silicium. Ce procédé consiste à humidifier la surface du substrat avec une solution d'un sel de lanthanide, en particulier d'un nitrate de lanthanide, ou d'un oxyde de lanthanide puis à chauffer le substrat humidifié à une température prédéfinie et à maintenir la température pendant un intervalle de temps prédéfini.
PCT/EP2003/014958 2003-02-26 2003-12-29 Procede de production de tranches de silicium au moyen d'une couche de silicate de praseodyme WO2004076714A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10309728A DE10309728B4 (de) 2003-02-26 2003-02-26 Verfahren zur Herstellung von Si-Wafern mit einer Lanthanoid-Silikat-Schicht
DE10309728.7 2003-02-26

Publications (1)

Publication Number Publication Date
WO2004076714A1 true WO2004076714A1 (fr) 2004-09-10

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PCT/EP2003/014958 WO2004076714A1 (fr) 2003-02-26 2003-12-29 Procede de production de tranches de silicium au moyen d'une couche de silicate de praseodyme

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DE (1) DE10309728B4 (fr)
WO (1) WO2004076714A1 (fr)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3667901A (en) * 1970-08-21 1972-06-06 Vsevolod Semenovich Krylov Method of producing orthovanadates of rare-earth metals
US4827075A (en) * 1982-08-19 1989-05-02 The Flinders University Of South Australia Catalysts
JP2000329904A (ja) * 1999-05-18 2000-11-30 Hoya Corp 光触媒機能を有する反射防止膜を有する物品及びその製造方法

Family Cites Families (8)

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Publication number Priority date Publication date Assignee Title
US3284370A (en) * 1962-12-31 1966-11-08 Monsanto Co Alumina supported copper oxide-rare earth oxide catalyst compositions
US3429080A (en) * 1966-05-02 1969-02-25 Tizon Chem Corp Composition for polishing crystalline silicon and germanium and process
US4868150A (en) * 1987-12-22 1989-09-19 Rhone-Poulenc Inc. Catalyst support material containing lanthanides
JP2631803B2 (ja) * 1992-11-25 1997-07-16 株式会社日本触媒 ジアルキルカーボネートの製造方法
SG99871A1 (en) * 1999-10-25 2003-11-27 Motorola Inc Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US6402851B1 (en) * 2000-05-19 2002-06-11 International Business Machines Corporation Lanthanide oxide dissolution from glass surface
DE10039327A1 (de) * 2000-08-03 2002-02-14 Ihp Gmbh Elektronisches Bauelement und Herstellungsverfahren für elektronisches Bauelement
DE10245590A1 (de) * 2002-09-26 2004-04-15 IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik Halbleiterbauelement mit Praseodymoxid-Dielektrikum

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3667901A (en) * 1970-08-21 1972-06-06 Vsevolod Semenovich Krylov Method of producing orthovanadates of rare-earth metals
US4827075A (en) * 1982-08-19 1989-05-02 The Flinders University Of South Australia Catalysts
JP2000329904A (ja) * 1999-05-18 2000-11-30 Hoya Corp 光触媒機能を有する反射防止膜を有する物品及びその製造方法

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
FERRAND G, KENEVEY K, CUNNINGHAM J, MORRIS MA: "Advances in Engineering Materials", 1995, TRANS TECH PUBLICATIONS, SWITZERLAND, XP002280417 *
LANGLET M ET AL: "ND2O3 THIN FILMS DEPOSITED BY A NEW CHEMICAL VAPOUR DEPOSITION TECHNIQUE", THIN SOLID FILMS, ELSEVIER-SEQUOIA S.A. LAUSANNE, CH, vol. 186, no. 1, 1 April 1990 (1990-04-01), pages L01 - L05, XP000133962, ISSN: 0040-6090 *
PATENT ABSTRACTS OF JAPAN vol. 2000, no. 14 5 March 2001 (2001-03-05) *

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DE10309728A1 (de) 2004-09-09

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