WO2004070842A1 - 半導体基板の製造方法 - Google Patents
半導体基板の製造方法 Download PDFInfo
- Publication number
- WO2004070842A1 WO2004070842A1 PCT/JP2004/000983 JP2004000983W WO2004070842A1 WO 2004070842 A1 WO2004070842 A1 WO 2004070842A1 JP 2004000983 W JP2004000983 W JP 2004000983W WO 2004070842 A1 WO2004070842 A1 WO 2004070842A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- semiconductor substrate
- insulating film
- porous layer
- gas
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
Definitions
- the present invention relates to a method for manufacturing a semiconductor substrate, and more particularly to a method for manufacturing a semiconductor substrate on which a single crystal layer is formed.
- Literature 1 Appl. Phy s. 1 et t. Vo l. 64, No. 16, (T. Yonehahara, eta1) pp. 2108-2110 (1994)
- Document 3 Japanese Patent Application Laid-Open No. 2002-270801 proposes a method for uniformly controlling the impurity concentration of a surface single crystal silicon layer (SOI layer) which is an epitaxial growth layer.
- SOI layer surface single crystal silicon layer
- a conventional method for manufacturing a semiconductor substrate described in the above-mentioned Reference 3 will be schematically described.
- a first semiconductor substrate 201 is prepared.
- the first semiconductor substrate 201 for example, a boron-doped P-type high-concentration substrate having a boron concentration of about 5 ⁇ 10 18 cm ⁇ 3 and a specific resistance of about 0.01 to 0.02 Qcm is used.
- the surface of the first semiconductor substrate 201 is HF (hydrogen).
- a porous layer 202 is formed as shown in FIG. 1 (b) by making it porous by an anodizing method or the like in a solution containing Fluoride).
- a non-porous single-crystal silicon layer 203 is formed on the porous layer 202, and the porous layer 202 is protected at a temperature of 300 ° C.
- An oxide film or nitride film is formed by heat treatment, and the protective film is removed only on the surface.
- a back seal film 204 is formed on the back surface of the first semiconductor substrate 201.
- an epitaxial growth layer 205 is formed on the non-porous single-crystal silicon layer 203.
- a second semiconductor substrate 206 is bonded to the epitaxial growth layer 205 via an insulator layer 207 such as silicon oxide.
- FIG. 1 (g) shows the reverse of FIG. 1 (i).
- the remaining unnecessary porous layer 202 is removed by etching, polishing, etc., and the non-porous single-crystal silicon layer 203 and the second semiconductor substrate 206 are exposed on both front and back surfaces (FIG. 1 (h)) .
- the surface of the non-porous single-crystal silicon layer 203 is smoothed as necessary.
- an SOI wafer composed of the second semiconductor substrate 206, the insulating layer 207, and the epitaxial growth layer 205 is manufactured (FIG. 1 (i)).
- Document 3 states that it is desirable to form a protective film of silicon oxide, silicon nitride, or the like with a thickness of approximately 2 to 10 nm on the pore wall as a pore wall protective film of the porous layer 202. ing.
- Reference 3 describes that a pore wall protective film is formed on the porous layer 202 by heat treatment in an oxygen atmosphere at 300 to 500 ° C.
- an oxygen atmosphere at 300 to 500 ° C.
- a silicon oxide film is formed in a low-temperature oxygen atmosphere such as 300t: ⁇ 500 ° C, the oxidation rate of silicon is extremely slow. Is extremely bad.
- the quality of the oxide film formed in a low-temperature oxygen atmosphere such as 300 to 500 ° C. is inferior to that of an oxide film formed at 1000 ° C. and has a low function as a protective film.
- the protective film when forming the protective film, it is manufactured at a low temperature such as 300: 500 ° C. It is an object of the present invention to improve the manufacturing efficiency and to further improve the film quality. Disclosure of the invention
- a radical having high reactivity is used at the time of forming a protective film on a porous layer, thereby improving the reaction rate and improving the film quality of the protective film.
- the present invention provides a method in which a porous layer formed on one surface of a substrate is formed on a porous layer.
- the present invention is applied to a method of manufacturing a semiconductor substrate in which a pack seal film is formed on the other surface of the substrate in a state where one single crystal layer is formed, and a second single crystal layer is formed on the first single crystal layer.
- the insulating film is formed on the porous layer by using a mixed gas plasma of a rare gas and an insulating film forming gas generated by microwave excitation. Then, the insulating film on the surface of the porous layer on which the first single crystal layer is formed is removed.
- the above-mentioned substrate and the porous layer are removed after another substrate different from the above-mentioned substrate is bonded to the second single crystal layer via the insulating film.
- the insulating film forming gas further includes oxygen gas, and the insulating film formed on the porous layer is a silicon oxide film.
- the insulating film forming gas includes a nitriding gas, and the rare gas is a krypton gas.
- the insulating film formed on the porous layer may be a silicon nitride film.
- a porous layer is formed, which is used for a method of manufacturing a semiconductor substrate having a single crystal layer on an insulator layer, and is generated by microphone mouth wave excitation.
- a method for manufacturing a semiconductor substrate is provided, wherein a protective film is formed on a hole wall in a porous layer in a mixed gas plasma of a rare gas and an insulating film forming gas.
- FIG. 1 is a view for explaining a conventional semiconductor substrate manufacturing process.
- FIG. 2 is a diagram for explaining a manufacturing process of the semiconductor substrate according to the embodiment of the present invention.
- FIG. 3 is a characteristic diagram for explaining an oxide film growth rate of silicon in a krypton Z oxygen mixed gas excited by a microphone mouth wave.
- Figure 4 shows a silicon oxide film formed with krypton-Z oxygen mixed gas excited by microphone mouth wave, a silicon nitride film formed by krypton no ammonia gas excited by microphone mouth wave, and a conventional silicon oxide film formed at 1000 ° C.
- FIG. 6 is a diagram for comparatively explaining insulation characteristics. BEST MODE FOR CARRYING OUT THE INVENTION
- a first semiconductor substrate (first single crystal substrate) 101 is prepared.
- the first semiconductor substrate 101 has, for example, a concentration of about 5 ⁇ 10 18 cm ⁇ 3 of polon, and a ⁇ -type high-concentration substrate of about 0.1 to 0.02 ⁇ cm with a specific resistance. Is used.
- the surface of the first semiconductor substrate 101 is made porous by an anodizing method or the like in a solution containing HF or the like, so that a porous layer 102 is formed.
- the non-porous single-crystal silicon layer 104 is formed by removing only the protective film on the surface portion other than the inside of the porous layer 10′2 with a solution containing HF.
- the growth rate of the oxide film formed as the protective film in the low-temperature plasma atmosphere is sufficiently higher than the growth rate of the oxide film formed at 1000 ° C.
- the insulating properties of the oxide film formed in the low-temperature plasma atmosphere show the same or better performance than the oxide film formed at 1000 ° C.
- the acid film formed in a low-temperature plasma atmosphere was useful as a protective film.
- the solution containing HF for removing the protective film was preferably as hydrophobic as possible.
- the pore wall protective film 10 is formed in the porous layer 102.
- a back seal film 105 is formed on the back surface of the semiconductor substrate 101 (FIG. 2 (d)).
- an epitaxial growth layer 106 is formed on the non-porous single-crystal silicon layer 104.
- a second semiconductor substrate 107 is bonded to the epitaxial growth layer 106 via an insulating layer 108 such as silicon oxide.
- the first semiconductor substrate 101 is removed, and the first and second semiconductor substrates 101 and 107 are separated from each other by the porous layer 102.
- the porous layer 102 is exposed as shown on the upper side of FIG. Thereafter, the remaining unnecessary porous layer 102 and pore wall protective film 103 are removed by etching, polishing or the like (FIG. 2 (h)).
- the surface of the non-porous single-crystal silicon layer 104 is smoothed as necessary.
- an SOI wafer composed of the second single crystal substrate 107, the insulating layer 108, and the epitaxial growth layer 106 is manufactured.
- the rare gas may be argon, xenon, helium, or neon, in addition to cribton.
- the nitriding gas for forming the hole wall protective film may be nitrogen, a mixed gas of nitrogen and hydrogen, nitrous oxide, or nitric oxide in addition to ammonia.
- a rare gas and oxygen or a rare gas and ammonia gas are excited by microwaves as a pore wall protective film before growing a second single crystal layer on a porous layer.
- a high-quality protective film is formed at high speed, the hole walls are stabilized, and the second single crystal layer is formed, so high-quality surface silicon single crystals for forming semiconductor devices etc. are formed. can do. .
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/544,491 US7691725B2 (en) | 2003-02-05 | 2004-02-02 | Method for manufacturing semiconductor device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003028085A JP2004265914A (ja) | 2003-02-05 | 2003-02-05 | 半導体基板の製造方法 |
JP2003-028085 | 2003-02-05 |
Publications (1)
Publication Number | Publication Date |
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WO2004070842A1 true WO2004070842A1 (ja) | 2004-08-19 |
Family
ID=32844189
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/000983 WO2004070842A1 (ja) | 2003-02-05 | 2004-02-02 | 半導体基板の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7691725B2 (ja) |
JP (1) | JP2004265914A (ja) |
TW (1) | TWI329923B (ja) |
WO (1) | WO2004070842A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5774900B2 (ja) * | 2011-04-28 | 2015-09-09 | 学校法人 名城大学 | 発光ダイオード素子及びその製造方法 |
US12002813B2 (en) * | 2021-08-30 | 2024-06-04 | Taiwan Semiconductor Manufacturing Company Ltd. | Method for forming semiconductor-on-insulator (SOI) substrate by cleaving a multilayer structure along voids to separate a substrate |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1088357A (ja) * | 1996-09-11 | 1998-04-07 | Canon Inc | プラズマcvd法 |
US20020014666A1 (en) * | 1999-11-30 | 2002-02-07 | Tadahiro Ohmi | Semiconductor device formed on (111) surface of a si crystal and fabrication process thereof |
JP2002270801A (ja) * | 2001-03-13 | 2002-09-20 | Canon Inc | 半導体基板の製造方法及び半導体基板 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3214631B2 (ja) * | 1992-01-31 | 2001-10-02 | キヤノン株式会社 | 半導体基体及びその作製方法 |
CA2233115C (en) * | 1997-03-27 | 2002-03-12 | Canon Kabushiki Kaisha | Semiconductor substrate and method of manufacturing the same |
TW587332B (en) * | 2000-01-07 | 2004-05-11 | Canon Kk | Semiconductor substrate and process for its production |
-
2003
- 2003-02-05 JP JP2003028085A patent/JP2004265914A/ja active Pending
-
2004
- 2004-02-02 WO PCT/JP2004/000983 patent/WO2004070842A1/ja active Application Filing
- 2004-02-02 US US10/544,491 patent/US7691725B2/en not_active Expired - Fee Related
- 2004-02-03 TW TW093102384A patent/TWI329923B/zh not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1088357A (ja) * | 1996-09-11 | 1998-04-07 | Canon Inc | プラズマcvd法 |
US20020014666A1 (en) * | 1999-11-30 | 2002-02-07 | Tadahiro Ohmi | Semiconductor device formed on (111) surface of a si crystal and fabrication process thereof |
JP2002270801A (ja) * | 2001-03-13 | 2002-09-20 | Canon Inc | 半導体基板の製造方法及び半導体基板 |
Also Published As
Publication number | Publication date |
---|---|
JP2004265914A (ja) | 2004-09-24 |
TWI329923B (en) | 2010-09-01 |
US20060051934A1 (en) | 2006-03-09 |
TW200419789A (en) | 2004-10-01 |
US7691725B2 (en) | 2010-04-06 |
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