Classifications

• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B24—GRINDING; POLISHING
  • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
  • B24B37/00—Lapping machines or devices; Accessories
  • B24B37/11—Lapping tools
  • B24B37/20—Lapping pads for working plane surfaces
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
  • B23H—WORKING OF METAL BY THE ACTION OF A HIGH CONCENTRATION OF ELECTRIC CURRENT ON A WORKPIECE USING AN ELECTRODE WHICH TAKES THE PLACE OF A TOOL; SUCH WORKING COMBINED WITH OTHER FORMS OF WORKING OF METAL
  • B23H5/00—Combined machining
  • B23H5/06—Electrochemical machining combined with mechanical working, e.g. grinding or honing
  • B23H5/08—Electrolytic grinding
• • C—CHEMISTRY; METALLURGY
  • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
  • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
  • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
  • C25D5/02—Electroplating of selected surface areas
• • C—CHEMISTRY; METALLURGY
  • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
  • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
  • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
  • C25D5/04—Electroplating with moving electrodes
  • C25D5/06—Brush or pad plating
• • C—CHEMISTRY; METALLURGY
  • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
  • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
  • C25F3/00—Electrolytic etching or polishing
  • C25F3/02—Etching
• • C—CHEMISTRY; METALLURGY
  • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
  • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
  • C25F3/00—Electrolytic etching or polishing
  • C25F3/16—Polishing
  • C25F3/30—Polishing of semiconducting materials
• • C—CHEMISTRY; METALLURGY
  • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
  • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
  • C25F7/00—Constructional parts, or assemblies thereof, of cells for electrolytic removal of material from objects; Servicing or operating
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
  • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
  • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
  • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
  • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
  • H01L21/321—After treatment
  • H01L21/32115—Planarisation
  • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
  • H01L21/32125—Planarisation by chemical mechanical polishing [CMP] by simultaneously passing an electrical current, i.e. electrochemical mechanical polishing, e.g. ECMP
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
  • H01L21/67005—Apparatus not specifically provided for elsewhere
  • H01L21/67011—Apparatus for manufacture or treatment
  • H01L21/67017—Apparatus for fluid treatment
  • H01L21/67063—Apparatus for fluid treatment for etching
  • H01L21/67075—Apparatus for fluid treatment for etching for wet etching
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
  • H01L21/67005—Apparatus not specifically provided for elsewhere
  • H01L21/67011—Apparatus for manufacture or treatment
  • H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
• • C—CHEMISTRY; METALLURGY
  • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
  • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
  • C25D7/00—Electroplating characterised by the article coated
  • C25D7/12—Semiconductors
  • C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
  • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
  • H01L21/321—After treatment
  • H01L21/32115—Planarisation

Definitions

• the present invention generally relates to semiconductor integrated circuit technology and, more particularly, to an electroetching or electropolishing process and apparatus.
• Conventional semiconductor devices generally include a semiconductor substrate, usually a silicon substrate, and a plurality of sequentially formed dielectric layers such as silicon dioxide and conductive paths or interconnects made of conductive materials. Interconnects are usually formed by filling a conductive material in trenches etched into the dielectric layers. In an integrated circuit, multiple levels of interconnect networks laterally extend with respect to the substrate surface. Interconnects formed in different layers can be electrically connected using vias or contacts.
• a conductive material into features such as vias, trenches, pads or contacts
• electrodeposition a conductive material, such as copper is deposited over the substrate surface
• CMP chemical mechanical polishing
• electroetching and electropolishing which is also referred to as electroetching or electrochemical etching, are also attractive process options that are being evaluated for this application. Copper is the material of choice, at this time, for interconnect applications because of its low resistivity and good electromigration properties. Therefore, the present invention will be described for the electropolishing of copper and copper alloy layers as an example, although electropolishing of other materials such as Pt, Co, Ni etc., can also be achieved using the method and apparatus of this invention.
• FIG. 1 A shows a workpiece surface 100 with an exemplary via 102 and an exemplary trench 104 coated with conductor 106 using standard electroplating technique. As can be seen from this figure, although the surface of the conductor 106 may be flat over the small via 102, the surface of the conductor 106 over the larger trench 104 has a step "S".
• CMP techniques have been developed to provide the capability of planarizing and at the same time removing the excess conductor layers. This is shown in Figure IB as dashed lines of 120 and 122. After excess conductor removal, the resulting surface is ideally planar as indicated by dashed line 122, and both the via 102 and trench 104 are completely filled with the conductor. It should be noted that any remaining part of the excess conductor along with any other conductor layer (such as a barrier layer) are all removed to assure electrical isolation between the conductors within features 102 and 104.
• Planarization capability of standard electroetching techniques is not as good as CMP. Therefore, results from these processes may lie somewhere between the cases shown in Figures 1 A and IB. Planarization capability of electroetching may be increased and the ideal result shown as dashed line 122 in Figure IB may be approached by employing a planarization pad or workpiece surface influencing device (WSID) which introduces mechanical action on the wafer surface as the conductor removal from the workpiece surface is performed. This way it may be possible to planarize the non-planar or non-flat copper surface as the excess copper is removed. Since there is mechanical action in such processes they are referred to as Electrochemical Mechanical Etching (ECME) or Electrochemical Mechanical Polishing. As the name suggest, in such approaches, electroetching is carried out as the wafer surface is contacted by a planarization pad and relative motion is established between the wafer surface and the planarization pad.
• ECME Electrochemical Mechanical Etching
• Electrochemical Mechanical Polishing Electrochemical Mechanical Polishing
• Electrochemical Mechanical Deposition As described above, standard electroplating techniques yield conformal deposits and non-planar workpiece surfaces that need to be planarized during the excess material removal step.
• Newly developed electrodeposition techniques which are collectively called Electrochemical Mechanical Deposition (ECMD) methods, utilize a pad or WSID in close proximity of the wafer surface during conductor deposition. Action of the WSID during plating gives planar deposits with flat surface topography even over the largest features present on the workpiece surface. Such a planar deposit is shown as layer 130 in Figure IC. Removal of excess conductive material, such as copper from such planar deposits does not require further planarization during the material removal step. Therefore, CMP, electroetching, chemical etching, electrochemical mechanical etching and chemical mechanical etching techniques may all be successfully employed for removing the overburden in a planar and uniform manner in this case.
• Electrochemical Mechanical Etching and Electrochemical Mechanical Deposition techniques will reveal that these methods have the capability to electrotreat, i.e., electrodeposit as well as electropolish, full surface of the wafer without any need to set aside a "contacting region" protected from the process solution, such as the edge surface region that would be under a clamp- ring in an apparatus that uses electrical contacts with a clamp-ring design.
• one method of making electrical contact to the workpiece surface involves physically touching the conductive surface of the workpiece by conductive contact elements, such as wires, fingers, springs, rollers, brushes etc., and establishing a relative motion between the contact elements and the wafer surface so that different sections of the wafer surface is physically and electrically contacted at different times, hi another method, electrical contact to the workpiece surface is achieved without physically touching the wafer by the conductive contact elements. Either way, electrical contacts may be made substantially all over the surface of the wafer or only at the edge region of the wafer.
• conductive contact elements such as wires, fingers, springs, rollers, brushes etc.
• the present invention overcomes the identified limitations of conventional electropolishing approaches and provides alternative contacting means and electroetching techniques that uniformly remove conductive films from a workpiece surface. [0014] In one or more embodiments of the invention, an apparatus and a method for electropolishing a surface of a conductive layer on a work piece are disclosed.
• the method of the present invention includes the steps immersing a contact electrode in a contact solution, contacting a portion of the surface of the conductive layer with the contact solution to define a contact region, immersing a process electrode in a process solution, contacting a portion of the surface of the conductive layer with the process solution to define a process region, and applying an electrical potential between the contact electrode and the process electrode to electropolish the surface of the conductive layer of the process region.
• the method further includes the step of moving at least one of the contact or process region from a first location to a second location on the surface of the conductive layer, hi moving at least one of the regions from the first location to another location throughout the process, the entire surface of the conductive layer can be electropolished.
• the contact solution and the process solution are the same conductive solution.
• the conductive solution contacts the surface of the conductive layer.
• a second contact electrode is provided, and the method further includes the steps of immersing the second electrode in the contact solution, contacting a portion of the surface of the conductive layer with the contact solution to define a second contact region, and applying an electrical potential between the contact electrodes and the process electrode to electropolish the second contact region.
• the method further includes the step of contacting the surface of the conductive layer with a top surface of a pad thereby planarizing nonuniformities of the surface of the conductive layer during electropolishing.
• the top surface of the pad may be abrasive.
• the pad may intermittently contact the surface of the conductive layer.
• an apparatus for electropolishing a surface of a conductive layer on a workpiece includes a contact unit containing a contact solution, a contact electrode immersed therein and having an opening through which the contact solution contacts a portion of the surface of the conductive layer to define a contact region, and a process unit containing a process solution, a process electrode immersed therein and having an opening through which the process solution contacts a portion of the surface of the conductive layer to define a process region configured to electropolish the surface of the conductive layer defined by the process region in response to a potential difference applied between the contact electrode and the process electrode.
• the contact electrode and/or the process electrode may be proximate to the surface of the conductive layer.
• the potential difference includes a DC voltage or a variable voltage.
• a mechanism produces relative motion between the process region and the surface of the conductive layer to electropolish substantially the whole surface of the conductive layer on the workpiece.
• the mechanism may further produce relative motion between the contact region and the surface of the conductive layer.
• the process unit includes a plurality of process openings through which the process solution contacts portions of the surface of the conductive layer to define a plurality of process regions and the potential difference applied between the contact electrode and the process electrode electropolishes the surface of the conductive layer defined by the plurality of process regions.
• the contact unit includes a plurality of contact openings through which the contact solution contacts portions of the surface of the conductive layer, each contact opening includes a contact electrode disposed therein and the potential difference applied between the contact electrodes and the process electrode electropolishes the surface of the conductive layer defined by the plurality of process regions.
• a first set of contact units is configured to contact portions of the surface of the conductive layer wherein the potential difference applied between the contact electrodes of the first set of contact units and the process electrode electropolishes the surface of the conductive layer defined by a first set of process regions.
• a second set of contact units is configured to contact portions of the surface of the conductive layer wherein a second potential difference applied between the contact electrodes of the second set of contact units and the process electrode electropolishes the surface of the conductive layer defined by a second set of process regions.
• a zone switch is configured to select the first contact zone or the second contact zone to apply the potential difference.
• the potential difference and the second potential difference may be different voltages.
• Figure 1 A is a schematic illustration of a substrate having a non-planar copper overburden layer which has been deposited using a conventional deposition process
• Figure IB is a schematic illustration of the substrate shown in Figure 1A wherein a planarization process has been applied to the non-planar copper overburden layer;
• Figure IC is a schematic illustration of a substrate having a planar copper overburden layer which has been deposited using an electrochemical mechanical deposition process
• Figure 2A is a schematic cross-sectional view of a portion of a semiconductor wafer having a copper layer formed on it;
• Figure 2B is a schematic cross sectional view of the semiconductor wafer in detail
• Figure 3 A is a schematic illustration of an embodiment of an electropolishing system of the present invention.
• Figures 3B-3D are schematic illustrations of various embodiments of the contact units for establishing electrical contact with wafer surface through the process solution;
• Figures 3E-3G 3D are schematic illustrations of various designs of the contact units and process units for establishing electrical contact with and processing a wafer surface;
• Figure 4A is a schematic illustration of another embodiment of an electropolishing system of the present invention including multiple contact and process electrodes;
• Figure 4B is a schematic planar view of the electropolishing system shown in Figure 4A;
• FIG. 5 is a schematic illustration of yet another embodiment of an electropolishing system of the present invention using multiple contact electrodes with a single process electrode;
• Figures 6A-6B are schematic illustrations of a holder structure used with the electropolishing system of the present invention.
• Figures 8A-8B are schematic illustrations of another holder structure used with the electropolishing system of the present invention.
• Figures 9A-9B are schematic illustrations of yet another holder structure used with the electropolishing system of the present invention.
• Figure 10A-10B are schematic illustrations of other embodiments of an electropolishing system of the present invention using multiple contact electrodes with a single process electrode;
• FIGs 11A-11B are schematic illustrations of stages of an electropolishing process using the electropolishing system shown in Figure 10A.
• the present invention provides a method and a system to electroetch or electropolish a conductive material layer deposited on a surface of a semiconductor.
• the invention can be used with Electrochemical Mechanical
• Etching processes or conventional electroetching systems achieves electroetching of the conductive material through the combination of the use of a process solution and electrical contact elements that do not make physical contact to the workpiece surface.
• Figure 2A shows a cross-sectional view of a portion of a workpiece 100a.
• the workpiece may be an exemplary portion of a preprocessed semiconductor wafer.
• a top layer 102a of the workpiece 100a may include a layer of conductive material such as electroplated copper.
• a bottom layer 104a of the workpiece may include an insulating layer 106a such as a low-k dielectric film and substrate 108 of the wafer, preferably silicon, hi this embodiment, although the conductive layer 102a is a part of the workpiece 100a, it is within the scope of the present invention that the workpiece 100a may be entirely made of a conductive material.
• an insulating layer 106a such as a low-k dielectric film and substrate 108 of the wafer, preferably silicon, hi this embodiment, although the conductive layer 102a is a part of the workpiece 100a, it is within the scope of the present invention that the workpiece 100a may be entirely made of a conductive material.
• the insulating layer is patterned to provide a via feature 110 and a trench feature 112.
• the features and surface 114 of the insulating layer may be lined with a barrier layer 116 such as a layer of Ta, TaN, Ti, WCN, WN, TiN or a composite of these materials.
• the barrier layer may be also coated with a conductive seed layer such as a copper seed layer that is not shown in Figure 2B for the purpose of clarity. Such seed layers are commonly deposited on semiconductor wafers before conductive layer deposition.
• the workpiece 100a may comprise a plurality of via, trench and other features.
• the surface 103a of the conductive layer 102a may be planar, i.e. may not have a surface topography having high and low regions formed during the deposition of the conductive layer 102a. It should be appreciated that the invention can also process non-planar wafer surfaces.
• Figure 3 A schematically explains how electropolishing of a material on a wafer surface may be achieved using a remote electrical contact to the wafer.
• the cross- sectional segment in Figure 3 A shows a portion of an exemplary electroetching or electropolishing system 200 to electrochemically etch a portion of the copper layer 102a, off the surface of the workpiece 100a, which is held by a wafer carrier (not shown).
• the electroetching system in this example embodiment has a contact unit 202 and a process unit 204. As will be described more fully below, the contact unit 202 is able to establish electrical contact with the conductive layer 102a through a liquid contact solution.
• the contact unit 202 comprises a contact container 206 or a contact nozzle to contain a contact solution 208.
• a contact electrode 209 is placed inside the contact container 206 and thus immersed in the contact solution 208.
• the contact electrode does not physically touch the surface 103 a of the copper layer 102a.
• the contact electrode 209 is electrically connected to a positive terminal of a power source 210.
• Contact solution 208 fills the container through a contact inlet 212 and leaves the container through contact opening 214.
• the inlet 212 may be connected to a contact solution reservoir (not shown).
• the contact opening 214 is placed in close proximity of a contact region 220a of the surface 103 a of the conductive layer 102a.
• the contact solution 208 flows through the opening 214, it physically touches the contact area and establishes electrical communication between the electrode 209 and the contact region 220a since it is a conductive liquid.
• the contact electrode 209 is as close as possible to the contact area 220a.
• the contact electrode 209 may even be placed outside the contact container and placed anywhere as long as it maintains physical contact with the contact solution 208.
• the process unit 204 comprises a process container 222 or a process nozzle to contain process solution 224, which is an electroetching or electropolishing solution.
• a process electrode 226 is located inside the process container 222 and kept immersed in the process solution 224. It should be noted that the process electrode does not have to be confined in the process container. It may be outside as long as it physically touches the process solution and therefore establishes electrical contact with it.
• the process electrode 226 is electrically connected to a negative terminal of the power source 210.
• Process solution 224 fills the process container through a process inlet 228 and exits the container through process opening 230.
• the process solution 224 can be recirculated or agitated.
• the inlet 228 may be connected to a process solution reservoir (not shown).
• the process opening 230 is placed in close proximity of a process region 220b of the surface 103 a of the conductive layer 102a. hi this embodiment, the process region 220b may be approximately equal to the area of the process opening 230.
• the process solution 224 flowing through the opening 230 contacts the process region 220b and establishes electrical contact between the process electrode 226 and the process region 220b.
• a specific contact region and process region are illustrated in Figure 3 A, it is understood that these regions may be located anywhere on the workpiece.
• a plurality of contact units and process units may be used.
• the contact solution and the process solution may be different solutions or they may be same. If they are the same solution, they need to be effective electroetching or electropolishing solutions for the material to be removed from the workpiece surface.
• the contact units and process units may be constructed in different ways using various different materials.
• the contact electrode 209 is on the wall of the container 206 or it actually is the wall of the container 206. Similar approach may be used for the construction of the process container 222.
• the contact or process units may comprise an insulating spongy material within which the conductive electrodes are embedded.
• Figure 3B shows such a case for the contact unit 202a, comprising insulating spongy material 250, which holds and passes through the contact solution 208.
• Contact electrode 209 touches the contact solution 208 in the sponge 250.
• the spongy material may physically touch the copper film 102a surface during electropolishing since it is a soft material and does not damage the surface.
• use of an insulating spongy material or insulating soft pad in the construction of the process unit, which may physically contact the wafer surface during processing is within the scope of this invention.
• electroetching of the copper layer 102a is initiated at the process region 220b when a potential is applied between the contact electrode 209, which is anode, and the process electrode 226, which is cathode.
• the electrical current passes from the contact electrode 209 to the contact solution 208 and through the contact solution enters the copper layer 102a at the contact region 220a.
• the current then flows in the copper layer 102a towards the process region 220b, enters the electroetching solution 224 and flows to the process electrode 226.
• the contact electrode 209 is more anodic than the copper film at the contact region 220a and the copper film at the process region 220b is more anodic than the cathode 226.
• the anodic voltage on the copper film at the process region causes electropolishing or electroetching of the copper in this particular region.
• the copper removed from the substrate in this region deposits on the process electrode 226.
• the solution is formulated to contain complexing agents it is possible that copper complexes to stay in the solution rather than deposit on the process electrode 226.
• the solution is a standard electroetching solution such as a phosphoric acid solution.
• the contact electrode 209 is made of an inert material such as Pt or Pt-coated metal, stainless steel, conductive mesh or foam etc., and therefore anodic voltage on this inert electrode cannot remove any material.
• FIG. 3C One such design is shown in Figure 3C and it includes a permeable barrier 260 placed over the contact electrode 209.
• the permeable barrier 260 is porous and it lets the contact solution 208 through. It, however, does not allow the bubbles to go to the substrate surface by guiding them towards a bleed opening 261, which directs them away from the workpiece surface. Similar structure may be used in the process unit also.
• FIG. 3D Another design shown in Figure 3D is a two-chamber contact container 206a, which comprises a primary container 206aa and a secondary container 206aaa.
• the contact electrode 209 is placed in the primary container 206aa, and therefore any bubble that is generated may be diverted away from the substrate surface through the bleed opening 261a. More complex designs of contact containers and process containers utilizing multi chambers can be used for bubble minimization or elimination.
• the contact solution does not contain any ions of materials that can deposit onto the surface of the copper layer and the contact electrode 209 does not contain any material that may be etched or electroetched by the contact solution 208. Therefore, deposition solutions containing ionic species of metals are not suitable for use as a contact solution.
• the process unit is preferably moved between the edge of the workpiece and the center of the workpiece while the workpiece is rotated or otherwise moved.
• the movement of the process unit along the radius of the wafer can cause electoetching of the entire surface of the wafer as the wafer is rotated. Other motions can also be used. What is important is to make every point on the wafer a process region at some point in time to remove copper from substantially the whole surface. Scanning of the wafer surface by the process unit can be accomplished by moving the wafer, the process unit or both with respect to each other.
• wafer 290 in Figure 3E may be translated over the contact units 280a, and the process unit 270a in a linear direction 291. Wafer may also be slowly rotated. The linear motion may or may not be bi-directional. During process, the process unit 270a effectively scans the whole surface of the wafer for uniform material removal. Multiple contact units assure electrical contact to wafer at all times. Even more process and contact units may be used in the design (see for example, Figures 6A, 6B, 7A, 7B, 8A, 8B, 9A, 9B). A specific design of contact unit 280b and process unit 270b, appropriate for rotational motion of the wafer 290 is shown in Figure 3F.
• the pie-shaped process region in this case scans the wafer surface for uniform material removal from the whole front surface.
• Contact unit 280b maybe placed anywhere at the edge of the wafer. Again, multiple contact and process units may be utilized in this design.
• a ring-shaped contact region is provided.
• the process region, where material removal is carried out constitutes the rest of the wafer surface. In this case copper left in the contact region needs to be removed later using another process such as chemical etching or electrochemical etching.
• Figures 4A, 4B and 5 illustrate two alternative electroetching systems that may include a plurality of contact units and process units.
• the contact and process units in these embodiments are held by various base structures that allow units to use the same electroetching solution as the contact solution as well as the process solution, i both embodiments, electrical contact to the wafer surface is established through the electroetching solution applied through the contact units.
• the contact electrodes do not physically contact to the surface of the wafer, however, as described earlier a soft, sponge or pad like material may be placed in the contact or process units and this material may touch the workpiece surface at the contact region and the process region.
• the electroetching solution provides the conductive path between the contact electrode and the conductive surface of the wafer.
• Exemplary electroetching or electropolishing system 300 of Figure 4A may be used for processing copper layer 102b of the substrate 100b, which is held by a carrier (not shown).
• the electroetching system in this example embodiment has also a contact unit 302 and a process unit 304.
• the units 302, 304 are held by or formed in a holder structure 301.
• the holder structure 301 in this embodiment is shaped as a plate having a top surface 303 and a bottom surface 305.
• the contact unit 302 is able to establish electrical contact with the conductive layer 102b through a liquid electrical contact.
• the holder structure 301 and the workpiece may be moved relative to one another.
• the contact unit 302 or a contact nozzle may be comprised of a contact hole 306 formed in the holder structure 301.
• a contact electrode 309 inside the contact unit 306 is immersed in an electroetching solution 308. It should be understood that the contact electrode shown in Figure 4 A may totally fill the contact hole 306 in which case the electroetching solution 308 would mainly wet the top surface of the contact electrode 309.
• the top surface of the contact electrode may be below the level of the top surface 303 of the holder structure 301 as shown in Figure 4A, it may be at the same level as the top surface 303 of the holder structure 301, it may even be above the top surface 303 of the holder structure 301 as long as it does not touch the surface of the wafer.
• the electroetching solution 308 is used for both establishing contact and electroetching the conductive layer 102b.
• the contact electrode 309 is electrically connected to a positive terminal of a power source 310.
• the electroetching solution 308 fills the unit and touches the conductive layer.
• the contact opening 314 is preferably in the plane of the top surface 303 of the holder structure 301.
• the inlet 312 may be connected to a common electroetching solution reservoir (not shown) or the whole structure may be immersed into an electroetching solution that fills all the gaps including the contact unit and the process unit.
• the contact opening 314 is placed in close proximity of a contact region 320a of the surface 103b of the conductive layer 102b.
• the contact region 320a may be at any appropriate location on the surface of the wafer and may be at any location at a given instant. As the solution 308 wets the contact region, the solution establishes electrical contact between the electrode 309 and the contact region 320a since the solution 308 is selected to be conductive.
• the process unit 304 may be comprised of a process hole 322.
• a process electrode 326 is in physical contact with the solution 308.
• the process electrode 326 is electrically connectable to a negative terminal of the power source 310.
• the top surface 303 of the holder structure is placed across the surface of the wafer in a substantially parallel fashion during the process.
• the process opening 330 is placed in close proximity of a process region 320b of the surface 103b of the conductive layer 102b.
• the process region may be approximately equal to the area of the opening 230. Due to the relative motion between the wafer and the holder structure 301, the process region 320b maybe at various locations on the surface 103b of the wafer at different times during the process.
• Figure 4B shows, the top surface 303 of an exemplary holder structure 301 in plan view.
• the top surface 303 comprises contact and process openings 314, 330 of the units 302 and 304, which maybe distributed in a predetermined pattern.
• Shapes of the process openings and contact openings shown in Figure 4B are only exemplary, and as discussed in relation to Figures 3A, 3B, 3C, 3D, 3E, 3F, 3G, various shapes and forms of process or contact units maybe employed.
• the contact electrodes 309 and process electrodes 326, which are immersed in the electroetching solution may also have any geometrical shape and cross section. They may be in the form of mesh or even conductive foam.
• Electroetching solution 308 contacts the process region 320b and establishes electrical contact between the electrode 326 and the process region 320b.
• the electroetching of the copper layer 102b is initiated when a potential is applied between the contact electrode, which becomes an anode and the process electrode, which becomes a cathode.
• the electrical current passes from contact electrode 309, into the electroetching solution 308 and enters the copper layer 102b at the contact region 320a.
• the current then flows in the copper film 102b towards the process region 320b, enters the electroetching solution 308 and flows to the cathode 326.
• the resistivity of this electroetching solution is much higher than the resistivity of copper layer. If the distance between the surface of the holder structure and the surface of the wafer is small enough, such as 0.1-5 mm, the total resistance of this section of the etching solution will also be higher. Consequently, the electrical current will substantially follow the path through the copper layer and cause electroetching at the process region 320b. Any leakage of electrical current through the solution itself will reduce the efficiency of material removal since such leakage current would not result in electropolishing of the copper film.
• the electroetching solution is the common solution for the contact unit and the process unit and the units are in fluid communication through the electroetching solution that exists between the wafer surface and the top surface of the holder structure.
• the anodic voltage on the copper layer at the process region 320b causes electropolishing or electroetching of the copper in that region.
• the wafer may be rotated and/or linearly moved over the holder structure 301 to accomplish uniform electroetching over the entire surface of the wafer.
• the process may be performed by bringing the wafer surface 103b in close proximity of the surface 303 of the holder 301 or even by contacting the surface 103b to the top surface 303 of the holder structure 301. If wafer surface is physically contacted to the top surface 303, it is preferable that the top surface comprises a pad material.
• an electrochemical mechanical etching or polishing process can be carried out, which can planarize originally non-planar workpiece surfaces as discussed earlier, for electrochemical mechanical etching applications, a soft pad or a pad comprising abrasives on its surface may be employed.
• the power sources 210 and 310 shown in Figure 3 A and Figure 4A provide the power necessary to accomplish electropolishing.
• the various electrodes described may be all comiected to a single power supply or multiple power supplies may be connected groups of electrodes to form zones, which maybe controlled independently from each other.
• a first group of process electrodes may be used to remove copper from the near-edge surface of the wafer and they may be connected to the negative terminal of a first power supply.
• a second group of process electrodes may scan the central region of the wafer surface to remove copper from this central region. This second group of process electrodes may be connected to the negative terminal of a second power supply.
• an electropolishing process may be carried out at the central region of the wafer using the second power supply and the second group of process electrodes. Then copper removal from the near-edge portion maybe initiated powering the first group of process electrodes by the first power supply.
• Ability of independently removing material from multiple different zones on a wafer allows great flexibility in obtaining highly uniform electropolishing. Number of zones and number of electrodes per zone may be as small or large as practical.
• the contact electrodes may or may not be divided into different zones.
• the electrical current passing through that zone is expected to decrease, if voltage is constant.
• a constant current source is used as the power supply, as copper is removed from the surface, voltage drop is expected to increase.
• These changes in the current or voltage can be used to monitor the amount of material removed from the wafer surface. By knowing the position of a certain process area on the wafer surface at a certain time and the value of the current and voltage, one can determine the amount of copper left at that process region. If constant voltage supplies are used as power supplies, as the copper is removed by electroetching at a certain process area, the current value drops and therefore the electroetching rate also drops. This way, self-limiting of the electroetching process is achieved at regions of the wafer where copper is removed. This is important to avoid the copper loss from within the features as indicated in Figure 1A.
• FIG. 5 shows another exemplary elecfroetching or electropolishing system 400 that can be used to electrochemically etch the copper layer 102c.
• the system 400 comprises a plurality of contact and process units, hi this embodiment, a common cathode, which is immersed in an electroetching solution, is used to electroetch the layer 102c through the process units and provides electrical power to the layer 102c through the contact units.
• This design is attractive especially for cases where material is being removed from the surface of the wafer and it gets deposited onto the common cathode. Since cathode is large and away from the wafer surface many wafers such as a few thousand wafers can be processed in this approach before the need to clean or replace the cathode.
• a plurality of contact units 402 and process units 404 may be formed in a holder structure 401.
• the holder structure 401 in this embodiment is also shaped as a plate having a top surface 403 and a bottom surface 405.
• the system 400 is operated the way the system 300 is operated in the previous embodiment.
• the contact units 402 or contact nozzles are comprised of contact holes 406 formed in the holder 401.
• Contact electrodes 409 are placed inside the contact holes 406 and thus immersed in an elecfroetching solution 408.
• the electroetching solution 408 is used for both, establishing contact with and electroetching the conductive layer 102c.
• the contact elecfrodes 409 are electrically connected to a positive terminal of a power source 410.
• the process units 404 or nozzles are comprised of process holes 430 or process openings formed through the holder structure 401.
• the electroetching solution 408 fills the contact holes 406 as well as the process holes 430.
• contact holes are in close proximity of the wafer surface and they define contact regions 420a on the surface 103c of the conductive layer 102c.
• a common process electrode 426 which is the cathode, is placed in the reservoir and kept in physical contact with the electroetching solution 408. The process electrode 426 is electrically connected to a negative terminal of the power source 410.
• the electroetching solution 408 fills the process holes 430.
• the contact elecfrodes may be placed very close to the wafer surface and insulating plugs 450 may be used below the contact electrodes. These insulating plugs may or may not be permeable by the solution. Wires connecting the various elecfrodes to the power supply are preferably isolated from the solution.
• the top surface 403 of the holder 401 may or may not physically contact the wafer surface. If there is physical contact, it is preferred that the top surface 403 comprise a pad. It is also possible to use a fixed abrasive pad at the top surface to sweep the surface of the wafer to assist the material removal process, especially if planarization is required during copper electropolishing step.
• the holder 401 may itself be made of a pad material with process openings 430 and contact openings 406 cut into it. Contact electrodes 409 may then be placed into this pad. Contact elecfrodes may be placed very close to the top surface 403 to reduce voltage drop, but they should not protrude beyond the surface 403 to avoid physical contact with the surface of the copper layer 102c. Holder structures having various designs of process openings 430 and contact openings 406 may be employed as explained before.
• Figures 6A-9B depict some of these different holder structures having various contact and process unit designs.
• the contact elecfrodes in the contact units do not physically contact the wafer surface that is electropolished.
• the electrical conduction between the surface of the wafer under process and the contact electrodes is provided through the process solution that is touches the contact electrodes and the surface.
• a holder structure 460 has a top surface 462 and a bottom surface 464.
• a number of contact units 466 are formed in the top surface 462 of the holder structure 460.
• a number of process units 468 are formed through the holder structure 460 and between the top surface 462 and bottom surface 464.
• the contact units 466 are channels, preferably near-rectangular in cross- section, having a bottom wall 470 and side walls 472.
• the channels are distributed parallel and separated one another equidistantly, they may be distributed in any manner such as non-parallel or radial and the distance between the channels may vary.
• the contact electrode 474 is placed in the channel 466, preferably on the bottom wall 470.
• the elecfrodes are shaped as bars or wires extending along the channels.
• the contact electrodes may be directly placed on the bottom wall 470. If there is, the base 476 may be extended down to the bottom surface of the holder structure 460 and may be made of an insulator.
• the height of the electrode is at the level of the surface 462 or slightly less than the depth of the channel so that during the process the electrode cannot touch the wafer surface that is electropolished but allow current flow through the process solution.
• An insulated wire 478 connects the electrode to a terminal of a power supply (not shown).
• the process units 468 may be shaped as round holes extending through the holder structure and allowing solution flow to the top surface. Holes 468 may be rectangular or any other geometrical form, including slits. Process units may also be continuous slits in between the channels 466.
• every other channel 466 could be a process unit (shown as 304 in Figure 4A), and the electrodes within these process units would be the process electrodes (shown as 326 in Figure 4A).
• solution would be fed through the openings (shown as 468 in Figure 6A), and power would be applied between contact elecfrodes and process electrodes as shown in Figure 4A.
• a single power source can be used if all contact electrodes are connected together and all process electrodes are connected together.
• multiple power supplies can be used to power multiple contact electrode-process electrode pairs, or a single power supply may be switched between various pairs of contact electrode-process elecfrode.
• FIG. 7A shows, in plan view and Figure 7B in partial cross section, another embodiment of a holder structure 480, which is a variation of the holder structure 460 shown in the previous embodiment.
• the holder structure 480 comprises channels 486 and holes 488.
• the channels in this example are placed in diagonal fashion and equidistantly parallel to one another.
• the channels 486 are in rectangular shape and are defined by a bottom wall 490 and side walls 492, as shown in Figure 7B.
• Contact electrodes 494 are shaped as beads that are lined along the bottom of the channels 486 and connected a terminal of a power supply (not shown). As described above, the contact elecfrodes 494 may or may not be placed on an electrode base 496.
• Figures 8A-8B illustrate another embodiment of a holder structure 500.
• the holder structure 500 has a top surface 502 and a bottom surface 504.
• a number of contact units 506 are formed in the top surface 502.
• a number of process units 508 are formed through the holder structure 500 and between the top and bottom surfaces 502, 504.
• the contact units 506 are channels, preferably rectangular cross-section, having a bottom wall 510 and side-walls 512.
• the channels are distributed parallel and separated one another equidistantly, they may also be distributed in any manner such as non-parallel or radial, and the distance between the channels may vary.
• contact electrodes 514 are preferably conductive brushes made of thin conductive wires or bristles.
• the contact electrodes 514 are placed in the channel 506, preferably on the bottom wall 510.
• the height of the conductive brushes 514 is preferably slightly less than the depth of the channel 506 so that during the process brushes 514 cannot touch the wafer surface that is electropolished but allow current to flow through the process solution.
• the base 516 may be extended down to the bottom surface of the holder structure 500 and may be made of an insulator.
• An insulated electrical line 518 connects the conductive brushes to a terminal of a power supply (not shown).
• the process units 508 may be shaped as round holes extending through the holder structure and allowing solution flow to the top surface during the process. Holes 502 may be rectangular or any other geometrical form.
• Figures 9A-9B illustrate another embodiment of the holder structure using conductive brushes that are used in the previous embodiment. Of course, use of conductive brushes is for the purpose of exemplifying subject embodiment. Contact electrodes with any other shape and geometry may be used with the embodiments described in connection to Figures 9A-9B. Similarly, use of different shape, size and geometry of process units and contact units as well as their possible distribution alternatives on the holder structures are within the scope of this invention.
• a holder structure 520 is a variation of the holder structure 500 shown in the previous embodiment.
• the holder structure 520 comprises contact units 526 and process units 528.
• the process units 528 in this example are placed in diagonal fashion and equidistantly parallel to one another.
• the process units in this embodiment are shaped as slits extending between the top and bottom surfaces 522, 524 of the holder structure 520 and allowing process solution to flow.
• the contact units in this embodiment are shaped as holes in the holder structure.
• the contact units 526 include a bottom wall 530 and side-wall 532 which is cylindrical in this example.
• Conductive brushes 534 are placed on the bottom wall 530 of the contact units 526 and connected to a terminal of a power supply (not shown). As described above, the contact electrodes 534 may be placed on an electrode base 536.
• FIG. 10A Two other designs that employ the buried electrical contact concept of the present invention are shown in Figures 10A and 10B.
• contact electrodes 600 are over supports 601 and they are in close proximity of the surface 103c of the copper layer 102c.
• the supports 601 may be held by a holder structure (not shown), which maybe made of an open frame.
• Supports 601 are made of insulating material and they reduce the electrical current leakage that may flow from the contact electrodes 600 through the electropolishing solution 608, to the electrode 626 when a voltage rendering the contact electrodes anodic is applied between the electrode and the contact electrodes. In operation, contact electrodes 600 do not touch the surface 103c.
• FIG. 10A A version of the design in Figure 10A that can be used for touchprocessing is shown in Figure 10B. h Figure 10B, the contact electrodes 600b and structures 601b are buried in a spongy material 620 or a pad material.
• the spongy material maybe a porous polymeric pad that allows the elecfroetching solution 608b to wet the wafer surface as well as the contact electrodes 626b.
• the surface of the copper layer 102c may or may not touch the surface of the pad material.
• most of the material removal takes place on the wafer surface in the area in between the contact elecfrodes, i.e., process openings, which may contain the spongy material as shown in Figure 10B, or spongy material may be removed from these process openings to reduce electrical resistance and resistance to flow of the electrolyte.
• the surface of the pad material may comprise abrasives to assist material removal process, especially if planarization is required during electropolishing, i.e., the starting copper surface is non-planar.
• FIGs 11 A and 1 IB schematically illustrates exemplary stages of an electropolishing process using the system described in Figure 10A.
• the electrodes are placed on supports 702 and connected to a positive terminal of a power supply.
• a cathode electrode 705 is also connected to a negative terminal of the power supply. Since the electropolishing process is exemplified with two contact electrodes, a portion of cathode electrode 705 is shown in Figures 11A-11B.
• Electropolishing process is applied to an exemplary substrate 704 having a copper layer 706.
• the material removal takes place on the wafer surface in a process opening 707 in between the contact electrodes.
• the substrate 704 may be a semiconductor substrate including features 708 filled with copper layer.
• the features 708 and the surface of the substrate 704 may be lined with a barrier layer 710, which has generally a lesser conductivity than the conductivity of the copper.
• Ta, W, WN, WCN or TaN are the typical barrier materials for copper deposition.
• a copper removal solution such as an electropolishing solution 712 is in contact with the copper layer 706 and the cathode electrode 705 (see also Figure 10A).
• the contact electrodes 701a and 701b are placed in close proximity of the copper layer. As the current from the contact electrodes 701a and 701b flow through the copper layer 706, a surface portion 714a of the copper layer 706 is removed or electropolished. The surface portion is the portion of the copper layer that is located across the process hole 707 and the contact electrodes. As shown in Figure 11 A, direction of the current flow from the first contact electrode 701a and the second contact electrode 701b is depicted with the arrows A and B respectively.
• the electropolishing uniformly reduces the thickness of the copper layer down to the barrier layer level and continues as long as conductive copper remains on the barrier layer.
• FIG. 1 IB shows another instant during the electropolishing process, as the system 700 moves over the remaining portion of the copper layer 706. As the contact electrode 701a moves over the copper layer 706, current flows through the remaining layer and starts electropolishing process.
• the system 700 is able to reduce and increase the current flow from a particular contact electrode depending on the remaining copper across that particular elecfrode as the process progresses and once the barrier is exposed copper removal is drastically reduced or arrested to avoid copper loss from within the features 708.
• the power supply might be a DC power supply or a variable voltage power supply such as a pulse generator.
• the electropolishing voltage or current may be varied during the process to obtain the best process results in terms of uniform material removal and surface quality of the resulting workpiece surface. For example, to obtain smooth surfaces a high current density, i.e. higher polishing voltage, may be used early in the process but then the current density may be reduced to have more accurate endpoint detection.
• Contact and process regions may have many different shapes and sizes. Distance between contact elecfrodes and the workpiece surface may be uniform throughout or may be variable.
• Electropolishing solutions that can be used for copper removal include commonly employed phosphoric acid solutions.

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