US20080099344A9 - Electropolishing system and process - Google Patents

Electropolishing system and process Download PDF

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Publication number
US20080099344A9
US20080099344A9 US10/391,924 US39192403A US2008099344A9 US 20080099344 A9 US20080099344 A9 US 20080099344A9 US 39192403 A US39192403 A US 39192403A US 2008099344 A9 US2008099344 A9 US 2008099344A9
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Prior art keywords
contact
conductive layer
electrode
solution
potential difference
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US10/391,924
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US7578923B2 (en
US20040007478A1 (en
Inventor
Bulent Basol
Homayoun Talieh
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Novellus Systems Inc
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Novellus Systems Inc
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Priority claimed from US09/201,929 external-priority patent/US6176992B1/en
Priority claimed from US09/283,024 external-priority patent/US6251235B1/en
Priority claimed from US09/685,934 external-priority patent/US6497800B1/en
Priority claimed from US10/238,665 external-priority patent/US6902659B2/en
Assigned to NUTOOL, INC. reassignment NUTOOL, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: BASOL, BULENT M., TALIEH, HOMAYOUN
Priority to US10/391,924 priority Critical patent/US7578923B2/en
Application filed by Novellus Systems Inc filed Critical Novellus Systems Inc
Priority to KR1020057008421A priority patent/KR20050092364A/en
Priority to PCT/GB2003/004809 priority patent/WO2004044273A1/en
Priority to AU2003285491A priority patent/AU2003285491A1/en
Priority to JP2005506666A priority patent/JP2006505697A/en
Priority to TW92131492A priority patent/TWI329893B/en
Publication of US20040007478A1 publication Critical patent/US20040007478A1/en
Priority to US10/822,424 priority patent/US7427337B2/en
Priority to US11/069,202 priority patent/US20050173260A1/en
Assigned to ASM NUTOOL, INC. reassignment ASM NUTOOL, INC. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: NUTOOL, INC.
Assigned to NOVELLUS SYSTEMS, INC. reassignment NOVELLUS SYSTEMS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ASM NUTOOL, INC.
Publication of US20080099344A9 publication Critical patent/US20080099344A9/en
Publication of US7578923B2 publication Critical patent/US7578923B2/en
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B24GRINDING; POLISHING
    • B24BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00Lapping machines or devices; Accessories
    • B24B37/11Lapping tools
    • B24B37/20Lapping pads for working plane surfaces
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23HWORKING OF METAL BY THE ACTION OF A HIGH CONCENTRATION OF ELECTRIC CURRENT ON A WORKPIECE USING AN ELECTRODE WHICH TAKES THE PLACE OF A TOOL; SUCH WORKING COMBINED WITH OTHER FORMS OF WORKING OF METAL
    • B23H5/00Combined machining
    • B23H5/06Electrochemical machining combined with mechanical working, e.g. grinding or honing
    • B23H5/08Electrolytic grinding
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/04Electroplating with moving electrodes
    • C25D5/06Brush or pad plating
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25FPROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F3/00Electrolytic etching or polishing
    • C25F3/02Etching
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25FPROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F3/00Electrolytic etching or polishing
    • C25F3/16Polishing
    • C25F3/30Polishing of semiconducting materials
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25FPROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F7/00Constructional parts, or assemblies thereof, of cells for electrolytic removal of material from objects; Servicing or operating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H01L21/2885Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation
    • H01L21/3212Planarisation by chemical mechanical polishing [CMP]
    • H01L21/32125Planarisation by chemical mechanical polishing [CMP] by simultaneously passing an electrical current, i.e. electrochemical mechanical polishing, e.g. ECMP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67075Apparatus for fluid treatment for etching for wet etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/6715Apparatus for applying a liquid, a resin, an ink or the like
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • C25D7/123Semiconductors first coated with a seed layer or a conductive layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32115Planarisation

Definitions

  • the present invention generally relates to semiconductor integrated circuit technology and, more particularly, to an electroetching or electropolishing process and apparatus.
  • Conventional semiconductor devices generally include a semiconductor substrate, usually a silicon substrate, and a plurality of sequentially formed dielectric layers such as silicon dioxide and conductive paths or interconnects made of conductive materials. Interconnects are usually formed by filling a conductive material in trenches etched into the dielectric layers. In an integrated circuit, multiple levels of interconnect networks laterally extend with respect to the substrate surface. Interconnects formed in different layers can be electrically connected using vias or contacts.
  • the filling of a conductive material into features can be carried out by electrodeposition.
  • a conductive material such as copper is deposited over the substrate surface including into such features.
  • a material removal technique is employed to planarize and remove the excess metal from the top surface, leaving conductors only in the features or cavities.
  • the standard material removal technique that is most commonly used for this purpose is chemical mechanical polishing (CMP).
  • CMP chemical mechanical polishing
  • Chemical etching and electropolishing which is also referred to as electroetching or electrochemical etching, are also attractive process options that are being evaluated for this application. Copper is the material of choice, at this time, for interconnect applications because of its low resistivity and good electromigration properties. Therefore, the present invention will be described for the electropolishing of copper and copper alloy layers as an example, although electropolishing of other materials such as Pt, Co, Ni etc., can also be achieved using the method and apparatus of this invention.
  • FIG. 1A shows a workpiece surface 100 with an exemplary via 102 and an exemplary trench 104 coated with conductor 106 using standard electroplating technique.
  • the surface of the conductor 106 may be flat over the small via 102
  • the surface of the conductor 106 over the larger trench 104 has a step “S”.
  • this non-flat surface topography needs to be planarized as the excess conductor is removed from the surface leaving it only within the features.
  • Dashed lines 110 and 112 schematically show how conductor loss from the trench may increase from an amount “d” to a larger amount “D” as the excess conductor thickness on the surface is reduced from “t” to nearly zero, respectively. As can be appreciated, such conductor loss from within features is not acceptable.
  • CMP techniques have been developed to provide the capability of planarizing and at the same time removing the excess conductor layers. This is shown in FIG. 1B as dashed lines of 120 and 122 . After excess conductor removal, the resulting surface is ideally planar as indicated by dashed line 122 , and both the via 102 and trench 104 are completely filled with the conductor. It should be noted that any remaining part of the excess conductor along with any other conductor layer (such as a barrier layer) are all removed to assure electrical isolation between the conductors within features 102 and 104 .
  • Planarization capability of standard electroetching techniques is not as good as CMP. Therefore, results from these processes may lie somewhere between the cases shown in FIGS. 1A and 1B .
  • Planarization capability of electroetching may be increased and the ideal result shown as dashed line 122 in FIG. 1B may be approached by employing a planarization pad or workpiece surface influencing device (WSID) which introduces mechanical action on the wafer surface as the conductor removal from the workpiece surface is performed. This way it may be possible to planarize the non-planar or non-flat copper surface as the excess copper is removed. Since there is mechanical action in such processes they are referred to as Electrochemical Mechanical Etching (ECME) or Electrochemical Mechanical Polishing. As the name suggest, in such approaches, electroetching is carried out as the wafer surface is contacted by a planarization pad and relative motion is established between the wafer surface and the planarization pad.
  • ECME Electrochemical Mechanical Etching
  • Electrochemical Mechanical Deposition As described above, standard electroplating techniques yield conformal deposits and non-planar workpiece surfaces that need to be planarized during the excess material removal step.
  • Newly developed electrodeposition techniques which are collectively called Electrochemical Mechanical Deposition (ECMD) methods, utilize a pad or WSID in close proximity of the wafer surface during conductor deposition. Action of the WSID during plating gives planar deposits with flat surface topography even over the largest features present on the workpiece surface. Such a planar deposit is shown as layer 130 in FIG. 1C Removal of excess conductive material, such as copper from such planar deposits does not require further planarization during the material removal step. Therefore, CMP, electroetching, chemical etching, electrochemical mechanical etching and chemical mechanical etching techniques may all be successfully employed for removing the overburden in a planar and uniform manner in this case.
  • Electrochemical Mechanical Etching and Electrochemical Mechanical Deposition techniques will reveal that these methods have the capability to electrotreat, i.e., electrodeposit as well as electropolish, full surface of the wafer without any need to set aside a “contacting region” protected from the process solution, such as the edge surface region that would be under a clamp-ring in an apparatus that uses electrical contacts with a clamp-ring design.
  • one method of making electrical contact to the workpiece surface involves physically touching the conductive surface of the workpiece by conductive contact elements, such as wires, fingers, springs, rollers, brushes etc., and establishing a relative motion between the contact elements and the wafer surface so that different sections of the wafer surface is physically and electrically contacted at different times.
  • electrical contact to the workpiece surface is achieved without physically touching the wafer by the conductive contact elements. Either way, electrical contacts may be made substantially all over the surface of the wafer or only at the edge region of the wafer.
  • the present invention overcomes the identified limitations of conventional electropolishing approaches and provides alternative contacting means and electroetching techniques that uniformly remove conductive films from a workpiece surface.
  • an apparatus and a method for electropolishing a surface of a conductive layer on a work piece are disclosed.
  • the method of the present invention includes the steps immersing a contact electrode in a contact solution, contacting a portion of the surface of the conductive layer with the contact solution to define a contact region, immersing a process electrode in a process solution, contacting a portion of the surface of the conductive layer with the process solution to define a process region, and applying an electrical potential between the contact electrode and the process electrode to electropolish the surface of the conductive layer of the process region.
  • the method further includes the step of moving at least one of the contact or process region from a first location to a second location on the surface of the conductive layer.
  • the entire surface of the conductive layer can be electropolished.
  • the contact solution and the process solution are the same conductive solution.
  • the conductive solution contacts the surface of the conductive layer.
  • a second contact electrode is provided, and the method further includes the steps of immersing the second electrode in the contact solution, contacting a portion of the surface of the conductive layer with the contact solution to define a second contact region, and applying an electrical potential between the contact electrodes and the process electrode to electropolish the second contact region.
  • the method further includes the step of contacting the surface of the conductive layer with a top surface of a pad thereby planarizing nonuniformities of the surface of the conductive layer during electropolishing.
  • the top surface of the pad may be abrasive.
  • the pad may intermittently contact the surface of the conductive layer.
  • an apparatus for electropolishing a surface of a conductive layer on a workpiece includes a contact unit containing a contact solution, a contact electrode immersed therein and having an opening through which the contact solution contacts a portion of the surface of the conductive layer to define a contact region, and a process unit containing a process solution, a process electrode immersed therein and having an opening through which the process solution contacts a portion of the surface of the conductive layer to define a process region configured to electropolish the surface of the conductive layer defined by the process region in response to a potential difference applied between the contact electrode and the process electrode.
  • the contact electrode and/or the process electrode may be proximate to the surface of the conductive layer.
  • the potential difference includes a DC voltage or a variable voltage.
  • a mechanism produces relative motion between the process region and the surface of the conductive layer to electropolish substantially the whole surface of the conductive layer on the workpiece.
  • the mechanism may further produce relative motion between the contact region and the surface of the conductive layer.
  • the process unit includes a plurality of process openings through which the process solution contacts portions of the surface of the conductive layer to define a plurality of process regions and the potential difference applied between the contact electrode and the process electrode electropolishes the surface of the conductive layer defined by the plurality of process regions.
  • the contact unit includes a plurality of contact openings through which the contact solution contacts portions of the surface of the conductive layer, each contact opening includes a contact electrode disposed therein and the potential difference applied between the contact electrodes and the process electrode electropolishes the surface of the conductive layer defined by the plurality of process regions.
  • a first set of contact units is configured to contact portions of the surface of the conductive layer wherein the potential difference applied between the contact electrodes of the first set of contact units and the process electrode electropolishes the surface of the conductive layer defined by a first set of process regions.
  • a second set of contact units is configured to contact portions of the surface of the conductive layer wherein a second potential difference applied between the contact electrodes of the second set of contact units and the process electrode electropolishes the surface of the conductive layer defined by a second set of process regions.
  • a zone switch is configured to select the first contact zone or the second contact zone to apply the potential difference.
  • the potential difference and the second potential difference may be different voltages.
  • FIG. 1A is a schematic illustration of a substrate having a non-planar copper overburden layer which has been deposited using a conventional deposition process
  • FIG. 1B is a schematic illustration of the substrate shown in FIG. 1A wherein a planarization process has been applied to the non-planar copper overburden layer;
  • FIG. 1C is a schematic illustration of a substrate having a planar copper overburden layer which has been deposited using an electrochemical mechanical deposition process
  • FIG. 2A is a schematic cross-sectional view of a portion of a semiconductor wafer having a copper layer formed on it;
  • FIG. 2B is a schematic cross sectional view of the semiconductor wafer in detail
  • FIG. 3A is a schematic illustration of an embodiment of an electropolishing system of the present invention.
  • FIGS. 3B-3D are schematic illustrations of various embodiments of the contact units for establishing electrical contact with wafer surface through the process solution;
  • FIGS. 3E-3G 3 D are schematic illustrations of various designs of the contact units and process units for establishing electrical contact with and processing a wafer surface
  • FIG. 4A is a schematic illustration of another embodiment of an electropolishing system of the present invention including multiple contact and process electrodes;
  • FIG. 4B is a schematic planar view of the electropolishing system shown in FIG. 4A ;
  • FIG. 5 is a schematic illustration of yet another embodiment of an electropolishing system of the present invention using multiple contact electrodes with a single process electrode;
  • FIGS. 6A-6B are schematic illustrations of a holder structure used with the electropolishing system of the present invention.
  • FIGS. 8A-8B are schematic illustrations of another holder structure used with the electropolishing system of the present invention.
  • FIGS. 9A-9B are schematic illustrations of yet another holder structure used with the electropolishing system of the present invention.
  • FIGS. 10A-10B are schematic illustrations of other embodiments of an electropolishing system of the present invention using multiple contact electrodes with a single process electrode;
  • FIGS. 11A-11B are schematic illustrations of stages of an electropolishing process using the electropolishing system shown in FIG. 10A .
  • the present invention provides a method and a system to electroetch or electropolish a conductive material layer deposited on a surface of a semiconductor.
  • the invention can be used with Electrochemical Mechanical Etching processes or conventional clectroetching systems.
  • the present invention achieves electroetching of the conductive material through the combination of the use of a process solution and electrical contact elements that do not make physical contact to the workpiece surface.
  • FIG. 2A shows a cross-sectional view of a portion of a workpiece 100 a .
  • the workpiece may be an exemplary portion of a preprocessed semiconductor wafer.
  • a top layer 102 a of the workpiece 100 a may include a layer of conductive material such as electroplated copper.
  • a bottom layer 104 a of the workpiece may include an insulating layer 106 a such as a low-k dielectric film and substrate 108 of the wafer, preferably silicon.
  • the conductive layer 102 a is a part of the workpiece 100 a , it is within the scope of the present invention that the workpiece 100 a may be entirely made of a conductive material.
  • the insulating layer is patterned to provide a via feature 110 and a trench feature 112 .
  • the features and surface 114 of the insulating layer may be lined with a barrier layer 116 such as a layer of Ta, TaN, Ti, WCN, WN, TiN or a composite of these materials.
  • the barrier layer may be also coated with a conductive seed layer such as a copper seed layer that is not shown in FIG. 2B for the purpose of clarity. Such seed layers are commonly deposited on semiconductor wafers before conductive layer deposition.
  • the workpiece 100 a may comprise a plurality of via, trench and other features. As illustrated in FIG.
  • the surface 103 a of the conductive layer 102 a may be planar, i.e. may not have a surface topography having high and low regions formed during the deposition of the conductive layer 102 a . It should be appreciated that the invention can also process non-planar wafer surfaces.
  • FIG. 3A schematically explains how electropolishing of a material on a wafer surface may be achieved using a remote electrical contact to the wafer.
  • the cross-sectional segment in FIG. 3A shows a portion of an exemplary electroetching or electropolishing system 200 to electrochemically etch a portion of the copper layer 102 a , off the surface of the workpiece 100 a , which is held by a wafer carrier (not shown).
  • the electroetching system in this example embodiment has a contact unit 202 and a process unit 204 .
  • the contact unit 202 is able to establish electrical contact with the conductive layer 102 a through a liquid contact solution.
  • the contact unit 202 comprises a contact container 206 or a contact nozzle to contain a contact solution 208 .
  • a contact electrode 209 is placed inside the contact container 206 and thus imnmersed in the contact solution 208 .
  • the contact electrode does not physically touch the surface 103 a of the copper layer 102 a .
  • the contact electrode 209 is electrically connected to a positive terminal of a power source 210 .
  • Contact solution 208 fills the container through a contact inlet 212 and leaves the container through contact opening 214 .
  • the inlet 212 may be connected to a contact solution reservoir (not shown).
  • the contact opening 214 is placed in close proximity of a contact region 220 a of the surface 103 a of the conductive layer 102 a .
  • the contact solution 208 flows through the opening 214 , it physically touches the contact area and establishes electrical communication between the electrode 209 and the contact region 220 a since it is a conductive liquid.
  • the contact electrode 209 is as close as possible to the contact area 220 a .
  • the contact electrode 209 may even be placed outside the contact container and placed anywhere as long as it maintains physical contact with the contact solution 208 .
  • the process unit 204 comprises a process container 222 or a process nozzle to contain process solution 224 , which is an electroetching or electropolishing solution.
  • a process electrode 226 is located inside the process container 222 and kept immersed in the process solution 224 . It should be noted that the process electrode does not have to be confined in the process container. It may be outside as long as it physically touches the process solution and therefore establishes electrical contact with it.
  • the process electrode 226 is electrically connected to a negative terminal of the power source 210 .
  • Process solution 224 fills the process container through a process inlet 228 and exits the container through process opening 230 .
  • the process solution 224 can be re-circulated or agitated.
  • the inlet 228 may be connected to a process solution reservoir (not shown).
  • the process opening 230 is placed in close proximity of a process region 220 b of the surface 103 a of the conductive layer 102 a .
  • the process region 220 b may be approximately equal to the area of the process opening 230 .
  • the process solution 224 flowing through the opening 230 contacts the process region 220 b and establishes electrical contact between the process electrode 226 and the process region 220 b .
  • FIG. 3A a specific contact region and process region are illustrated in FIG. 3A , it is understood that these regions may be located anywhere on the workpiece.
  • a plurality of contact units and process units may be used.
  • the contact solution and the process solution may be different solutions or they may be same. If they are the same solution, they need to be effective electroetching or electropolishing solutions for the material to be removed from the workpiece surface.
  • the contact units and process units may be constructed in different ways using various different materials.
  • the contact electrode 209 is on the wall of the container 206 or it actually is the wall of the container 206 . Similar approach may be used for the construction of the process container 222 .
  • the contact or process units may comprise an insulating spongy material within which the conductive electrodes are embedded.
  • FIG. 3B shows such a case for the contact unit 202 a , comprising insulating spongy material 250 , which holds and passes through the contact solution 208 .
  • Contact electrode 209 touches the contact solution 208 in the sponge 250 . It should be noted that, as shown in FIG.
  • the spongy material may physically touch the copper film 102 a surface during electropolishing since it is a soft material and does not damage the surface.
  • use of an insulating spongy material or insulating soft pad in the construction of the process unit, which may physically contact the wafer surface during processing is within the scope of this invention.
  • electroetching of the copper layer 102 a is initiated at the process region 220 b when a potential is applied between the contact electrode 209 , which is anode, and the process electrode 226 , which is cathode.
  • the electrical current passes from the contact electrode 209 to the contact solution 208 and through the contact solution enters the copper layer 102 a at the contact region 220 a .
  • the current then flows in the copper layer 102 a towards the process region 220 b , enters the electroetching solution 224 and flows to the process electrode 226 .
  • the contact electrode 209 is more anodic than the copper film at the contact region 220 a and the copper film at the process region 220 b is more anodic than the cathode 226 .
  • the anodic voltage on the copper film at the process region causes electropolishing or electroetching of the copper in this particular region.
  • the copper removed from the substrate in this region deposits on the process electrode 226 .
  • the solution is formulated to contain complexing agents it is possible that copper complexes to stay in the solution rather than deposit on the process electrode 226 . We will, however, continue giving the example of the case where the solution is a standard electroetching solution such as a phosphoric acid solution.
  • the contact electrode 209 is made of an inert material such as Pt or Pt-coated metal, stainless steel, conductive mesh or foam etc., and therefore anodic voltage on this inert electrode cannot remove any material. It may, however, generate bubbles of gas, which can be removed by the flowing solution or by other designs built in the contact unit.
  • FIG. 3C One such design is shown in FIG. 3C and it includes a permeable barrier 260 placed over the contact electrode 209 .
  • the permeable barrier 260 is porous and it lets the contact solution 208 through. It, however, does not allow the bubbles to go to the substrate surface by guiding them towards a bleed opening 261 , which directs them away from the workpiece surface. Similar structure may be used in the process unit also.
  • 3D is a two-chamber contact container 206 a , which comprises a primary container 206 aa and a secondary container 206 aaa .
  • the contact electrode 209 is placed in the primary container 206 aa , and therefore any bubble that is generated may be diverted away from the substrate surface through the bleed opening 261 a .
  • More complex designs of contact containers and process containers utilizing multi chambers can be used for bubble minimization or elimination.
  • the contact solution does not contain any ions of materials that can deposit onto the surface of the copper layer and the contact electrode 209 does not contain any material that may be etched or electroetched by the contact solution 208 . Therefore, deposition solutions containing ionic species of metals are not suitable for use as a contact solution.
  • the process unit is preferably moved between the edge of the workpiece and the center of the workpiece while the workpiece is rotated or otherwise moved.
  • the movement of the process unit along the radius of the wafer can cause electoetching of the entire surface of the wafer as the wafer is rotated. Other motions can also be used. What is important is to make every point on the wafer a process region at some point in time to remove copper from substantially the whole surface. Scanning of the wafer surface by the process unit can be accomplished by moving the wafer, the process unit or both with respect to each other.
  • contact units and process units in different shapes and forms. These designs include but are not limited to circular, oval, pie shape, linear and others and they define the shape of the contact region and the process region. Depending upon the nature of the relative motion established between the workpiece surface and the contact and process units the most appropriate shapes of these units may be selected for the most uniform electroetching. Three of such examples are shown in FIGS. 3E, 3F , and 3 G, which show the top view of process units 270 a , 270 b and 270 c , and contact units 280 a , 280 b and 280 c .
  • Wafer 290 is placed in close proximity (preferably 0.1 to 5 mm range depending on the conductivity of the solutions used) of the process and contact units so that its copper coated surface (not shown) is wetted by the process and contact solutions.
  • wafer 290 in FIG. 3E may be translated over the contact units 280 a , and the process unit 270 a in a linear direction 291 . Wafer may also be slowly rotated. The linear motion may or may not be bi-directional.
  • the process unit 270 a effectively scans the whole surface of the wafer for uniform material removal. Multiple contact units assure electrical contact to wafer at all times. Even more process and contact units may be used in the design (see for example, FIGS.
  • FIG. 3F A specific design of contact unit 280 b and process unit 270 b , appropriate for rotational motion of the wafer 290 is shown in FIG. 3F .
  • the pie-shaped process region in this case scans the wafer surface for uniform material removal from the whole front surface.
  • Contact unit 280 b maybe placed anywhere at the edge of the wafer. Again, multiple contact and process units may be utilized in this design.
  • FIG. 3G a ring-shaped contact region is provided.
  • the process region, where material removal is carried out constitutes the rest of the wafer surface. In this case copper left in the contact region needs to be removed later using another process such as chemical etching or electrochemical etching.
  • FIGS. 4A, 4B and 5 illustrate two alternative electroetching systems that may include a plurality of contact units and process units.
  • the contact and process units in these embodiments are held by various base structures that allow units to use the same electroetching solution as the contact solution as well as the process solution.
  • electrical contact to the wafer surface is established through the electroetching solution applied through the contact units.
  • the contact electrodes do not physically contact to the surface of the wafer, however, as described earlier a soft, sponge or pad like material may be placed in the contact or process units and this material may touch the workpiece surface at the contact region and the process region.
  • the electroetching solution provides the conductive path between the contact electrode and the conductive surface of the wafer.
  • Exemplary electroetching or electropolishing system 300 of FIG. 4A may be used for processing copper layer 102 b of the substrate 100 b , which is held by a carrier (not shown).
  • the electroetching system in this example embodiment has also a contact unit 302 and a process unit 304 .
  • the units 302 , 304 are held by or formed in a holder structure 301 .
  • the holder structure 301 in this embodiment is shaped as a plate having a top surface 303 and a bottom surface 305 .
  • the contact unit 302 is able to establish electrical contact with the conductive layer 102 b through a liquid electrical contact.
  • the contact unit 302 or a contact nozzle may be comprised of a contact hole 306 formed in the holder structure 301 .
  • a contact electrode 309 inside the contact unit 306 is immersed in an electroetching solution 308 . It should be understood that the contact electrode shown in FIG. 4A may totally fill the contact hole 306 in which case the electroetching solution 308 would mainly wet the top surface of the contact electrode 309 .
  • the top surface of the contact electrode may be below the level of the top surface 303 of the holder structure 301 as shown in FIG.
  • the electroetching solution 308 is used for both establishing contact and electroetching the conductive layer 102 b .
  • the contact electrode 309 is electrically connected to a positive terminal of a power source 310 .
  • the electroetching solution 308 fills the unit and touches the conductive layer.
  • the contact opening 314 is preferably in the plane of the top surface 303 of the holder structure 301 .
  • the inlet 312 may be connected to a common electroetching solution reservoir (not shown) or the whole structure may be immersed into an electroetching solution that fills all the gaps including the contact unit and the process unit.
  • the contact opening 314 is placed in close proximity of a contact region 320 a of the surface 103 b of the conductive layer 102 b .
  • the contact region 320 a may be at any appropriate location on the surface of the wafer and may be at any location at a given instant. As the solution 308 wets the contact region, the solution establishes electrical contact between the electrode 309 and the contact region 320 a since the solution 308 is selected to be conductive.
  • the process unit 304 may be comprised of a process hole 322 .
  • a process electrode 326 is in physical contact with the solution 308 .
  • the process electrode 326 is electrically connectable to a negative terminal of the power source 310 .
  • the top surface 303 of the holder structure is placed across the surface of the wafer in a substantially parallel fashion during the process.
  • the process opening 330 is placed in close proximity of a process region 320 b of the surface 103 b of the conductive layer 102 b .
  • the process region may be approximately equal to the area of the opening 230 . Due to the relative motion between the wafer and the holder structure 301 , the process region 320 b may be at various locations on the surface 103 b of the wafer at different times during the process.
  • FIG. 4B shows, the top surface 303 of an exemplary holder structure 301 in plan view.
  • the top surface 303 comprises contact and process openings 314 , 330 of the units 302 and 304 , which may be distributed in a predetermined pattern. Shapes of the process openings and contact openings shown in FIG. 4B are only exemplary, and as discussed in relation to FIGS. 3A, 3B , 3 C, 3 D, 3 E, 3 F, 3 G, various shapes and forms of process or contact units may be employed.
  • the contact electrodes 309 and process electrodes 326 which are immersed in the electroetching solution may also have any geometrical shape and cross section. They may be in the form of mesh or even conductive foam.
  • Electroetching solution 308 contacts the process region 320 b and establishes electrical contact between the electrode 326 and the process region 320 b .
  • the electroetching of the copper layer 102 b is initiated when a potential is applied between the contact electrode, which becomes an anode and the process electrode, which becomes a cathode.
  • the electrical current passes from contact electrode 309 , into the electroetching solution 308 and enters the copper layer 102 b at the contact region 320 a .
  • the current then flows in the copper film 102 b towards the process region 320 b , enters the electroetching solution 308 and flows to the cathode 326 .
  • the resistivity of this electroetching solution is much higher than the resistivity of copper layer. If the distance between the surface of the holder structure and the surface of the wafer is small enough, such as 0.1-5 mm, the total resistance of this section of the etching solution will also be higher. Consequently, the electrical current will substantially follow the path through the copper layer and cause electroetching at the process region 320 b . Any leakage of electrical current through the solution itself will reduce the efficiency of material removal since such leakage current would not result in electropolishing of the copper film.
  • the electroetching solution is the common solution for the contact unit and the process unit and the units are in fluid communication through the electroetching solution that exists between the wafer surface and the top surface of the holder structure.
  • the anodic voltage on the copper layer at the process region 320 b causes electropolishing or electroetching of the copper in that region.
  • the wafer may be rotated and/or linearly moved over the holder structure 301 to accomplish uniform electroetching over the entire surface of the wafer.
  • the process may be performed by bringing the wafer surface 103 b in close proximity of the surface 303 of the holder 301 or even by contacting the surface 103 b to the top surface 303 of the holder structure 301 . If wafer surface is physically contacted to the top surface 303 , it is preferable that the top surface comprises a pad material.
  • an electrochemical mechanical etching or polishing process can be carried out, which can planarize originally non-planar workpiece surfaces as discussed earlier, for electrochemical mechanical etching applications, a soft pad or a pad comprising abrasives on its surface may be employed.
  • the power sources 210 and 310 shown in FIG. 3A and FIG. 4A provide the power necessary to accomplish electropolishing.
  • the various electrodes described may be all connected to a single power supply or multiple power supplies may be connected groups of electrodes to form zones, which may be controlled independently from each other.
  • a first group of process electrodes may be used to remove copper from the near-edge surface of the wafer and they may be connected to the negative terminal of a first power supply.
  • a second group of process electrodes may scan the central region of the wafer surface to remove copper from this central region. This second group of process electrodes may be connected to the negative terminal of a second power supply.
  • an electropolishing process may be carried out at the central region of the wafer using the second power supply and the second group of process electrodes. Then copper removal from the near-edge portion may be initiated powering the first group of process electrodes by the first power supply.
  • Ability of independently removing material from multiple different zones on a wafer allows great flexibility in obtaining highly uniform electropolishing. Number of zones and number of electrodes per zone may be as small or large as practical.
  • the contact electrodes may or may not be divided into different zones.
  • the electrical current passing through that zone is expected to decrease, if voltage is constant.
  • a constant current source is used as the power supply, as copper is removed from the surface, voltage drop is expected to increase.
  • These changes in the current or voltage can be used to monitor the amount of material removed from the wafer surface. By knowing the position of a certain process area on the wafer surface at a certain time and the value of the current and voltage, one can determine the amount of copper left at that process region. If constant voltage supplies are used as power supplies, as the copper is removed by electroetching at a certain process area, the current value drops and therefore the electroetching rate also drops. This way, self-limiting of the electroetching process is achieved at regions of the wafer where copper is removed. This is important to avoid the copper loss from within the features as indicated in FIG. 1A .
  • FIG. 5 shows another exemplary electroetching or electropolishing system 400 that can be used to electrochemically etch the copper layer 102 c .
  • the system 400 comprises a plurality of contact and process units.
  • a common cathode which is immersed in an electroetching solution, is used to electroetch the layer 102 c through the process units and provides electrical power to the layer 102 c through the contact units.
  • This design is attractive especially for cases where material is being removed from the surface of the wafer and it gets deposited onto the common cathode. Since cathode is large and away from the wafer surface many wafers such as a few thousand wafers can be processed in this approach before the need to clean or replace the cathode. Referring to FIG.
  • a plurality of contact units 402 and process units 404 may be formed in a holder structure 401 .
  • the holder structure 401 in this embodiment is also shaped as a plate having a top surface 403 and a bottom surface 405 .
  • the system 400 is operated the way the system 300 is operated in the previous embodiment.
  • the contact units 402 or contact nozzles are comprised of contact holes 406 formed in the holder 401 .
  • Contact electrodes 409 are placed inside the contact holes 406 and thus immersed in an electroetching solution 408 .
  • the electroetching solution 408 is used for both establishing contact with and electroetching the conductive layer 102 c .
  • the contact electrodes 409 are electrically connected to a positive terminal of a power source 410 .
  • the process units 404 or nozzles are comprised of process holes 430 or process openings formed through the holder structure 401 .
  • the electroetching solution 408 fills the contact holes 406 as well as the process holes 430 .
  • contact holes are in close proximity of the wafer surface and they define contact regions 420 a on the surface 103 c of the conductive layer 102 c .
  • a common process electrode 426 which is the cathode, is placed in the reservoir and kept in physical contact with the electroetching solution 408 .
  • the process electrode 426 is electrically connected to a negative terminal of the power source 410 .
  • the electroetching solution 408 fills the process holes 430 .
  • the contact electrodes may be placed very close to the wafer surface and insulating plugs 450 may be used below the contact electrodes. These insulating plugs may or may not be permeable by the solution. Wires connecting the various electrodes to the power supply are preferably isolated from the solution.
  • the top surface 403 of the holder 401 may or may not physically contact the wafer surface. If there is physical contact, it is preferred that the top surface 403 comprise a pad. It is also possible to use a fixed abrasive pad at the top surface to sweep the surface of the wafer to assist the material removal process, especially if planarization is required during copper electropolishing step.
  • the holder 401 may itself be made of a pad material with process openings 430 and contact openings 406 cut into it. Contact electrodes 409 may then be placed into this pad. Contact electrodes may be placed very close to the top surface 403 to reduce voltage drop, but they should not protrude beyond the surface 403 to avoid physical contact with the surface of the copper layer 102 c . Holder structures having various designs of process openings 430 and contact openings 406 may be employed as explained before.
  • FIGS. 6A-9B depict some of these different holder structures having various contact and process unit designs.
  • the contact electrodes in the contact units do not physically contact the wafer surface that is electropolished.
  • the electrical conduction between the surface of the wafer under process and the contact electrodes is provided through the process solution that is touches the contact electrodes and the surface.
  • a holder structure 460 has a top surface 462 and a bottom surface 464 .
  • a number of contact units 466 are formed in the top surface 462 of the holder structure 460 .
  • a number of process units 468 are formed through the holder structure 460 and between the top surface 462 and bottom surface 464 .
  • the contact units 466 are channels, preferably near-rectangular in cross-section, having a bottom wall 470 and side walls 472 .
  • the channels are distributed parallel and separated one another equidistantly, they may be distributed in any manner such as non-parallel or radial and the distance between the channels may vary.
  • the contact electrode 474 is placed in the channel 466 , preferably on the bottom wall 470 .
  • the electrodes are shaped as bars or wires extending along the channels.
  • the contact electrodes may be directly placed on the bottom wall 470 . If there is, the base 476 may be extended down to the bottom surface of the holder structure 460 and may be made of an insulator.
  • the height of the electrode is at the level of the surface 462 or slightly less than the depth of the channel so that during the process the electrode cannot touch the wafer surface that is electropolished but allow current flow through the process solution.
  • An insulated wire 478 connects the electrode to a terminal of a power supply (not shown).
  • the process units 468 may be shaped as round holes extending through the holder structure and allowing solution flow to the top surface. Holes 468 may be rectangular or any other geometrical form, including slits. Process units may also be continuous slits in between the channels 466 .
  • FIGS. 6A, 6B , 7 A, 7 B, 8 A, 8 B, 9 A, 9 B, 10 A and 10 B will be described as applied to the concept shown in FIG. 5 , namely, a design with one cathode and multiple contact electrodes. It should be appreciated, however, that the designs and concepts given in these figures are also directly applicable to the cases shown in FIGS. 3A, 3B , 3 C, 3 D, 3 E, 3 F, 3 G and 4 A.
  • every other channel 466 may be made a contact unit (shown as 302 in FIG. 4A ) with a contact electrode 474 in it (shown as 309 in FIG. 4A ).
  • every other channel 466 could be a process unit (shown as 304 in FIG. 4A ), and the electrodes within these process units would be the process electrodes (shown as 326 in FIG. 4A ).
  • solution would be fed through the openings (shown as 468 in FIG. 6A ), and power would be applied between contact electrodes and process electrodes as shown in FIG. 4A .
  • a single power source can be used if all contact electrodes are connected together and all process electrodes are connected together.
  • multiple power supplies can be used to power multiple contact electrode-process electrode pairs, or a single power supply may be switched between various pairs of contact electrode-process electrode.
  • FIG. 7A shows, in plan view and FIG. 7B in partial cross section, another embodiment of a holder structure 480 , which is a variation of the holder structure 460 shown in the previous embodiment.
  • the holder structure 480 comprises channels 486 and holes 488 .
  • the channels in this example are placed in diagonal fashion and equidistantly parallel to one another.
  • the channels 486 are in rectangular shape and are defined by a bottom wall 490 and side walls 492 , as shown in FIG. 7B .
  • Contact electrodes 494 are shaped as beads that are lined along the bottom of the channels 486 and connected a terminal of a power supply (not shown). As described above, the contact electrodes 494 may or may not be placed on an electrode base 496 .
  • FIGS. 8A-8B illustrate another embodiment of a holder structure 500 .
  • the holder structure 500 has a top surface 502 and a bottom surface 504 .
  • a number of contact units 506 are formed in the top surface 502 .
  • a number of process units 508 are formed through the holder structure 500 and between the top and bottom surfaces 502 , 504 .
  • the contact units 506 are channels, preferably rectangular cross-section, having a bottom wall 510 and side-walls 512 .
  • the channels are distributed parallel and separated one another equidistantly, they may also be distributed in any manner such as non-parallel or radial, and the distance between the channels may vary.
  • contact electrodes 514 are preferably conductive brushes made of thin conductive wires or bristles.
  • the contact electrodes 514 are placed in the channel 506 , preferably on the bottom wall 510 .
  • the height of the conductive brushes 514 is preferably slightly less than the depth of the channel 506 so that during the process brushes 514 cannot touch the wafer surface that is electropolished but allow current to flow through the process solution.
  • the base 516 may be extended down to the bottom surface of the holder structure 500 and may be made of an insulator.
  • An insulated electrical line 518 connects the conductive brushes to a terminal of a power supply (not shown).
  • the process units 508 may be shaped as round holes extending through the holder structure and allowing solution flow to the top surface during the process. Holes 502 may be rectangular or any other geometrical form.
  • FIGS. 9A-9B illustrate another embodiment of the holder structure using conductive brushes that are used in the previous embodiment.
  • conductive brushes is for the purpose of exemplifying subject embodiment.
  • Contact electrodes with any other shape and geometry may be used with the embodiments described in connection to FIGS. 9A-9B .
  • use of different shape, size and geometry of process units and contact units as well as their possible distribution alternatives on the holder structures are within the scope of this invention.
  • a holder structure 520 is a variation of the holder structure 500 shown in the previous embodiment.
  • the holder structure 520 comprises contact units 526 and process units 528 .
  • the process units 528 in this example are placed in diagonal fashion and equidistantly parallel to one another.
  • the process units in this embodiment are shaped as slits extending between the top and bottom surfaces 522 , 524 of the holder structure 520 and allowing process solution to flow.
  • the contact units in this embodiment are shaped as holes in the holder structure.
  • the contact units 526 include a bottom wall 530 and side-wall 532 which is cylindrical in this example.
  • Conductive brushes 534 are placed on the bottom wall 530 of the contact units 526 and connected to a terminal of a power supply (not shown). As described above, the contact electrodes 534 may be placed on an electrode base 536 .
  • FIGS. 10A and 10B Two other designs that employ the buried electrical contact concept of the present invention are shown in FIGS. 10A and 10B .
  • contact electrodes 600 are over supports 601 and they are in close proximity of the surface 103 c of the copper layer 102 c .
  • the supports 601 may be held by a holder structure (not shown), which may be made of an open frame.
  • Supports 601 are made of insulating material and they reduce the electrical current leakage that may flow from the contact electrodes 600 through the electropolishing solution 608 , to the electrode 626 when a voltage rendering the contact electrodes anodic is applied between the electrode and the contact electrodes. In operation, contact electrodes 600 do not touch the surface 103 c .
  • FIG. 10B A version of the design in FIG. 10A that can be used for touchprocessing is shown in FIG. 10B .
  • the contact electrodes 600 b and structures 601 b are buried in a spongy material 620 or a pad material.
  • the spongy material maybe a porous polymeric pad that allows the electroetching solution 608 b to wet the wafer surface as well as the contact electrodes 626 b .
  • the surface of the copper layer 102 c may or may not touch the surface of the pad material.
  • most of the material removal takes place on the wafer surface in the area in between the contact electrodes, i.e., process openings, which may contain the spongy material as shown in FIG. 10B , or spongy material may be removed from these process openings to reduce electrical resistance and resistance to flow of the electrolyte.
  • the surface of the pad material may comprise abrasives to assist material removal process, especially if planarization is required during electropolishing, i.e., the starting copper surface is non-planar.
  • FIGS. 11A and 11B schematically illustrates exemplary stages of an electropolishing process using the system described in FIG. 10A .
  • a system 700 with two contact electrodes, a first contact electrode 701 a and a second contact electrode 701 b .
  • the electrodes are placed on supports 702 and connected to a positive terminal of a power supply.
  • a cathode electrode 705 is also connected to a negative terminal of the power supply. Since the electropolishing process is exemplified with two contact electrodes, a portion of cathode electrode 705 is shown in FIGS. 11A-11B .
  • Electropolishing process is applied to an exemplary substrate 704 having a copper layer 706 .
  • the material removal takes place on the wafer surface in a process opening 707 in between the contact electrodes.
  • the substrate 704 may be a semiconductor substrate including features 708 filled with copper layer.
  • the features 708 and the surface of the substrate 704 may be lined with a barrier layer 710 , which has generally a lesser conductivity than the conductivity of the copper.
  • Ta, W, WN, WCN or TaN are the typical barrier materials for copper deposition.
  • a copper removal solution such as an electropolishing solution 712 is in contact with the copper layer 706 and the cathode electrode 705 (see also FIG. 10A ).
  • the contact electrodes 701 a and 701 b are placed in close proximity of the copper layer. As the current from the contact electrodes 701 a and 701 b flow through the copper layer 706 , a surface portion 714 a of the copper layer 706 is removed or electropolished. The surface portion is the portion of the copper layer that is located across the process hole 707 and the contact electrodes. As shown in FIG. 11A , direction of the current flow from the first contact electrode 701 a and the second contact electrode 701 b is depicted with the arrows A and B respectively.
  • the electropolishing uniformly reduces the thickness of the copper layer down to the barrier layer level and continues as long as conductive copper remains on the barrier layer. It will be appreciated that during the removal of the portion 714 , resistance against the current flow increases and the current flow chooses the least resistive path where it may still have conductive copper and continues etching the remaining copper until the surface portion 714 is almost entirely removed. This brings the electropolishing of the copper layer to a stop at that location of the surface , i.e., process self-limits, before moving over the neighboring location as shown in FIG. 11B .
  • FIG. 11B shows another instant during the electropolishing process, as the system 700 moves over the remaining portion of the copper layer 706 .
  • the contact electrode 701 a moves over the copper layer 706 , current flows through the remaining layer and starts electropolishing process.
  • current flow from the second electrode faces resistance. This causes a larger current I 1 to flow through the first electrode 701 a and through the path A compared to the current I 2 that flows through the second electrode 701 b .
  • the current flow from the first contact electrode causes electropolishing of the remaining copper, whereas the small current or lack of current through the electrode 701 b arrests further copper removal from the areas where barrier is exposed. Accordingly, the system 700 is able to reduce and increase the current flow from a particular contact electrode depending on the remaining copper across that particular electrode as the process progresses and once the barrier is exposed copper removal is drastically reduced or arrested to avoid copper loss from within the features 708 .
  • the power supply might be a DC power supply or a variable voltage power supply such as a pulse generator.
  • the electropolishing voltage or current may be vaned during the process to obtain the best process results in terms of uniform material removal and surface quality of the resulting workpiece surface. For example, to obtain smooth surfaces a high current density, i.e. higher polishing voltage, may be used early in the process but then the current density may be reduced to have more accurate endpoint detection.
  • Contact and process regions may have many different shapes and sizes. Distance between contact electrodes and the workpiece surface may be uniform throughout or may be variable.
  • Electropolishing solutions that can be used for copper removal include commonly employed phosphoric acid solutions.

Abstract

The present invention provides a process for electropolishing a conductive surface of a semiconductor wafer. During the process, a contact electrode in a contact solution contacts a contact region on surface of the conductive layer with the contact solution. Further, during the process a process electrode in a process solution contacts a process region on the conductive surface with the process solution while applying an electrical potential between the contact electrode and the process electrode to electropolish the surface of the conductive layer of the process region.

Description

    RELATED APPLICATIONS
  • This application claims priority from Provisional Application Serial No. 60/425,694 filed Nov. 12, 2002. This Application is a continuation in part of U.S. application Ser. No. 10/093,185, filed Mar. 5, 2002, (NT-003C) which is a continuation of U.S. Ser. No. 09/877,335 filed Jun. 7, 2001 (NT-003D), now U.S. Pat. No. 6,471,847, which is a divisional of U.S. Ser. No. 09/283,024 filed Mar. 30, 1999 (NT-003), now U.S. Pat. No. 6,251,235. This application is also a continuation in part of U.S. applications Ser. No. 09/685,934 filed Oct. 11, 2000 (NT-105) and U.S. Ser. No. 10/238,665, filed Sep. 20, 2002 (NT-001C1), which is a continuation of U.S. Ser. No. 09/607,567 filed Jun. 29, 2000, (NT-001D) which is a divisional of U.S. Ser. No. 09/201,929 filed Dec. 1, 1998, (NT-001) now U.S. Pat. No. 6,176,992, all incorporated herein by reference.
  • FIELD
  • The present invention generally relates to semiconductor integrated circuit technology and, more particularly, to an electroetching or electropolishing process and apparatus.
  • BACKGROUND
  • Conventional semiconductor devices generally include a semiconductor substrate, usually a silicon substrate, and a plurality of sequentially formed dielectric layers such as silicon dioxide and conductive paths or interconnects made of conductive materials. Interconnects are usually formed by filling a conductive material in trenches etched into the dielectric layers. In an integrated circuit, multiple levels of interconnect networks laterally extend with respect to the substrate surface. Interconnects formed in different layers can be electrically connected using vias or contacts.
  • The filling of a conductive material into features such as vias, trenches, pads or contacts, can be carried out by electrodeposition. In electrodeposition or electroplating method, a conductive material, such as copper is deposited over the substrate surface including into such features. Then, a material removal technique is employed to planarize and remove the excess metal from the top surface, leaving conductors only in the features or cavities. The standard material removal technique that is most commonly used for this purpose is chemical mechanical polishing (CMP). Chemical etching and electropolishing, which is also referred to as electroetching or electrochemical etching, are also attractive process options that are being evaluated for this application. Copper is the material of choice, at this time, for interconnect applications because of its low resistivity and good electromigration properties. Therefore, the present invention will be described for the electropolishing of copper and copper alloy layers as an example, although electropolishing of other materials such as Pt, Co, Ni etc., can also be achieved using the method and apparatus of this invention.
  • Standard electroplating techniques yield copper layers that deposit conformally over large features, such as features with widths larger than a few micrometers. This results in a plated wafer surface topography that is not flat. FIG. 1A shows a workpiece surface 100 with an exemplary via 102 and an exemplary trench 104 coated with conductor 106 using standard electroplating technique. As can be seen from this figure, although the surface of the conductor 106 may be flat over the small via 102, the surface of the conductor 106 over the larger trench 104 has a step “S”. During the excess conductor or overburden removal process step employing CMP, etching or electroetching, this non-flat surface topography needs to be planarized as the excess conductor is removed from the surface leaving it only within the features. If planarization is not achieved, as the thickness of the conductor is reduced, presence of the step S causes loss of conductor from within the large trench. Dashed lines 110 and 112 schematically show how conductor loss from the trench may increase from an amount “d” to a larger amount “D” as the excess conductor thickness on the surface is reduced from “t” to nearly zero, respectively. As can be appreciated, such conductor loss from within features is not acceptable.
  • CMP techniques have been developed to provide the capability of planarizing and at the same time removing the excess conductor layers. This is shown in FIG. 1B as dashed lines of 120 and 122. After excess conductor removal, the resulting surface is ideally planar as indicated by dashed line 122, and both the via 102 and trench 104 are completely filled with the conductor. It should be noted that any remaining part of the excess conductor along with any other conductor layer (such as a barrier layer) are all removed to assure electrical isolation between the conductors within features 102 and 104.
  • Planarization capability of standard electroetching techniques is not as good as CMP. Therefore, results from these processes may lie somewhere between the cases shown in FIGS. 1A and 1B. Planarization capability of electroetching may be increased and the ideal result shown as dashed line 122 in FIG. 1B may be approached by employing a planarization pad or workpiece surface influencing device (WSID) which introduces mechanical action on the wafer surface as the conductor removal from the workpiece surface is performed. This way it may be possible to planarize the non-planar or non-flat copper surface as the excess copper is removed. Since there is mechanical action in such processes they are referred to as Electrochemical Mechanical Etching (ECME) or Electrochemical Mechanical Polishing. As the name suggest, in such approaches, electroetching is carried out as the wafer surface is contacted by a planarization pad and relative motion is established between the wafer surface and the planarization pad.
  • As described above, standard electroplating techniques yield conformal deposits and non-planar workpiece surfaces that need to be planarized during the excess material removal step. Newly developed electrodeposition techniques, which are collectively called Electrochemical Mechanical Deposition (ECMD) methods, utilize a pad or WSID in close proximity of the wafer surface during conductor deposition. Action of the WSID during plating gives planar deposits with flat surface topography even over the largest features present on the workpiece surface. Such a planar deposit is shown as layer 130 in FIG. 1C Removal of excess conductive material, such as copper from such planar deposits does not require further planarization during the material removal step. Therefore, CMP, electroetching, chemical etching, electrochemical mechanical etching and chemical mechanical etching techniques may all be successfully employed for removing the overburden in a planar and uniform manner in this case.
  • There are several patents and patent applications describing the electroetching process carried out with the assistance of the mechanical action provided by a pad or WSID. Details of such processes are given in the following patents and patent applications; U.S. Pat. No. 6,402,925; U.S. patent application Ser. No. 10/238,665, entitled Method and apparatus for electroplating and electropolishing, filed Sep. 20, 2002, U.S. patent application Ser. No. 09/671,800 entitled, Method to minimize/eliminate metal coating over the top surface of a patterned substrate and layer structure made thereby, filed Sep. 28, 2000; U.S. patent application Ser. No. 09/841,622 entitled Electroetching system and method, filed Apr. 23, 2001; U.S. patent application Ser. No. 10/201,604 entitled, Multi-step electrodeposition process, filed Jul. 22, 2002; U.S. Provisional Application Serial No. 60/362,513 entitled, Method and Apparatus for Planar Material Removal technique using multi phase process environment, filed Mar. 6, 2002, U.S. application Ser. No. 10/238,665, entitled Method and apparatus for electroplating and electropolishing, filed Sep. 20, 2002 all commonly owned by the assignee of the present invention.
  • During the standard electrodeposition and electroetching processes, workpiece or wafer is typically contacted on its front surface near its edge, all around its circumference. The conventional way of contacting the wafer involves a clamp-ring design where electrical contacts such as spring-loaded metallic fingers are pressed against the edge of the surface along the perimeter of the wafer. Contacts are protected from the process solution using seals such as O-rings or lip seals that are pushed against the wafer surface at the edge. Advance of low-k material usage in wafer processing, however, is bringing new restrictions to the use of such contacts. Low-k materials are relatively soft and mechanically weak. Pressing metallic contacts and seals against conductive films deposited on low-k materials causes damage to such materials and may even cause loss of electrical contact since the conductive film over the damaged low-k layer may itself become discontinuous. To address this challenge, a new method for forming an electrical contact to a wafer edge has been disclosed in U.S Pat. Nos. 6,471,847 and 6,251,235, which are commonly owned by the assignee of the present invention. In this approach there is no metallic contact touching the wafer. Electrical contact is achieved using a liquid conductor, which is confined within a chamber.
  • Review of the above mentioned art related to Electrochemical Mechanical Etching and Electrochemical Mechanical Deposition techniques will reveal that these methods have the capability to electrotreat, i.e., electrodeposit as well as electropolish, full surface of the wafer without any need to set aside a “contacting region” protected from the process solution, such as the edge surface region that would be under a clamp-ring in an apparatus that uses electrical contacts with a clamp-ring design.
  • Contact designs that allow full-face electrodeposition or electroetching have been described in the following U.S. patent applications: U.S. patent application Ser. No. 09/685,934 entitled, Making electrical contact to the surface of a workpiece during metal plating, filed Oct. 11, 2000; U.S. patent application Ser. No. 09/735,546 entitled, Method of electrical contact to wafer frontal side for electrochemical plating, filed Dec. 14, 2000; and, U.S. patent application Ser. No. 09/760,757 entitled, Method and apparatus for electrodeposition of uniform film on substrate, filed Jan. 17, 2001, all commonly owned by the assignee of the present invention. As described in these applications, one method of making electrical contact to the workpiece surface involves physically touching the conductive surface of the workpiece by conductive contact elements, such as wires, fingers, springs, rollers, brushes etc., and establishing a relative motion between the contact elements and the wafer surface so that different sections of the wafer surface is physically and electrically contacted at different times. In another method, electrical contact to the workpiece surface is achieved without physically touching the wafer by the conductive contact elements. Either way, electrical contacts may be made substantially all over the surface of the wafer or only at the edge region of the wafer.
  • Although much progress has been made in electropolishing approaches and apparatus including contacting means of the workpiece during electropolishing, there is still need for alternative contacting means and electroetching techniques that uniformly remove excess conductive films from workpiece surfaces without causing damage and defects especially on advanced wafers with low-k materials.
  • SUMMARY OF THE INVENTION
  • The present invention overcomes the identified limitations of conventional electropolishing approaches and provides alternative contacting means and electroetching techniques that uniformly remove conductive films from a workpiece surface.
  • In one or more embodiments of the invention, an apparatus and a method for electropolishing a surface of a conductive layer on a work piece are disclosed. The method of the present invention includes the steps immersing a contact electrode in a contact solution, contacting a portion of the surface of the conductive layer with the contact solution to define a contact region, immersing a process electrode in a process solution, contacting a portion of the surface of the conductive layer with the process solution to define a process region, and applying an electrical potential between the contact electrode and the process electrode to electropolish the surface of the conductive layer of the process region.
  • According to another aspect of the invention, the method further includes the step of moving at least one of the contact or process region from a first location to a second location on the surface of the conductive layer. In moving at least one of the regions from the first location to another location throughout the process, the entire surface of the conductive layer can be electropolished.
  • In another aspect of the invention, the contact solution and the process solution are the same conductive solution. The conductive solution contacts the surface of the conductive layer.
  • According to another aspect of the invention, a second contact electrode is provided, and the method further includes the steps of immersing the second electrode in the contact solution, contacting a portion of the surface of the conductive layer with the contact solution to define a second contact region, and applying an electrical potential between the contact electrodes and the process electrode to electropolish the second contact region.
  • According to another aspect of the invention, the method further includes the step of contacting the surface of the conductive layer with a top surface of a pad thereby planarizing nonuniformities of the surface of the conductive layer during electropolishing. The top surface of the pad may be abrasive. The pad may intermittently contact the surface of the conductive layer.
  • In another embodiment of the present invention, an apparatus for electropolishing a surface of a conductive layer on a workpiece includes a contact unit containing a contact solution, a contact electrode immersed therein and having an opening through which the contact solution contacts a portion of the surface of the conductive layer to define a contact region, and a process unit containing a process solution, a process electrode immersed therein and having an opening through which the process solution contacts a portion of the surface of the conductive layer to define a process region configured to electropolish the surface of the conductive layer defined by the process region in response to a potential difference applied between the contact electrode and the process electrode.
  • According to other aspects of the invention, the contact electrode and/or the process electrode may be proximate to the surface of the conductive layer. The potential difference includes a DC voltage or a variable voltage.
  • According to yet another aspect of the invention, a mechanism produces relative motion between the process region and the surface of the conductive layer to electropolish substantially the whole surface of the conductive layer on the workpiece. The mechanism may further produce relative motion between the contact region and the surface of the conductive layer.
  • According to additional aspects of the invention, the process unit includes a plurality of process openings through which the process solution contacts portions of the surface of the conductive layer to define a plurality of process regions and the potential difference applied between the contact electrode and the process electrode electropolishes the surface of the conductive layer defined by the plurality of process regions. Moreover, the contact unit includes a plurality of contact openings through which the contact solution contacts portions of the surface of the conductive layer, each contact opening includes a contact electrode disposed therein and the potential difference applied between the contact electrodes and the process electrode electropolishes the surface of the conductive layer defined by the plurality of process regions.
  • In yet other aspects of the invention, a first set of contact units is configured to contact portions of the surface of the conductive layer wherein the potential difference applied between the contact electrodes of the first set of contact units and the process electrode electropolishes the surface of the conductive layer defined by a first set of process regions. Moreover, a second set of contact units is configured to contact portions of the surface of the conductive layer wherein a second potential difference applied between the contact electrodes of the second set of contact units and the process electrode electropolishes the surface of the conductive layer defined by a second set of process regions.
  • In yet another aspect of the invention, a zone switch is configured to select the first contact zone or the second contact zone to apply the potential difference. The potential difference and the second potential difference may be different voltages.
  • The above and additional advantages of the present invention will become apparent to those skilled in the art from a reading of the following detailed description when taken in conjunction with the accompanying drawings.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1A is a schematic illustration of a substrate having a non-planar copper overburden layer which has been deposited using a conventional deposition process;
  • FIG. 1B is a schematic illustration of the substrate shown in FIG. 1A wherein a planarization process has been applied to the non-planar copper overburden layer;
  • FIG. 1C is a schematic illustration of a substrate having a planar copper overburden layer which has been deposited using an electrochemical mechanical deposition process;
  • FIG. 2A is a schematic cross-sectional view of a portion of a semiconductor wafer having a copper layer formed on it;
  • FIG. 2B is a schematic cross sectional view of the semiconductor wafer in detail;
  • FIG. 3A is a schematic illustration of an embodiment of an electropolishing system of the present invention;
  • FIGS. 3B-3D are schematic illustrations of various embodiments of the contact units for establishing electrical contact with wafer surface through the process solution;
  • FIGS. 3E-3G 3D are schematic illustrations of various designs of the contact units and process units for establishing electrical contact with and processing a wafer surface;
  • FIG. 4A is a schematic illustration of another embodiment of an electropolishing system of the present invention including multiple contact and process electrodes;
  • FIG. 4B is a schematic planar view of the electropolishing system shown in FIG. 4A;
  • FIG. 5 is a schematic illustration of yet another embodiment of an electropolishing system of the present invention using multiple contact electrodes with a single process electrode;
  • FIGS. 6A-6B are schematic illustrations of a holder structure used with the electropolishing system of the present invention;
  • FIGS. 8A-8B are schematic illustrations of another holder structure used with the electropolishing system of the present invention;
  • FIGS. 9A-9B are schematic illustrations of yet another holder structure used with the electropolishing system of the present invention;
  • FIGS. 10A-10B are schematic illustrations of other embodiments of an electropolishing system of the present invention using multiple contact electrodes with a single process electrode; and
  • FIGS. 11A-11B are schematic illustrations of stages of an electropolishing process using the electropolishing system shown in FIG. 10A.
  • DETAILED DESCRIPTION
  • As will be described below, the present invention provides a method and a system to electroetch or electropolish a conductive material layer deposited on a surface of a semiconductor. The invention can be used with Electrochemical Mechanical Etching processes or conventional clectroetching systems. The present invention achieves electroetching of the conductive material through the combination of the use of a process solution and electrical contact elements that do not make physical contact to the workpiece surface.
  • Reference will now be made to the drawings wherein like numerals refer to like parts throughout. FIG. 2A shows a cross-sectional view of a portion of a workpiece 100 a. The workpiece may be an exemplary portion of a preprocessed semiconductor wafer. As also shown in FIG. 2B in detail, a top layer 102 a of the workpiece 100 a may include a layer of conductive material such as electroplated copper. A bottom layer 104 a of the workpiece may include an insulating layer 106 a such as a low-k dielectric film and substrate 108 of the wafer, preferably silicon. In this embodiment, although the conductive layer 102 a is a part of the workpiece 100 a, it is within the scope of the present invention that the workpiece 100 a may be entirely made of a conductive material.
  • The insulating layer is patterned to provide a via feature 110 and a trench feature 112. The features and surface 114 of the insulating layer may be lined with a barrier layer 116 such as a layer of Ta, TaN, Ti, WCN, WN, TiN or a composite of these materials. The barrier layer may be also coated with a conductive seed layer such as a copper seed layer that is not shown in FIG. 2B for the purpose of clarity. Such seed layers are commonly deposited on semiconductor wafers before conductive layer deposition. The workpiece 100 a may comprise a plurality of via, trench and other features. As illustrated in FIG. 2B, in order to exemplify one embodiment of the present invention the surface 103 a of the conductive layer 102 a may be planar, i.e. may not have a surface topography having high and low regions formed during the deposition of the conductive layer 102 a. It should be appreciated that the invention can also process non-planar wafer surfaces.
  • FIG. 3A schematically explains how electropolishing of a material on a wafer surface may be achieved using a remote electrical contact to the wafer. The cross-sectional segment in FIG. 3A shows a portion of an exemplary electroetching or electropolishing system 200 to electrochemically etch a portion of the copper layer 102 a, off the surface of the workpiece 100 a, which is held by a wafer carrier (not shown). The electroetching system in this example embodiment has a contact unit 202 and a process unit 204. As will be described more fully below, the contact unit 202 is able to establish electrical contact with the conductive layer 102 a through a liquid contact solution.
  • In this respect, the contact unit 202 comprises a contact container 206 or a contact nozzle to contain a contact solution 208. A contact electrode 209 is placed inside the contact container 206 and thus imnmersed in the contact solution 208. The contact electrode does not physically touch the surface 103 a of the copper layer 102 a. The contact electrode 209 is electrically connected to a positive terminal of a power source 210. Contact solution 208 fills the container through a contact inlet 212 and leaves the container through contact opening 214. The inlet 212 may be connected to a contact solution reservoir (not shown). The contact opening 214 is placed in close proximity of a contact region 220 a of the surface 103 a of the conductive layer 102 a. As the contact solution 208 flows through the opening 214, it physically touches the contact area and establishes electrical communication between the electrode 209 and the contact region 220 a since it is a conductive liquid. For lowest voltage drop, the contact electrode 209 is as close as possible to the contact area 220 a. However, if the resistivity of the contact solution 208 is low and the voltage drop is not a concern the contact electrode 209 may even be placed outside the contact container and placed anywhere as long as it maintains physical contact with the contact solution 208.
  • The process unit 204 comprises a process container 222 or a process nozzle to contain process solution 224, which is an electroetching or electropolishing solution. A process electrode 226 is located inside the process container 222 and kept immersed in the process solution 224. It should be noted that the process electrode does not have to be confined in the process container. It may be outside as long as it physically touches the process solution and therefore establishes electrical contact with it. The process electrode 226 is electrically connected to a negative terminal of the power source 210. Process solution 224 fills the process container through a process inlet 228 and exits the container through process opening 230. The process solution 224 can be re-circulated or agitated. The inlet 228 may be connected to a process solution reservoir (not shown). The process opening 230 is placed in close proximity of a process region 220 b of the surface 103 a of the conductive layer 102 a. In this embodiment, the process region 220 b may be approximately equal to the area of the process opening 230. The process solution 224 flowing through the opening 230 contacts the process region 220 b and establishes electrical contact between the process electrode 226 and the process region 220 b. Although a specific contact region and process region are illustrated in FIG. 3A, it is understood that these regions may be located anywhere on the workpiece. Furthermore, a plurality of contact units and process units may be used. The contact solution and the process solution may be different solutions or they may be same. If they are the same solution, they need to be effective electroetching or electropolishing solutions for the material to be removed from the workpiece surface.
  • The contact units and process units may be constructed in different ways using various different materials. For example, it is possible that the contact electrode 209 is on the wall of the container 206 or it actually is the wall of the container 206. Similar approach may be used for the construction of the process container 222. The contact or process units may comprise an insulating spongy material within which the conductive electrodes are embedded. FIG. 3B shows such a case for the contact unit 202 a, comprising insulating spongy material 250, which holds and passes through the contact solution 208. Contact electrode 209 touches the contact solution 208 in the sponge 250. It should be noted that, as shown in FIG. 3B, the spongy material may physically touch the copper film 102 a surface during electropolishing since it is a soft material and does not damage the surface. Similarly, use of an insulating spongy material or insulating soft pad in the construction of the process unit, which may physically contact the wafer surface during processing is within the scope of this invention.
  • Referring to FIG. 3A, electroetching of the copper layer 102 a is initiated at the process region 220 b when a potential is applied between the contact electrode 209, which is anode, and the process electrode 226, which is cathode. The electrical current passes from the contact electrode 209 to the contact solution 208 and through the contact solution enters the copper layer 102 a at the contact region 220 a. The current then flows in the copper layer 102 a towards the process region 220 b, enters the electroetching solution 224 and flows to the process electrode 226. In this respect, the contact electrode 209 is more anodic than the copper film at the contact region 220 a and the copper film at the process region 220 b is more anodic than the cathode 226. The anodic voltage on the copper film at the process region causes electropolishing or electroetching of the copper in this particular region. The copper removed from the substrate in this region deposits on the process electrode 226. If the solution is formulated to contain complexing agents it is possible that copper complexes to stay in the solution rather than deposit on the process electrode 226. We will, however, continue giving the example of the case where the solution is a standard electroetching solution such as a phosphoric acid solution. The contact electrode 209 is made of an inert material such as Pt or Pt-coated metal, stainless steel, conductive mesh or foam etc., and therefore anodic voltage on this inert electrode cannot remove any material. It may, however, generate bubbles of gas, which can be removed by the flowing solution or by other designs built in the contact unit. One such design is shown in FIG. 3C and it includes a permeable barrier 260 placed over the contact electrode 209. The permeable barrier 260 is porous and it lets the contact solution 208 through. It, however, does not allow the bubbles to go to the substrate surface by guiding them towards a bleed opening 261, which directs them away from the workpiece surface. Similar structure may be used in the process unit also. Another design shown in FIG. 3D is a two-chamber contact container 206 a, which comprises a primary container 206 aa and a secondary container 206 aaa. The contact electrode 209 is placed in the primary container 206 aa, and therefore any bubble that is generated may be diverted away from the substrate surface through the bleed opening 261 a. More complex designs of contact containers and process containers utilizing multi chambers can be used for bubble minimization or elimination.
  • Referring back to FIG. 3A, since the copper film at the contact region 220 a is more cathodic compared to the contact electrode 209, no copper dissolution is expected in this region. In fact, copper is protected by this cathodic voltage. In this respect, it is important that the contact solution does not contain any ions of materials that can deposit onto the surface of the copper layer and the contact electrode 209 does not contain any material that may be etched or electroetched by the contact solution 208. Therefore, deposition solutions containing ionic species of metals are not suitable for use as a contact solution.
  • During the process, the process unit is preferably moved between the edge of the workpiece and the center of the workpiece while the workpiece is rotated or otherwise moved. The movement of the process unit along the radius of the wafer can cause electoetching of the entire surface of the wafer as the wafer is rotated. Other motions can also be used. What is important is to make every point on the wafer a process region at some point in time to remove copper from substantially the whole surface. Scanning of the wafer surface by the process unit can be accomplished by moving the wafer, the process unit or both with respect to each other.
  • It is possible to design contact units and process units in different shapes and forms. These designs include but are not limited to circular, oval, pie shape, linear and others and they define the shape of the contact region and the process region. Depending upon the nature of the relative motion established between the workpiece surface and the contact and process units the most appropriate shapes of these units may be selected for the most uniform electroetching. Three of such examples are shown in FIGS. 3E, 3F, and 3G, which show the top view of process units 270 a, 270 b and 270 c, and contact units 280 a, 280 b and 280 c. Wafer 290 is placed in close proximity (preferably 0.1 to 5 mm range depending on the conductivity of the solutions used) of the process and contact units so that its copper coated surface (not shown) is wetted by the process and contact solutions. As explained before, when the electroetching process is initiated wafer 290 in FIG. 3E may be translated over the contact units 280 a, and the process unit 270 a in a linear direction 291. Wafer may also be slowly rotated. The linear motion may or may not be bi-directional. During process, the process unit 270 a effectively scans the whole surface of the wafer for uniform material removal. Multiple contact units assure electrical contact to wafer at all times. Even more process and contact units may be used in the design (see for example, FIGS. 6A, 6B, 7A, 7B, 8A, 8B, 9A, 9B). A specific design of contact unit 280 b and process unit 270 b, appropriate for rotational motion of the wafer 290 is shown in FIG. 3F. The pie-shaped process region in this case scans the wafer surface for uniform material removal from the whole front surface. Contact unit 280 b maybe placed anywhere at the edge of the wafer. Again, multiple contact and process units may be utilized in this design. In FIG. 3G, a ring-shaped contact region is provided. The process region, where material removal is carried out constitutes the rest of the wafer surface. In this case copper left in the contact region needs to be removed later using another process such as chemical etching or electrochemical etching. There are many other shapes and forms of the process and contact units that can be optimized for best uniformity of material removal.
  • FIGS. 4A, 4B and 5 illustrate two alternative electroetching systems that may include a plurality of contact units and process units. The contact and process units in these embodiments are held by various base structures that allow units to use the same electroetching solution as the contact solution as well as the process solution. In both embodiments, electrical contact to the wafer surface is established through the electroetching solution applied through the contact units. The contact electrodes do not physically contact to the surface of the wafer, however, as described earlier a soft, sponge or pad like material may be placed in the contact or process units and this material may touch the workpiece surface at the contact region and the process region. The electroetching solution provides the conductive path between the contact electrode and the conductive surface of the wafer.
  • Exemplary electroetching or electropolishing system 300 of FIG. 4A may be used for processing copper layer 102 b of the substrate 100 b, which is held by a carrier (not shown). The electroetching system in this example embodiment has also a contact unit 302 and a process unit 304. Differing from the previous embodiment, the units 302, 304 are held by or formed in a holder structure 301. The holder structure 301 in this embodiment is shaped as a plate having a top surface 303 and a bottom surface 305. As described in the previous embodiment, the contact unit 302 is able to establish electrical contact with the conductive layer 102 b through a liquid electrical contact. During the process, the holder structure 301 and the workpiece may be moved relative to one another. The contact unit 302 or a contact nozzle may be comprised of a contact hole 306 formed in the holder structure 301. A contact electrode 309 inside the contact unit 306 is immersed in an electroetching solution 308. It should be understood that the contact electrode shown in FIG. 4A may totally fill the contact hole 306 in which case the electroetching solution 308 would mainly wet the top surface of the contact electrode 309. The top surface of the contact electrode may be below the level of the top surface 303 of the holder structure 301 as shown in FIG. 4A, it may be at the same level as the top surface 303 of the holder structure 301, it may even be above the top surface 303 of the holder structure 301 as long as it does not touch the surface of the wafer. These embodiments are applicable to all examples herein and any variations thereof.
  • In this embodiment, the electroetching solution 308 is used for both establishing contact and electroetching the conductive layer 102 b. The contact electrode 309 is electrically connected to a positive terminal of a power source 310. The electroetching solution 308 fills the unit and touches the conductive layer. The contact opening 314 is preferably in the plane of the top surface 303 of the holder structure 301. The inlet 312 may be connected to a common electroetching solution reservoir (not shown) or the whole structure may be immersed into an electroetching solution that fills all the gaps including the contact unit and the process unit. The contact opening 314 is placed in close proximity of a contact region 320 a of the surface 103 b of the conductive layer 102 b. Since the holder structure 301 and the wafer 100 b is moved relative to one another during the process, the contact region 320 a may be at any appropriate location on the surface of the wafer and may be at any location at a given instant. As the solution 308 wets the contact region, the solution establishes electrical contact between the electrode 309 and the contact region 320 a since the solution 308 is selected to be conductive.
  • The process unit 304 may be comprised of a process hole 322. A process electrode 326 is in physical contact with the solution 308. The process electrode 326 is electrically connectable to a negative terminal of the power source 310. The top surface 303 of the holder structure is placed across the surface of the wafer in a substantially parallel fashion during the process. In this respect, the process opening 330 is placed in close proximity of a process region 320 b of the surface 103 b of the conductive layer 102 b. In this embodiment, the process region may be approximately equal to the area of the opening 230. Due to the relative motion between the wafer and the holder structure 301, the process region 320 b may be at various locations on the surface 103 b of the wafer at different times during the process.
  • FIG. 4B shows, the top surface 303 of an exemplary holder structure 301 in plan view. The top surface 303 comprises contact and process openings 314, 330 of the units 302 and 304, which may be distributed in a predetermined pattern. Shapes of the process openings and contact openings shown in FIG. 4B are only exemplary, and as discussed in relation to FIGS. 3A, 3B, 3C, 3D, 3E, 3F, 3G, various shapes and forms of process or contact units may be employed. The contact electrodes 309 and process electrodes 326, which are immersed in the electroetching solution may also have any geometrical shape and cross section. They may be in the form of mesh or even conductive foam.
  • During the process, the surface 303 is substantially parallel to the conductive surface of the wafer to perform uniform electroetching. Electroetching solution 308 contacts the process region 320 b and establishes electrical contact between the electrode 326 and the process region 320 b. The electroetching of the copper layer 102 b is initiated when a potential is applied between the contact electrode, which becomes an anode and the process electrode, which becomes a cathode. The electrical current passes from contact electrode 309, into the electroetching solution 308 and enters the copper layer 102 b at the contact region 320 a. The current then flows in the copper film 102 b towards the process region 320 b, enters the electroetching solution 308 and flows to the cathode 326. Although, there may be electroetching solution between the surface 103 b of the wafer and the top surface 303 of the holder 301, the resistivity of this electroetching solution is much higher than the resistivity of copper layer. If the distance between the surface of the holder structure and the surface of the wafer is small enough, such as 0.1-5 mm, the total resistance of this section of the etching solution will also be higher. Consequently, the electrical current will substantially follow the path through the copper layer and cause electroetching at the process region 320 b. Any leakage of electrical current through the solution itself will reduce the efficiency of material removal since such leakage current would not result in electropolishing of the copper film. It should be noted that in this embodiment the electroetching solution is the common solution for the contact unit and the process unit and the units are in fluid communication through the electroetching solution that exists between the wafer surface and the top surface of the holder structure. As described before, the anodic voltage on the copper layer at the process region 320 b causes electropolishing or electroetching of the copper in that region.
  • During the process, the wafer may be rotated and/or linearly moved over the holder structure 301 to accomplish uniform electroetching over the entire surface of the wafer. The process may be performed by bringing the wafer surface 103 b in close proximity of the surface 303 of the holder 301 or even by contacting the surface 103 b to the top surface 303 of the holder structure 301. If wafer surface is physically contacted to the top surface 303, it is preferable that the top surface comprises a pad material. With the selection of an appropriate pad, an electrochemical mechanical etching or polishing process can be carried out, which can planarize originally non-planar workpiece surfaces as discussed earlier, for electrochemical mechanical etching applications, a soft pad or a pad comprising abrasives on its surface may be employed.
  • The power sources 210 and 310 shown in FIG. 3A and FIG. 4A provide the power necessary to accomplish electropolishing. It should be understood that the various electrodes described may be all connected to a single power supply or multiple power supplies may be connected groups of electrodes to form zones, which may be controlled independently from each other. For example, a first group of process electrodes may be used to remove copper from the near-edge surface of the wafer and they may be connected to the negative terminal of a first power supply. A second group of process electrodes may scan the central region of the wafer surface to remove copper from this central region. This second group of process electrodes may be connected to the negative terminal of a second power supply. In this case, an electropolishing process may be carried out at the central region of the wafer using the second power supply and the second group of process electrodes. Then copper removal from the near-edge portion may be initiated powering the first group of process electrodes by the first power supply. Ability of independently removing material from multiple different zones on a wafer allows great flexibility in obtaining highly uniform electropolishing. Number of zones and number of electrodes per zone may be as small or large as practical. The contact electrodes may or may not be divided into different zones.
  • When the copper is removed from a certain zone on the wafer, the electrical current passing through that zone is expected to decrease, if voltage is constant. Alternately, if a constant current source is used as the power supply, as copper is removed from the surface, voltage drop is expected to increase. These changes in the current or voltage can be used to monitor the amount of material removed from the wafer surface. By knowing the position of a certain process area on the wafer surface at a certain time and the value of the current and voltage, one can determine the amount of copper left at that process region. If constant voltage supplies are used as power supplies, as the copper is removed by electroetching at a certain process area, the current value drops and therefore the electroetching rate also drops. This way, self-limiting of the electroetching process is achieved at regions of the wafer where copper is removed. This is important to avoid the copper loss from within the features as indicated in FIG. 1A.
  • FIG. 5 shows another exemplary electroetching or electropolishing system 400 that can be used to electrochemically etch the copper layer 102 c. The system 400 comprises a plurality of contact and process units. In this embodiment, a common cathode, which is immersed in an electroetching solution, is used to electroetch the layer 102 c through the process units and provides electrical power to the layer 102 c through the contact units. This design is attractive especially for cases where material is being removed from the surface of the wafer and it gets deposited onto the common cathode. Since cathode is large and away from the wafer surface many wafers such as a few thousand wafers can be processed in this approach before the need to clean or replace the cathode. Referring to FIG. 5, a plurality of contact units 402 and process units 404 may be formed in a holder structure 401. The holder structure 401 in this embodiment is also shaped as a plate having a top surface 403 and a bottom surface 405. The system 400 is operated the way the system 300 is operated in the previous embodiment.
  • In the example shown in FIG. 5, the contact units 402 or contact nozzles are comprised of contact holes 406 formed in the holder 401. Contact electrodes 409 are placed inside the contact holes 406 and thus immersed in an electroetching solution 408. As mentioned before, in this embodiment, the electroetching solution 408 is used for both establishing contact with and electroetching the conductive layer 102 c. The contact electrodes 409 are electrically connected to a positive terminal of a power source 410. In this embodiment, the process units 404 or nozzles are comprised of process holes 430 or process openings formed through the holder structure 401. The electroetching solution 408 fills the contact holes 406 as well as the process holes 430. During processing, contact holes are in close proximity of the wafer surface and they define contact regions 420 a on the surface 103 c of the conductive layer 102 c. A common process electrode 426, which is the cathode, is placed in the reservoir and kept in physical contact with the electroetching solution 408. The process electrode 426 is electrically connected to a negative terminal of the power source 410. The electroetching solution 408 fills the process holes 430. In this embodiment, in order to minimize electrical current leakage from the contact electrodes through the electroetching solution to the process electrode, the contact electrodes may be placed very close to the wafer surface and insulating plugs 450 may be used below the contact electrodes. These insulating plugs may or may not be permeable by the solution. Wires connecting the various electrodes to the power supply are preferably isolated from the solution.
  • During processing, the top surface 403 of the holder 401 may or may not physically contact the wafer surface. If there is physical contact, it is preferred that the top surface 403 comprise a pad. It is also possible to use a fixed abrasive pad at the top surface to sweep the surface of the wafer to assist the material removal process, especially if planarization is required during copper electropolishing step. The holder 401 may itself be made of a pad material with process openings 430 and contact openings 406 cut into it. Contact electrodes 409 may then be placed into this pad. Contact electrodes may be placed very close to the top surface 403 to reduce voltage drop, but they should not protrude beyond the surface 403 to avoid physical contact with the surface of the copper layer 102 c. Holder structures having various designs of process openings 430 and contact openings 406 may be employed as explained before.
  • FIGS. 6A-9B depict some of these different holder structures having various contact and process unit designs. As in all above embodiments, in the following embodiments, the contact electrodes in the contact units do not physically contact the wafer surface that is electropolished. The electrical conduction between the surface of the wafer under process and the contact electrodes is provided through the process solution that is touches the contact electrodes and the surface.
  • As illustrated in one embodiment, in FIG. 6A in a perspective view and in FIG. 6B in plan view, a holder structure 460 has a top surface 462 and a bottom surface 464. A number of contact units 466 are formed in the top surface 462 of the holder structure 460. Further, a number of process units 468 are formed through the holder structure 460 and between the top surface 462 and bottom surface 464. In this embodiment, the contact units 466 are channels, preferably near-rectangular in cross-section, having a bottom wall 470 and side walls 472. Although in this embodiment, the channels are distributed parallel and separated one another equidistantly, they may be distributed in any manner such as non-parallel or radial and the distance between the channels may vary. The contact electrode 474 is placed in the channel 466, preferably on the bottom wall 470. The electrodes are shaped as bars or wires extending along the channels. Although it is not necessary, there may be a contact base 476 between the electrode 474 and the bottom wall 470. The contact electrodes may be directly placed on the bottom wall 470. If there is, the base 476 may be extended down to the bottom surface of the holder structure 460 and may be made of an insulator. The height of the electrode is at the level of the surface 462 or slightly less than the depth of the channel so that during the process the electrode cannot touch the wafer surface that is electropolished but allow current flow through the process solution. An insulated wire 478 connects the electrode to a terminal of a power supply (not shown). In this embodiment, the process units 468 may be shaped as round holes extending through the holder structure and allowing solution flow to the top surface. Holes 468 may be rectangular or any other geometrical form, including slits. Process units may also be continuous slits in between the channels 466.
  • It should be noted that the designs of FIGS. 6A, 6B, 7A, 7B, 8A, 8B, 9A, 9B, 10A and 10B will be described as applied to the concept shown in FIG. 5, namely, a design with one cathode and multiple contact electrodes. It should be appreciated, however, that the designs and concepts given in these figures are also directly applicable to the cases shown in FIGS. 3A, 3B, 3C, 3D, 3E, 3F, 3G and 4A. For example, in the design of FIG. 6A, every other channel 466 may be made a contact unit (shown as 302 in FIG. 4A) with a contact electrode 474 in it (shown as 309 in FIG. 4A). In between these contact units then, every other channel 466 could be a process unit (shown as 304 in FIG. 4A), and the electrodes within these process units would be the process electrodes (shown as 326 in FIG. 4A). In this case solution would be fed through the openings (shown as 468 in FIG. 6A), and power would be applied between contact electrodes and process electrodes as shown in FIG. 4A. In this case, a single power source can be used if all contact electrodes are connected together and all process electrodes are connected together. Alternately, as discussed earlier, multiple power supplies can be used to power multiple contact electrode-process electrode pairs, or a single power supply may be switched between various pairs of contact electrode-process electrode.
  • FIG. 7A shows, in plan view and FIG. 7B in partial cross section, another embodiment of a holder structure 480, which is a variation of the holder structure 460 shown in the previous embodiment. The holder structure 480 comprises channels 486 and holes 488. The channels in this example are placed in diagonal fashion and equidistantly parallel to one another. The channels 486 are in rectangular shape and are defined by a bottom wall 490 and side walls 492, as shown in FIG. 7B. Contact electrodes 494 are shaped as beads that are lined along the bottom of the channels 486 and connected a terminal of a power supply (not shown). As described above, the contact electrodes 494 may or may not be placed on an electrode base 496.
  • FIGS. 8A-8B illustrate another embodiment of a holder structure 500. In FIG. 8A in a perspective view and in FIG. 8B in plan view, the holder structure 500 has a top surface 502 and a bottom surface 504. A number of contact units 506 are formed in the top surface 502. Further, a number of process units 508 are formed through the holder structure 500 and between the top and bottom surfaces 502, 504. In this embodiment, the contact units 506 are channels, preferably rectangular cross-section, having a bottom wall 510 and side-walls 512. As in the previous embodiments, the channels are distributed parallel and separated one another equidistantly, they may also be distributed in any manner such as non-parallel or radial, and the distance between the channels may vary. In this embodiment, contact electrodes 514 are preferably conductive brushes made of thin conductive wires or bristles. The contact electrodes 514 are placed in the channel 506, preferably on the bottom wall 510. As in the previous embodiments, there may be a contact base 516 between the conductive brushes 514 and the bottom wall 510. The height of the conductive brushes 514 is preferably slightly less than the depth of the channel 506 so that during the process brushes 514 cannot touch the wafer surface that is electropolished but allow current to flow through the process solution. As in the previous embodiments, the base 516 may be extended down to the bottom surface of the holder structure 500 and may be made of an insulator. An insulated electrical line 518 connects the conductive brushes to a terminal of a power supply (not shown). In this embodiment, the process units 508 may be shaped as round holes extending through the holder structure and allowing solution flow to the top surface during the process. Holes 502 may be rectangular or any other geometrical form.
  • FIGS. 9A-9B illustrate another embodiment of the holder structure using conductive brushes that are used in the previous embodiment. Of course, use of conductive brushes is for the purpose of exemplifying subject embodiment. Contact electrodes with any other shape and geometry may be used with the embodiments described in connection to FIGS. 9A-9B. Similarly, use of different shape, size and geometry of process units and contact units as well as their possible distribution alternatives on the holder structures are within the scope of this invention.
  • As illustrated in FIG. 9A in perspective view and in FIG. 9B in a partial perspective side view, a holder structure 520 is a variation of the holder structure 500 shown in the previous embodiment. The holder structure 520 comprises contact units 526 and process units 528. The process units 528 in this example are placed in diagonal fashion and equidistantly parallel to one another. The process units in this embodiment are shaped as slits extending between the top and bottom surfaces 522, 524 of the holder structure 520 and allowing process solution to flow. The contact units in this embodiment are shaped as holes in the holder structure. The contact units 526 include a bottom wall 530 and side-wall 532 which is cylindrical in this example. Conductive brushes 534 are placed on the bottom wall 530 of the contact units 526 and connected to a terminal of a power supply (not shown). As described above, the contact electrodes 534 may be placed on an electrode base 536.
  • Two other designs that employ the buried electrical contact concept of the present invention are shown in FIGS. 10A and 10B. As shown in FIG. 10A, contact electrodes 600 are over supports 601 and they are in close proximity of the surface 103 c of the copper layer 102 c. The supports 601 may be held by a holder structure (not shown), which may be made of an open frame. Supports 601 are made of insulating material and they reduce the electrical current leakage that may flow from the contact electrodes 600 through the electropolishing solution 608, to the electrode 626 when a voltage rendering the contact electrodes anodic is applied between the electrode and the contact electrodes. In operation, contact electrodes 600 do not touch the surface 103 c. However, close proximity of them to the surface electrically couples the contact electrodes 600 to the copper surface 103 c. As in previous examples, most of the material removal takes place on the wafer surface in the area in between the contact electrodes, i.e., process openings. Reduction of leakage current is important in this design. Such reduction may be achieved by insulating all surfaces of contact electrodes except the surface facing the wafer and by reducing the distance between the wafer and the contact electrodes. A version of the design in FIG. 10A that can be used for touchprocessing is shown in FIG. 10B. In FIG. 10B, the contact electrodes 600 b and structures 601 b are buried in a spongy material 620 or a pad material. The spongy material maybe a porous polymeric pad that allows the electroetching solution 608 b to wet the wafer surface as well as the contact electrodes 626 b. During electropolishing, the surface of the copper layer 102 c may or may not touch the surface of the pad material. Again, in this embodiment, most of the material removal takes place on the wafer surface in the area in between the contact electrodes, i.e., process openings, which may contain the spongy material as shown in FIG. 10B, or spongy material may be removed from these process openings to reduce electrical resistance and resistance to flow of the electrolyte. The surface of the pad material may comprise abrasives to assist material removal process, especially if planarization is required during electropolishing, i.e., the starting copper surface is non-planar.
  • FIGS. 11A and 11B schematically illustrates exemplary stages of an electropolishing process using the system described in FIG. 10A. In this example for the purpose of clarification, a system 700 with two contact electrodes, a first contact electrode 701 a and a second contact electrode 701 b. The electrodes are placed on supports 702 and connected to a positive terminal of a power supply. In this respect, a cathode electrode 705 is also connected to a negative terminal of the power supply. Since the electropolishing process is exemplified with two contact electrodes, a portion of cathode electrode 705 is shown in FIGS. 11A-11B.
  • Electropolishing process is applied to an exemplary substrate 704 having a copper layer 706. The material removal takes place on the wafer surface in a process opening 707 in between the contact electrodes. The substrate 704 may be a semiconductor substrate including features 708 filled with copper layer. The features 708 and the surface of the substrate 704 may be lined with a barrier layer 710, which has generally a lesser conductivity than the conductivity of the copper. As described before, Ta, W, WN, WCN or TaN are the typical barrier materials for copper deposition. A copper removal solution such as an electropolishing solution 712 is in contact with the copper layer 706 and the cathode electrode 705 (see also FIG. 10A).
  • As shown in FIG. 11A, during an instant of the electropolishing process the contact electrodes 701 a and 701 b are placed in close proximity of the copper layer. As the current from the contact electrodes 701 a and 701 b flow through the copper layer 706, a surface portion 714 a of the copper layer 706 is removed or electropolished. The surface portion is the portion of the copper layer that is located across the process hole 707 and the contact electrodes. As shown in FIG. 11A, direction of the current flow from the first contact electrode 701 a and the second contact electrode 701 b is depicted with the arrows A and B respectively. The electropolishing uniformly reduces the thickness of the copper layer down to the barrier layer level and continues as long as conductive copper remains on the barrier layer. It will be appreciated that during the removal of the portion 714, resistance against the current flow increases and the current flow chooses the least resistive path where it may still have conductive copper and continues etching the remaining copper until the surface portion 714 is almost entirely removed. This brings the electropolishing of the copper layer to a stop at that location of the surface , i.e., process self-limits, before moving over the neighboring location as shown in FIG. 11B. FIG. 11B shows another instant during the electropolishing process, as the system 700 moves over the remaining portion of the copper layer 706. As the contact electrode 701 a moves over the copper layer 706, current flows through the remaining layer and starts electropolishing process. At this instant, since the second contact electrode is still over the exposed barrier layer, current flow from the second electrode faces resistance. This causes a larger current I1 to flow through the first electrode 701 a and through the path A compared to the current I2 that flows through the second electrode 701 b. The current flow from the first contact electrode causes electropolishing of the remaining copper, whereas the small current or lack of current through the electrode 701 b arrests further copper removal from the areas where barrier is exposed. Accordingly, the system 700 is able to reduce and increase the current flow from a particular contact electrode depending on the remaining copper across that particular electrode as the process progresses and once the barrier is exposed copper removal is drastically reduced or arrested to avoid copper loss from within the features 708.
  • It should be noted that various features, such as bubble elimination means, discussed in relation with a certain design in this patent application may also be used for the other designs given. Although the nature of the power supply is not defined, it should be understood that the power supply might be a DC power supply or a variable voltage power supply such as a pulse generator. The electropolishing voltage or current may be vaned during the process to obtain the best process results in terms of uniform material removal and surface quality of the resulting workpiece surface. For example, to obtain smooth surfaces a high current density, i.e. higher polishing voltage, may be used early in the process but then the current density may be reduced to have more accurate endpoint detection. Contact and process regions may have many different shapes and sizes. Distance between contact electrodes and the workpiece surface may be uniform throughout or may be variable. Electropolishing solutions that can be used for copper removal include commonly employed phosphoric acid solutions.
  • Although various preferred embodiments and the best mode have been described in detail above, those skilled in the art will readily appreciate that many modifications of the exemplary embodiment are possible without materially departing from the novel teachings and advantages of this invention.

Claims (64)

1. A process for electropolishing a surface of a conductive layer on a workpiece, the process comprising the steps:
immersing a contact electrode in a contact solution;
contacting a portion of the surface of the conductive layer with the contact solution to define a contact region;
immersing a process electrode in a process solution;
contacting a portion of the surface of the conductive layer with the process solution to define a process region; and
applying an electrical potential between the contact electrode and the process electrode to electropolish the surface of the conductive layer of the process region.
2. The process of claim 1 further comprising the step of moving at least one of the regions from a first location to a second location on the surface of the conductive layer.
3. The process of claim 2, further comprising the step of maintaining a relative motion between the conductive layer and the regions so that each point on the surface of the conductive layer becomes at least once a contact region and each point on the surface of the conductive layer at least once becomes a process region, resulting in electropolishing of substantially the whole surface of the conductive layer.
4. The process of claim 1, wherein the contact solution and the process solution are a same conductive solution.
5. The process of claim 4, wherein the conductive solution contacts the surface of the conductive layer.
6. The process of claim 1 further comprising a second contact electrode and includes the steps of:
immersing the second contact electrode in the contact solution; and
contacting a portion of the surface of the conductive layer with the contact solution to define a second contact region wherein the step of applying an electrical potential includes applying the electrical potential between the contact electrodes and the process electrode.
7. The process of claim 6 further comprising the step of contacting a portion of the surface of the conductive layer with the process solution to define a second process region.
8. The process of claim 6 further comprising a second process electrode and including the steps of:
immersing the second process electrode in the process solution; and
contacting a portion of the surface of the conductive layer with the process solution to define a second process region wherein the step of applying an electrical potential includes applying the electrical potential between the contact electrodes and the process electrodes.
9. The process of claim 1 further comprising the step of contacting a portion of the surface of the conductive layer with the process solution to define a second process region.
10. The process of claim 9 further comprising the step of moving at least one of the contact region or process region relative to the surface of the conductive layer.
11. The process of claim 1 further comprising the step of contacting the surface of the conductive layer with a top surface of a pad thereby planarizing nonuniformities of the surface of the conductive layer.
12. The process of claim 11 wherein the step of contacting includes intermittently contacting the surface of the conductive layer with the top surface of the pad.
13. The process of claim 11, wherein the top surface of the pad includes abrasives.
14. The process of claim 13 further comprising the step of planarizing the surface of the conductive layer.
15. An integrated circuit including the process of claim 1.
16. An apparatus for electropolishing a surface of a conductive layer on a workpiece comprising:
a contact unit containing a contact solution, a contact electrode immersed therein and having an opening through which the contact solution contacts a portion of the surface of the conductive layer to define a contact region; and
a process unit containing a process solution, a process electrode immersed therein and having an opening through which the process solution contacts a portion of the surface of the conductive layer to define a process region configured to electropolish the surface of the conductive layer defined by the process region in response to a potential difference applied between the contact electrode and the process electrode.
17. The apparatus of claim 16, wherein the contact electrode is proximate to the surface of the conductive layer.
18. The apparatus of claim 17, wherein the process electrode is proximate to the surface of the conductive layer.
19. The apparatus of claim 16, wherein the potential difference includes a DC voltage.
20. The apparatus of claim 16, wherein the potential difference includes a variable voltage.
21. The apparatus of claim 16, wherein the contact solution and the process solution are a same conductive solution which contacts the surface of the conductive layer.
22. The apparatus of claim 16 further comprising a mechanism to produce relative motion between the process region and the surface of the conductive layer to electropolish substantially the whole surface of the conductive layer on the workpiece.
23. The apparatus of claim 22, wherein the mechanism produces relative motion between the contact region and the surface of the conductive layer.
24. The apparatus of claim 16, wherein the process unit includes a second process opening through which the process solution contacts a portion of the surface of the conductive layer to define a second process region and the potential difference applied between the contact electrode and the process electrode electropolishes the surface of the conductive layer defined by the second process region.
25. The apparatus of claim 16, wherein the process unit includes a plurality of process openings through which the process solution contacts portions of the surface of the conductive layer to define a plurality of process regions and the potential difference applied between the contact electrode and the process electrode electropolishes the surface of the conductive layer defined by the plurality of process regions.
26. The apparatus of claim 25, wherein the contact unit includes a plurality of contact openings through which the contact solution contacts portions of the surface of the conductive layer, each contact opening includes a contact electrode disposed therein and the potential difference applied between the contact electrodes and the process electrode electropolishes the surface of the conductive layer defined by the plurality of process regions.
27. The apparatus of claim 26, wherein each process opening includes a process electrode configured to electropolish the surface of the conductive layer defined by the plurality of process regions in response to a potential difference applied between the contact electrodes and the process electrodes.
28. The apparatus of claim 27, wherein the contact electrodes and the process electrodes are proximate to the surface of the conductive layer.
29. The apparatus of claim 26 further comprising:
a first set of contact units configured to contact portions of the surface of the conductive layer wherein the potential difference applied between the contact electrodes of the first set of contact units and the process electrode electropolishes the surface of the conductive layer defined by a first set of process regions.
30. The apparatus of claim 29 further comprising:
a second set of contact units configured to contact portions of the surface of the conductive layer wherein a second potential difference applied between the contact electrodes of the second set of contact units and the process electrode electropolishes the surface of the conductive layer defined by a second set of process regions.
31. The apparatus of claim 30, wherein the first set of contact units and the second set of contact units are a same set of contact units.
32. The apparatus of claim 30 further comprising a zone switch configured to select the first contact zone or the second contact zone to apply the potential difference.
33. The apparatus of claim 32, wherein the potential difference and the second potential difference are different voltages.
34. The apparatus of claim 33, wherein the potential difference applied between the contact electrodes of the first set of plurality of contact units and the process electrode and the second potential difference applied between the contact electrodes of the second set of plurality of contact units and the process electrode are sequentially applied.
35. The apparatus of claim 27 further comprising:
a first set of contact units and a first set of process units configured to contact portions of the surface of the conductive layer wherein the potential difference applied between the contact electrodes of the first set of contact units and the process electrodes of the first set of process units electropolishes the surface of the conductive layer defined by a first set of process regions.
36. The apparatus of claim 35 further comprising:
a second set of contact units defining a second contact zone and a second set of process units configured to contact portions of the surface of the conductive layer wherein a second potential difference applied between the contact electrodes of the second set of contact units and the process electrodes of the second set of process units electropolishes the surface of the conductive layer defined by a second set of process regions.
37. The apparatus of claim 36, wherein the first set of contact units and the second set of contact units are a same set of contact units.
38. The apparatus of claim 16 further comprising a pad having a top surface configured to contact the surface of the conductive layer to planarize the surface of the conductive layer.
39. The apparatus of claim 38, wherein the top surface of the pad is abrasive.
40. The apparatus of claim 38 further comprising a holder structure configured to hold the contact electrode and the process electrode wherein the pad is disposed between the holder structure and the surface of the conductive layer.
41. A method for electropolishing a surface of a conductive layer on a workpiece using an electropolishing system, the method comprising the steps:
placing a plurality of electropolish cells proximate to the surface of the conductive layer each cell having a contact electrode in communication with a conductive solution in contact with the surface of the conductive layer and an opening to permit communication of the conductive solution with a portion of the surface of the conductive layer to define a process region;
contacting a process electrode with the conductive solution; and
applying a potential difference between the contact electrodes of the plurality of electropolish cells and the process electrode to electropolish the surface of the conductive layer defined by the process regions.
42. The method of claim 41 further comprising the step of moving the surface of the conductive layer with respect to the plurality of electropolish cells to electropolish the workpiece.
43. The method of claim 41 further comprising a first electropolishing zone having a first set of electropolish cells to define a first process area and a second electropolishing zone having a second set of electropolish cells to define a second process area and wherein the step of applying the potential difference includes:
applying the potential difference between the contact electrode of the first set of electropolish cells and the process electrode to electropolish the first process area; and
applying the potential difference between the contact electrode of the second set of electropolish cells and the process electrode to electropolish the second process area.
44. The method of claim 43 further comprising a zone switch and includes the steps of:
selecting the first set of electropolish cells to electropolish the first process area; and
selecting the second set of electropolish cells to electropolish the second process area.
45. The method of claim 43, wherein the potential difference applied to the first set of electropolish cells is different from the potential difference applied to the second set of electropolish cells.
46. The method of claim 41, wherein the potential difference is a DC voltage.
47. The method of claim 41, wherein the potential difference is a variable voltage.
48. The method of claim 41, wherein the process electrode includes a plurality of process electrodes, each process electrode being disposed within each opening of the plurality of electropolish cells in communication with the conductive solution and the step of applying the potential difference includes applying the potential difference between a plurality of contact electrodes and the plurality of process electrodes.
49. The method of claim 48, wherein each process electrode substantially occupies each opening.
50. The method of claim 41 further comprising a pad disposed between the plurality of electropolish cells and the surface of the conductive layer and includes the step of planarizing the surface of the conductive layer with the pad.
51. The process of claim 50, wherein the pad is abrasive.
52. An integrated circuit including the method of claim 1.
53. A system for electropolishing a surface of a conductive layer on a workpiece, the system comprising:
a plurality of electropolishing cells wherein each electropolishing cell includes: a contact unit containing a contact solution, a contact electrode immersed therein and having an opening through which the contact solution communicates with a portion of the surface of the conductive layer; and
a process electrode in a process solution and having an opening through which the process solution communicates with a portion of the surface of the conductive layer to define a process region, wherein a potential difference applied between the contact electrode and the process electrode electropolishes the process region of the surface of the conductive layer.
54. The system of claim 53 further comprising a mechanism to produce relative motion between the plurality of electropolishing cells and the surface of the conductive layer to electropolish the surface of the conductive layer on the workpiece.
55. The system of claim 54 further comprising a holder structure configured to hold the plurality of electropolishing cells.
56. The system of claim 55 wherein the holder structure includes a pad having a top surface configured to contact the surface of the conductive layer to planarize the surface of the conductive layer.
57. The system of claim 53, wherein the contact electrodes are proximate to the surface of the conductive layer.
58. The system of claim 53, wherein the process electrodes are proximate to the surface of the conductive layer.
59. The system of claim 53, wherein the contact solution and the process solution are a same conductive solution.
60. The system of claim 53, wherein the contact electrode substantially occupies the contact unit.
61. The system of claim 53, wherein the process electrode substantially occupies the process unit.
62. The system of claim 53, wherein the contact electrode and the process electrode are proximate to the surface of the conductive layer and the contact solution and the process solution are a same conductive solution.
63. The system of claim 53, wherein the potential difference applied includes a DC voltage.
64. The system of claim 53, wherein the potential difference applied includes a variable voltage.
US10/391,924 1998-12-01 2003-03-18 Electropolishing system and process Expired - Fee Related US7578923B2 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
US10/391,924 US7578923B2 (en) 1998-12-01 2003-03-18 Electropolishing system and process
PCT/GB2003/004809 WO2004044273A1 (en) 2002-11-12 2003-11-06 Electropolishing system and process
JP2005506666A JP2006505697A (en) 2002-11-12 2003-11-06 System and method for electropolishing
KR1020057008421A KR20050092364A (en) 2002-11-12 2003-11-06 Electropolishing system and process
AU2003285491A AU2003285491A1 (en) 2002-11-12 2003-11-06 Electropolishing system and process
TW92131492A TWI329893B (en) 2002-11-12 2003-11-11 Electroetching system and process
US10/822,424 US7427337B2 (en) 1998-12-01 2004-04-12 System for electropolishing and electrochemical mechanical polishing
US11/069,202 US20050173260A1 (en) 2003-03-18 2005-02-28 System for electrochemical mechanical polishing

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
US09/201,929 US6176992B1 (en) 1998-11-03 1998-12-01 Method and apparatus for electro-chemical mechanical deposition
US09/283,024 US6251235B1 (en) 1999-03-30 1999-03-30 Apparatus for forming an electrical contact with a semiconductor substrate
US19002300P 2000-03-17 2000-03-17
US09/607,567 US6676822B1 (en) 1998-11-03 2000-06-29 Method for electro chemical mechanical deposition
US09/685,934 US6497800B1 (en) 2000-03-17 2000-10-11 Device providing electrical contact to the surface of a semiconductor workpiece during metal plating
US09/877,335 US6471847B2 (en) 1999-03-30 2001-06-07 Method for forming an electrical contact with a semiconductor substrate
US10/093,185 US6958114B2 (en) 1999-03-30 2002-03-05 Method and apparatus for forming an electrical contact with a semiconductor substrate
US10/238,665 US6902659B2 (en) 1998-12-01 2002-09-09 Method and apparatus for electro-chemical mechanical deposition
US42569402P 2002-11-12 2002-11-12
US10/302,213 US20030070930A1 (en) 2000-03-17 2002-11-22 Device providing electrical contact to the surface of a semiconductor workpiece during metal plating and method of providing such contact
US10/391,924 US7578923B2 (en) 1998-12-01 2003-03-18 Electropolishing system and process

Related Parent Applications (8)

Application Number Title Priority Date Filing Date
US09/201,929 Division US6176992B1 (en) 1998-11-03 1998-12-01 Method and apparatus for electro-chemical mechanical deposition
US09/283,024 Division US6251235B1 (en) 1998-12-01 1999-03-30 Apparatus for forming an electrical contact with a semiconductor substrate
US09/607,567 Continuation US6676822B1 (en) 1998-11-03 2000-06-29 Method for electro chemical mechanical deposition
US09/685,934 Continuation-In-Part US6497800B1 (en) 1998-12-01 2000-10-11 Device providing electrical contact to the surface of a semiconductor workpiece during metal plating
US09/877,335 Continuation US6471847B2 (en) 1998-12-01 2001-06-07 Method for forming an electrical contact with a semiconductor substrate
US10/093,185 Continuation-In-Part US6958114B2 (en) 1998-12-01 2002-03-05 Method and apparatus for forming an electrical contact with a semiconductor substrate
US10/238,665 Continuation-In-Part US6902659B2 (en) 1998-12-01 2002-09-09 Method and apparatus for electro-chemical mechanical deposition
US10/302,213 Continuation-In-Part US20030070930A1 (en) 1998-12-01 2002-11-22 Device providing electrical contact to the surface of a semiconductor workpiece during metal plating and method of providing such contact

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US10/822,424 Continuation-In-Part US7427337B2 (en) 1998-12-01 2004-04-12 System for electropolishing and electrochemical mechanical polishing
US11/069,202 Continuation-In-Part US20050173260A1 (en) 2003-03-18 2005-02-28 System for electrochemical mechanical polishing

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US10444262B2 (en) 2014-08-19 2019-10-15 Vishay-Siliconix Vertical sense devices in vertical trench MOSFET
US10527654B2 (en) 2014-08-19 2020-01-07 Vishay SIliconix, LLC Vertical sense devices in vertical trench MOSFET
US10234486B2 (en) 2014-08-19 2019-03-19 Vishay/Siliconix Vertical sense devices in vertical trench MOSFET

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US20040007478A1 (en) 2004-01-15
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KR20050092364A (en) 2005-09-21
WO2004044273A1 (en) 2004-05-27

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