WO2004036660A1 - Diode electroluminescente a montage en surface - Google Patents

Diode electroluminescente a montage en surface Download PDF

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Publication number
WO2004036660A1
WO2004036660A1 PCT/KR2003/001781 KR0301781W WO2004036660A1 WO 2004036660 A1 WO2004036660 A1 WO 2004036660A1 KR 0301781 W KR0301781 W KR 0301781W WO 2004036660 A1 WO2004036660 A1 WO 2004036660A1
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WO
WIPO (PCT)
Prior art keywords
lead frame
light
epoxy
led
chip
Prior art date
Application number
PCT/KR2003/001781
Other languages
English (en)
Inventor
Hyun-Woo Lee
Original Assignee
Tco Co., Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tco Co., Ltd filed Critical Tco Co., Ltd
Priority to AU2003258842A priority Critical patent/AU2003258842A1/en
Priority to JP2004545019A priority patent/JP2006514426A/ja
Publication of WO2004036660A1 publication Critical patent/WO2004036660A1/fr

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • H01L2924/13033TRIAC - Triode for Alternating Current - A bidirectional switching device containing two thyristor structures with common gate contact
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301Thyristor
    • H01L2924/13034Silicon Controlled Rectifier [SCR]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • H01L33/54Encapsulations having a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the present invention relates generally a surface mounting type LED, in detail die pad cup of lead frame with silver plating be die bonding by emitting cause InGaN, GaN LED chip and then it is able to improve light reflexibility and light brightness of the smallest package.
  • optical semiconductor device(LED) is parts for transmitting of light through light signal, it represents after light signal transmit light signal by LED, light emitting device(350nm ⁇ 990nm) using of front capacity and photosensitive device transmitting from light signal to electric signal(photo transistor, photo diode, triac, photo IC).
  • These optical semiconductor device make product of various wavelength from UV light to visual light, infra red light by material and type, density, structure of impurities forming PN junction.
  • Visual LED is a emitting device using injection Electro Luminescence of p-n junction, cause impressed voltage for emitting is very lower and lifetimetime is long it is used wildly as solid indication device and picture indication , etc.
  • the visual optical semiconductor device is using of all kinds of package as used part, representatively there are the smallest chip LED which is formed Surface Mounting Device applying to back light of cellular phone, the electric sign and the solid indication device, the 3 ⁇ , 5 ⁇ vertical lamp type of picture indication.
  • the following explanation substitutes the smallest Chip LED formed Surface Mounting Device as visual LED.
  • Fig.l Usual structure of surface mounting device LED is Fig.l illustration. It is formed chip(A) emitting after voltage impressed, electric conduct metal cathode and anode lead(C)(D) for impress on chip(A). The chip(A) stick to die pad(El) formed in cathode lead(C) by electric conduct sliver glue, at the same time chip(A) is bonding the end of cathode/anode lead(C)(D) and wire(A2)(Al), then connects between cathode and anode lead(C)(D) electrically.
  • the chip is molding by light transmitted molding material(F), a part of cathode and anode lead(C)(D) end exposed outside, the voltage is able to impress from outside to chip.
  • the molding material(F) is formed of transparency epoxy and made red, green, blue, orange as the kinds of LED chip(A).
  • This PCB board(J) has very lower thermostability. And as adhesive strength of PCB and epoxy is drop cause PCB borad(J) heat-transformed by heat stress LED device product process, it is difficult to assure the reliability. The process for the reliability assurance is very complex, so the making price is rising. Also because of using of thick PCB board, the smallest chip LED can't be slight. Also, in this way light reflection of PCB board is very lower and light reflection of Gold which plated in die pad is very lower.
  • the surface LED chip(InGaN, GaN LED chi ⁇ )(390nm ⁇ 470nm) has problem which light brightness dropping. Also because this PCB board import 100%, the price of material is high. The making price is high as using gold.
  • chip LED light device had within though solder reflow process, this solder reflow process progress in condition of 220C ⁇ 320C.
  • heat-transformation temperature of PCB board is lower than 220C, as solder reflow process give fatally heat-shock to usual SMD the smallest Chip LED device, the gold wire(Al)(A2) and silver epoxy(E2) get rid of PCB board.
  • SMD the smallest Chip LED device.
  • the present idea is to solute problem of such usual SMD the smallest Chip LED device, surface emitting LED chip(InGaN, GaN LED Chip)(390nm ⁇ 470nm) has within die pad cup of lead frame by an insulated light transmitted die glue(UV glue, an insulated transparency glue) and the use of silver epoxy glue exclude, therefore the short badness between the anode and the cathode solute completely.
  • the light emitting by the opposite of emitting surface among the light emitting of surface LED was transmitted by an insulated light transmission epoxy glue, this transmitted light offer chip LED to improve the brightness as that the light reflected from die pad cup plated silver with reflection rate high and focused on emitting direction.
  • the purpose of the idea is that the lead frame with low thickness use as the board, the lead frame and the lower epoxy of light transparency epoxy is molding to be 10 ⁇ 50um projection than same surface of lead part of lead frame using the light transparency epoxy, by the penetration be made that the upper transmitted epoxy and the lower transmitted epoxy adhered each other. Hence the heat shock of light device decrease at the least and offer ultra slight chip LED.
  • the another purpose of the idea is that the hear stress of the set machinery solder reflower process used high temperature(220 ° C ⁇ 320 ° C) to be the smallest and then there are solved the usual technical problems that the wire made in gold by the fatal heat-shock and the silver epoxy in SMD the smallest LED device detached in PCB board.
  • the thermostable lead frame board board had heat transmission temperature is 450 ° C more, it guarantee the lifetime of optical semiconductor device and offer the smallest chip LED with the smallest heat shock.
  • the another purpose of the idea is that the usual PCB board(J) has high price and able to use with gold plating on the part of die pad, the production cost of these PCB board is high causing by 100% importation. As using the low price lead frame with silver plating, it offer the smallest chip LED device that the production cost reduce renovative.
  • the smallest, ultra slight and light chip LED optical semiconductor device was organized as multi line that one pair of frame part is the one of multitude. Every unit lead frame be dotting by an insulated light transmitted epoxy glue, above this glue, the light device chip(350nm ⁇ 470nm Chip) be die bonding on lead frame pad cup, the above light device chip be electronically jointing by gold wire to the part of frame of the above lead frame, the part of frame of lead frame be reaching safe in mold press and molding by transmitted epoxy, the ended series of lead frame stick to glue, this made through particular process cutting by diamond blade.
  • Figs 1 is view showing a structure of usual surface mounting type LED
  • Figs 2 is view showing a structure of surface mounting type LED according as the present idea.
  • Figs. 2 is view showing a four cross section of inside organization about the smallest and ultra slight and light LED.
  • the anode lead penetration(Bl) and the cathode lead penetration(B2) for jointing on the above light transmitted epoxy(F) cope with this lower epoxy(H).
  • the brief about the production process of chip LED optical semiconductor device is the following that the process which be arranging multiline with a pair of anode/cathode lead frame is one group, the process which be dotting every unit lead frame by insulated light transmitted epoxy glue, the process which die bonding light device chip(350nm ⁇ 470nm chip) to lead frame pad cup, the process which the above light device chip be electronically jointing by gold wire to the part of frame of the above lead frame, the process which the part of frame of lead frame be reaching safe in mold press and molding by transmitted epoxy, the ended series of lead frame stick to glue, this made through particular process cutting by diamond blade.
  • the present idea solves the short badness between anode and cathode because use of the silver epoxy glue excluded as surface emitting LED chip (A) (InGaN, GaN LED chip)(390nm ⁇ 470nm) had within die pad cup(El) of lead by an insulated light transmitted die glue(E)(UV Cure glue, an insulated transparency glue).
  • A InGaN, GaN LED chip
  • E UV Cure glue, an insulated transparency glue
  • the light emitting by the opposite of emitting surface among the light emitting of surface LED was transmitted by an insulated light transmission epoxy glue(E), this transmitted light offer chip LED to improve the brightness as that the light reflected from die pad cup(El) plated silver with reflection rate high and focused on emitting direction.
  • the lead frame(I) with low thickness use as the board, the lead frame(I) and the lower epoxy(H) of light transparency epoxy is molding to be 10 ⁇ 50um projection than same surface of lead part of lead frame using the light transparency epoxy, by the penetration(B)(Bl) be made that the upper transmitted epoxy(F) and the lower transmitted epoxy(H) adhered each other.
  • the heat- shock of light device decrease at the least and offer ultra slight and light chip LED.
  • the idea is that by using the thermostable lead frame(I) board had heat transmission temperature is 450 ° C more, it guarantee the lifetime of optical semiconductor device and has the smallest heat shock. By using of the lead frame board made in lower price silver plating, the production cost can reduce.
  • surface emitting LED chip has within die pad cup of lead frame by an insulated light transmitted die glue and the use of silver epoxy glue exclude, therefore the short badness between the anode and the cathode solute completely.
  • the light emitting by the opposite of emitting surface among the light emitting of surface emitting LED was transmitted by an insulated light transmission epoxy glue, this transmitted light offer chip LED to improve the brightness as that the light reflected from die pad cup plated silver with reflection rate high and focused on emitting direction, the lead frame with low thickness use as the board, the lead frame and the lower epoxy of light transparency epoxy is molding to be 10 ⁇ 50um projection than same surface of lead part of lead frame using the light transparency epoxy, by the penetration be made that the upper transmitted epoxy and the lower transmitted epoxy adhered each other.
  • the hear stress of the set machinery solder reflower process used high temperature(220 ° C ⁇ 320 ° C) to be the smallest and then there are solved the usual technical problems that the wire made in gold by the fatal heat-shock and the silver epoxy in SMD the smallest LED device detached in PCB board.
  • the thermostable lead frame board had heat transmission temperature is 450 °C more, it guarantee the lifetime of optical semiconductor device and offer the smallest and ultra slight and ultra light chip LED with the smallest heat-shock.

Abstract

L'invention concerne une diode électroluminescente à montage en surface. Selon l'invention, la puce à diode électroluminescente de type InGaN-GaN, constituant la source émettrice de la diode électroluminescente, est montée sur le châssis de brochage plaqué d'argent présentant une fort pouvoir de réflexion de la lumière. Ainsi, la particule de lumière entièrement réfléchie par la puce est émise vers le côté frontal, et la luminosité de la surface lentille de l'ensemble peut être améliorée. La puce à diode électroluminescente de type InGaN-GaN et fixée et connectée, puis moulée à l'aide de résine époxy photoconductrice de manière que la résine époxy présente dans la partie inférieure de l'ensemble peut produire une projection d'environ 10-50 νm par rapport à la partie inférieure du châssis de brochage, et la partie supérieure et la partie inférieure sont finalement fixées par l'intermédiaire de trous de connexion.
PCT/KR2003/001781 2002-09-02 2003-09-01 Diode electroluminescente a montage en surface WO2004036660A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2003258842A AU2003258842A1 (en) 2002-09-02 2003-09-01 A surface mounting type light emitting diode
JP2004545019A JP2006514426A (ja) 2002-09-02 2003-09-01 表面実装型発光ダイオード

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20020026208U KR200299491Y1 (ko) 2002-09-02 2002-09-02 표면실장형 발광다이오드
KR20-2002-0026208 2002-09-02

Publications (1)

Publication Number Publication Date
WO2004036660A1 true WO2004036660A1 (fr) 2004-04-29

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JP (1) JP2006514426A (fr)
KR (1) KR200299491Y1 (fr)
CN (1) CN100379036C (fr)
AU (1) AU2003258842A1 (fr)
WO (1) WO2004036660A1 (fr)

Cited By (14)

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WO2007122516A2 (fr) 2006-04-26 2007-11-01 Cree Hong Kong Limited Appareil et procédé servant au montage de composants électroniques
CN100428457C (zh) * 2005-07-12 2008-10-22 周万顺 表面黏着型发光二极管的基座及其制造方法
WO2010102685A1 (fr) * 2009-03-10 2010-09-16 Osram Opto Semiconductors Gmbh Composant semi-conducteur optoélectronique
US8648356B2 (en) 2007-03-08 2014-02-11 Senseonics, Incorporated Light emitting diode for harsh environments
US8866169B2 (en) 2007-10-31 2014-10-21 Cree, Inc. LED package with increased feature sizes
US9035439B2 (en) 2006-03-28 2015-05-19 Cree Huizhou Solid State Lighting Company Limited Apparatus, system and method for use in mounting electronic elements
US20150144969A1 (en) * 2013-11-27 2015-05-28 Lg Display Co., Ltd. Light emitting diode package, light source module and backlight unit including the same
US9070850B2 (en) 2007-10-31 2015-06-30 Cree, Inc. Light emitting diode package and method for fabricating same
US9601670B2 (en) 2014-07-11 2017-03-21 Cree, Inc. Method to form primary optic with variable shapes and/or geometries without a substrate
US9711703B2 (en) 2007-02-12 2017-07-18 Cree Huizhou Opto Limited Apparatus, system and method for use in mounting electronic elements
US9722158B2 (en) 2009-01-14 2017-08-01 Cree Huizhou Solid State Lighting Company Limited Aligned multiple emitter package
US10256385B2 (en) 2007-10-31 2019-04-09 Cree, Inc. Light emitting die (LED) packages and related methods
US10622522B2 (en) 2014-09-05 2020-04-14 Theodore Lowes LED packages with chips having insulated surfaces
WO2022118288A1 (fr) * 2020-12-04 2022-06-09 Molex, Llc Dispositifs électroniques de grande puissance et leurs procédés de fabrication

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100650279B1 (ko) 2005-09-01 2006-11-27 삼성전기주식회사 발광 다이오드 소자
CN101459211B (zh) * 2007-12-11 2011-03-02 富士迈半导体精密工业(上海)有限公司 固态发光器件
JP2010103149A (ja) * 2008-10-21 2010-05-06 Showa Denko Kk 発光部材、発光装置、電子機器、機械装置、発光部材の製造方法、および発光装置の製造方法
JP4951090B2 (ja) * 2010-01-29 2012-06-13 株式会社東芝 Ledパッケージ
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JP2006514426A (ja) 2006-04-27
CN1679179A (zh) 2005-10-05

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