CN100379036C - 表面安装型发光二极管 - Google Patents

表面安装型发光二极管 Download PDF

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CN100379036C
CN100379036C CNB038208008A CN03820800A CN100379036C CN 100379036 C CN100379036 C CN 100379036C CN B038208008 A CNB038208008 A CN B038208008A CN 03820800 A CN03820800 A CN 03820800A CN 100379036 C CN100379036 C CN 100379036C
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light
lead frame
epoxy resin
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emitting diode
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CN1679179A (zh
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李贤雨
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TCO CO Ltd
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Abstract

本发明是关于表面安装型发光二极管，其目的在于把作为LED光源的InGaN、GaN类发光二极管芯片安装在导线架的芯片杯状焊盘上，所述的杯状焊盘镀有具有高光反射率的银，使得从芯片上发射的全部的光粒子向前方发射，以提高封装透镜表面的光亮度。对InGaN、GaN类发光二极管芯片采用芯片键合法以及导线键合法，用透光的环氧树脂进行涂覆，以使在发光二极管的下面封装部分能比导线架的下部的相同平面突起10～50μm，然后上面部分和下面部分通过贯通孔被固定。

Description

表面安装型发光二极管
技术领域
本发明是关于表面安装型发光二极管(A Surface Mounting Type LightEmitting Diode)的发明。具体说明如下：用发光的InGaN、GaN发光二极管芯片在镀银的导线架的杯状焊盘上采用芯片键合法，然后可以增加微型封装部件的光反射率和光亮度。
背景技术
一般来讲，光半导体元件(发光二极管)是通过电信号用于光传送的部件，分别是：通过发光二极管把电信号转换成光信号后通过腔体前部发光的发光元件(350nm-990nm)和接收光信号后转换成电信号的光敏元件(光敏晶体管、光敏二极管、光敏可控硅、光敏IC)等。这些光半导体元件根据构成PN结的掺杂物质的材质、种类、密度和构造，可制造出从紫外光到可见光、红外光等各种波长的产品。
可见光发光二极管是利用PN结的注入电致发光(injection ElectroLuminescence)原理的发光元件，由于其发光所需的外加电压非常低，而且寿命长，所以广泛应用于固体指示元件、显像指示等领域的半导体元件中。
可见光光半导体元件可以制作成各种封装的部件，具有代表性的是：适用于手机背光(Back Light)的表面安装型微型发光二极管(Chip LED)元件和电子标示及固体指示元件或显像指示用的3φ、5φ立式灯类元件。
下面以可见光发光二极管为例对表面安装型微型发光二极管元件加以详细说明。
传统的表面安装型发光二极管的构造如图1所示，外加电压时发光的芯片(A)和给上述芯片(A)外加电压时所用的导电性金属材料的阴极和阳极导线(C)(D)组成。所述芯片(A)与阴极导线(C)顶端部位所形成的芯片焊盘(DiePad)(E1)用银粘合剂(E2)粘合，同时，芯片(A)与阴极/阳极导线的末端以及导线(A2)(A1)键合(bongding)，然后在阴极和阳极发光二极管导线(C)(D)之间电气连接。
而且，为了从外部保护上述芯片(A)，用绝缘材质的透光的涂覆材料(F)对芯片(A)进行涂覆，使阴极和阳极发光二极管导线(C)(D)的另一末端露出，使得能从外部向芯片(A)施加电压。
若把外露的发光二极管的阴极与阳极端导线(C)(D)与正要使用的电路电气连接，当电源通过阴极和阳极导线(C)(D)施加到芯片(A)上时，光半导体元件的芯片(A)发光，使其发挥功能。涂覆材料(F)通常是由透明环氧树脂(Epoxy)构成，根据发光二极管芯片种类的不同，产生红色、绿色、蓝色、桔色等。
上述具有代表性的传统表面安装型微型发光二极管元件是以很厚的PCB基板(J)构成。这种PCB基板(J)耐热性能非常低。所以在发光二极管制造流程中，由于热压力会产生PCB基板(J)的热变形，导致PCB的环氧树脂的粘合力降低，从而无法保障其牢固度。因为保障其牢固度的工艺流程很复杂，所以会导致制造费用增加。而且，由于使用很厚的PCB，不能实现微型芯片LED的轻薄化。另外，若使用此方法会降低PCB基板的光反射率、芯片焊盘镀的金的光反射率也很低，因而会导致面发光芯片(InGaN、GaN的LED芯片)(390nm-470nm)光亮度降低的问题。由于这种PCB基板100％都要依靠进口，原材料价格很高。而且要使用贵金属-金，所以制造费用是很昂贵的。
并且，在手机等领域里，通过回流焊接(Solder Reflow)工艺安装芯片LED光元件，这种回流焊接工艺在220℃-320℃的作业条件下进行。可是PCB基板的热变形温度是220℃以下，所以回流焊接工艺会给传统的表面安装型(SMD)的微型发光二极管(Chip LED)元件带来致命的热冲击，导致金质导线(A1)(A2)和银环氧树脂(E2)从PCB基板上脱落下来。由此可见，传统的表面安装型(SDM)微型芯片LED元件很难保障其使用寿命。
发明内容
本发明是为了解决上述传统表面安装型微型发光二极管元件的诸多问题。将表面发光芯片(InGaN、GaN的LED芯片)(390nm-470nm)用绝缘性的透光的芯片粘合剂(紫外粘合剂、绝缘透明粘合剂)粘附在导线架的杯状焊盘上，避免了使用银环氧粘合剂，彻底解决阳极和阴极之间的短路问题。发射面的反方向释放的光，通过绝缘的透光的环氧粘合剂进行透射，使这个透射光在反射率极高的镀银芯片焊盘上得到反射，并集中到发射方向上，从而增加光的亮度。
本发明的另一目的是，以很薄的引线架作为基板，采用透光的环氧树脂涂覆在导线架上，使透光的环氧树脂下面的环氧树脂比导线架部件的相同平面突出10-50μm，再通过贯通孔使上面的透光的环氧树脂与下面的环氧树脂连接起来，使光元件的热冲击力达到最小化，从而提供超薄的芯片LED。
本发明的另一个目的是在高温220℃-320℃状态下，机械装置(setmachinery)回流焊接工艺的热压力达到最小化，从而解决了由于表面安装型微型发光二极管元件遭到致命的热冲击，使金质导线和银环氧树脂从PCB板上脱落的传统技术难点。传统技术很难保证表面安装型微型LED元件的寿命，本发明通过使用热变形温度在450℃以上的耐热性导线架基板，从而提供了保障光半导体元件的寿命和热冲击最小化的微型发光二极管。
本发明还有一个目的是：传统的PCB板(J)作为高价的基板材料并且只有在芯片焊盘镀金后才能使用，而且PCB板100％依靠进口，所以制造费用非常昂贵。上述发明提供了使用低价镀银导线架基板，而有效节省制造成本的微型发光二极管元件。
为了达到上述目的而发明的微型超薄发光二极管光半导体元件，每一对结构部件作为多数量中的一组，由很多的列排列而成，每个单元导线架是以绝缘型透光的环氧粘合剂作点粘合，使用粘合剂，把光元件芯片(350nm-470nm)与杯状焊盘采用芯片键合法(Die Bonding)，通过金质导线将上述导线架的框架部位与光元件芯片的电极相连接，将导线架的框架部位发光二极管的安全地安装在压模机上，透光的环氧树脂涂覆，涂覆结束后将一系列的导线架部件粘合在粘合剂上，然后用金刚石刀片将其切断，通过特定工艺流程完成制作。
附图说明
图1为传统表面安装型发光二极管构造的图示；
图2为按照本发明的表面安装型发光二极管图示。
具体实施方式
下面参照附图，将对本发明微型超薄芯片LED光半导体元件加以说明。
图2所示的是根据本发明的一个实例微型超薄发光二极管的内部构造的横截面的图示。如图所示，本发明微型超薄发光二极管由以下几部分构成：一对阳极导线架(Anode Lead Frame)(D)和阴极导线架(Cathode LeadFrame)(C)组成的导线架(I)；使阳极/阴极导线架(D)(C)和发光二极管芯片(A)通电用的导线(A1)(A2)；涂敷在两个导线架(D)(C)上部的透光环氧树脂(F)；在导线架(C)(D)下端形成10-50μm突起的下面的环氧树脂(H)；连接下面的环氧树脂(H)和与之相对应的上面的透光的环氧树脂(F)的阳极导线贯通孔(B)与阴极导线贯通孔(B1)。
下面简要说明本发明中芯片LED光半导体元件制作工艺流程。即：把成对的阴、阳极导线架排列多列作为一组的工艺流程；每对单元导线架用绝缘的透光的环氧粘合剂作点粘合(Dotting)的工艺流程；用粘合剂将光元件芯片(390nm-470nm芯片)在导线架焊盘部位采用芯片键合法(Die Bonding)的工艺流程；通过金质导线将上述导线架与光元件芯片的电极相连接的工艺流程；将导线架部件安全地安装在压模机上，通过透光的环氧树脂涂覆的工艺流程；涂覆结束后，将各列导线架部件用粘合剂粘好，然后用金刚石刀片(Blade)将其切断，最后经过特定工艺流程完成制作。
将表面发光芯片(InGaN、GaN的LED芯片)(390nm-470nm)用绝缘性的透光的涂覆粘合剂(E)(紫外(UV cure)粘合剂、绝缘透明粘合剂)，粘合在发光二极管芯片杯状焊盘(E1)上，避免了银环氧粘合剂的使用，彻底解决阳极和阴极间的短路问题。在表面发光芯片释放的光中，把从发射面反方向释放的光通过绝缘透光的环氧粘合剂进行透射，这个透射光在反射率很高的镀银芯片杯状焊盘上反射，聚焦在光出射方向，从而增加光亮度。
本发明使用了很薄的导线架(I)基板，涂覆时把导线架(I)和透光的环氧树脂(F)的下面的环氧树脂(H)的形成比导线架的导线部件相同平面状突起10-50μm，用贯通孔(B)(B1)将上部的透光的环氧树脂(F)与下面的环氧树脂(H)连接起来，使光元件的热冲击达到最小化。
本发明使用了热变形温度在450℃以上的耐热性导线架(I)基板，保证了光半导体元件的寿命和热冲击达到最小化，而且用价格低廉的镀银板作为导线架基板，有效地降低了制造成本。
工业适应性
本发明把表面发光芯片用绝缘性的透光的粘合剂粘合在发光二极管的芯片安装板上，避免了银环氧粘合剂的使用，彻底解决阳极和阴极间的短路问题。在表面发光芯片释放的光中，把发射面的反方向释放的光通过绝缘的透光的环氧粘合剂进行透射，这种透射光在反射率很高的镀银芯片杯状焊盘上反射，光聚焦在出射方向，从而增加光亮度；通过使用很薄的导线架基板，用透光的环氧树脂涂敷，使透光的环氧树脂的下面的环氧树脂，比导线架的导线部分的相同平面突出10-50μm，用贯通孔将上部的透光的环氧树脂与下面的环氧树脂连接起来，使光元件的热冲击力达到最小化，实现超薄型的芯片LED；使高温状态使用的机械装置，在回流焊接工艺流程(220℃-320℃)中达到热压力最小化，从而解决了由于表面安装型(SMD)微型发光二极管元件受到致命的热冲击力而造成的金质导线和银环氧树脂从PCB板上脱落的传统技术难点；通过使用热变形温度在450℃以上的耐热性导线架基板，保证了光半导体元件的寿命和热冲击力达到最小化，实现了超薄化的效果。

Claims (1)

1.一种表面安装型发光二极管，其特征在于包括：
导线架(I)和配置在所述导线架(I)上端的发光二极管芯片(A)，所述导线架包括阳极导线架(D)和阴极导线架(C)，为了保障导线架与发光二极管芯片(A)通电，导线架和发光二极管芯片(A)用通电导线连接；对导线架上部用透光的环氧树脂进行涂覆；
为了实现发光二极管厚度的最小化，使所述发光二极管的里面比平面凹进而形成的芯片杯状焊盘(E1)，所述芯片杯状焊盘(E1)边缘倾斜并镀银使光亮度高度集中；
所述发光二极管芯片(A)的透光的绝缘粘合剂(E)，用于将所述发光二极管芯片(A)通过所述透光的绝缘粘合剂(E)粘合在导线架(I)的芯片杯状焊盘(E1)的上端，通过所述粘合剂，能够消除阳极导线架和阴极导线架之间的短路问题并且使光集中在发射方向；
贯通孔(B)(B1)，所述贯通孔(B)(B1)通过将导线架(I)的芯片杯状焊盘(E1)的上面的透光的环氧树脂和下面的环氧树脂连接，使得上面的透光的环氧树脂(F)与下面的环氧树脂(H)实现一体化，从而防止连接导线短路；
通过上述的贯通孔(B)(B1)，下面的环氧树脂(H)与导线架(I)的上面的透光的环氧树脂(F)连接，并且所述下面的环氧树脂(H)在导线架(I)的下表面被涂覆为比导线架(I)的相同表面突起10-50μm。
CNB038208008A 2002-09-02 2003-09-01 表面安装型发光二极管 Expired - Fee Related CN100379036C (zh)

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Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9070850B2 (en) 2007-10-31 2015-06-30 Cree, Inc. Light emitting diode package and method for fabricating same
CN100428457C (zh) * 2005-07-12 2008-10-22 周万顺 表面黏着型发光二极管的基座及其制造方法
KR100650279B1 (ko) 2005-09-01 2006-11-27 삼성전기주식회사 발광 다이오드 소자
US7675145B2 (en) 2006-03-28 2010-03-09 Cree Hong Kong Limited Apparatus, system and method for use in mounting electronic elements
US7635915B2 (en) * 2006-04-26 2009-12-22 Cree Hong Kong Limited Apparatus and method for use in mounting electronic elements
US9711703B2 (en) 2007-02-12 2017-07-18 Cree Huizhou Opto Limited Apparatus, system and method for use in mounting electronic elements
JP5581060B2 (ja) 2007-03-08 2014-08-27 センセオニクス，インコーポレーテッド 過酷な環境のための発光ダイオード
US8866169B2 (en) 2007-10-31 2014-10-21 Cree, Inc. LED package with increased feature sizes
US10256385B2 (en) 2007-10-31 2019-04-09 Cree, Inc. Light emitting die (LED) packages and related methods
CN101459211B (zh) * 2007-12-11 2011-03-02 富士迈半导体精密工业（上海）有限公司 固态发光器件
JP2010103149A (ja) * 2008-10-21 2010-05-06 Showa Denko Kk 発光部材、発光装置、電子機器、機械装置、発光部材の製造方法、および発光装置の製造方法
US8368112B2 (en) 2009-01-14 2013-02-05 Cree Huizhou Opto Limited Aligned multiple emitter package
DE102009012517A1 (de) 2009-03-10 2010-09-16 Osram Opto Semiconductors Gmbh Optoelektronisches Halbleiterbauelement
JP4951090B2 (ja) 2010-01-29 2012-06-13 株式会社東芝 Ｌｅｄパッケージ
CN102163685A (zh) * 2010-02-21 2011-08-24 福华电子股份有限公司 发光二极管支架料片结构
CN102129986B (zh) * 2010-12-29 2012-10-24 朝阳无线电元件有限责任公司 采用冶金键合方法制造玻封二极管的方法
KR101545926B1 (ko) * 2013-11-27 2015-08-20 엘지디스플레이 주식회사 광원모듈 및 이를 포함하는 백라이트 유닛
US9601670B2 (en) 2014-07-11 2017-03-21 Cree, Inc. Method to form primary optic with variable shapes and/or geometries without a substrate
US10622522B2 (en) 2014-09-05 2020-04-14 Theodore Lowes LED packages with chips having insulated surfaces
KR20230110346A (ko) * 2020-12-04 2023-07-21 몰렉스 엘엘씨 고전력 전자 장치 및 이의 제조 방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN85104012A (zh) * 1985-05-22 1986-09-10 复旦大学 具有金属反射腔的半导体平面发光器件
JPH01146376A (ja) * 1987-12-02 1989-06-08 Stanley Electric Co Ltd チップｌｅｄ
JPH10321918A (ja) * 1997-05-20 1998-12-04 Nichia Chem Ind Ltd 光電装置及びその製造方法
CN1354525A (zh) * 2000-11-20 2002-06-19 李志书 发光二极管晶片的封装及其印刷电路板基底的结构
CN1366714A (zh) * 2000-02-09 2002-08-28 日本光源股份有限公司 光源装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6195536A (ja) * 1984-10-16 1986-05-14 Sanken Electric Co Ltd 樹脂封止型半導体装置の製造方法
JP3256951B2 (ja) * 1995-11-09 2002-02-18 日亜化学工業株式会社 発光ダイオード
JP3253265B2 (ja) * 1997-10-03 2002-02-04 ローム株式会社 チップ型発光素子

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN85104012A (zh) * 1985-05-22 1986-09-10 复旦大学 具有金属反射腔的半导体平面发光器件
JPH01146376A (ja) * 1987-12-02 1989-06-08 Stanley Electric Co Ltd チップｌｅｄ
JPH10321918A (ja) * 1997-05-20 1998-12-04 Nichia Chem Ind Ltd 光電装置及びその製造方法
CN1366714A (zh) * 2000-02-09 2002-08-28 日本光源股份有限公司 光源装置
CN1354525A (zh) * 2000-11-20 2002-06-19 李志书 发光二极管晶片的封装及其印刷电路板基底的结构

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