WO2003046968A1 - Procede de production d'une tranche de silicone, tranche de silicone et tranche soi - Google Patents

Procede de production d'une tranche de silicone, tranche de silicone et tranche soi Download PDF

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Publication number
WO2003046968A1
WO2003046968A1 PCT/JP2002/012276 JP0212276W WO03046968A1 WO 2003046968 A1 WO2003046968 A1 WO 2003046968A1 JP 0212276 W JP0212276 W JP 0212276W WO 03046968 A1 WO03046968 A1 WO 03046968A1
Authority
WO
WIPO (PCT)
Prior art keywords
silicon wafer
wafer
production method
alkali
lapping
Prior art date
Application number
PCT/JP2002/012276
Other languages
English (en)
French (fr)
Inventor
Naoto Iizuka
Takashi Nihonmatsu
Masahiko Yoshida
Seiichi Miyazaki
Original Assignee
Shin-Etsu Handotai Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin-Etsu Handotai Co., Ltd. filed Critical Shin-Etsu Handotai Co., Ltd.
Priority to US10/467,010 priority Critical patent/US20040072437A1/en
Priority to EP02803927A priority patent/EP1450396A1/en
Publication of WO2003046968A1 publication Critical patent/WO2003046968A1/ja

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions
    • C09K13/02—Etching, surface-brightening or pickling compositions containing an alkali metal hydroxide
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09K—MATERIALS FOR MISCELLANEOUS APPLICATIONS, NOT PROVIDED FOR ELSEWHERE
    • C09K13/00—Etching, surface-brightening or pickling compositions
    • C09K13/04—Etching, surface-brightening or pickling compositions containing an inorganic acid
    • C09K13/08—Etching, surface-brightening or pickling compositions containing an inorganic acid containing a fluorine compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12229—Intermediate article [e.g., blank, etc.]

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Weting (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Element Separation (AREA)
PCT/JP2002/012276 2001-11-28 2002-11-25 Procede de production d'une tranche de silicone, tranche de silicone et tranche soi WO2003046968A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US10/467,010 US20040072437A1 (en) 2001-11-28 2002-11-25 Production method for silicon wafer and silicon wafer and soi wafer
EP02803927A EP1450396A1 (en) 2001-11-28 2002-11-25 Production method for silicon wafer and silicon wafer and soi wafer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001-362417 2001-11-28
JP2001362417 2001-11-28

Publications (1)

Publication Number Publication Date
WO2003046968A1 true WO2003046968A1 (fr) 2003-06-05

Family

ID=19172920

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/012276 WO2003046968A1 (fr) 2001-11-28 2002-11-25 Procede de production d'une tranche de silicone, tranche de silicone et tranche soi

Country Status (7)

Country Link
US (1) US20040072437A1 (ja)
EP (1) EP1450396A1 (ja)
JP (2) JP2003229392A (ja)
KR (1) KR20060017676A (ja)
CN (1) CN1489783A (ja)
TW (1) TWI256084B (ja)
WO (1) WO2003046968A1 (ja)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4407188B2 (ja) * 2003-07-23 2010-02-03 信越半導体株式会社 シリコンウェーハの製造方法およびシリコンウェーハ
JP2005129676A (ja) * 2003-10-23 2005-05-19 Sumitomo Mitsubishi Silicon Corp Ｓｏｉ基板用シリコン基板、ｓｏｉ基板、及びそのｓｏｉ基板の製造方法
JP4273943B2 (ja) * 2003-12-01 2009-06-03 株式会社Ｓｕｍｃｏ シリコンウェーハの製造方法
JP2005251266A (ja) * 2004-03-03 2005-09-15 Shin Etsu Chem Co Ltd 磁気記録媒用基板体およびその製造方法
JP4424039B2 (ja) * 2004-04-02 2010-03-03 株式会社Ｓｕｍｃｏ 半導体ウェーハの製造方法
JP4517867B2 (ja) * 2005-01-31 2010-08-04 株式会社Ｓｕｍｃｏ シリコンウェーハ表面形状制御用エッチング液及び該エッチング液を用いたシリコンウェーハの製造方法
US7838387B2 (en) * 2006-01-13 2010-11-23 Sumco Corporation Method for manufacturing SOI wafer
JP5017709B2 (ja) 2006-09-07 2012-09-05 ジルトロニック アクチエンゲゼルシャフト シリコンウェーハのエッチング方法および半導体シリコンウェーハの製造方法
JP2008166805A (ja) * 2006-12-29 2008-07-17 Siltron Inc 高平坦度シリコンウェハーの製造方法
JP5040564B2 (ja) * 2007-09-28 2012-10-03 株式会社Ｓｕｍｃｏ シリコンウェーハの製造方法
JP5515253B2 (ja) * 2008-08-07 2014-06-11 株式会社Ｓｕｍｃｏ 半導体ウェーハの製造方法
DE112010001432T5 (de) * 2009-03-31 2012-10-25 Kurita Water Industries, Ltd. Vorrichtung und Verfahren zur Aufbereitung einer Ätzlösung
DE102009025242B4 (de) * 2009-06-17 2013-05-23 Siltronic Ag Verfahren zum beidseitigen chemischen Schleifen einer Halbleiterscheibe
US8440541B2 (en) * 2010-02-25 2013-05-14 Memc Electronic Materials, Inc. Methods for reducing the width of the unbonded region in SOI structures
JP2013052503A (ja) * 2011-05-20 2013-03-21 Ohara Inc 光学部品の製造方法
JP2013115307A (ja) * 2011-11-30 2013-06-10 Sumitomo Electric Ind Ltd Ｉｉｉ族窒化物複合基板の製造方法
US8839883B2 (en) 2012-02-13 2014-09-23 Halliburton Energy Services, Inc. Piston tractor system for use in subterranean wells
JP5862492B2 (ja) * 2012-07-09 2016-02-16 信越半導体株式会社 半導体ウェーハの評価方法及び製造方法
JP6001941B2 (ja) * 2012-07-11 2016-10-05 東京応化工業株式会社 積層体形成方法および積層体形成システム
JP6418130B2 (ja) * 2015-10-20 2018-11-07 株式会社Sumco 半導体ウェーハの加工方法
JP6327329B1 (ja) * 2016-12-20 2018-05-23 株式会社Sumco シリコンウェーハの研磨方法およびシリコンウェーハの製造方法
JP6717267B2 (ja) * 2017-07-10 2020-07-01 株式会社Sumco シリコンウェーハの製造方法
KR102287116B1 (ko) * 2017-08-31 2021-08-05 가부시키가이샤 사무코 실리콘 웨이퍼의 양면 연마 방법
KR102060085B1 (ko) * 2018-08-20 2019-12-27 에스케이실트론 주식회사 웨이퍼의 결함 영역을 평가하는 방법
JP7103305B2 (ja) * 2019-05-29 2022-07-20 信越半導体株式会社 インゴットの切断方法
JP7306234B2 (ja) * 2019-11-19 2023-07-11 株式会社Sumco ウェーハの研磨方法及びシリコンウェーハ

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0737871A (ja) * 1993-07-24 1995-02-07 Shin Etsu Handotai Co Ltd シリコンウエーハのエッチング方法
US6099748A (en) * 1997-12-11 2000-08-08 Shin-Etsu Handotai Co., Ltd. Silicon wafer etching method and silicon wafer etchant
JP2001102331A (ja) * 1999-09-30 2001-04-13 Mitsubishi Materials Silicon Corp 高平坦度裏面梨地ウェーハおよびその製造方法ならびに該製造方法に用いられる表面研削裏面ラップ装置
JP2001208743A (ja) * 2000-01-26 2001-08-03 Shin Etsu Handotai Co Ltd シリコンウエーハ中の金属不純物濃度評価方法
EP1134808A1 (en) * 1999-07-15 2001-09-19 Shin-Etsu Handotai Co., Ltd Method for producing bonded wafer and bonded wafer
JP2001338899A (ja) * 2000-05-26 2001-12-07 Shin Etsu Handotai Co Ltd 半導体ウエーハの製造方法及び半導体ウエーハ

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3416855B2 (ja) * 1994-04-15 2003-06-16 株式会社フジミインコーポレーテッド 研磨用組成物および研磨方法
JP3605927B2 (ja) * 1996-02-28 2004-12-22 株式会社神戸製鋼所 ウエハーまたは基板材料の再生方法
US6454852B2 (en) * 1999-07-14 2002-09-24 Seh America, Inc. High efficiency silicon wafer optimized for advanced semiconductor devices
US6399499B1 (en) * 1999-09-14 2002-06-04 Jeong Gey Lee Method for fabricating an electrode of a plasma chamber
DE19953152C1 (de) * 1999-11-04 2001-02-15 Wacker Siltronic Halbleitermat Verfahren zur naßchemischen Oberflächenbehandlung einer Halbleiterscheibe

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0737871A (ja) * 1993-07-24 1995-02-07 Shin Etsu Handotai Co Ltd シリコンウエーハのエッチング方法
US6099748A (en) * 1997-12-11 2000-08-08 Shin-Etsu Handotai Co., Ltd. Silicon wafer etching method and silicon wafer etchant
EP1134808A1 (en) * 1999-07-15 2001-09-19 Shin-Etsu Handotai Co., Ltd Method for producing bonded wafer and bonded wafer
JP2001102331A (ja) * 1999-09-30 2001-04-13 Mitsubishi Materials Silicon Corp 高平坦度裏面梨地ウェーハおよびその製造方法ならびに該製造方法に用いられる表面研削裏面ラップ装置
JP2001208743A (ja) * 2000-01-26 2001-08-03 Shin Etsu Handotai Co Ltd シリコンウエーハ中の金属不純物濃度評価方法
JP2001338899A (ja) * 2000-05-26 2001-12-07 Shin Etsu Handotai Co Ltd 半導体ウエーハの製造方法及び半導体ウエーハ

Also Published As

Publication number Publication date
KR20060017676A (ko) 2006-02-27
EP1450396A1 (en) 2004-08-25
US20040072437A1 (en) 2004-04-15
TWI256084B (en) 2006-06-01
CN1489783A (zh) 2004-04-14
TW200300465A (en) 2003-06-01
JP2003229392A (ja) 2003-08-15
JP2006222453A (ja) 2006-08-24

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